tm6000-core.c 26 KB

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  1. /*
  2. * tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
  3. *
  4. * Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
  5. *
  6. * Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
  7. * - DVB-T support
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation version 2
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/module.h>
  23. #include <linux/kernel.h>
  24. #include <linux/slab.h>
  25. #include <linux/usb.h>
  26. #include <linux/i2c.h>
  27. #include "tm6000.h"
  28. #include "tm6000-regs.h"
  29. #include <media/v4l2-common.h>
  30. #include <media/tuner.h>
  31. #define USB_TIMEOUT (5 * HZ) /* ms */
  32. int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req,
  33. u16 value, u16 index, u8 *buf, u16 len)
  34. {
  35. int ret, i;
  36. unsigned int pipe;
  37. u8 *data = NULL;
  38. mutex_lock(&dev->usb_lock);
  39. if (len)
  40. data = kzalloc(len, GFP_KERNEL);
  41. if (req_type & USB_DIR_IN)
  42. pipe = usb_rcvctrlpipe(dev->udev, 0);
  43. else {
  44. pipe = usb_sndctrlpipe(dev->udev, 0);
  45. memcpy(data, buf, len);
  46. }
  47. if (tm6000_debug & V4L2_DEBUG_I2C) {
  48. printk(KERN_DEBUG "(dev %p, pipe %08x): ", dev->udev, pipe);
  49. printk(KERN_CONT "%s: %02x %02x %02x %02x %02x %02x %02x %02x ",
  50. (req_type & USB_DIR_IN) ? " IN" : "OUT",
  51. req_type, req, value&0xff, value>>8, index&0xff,
  52. index>>8, len&0xff, len>>8);
  53. if (!(req_type & USB_DIR_IN)) {
  54. printk(KERN_CONT ">>> ");
  55. for (i = 0; i < len; i++)
  56. printk(KERN_CONT " %02x", buf[i]);
  57. printk(KERN_CONT "\n");
  58. }
  59. }
  60. ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index,
  61. data, len, USB_TIMEOUT);
  62. if (req_type & USB_DIR_IN)
  63. memcpy(buf, data, len);
  64. if (tm6000_debug & V4L2_DEBUG_I2C) {
  65. if (ret < 0) {
  66. if (req_type & USB_DIR_IN)
  67. printk(KERN_DEBUG "<<< (len=%d)\n", len);
  68. printk(KERN_CONT "%s: Error #%d\n", __func__, ret);
  69. } else if (req_type & USB_DIR_IN) {
  70. printk(KERN_CONT "<<< ");
  71. for (i = 0; i < len; i++)
  72. printk(KERN_CONT " %02x", buf[i]);
  73. printk(KERN_CONT "\n");
  74. }
  75. }
  76. kfree(data);
  77. msleep(5);
  78. mutex_unlock(&dev->usb_lock);
  79. return ret;
  80. }
  81. int tm6000_set_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  82. {
  83. return
  84. tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
  85. req, value, index, NULL, 0);
  86. }
  87. EXPORT_SYMBOL_GPL(tm6000_set_reg);
  88. int tm6000_get_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  89. {
  90. int rc;
  91. u8 buf[1];
  92. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  93. value, index, buf, 1);
  94. if (rc < 0)
  95. return rc;
  96. return *buf;
  97. }
  98. EXPORT_SYMBOL_GPL(tm6000_get_reg);
  99. int tm6000_set_reg_mask(struct tm6000_core *dev, u8 req, u16 value,
  100. u16 index, u16 mask)
  101. {
  102. int rc;
  103. u8 buf[1];
  104. u8 new_index;
  105. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  106. value, 0, buf, 1);
  107. if (rc < 0)
  108. return rc;
  109. new_index = (buf[0] & ~mask) | (index & mask);
  110. if (new_index == buf[0])
  111. return 0;
  112. return tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
  113. req, value, new_index, NULL, 0);
  114. }
  115. EXPORT_SYMBOL_GPL(tm6000_set_reg_mask);
  116. int tm6000_get_reg16(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  117. {
  118. int rc;
  119. u8 buf[2];
  120. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  121. value, index, buf, 2);
  122. if (rc < 0)
  123. return rc;
  124. return buf[1]|buf[0]<<8;
  125. }
  126. int tm6000_get_reg32(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  127. {
  128. int rc;
  129. u8 buf[4];
  130. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  131. value, index, buf, 4);
  132. if (rc < 0)
  133. return rc;
  134. return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24;
  135. }
  136. int tm6000_i2c_reset(struct tm6000_core *dev, u16 tsleep)
  137. {
  138. int rc;
  139. rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0);
  140. if (rc < 0)
  141. return rc;
  142. msleep(tsleep);
  143. rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1);
  144. msleep(tsleep);
  145. return rc;
  146. }
  147. void tm6000_set_fourcc_format(struct tm6000_core *dev)
  148. {
  149. if (dev->dev_type == TM6010) {
  150. int val;
  151. val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, 0) & 0xfc;
  152. if (dev->fourcc == V4L2_PIX_FMT_UYVY)
  153. tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val);
  154. else
  155. tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val | 1);
  156. } else {
  157. if (dev->fourcc == V4L2_PIX_FMT_UYVY)
  158. tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
  159. else
  160. tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90);
  161. }
  162. }
  163. static void tm6000_set_vbi(struct tm6000_core *dev)
  164. {
  165. /*
  166. * FIXME:
  167. * VBI lines and start/end are different between 60Hz and 50Hz
  168. * So, it is very likely that we need to change the config to
  169. * something that takes it into account, doing something different
  170. * if (dev->norm & V4L2_STD_525_60)
  171. */
  172. if (dev->dev_type == TM6010) {
  173. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
  174. tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27);
  175. tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55);
  176. tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66);
  177. tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66);
  178. tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66);
  179. tm6000_set_reg(dev,
  180. TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66);
  181. tm6000_set_reg(dev,
  182. TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66);
  183. tm6000_set_reg(dev,
  184. TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66);
  185. tm6000_set_reg(dev,
  186. TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66);
  187. tm6000_set_reg(dev,
  188. TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66);
  189. tm6000_set_reg(dev,
  190. TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66);
  191. tm6000_set_reg(dev,
  192. TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66);
  193. tm6000_set_reg(dev,
  194. TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66);
  195. tm6000_set_reg(dev,
  196. TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66);
  197. tm6000_set_reg(dev,
  198. TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66);
  199. tm6000_set_reg(dev,
  200. TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66);
  201. tm6000_set_reg(dev,
  202. TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66);
  203. tm6000_set_reg(dev,
  204. TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66);
  205. tm6000_set_reg(dev,
  206. TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00);
  207. tm6000_set_reg(dev,
  208. TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00);
  209. tm6000_set_reg(dev,
  210. TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01);
  211. tm6000_set_reg(dev,
  212. TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00);
  213. tm6000_set_reg(dev,
  214. TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02);
  215. tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35);
  216. tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0);
  217. tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11);
  218. tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c);
  219. tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01);
  220. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
  221. }
  222. }
  223. int tm6000_init_analog_mode(struct tm6000_core *dev)
  224. {
  225. struct v4l2_frequency f;
  226. if (dev->dev_type == TM6010) {
  227. u8 active = TM6010_REQ07_RCC_ACTIVE_IF_AUDIO_ENABLE;
  228. if (!dev->radio)
  229. active |= TM6010_REQ07_RCC_ACTIVE_IF_VIDEO_ENABLE;
  230. /* Enable video and audio */
  231. tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
  232. active, 0x60);
  233. /* Disable TS input */
  234. tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
  235. 0x00, 0x40);
  236. } else {
  237. /* Enables soft reset */
  238. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
  239. if (dev->scaler)
  240. /* Disable Hfilter and Enable TS Drop err */
  241. tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20);
  242. else /* Enable Hfilter and disable TS Drop err */
  243. tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80);
  244. tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88);
  245. tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x23);
  246. tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0);
  247. tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8);
  248. tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06);
  249. tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f);
  250. /* AP Software reset */
  251. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
  252. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
  253. tm6000_set_fourcc_format(dev);
  254. /* Disables soft reset */
  255. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
  256. }
  257. msleep(20);
  258. /* Tuner firmware can now be loaded */
  259. /*
  260. * FIXME: This is a hack! xc3028 "sleeps" when no channel is detected
  261. * for more than a few seconds. Not sure why, as this behavior does
  262. * not happen on other devices with xc3028. So, I suspect that it
  263. * is yet another bug at tm6000. After start sleeping, decoding
  264. * doesn't start automatically. Instead, it requires some
  265. * I2C commands to wake it up. As we want to have image at the
  266. * beginning, we needed to add this hack. The better would be to
  267. * discover some way to make tm6000 to wake up without this hack.
  268. */
  269. f.frequency = dev->freq;
  270. v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
  271. msleep(100);
  272. tm6000_set_standard(dev);
  273. tm6000_set_vbi(dev);
  274. tm6000_set_audio_bitrate(dev, 48000);
  275. /* switch dvb led off */
  276. if (dev->gpio.dvb_led) {
  277. tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
  278. dev->gpio.dvb_led, 0x01);
  279. }
  280. return 0;
  281. }
  282. int tm6000_init_digital_mode(struct tm6000_core *dev)
  283. {
  284. if (dev->dev_type == TM6010) {
  285. /* Disable video and audio */
  286. tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
  287. 0x00, 0x60);
  288. /* Enable TS input */
  289. tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
  290. 0x40, 0x40);
  291. /* all power down, but not the digital data port */
  292. tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28);
  293. tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc);
  294. tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff);
  295. } else {
  296. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
  297. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
  298. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
  299. tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x08);
  300. tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
  301. tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
  302. tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0xd8);
  303. tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40);
  304. tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
  305. tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09);
  306. tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x37);
  307. tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8);
  308. tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0);
  309. tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60);
  310. tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
  311. tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
  312. tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0x08);
  313. msleep(50);
  314. tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
  315. msleep(50);
  316. tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
  317. msleep(50);
  318. tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
  319. msleep(100);
  320. }
  321. /* switch dvb led on */
  322. if (dev->gpio.dvb_led) {
  323. tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
  324. dev->gpio.dvb_led, 0x00);
  325. }
  326. return 0;
  327. }
  328. EXPORT_SYMBOL(tm6000_init_digital_mode);
  329. struct reg_init {
  330. u8 req;
  331. u8 reg;
  332. u8 val;
  333. };
  334. /* The meaning of those initializations are unknown */
  335. static struct reg_init tm6000_init_tab[] = {
  336. /* REG VALUE */
  337. { TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f },
  338. { TM6010_REQ07_RFF_SOFT_RESET, 0x08 },
  339. { TM6010_REQ07_RFF_SOFT_RESET, 0x00 },
  340. { TM6010_REQ07_RD5_POWERSAVE, 0x4f },
  341. { TM6000_REQ07_RDA_CLK_SEL, 0x23 },
  342. { TM6000_REQ07_RDB_OUT_SEL, 0x08 },
  343. { TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x00 },
  344. { TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x10 },
  345. { TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x00 },
  346. { TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x00 },
  347. { TM6000_REQ07_REB_VADC_AADC_MODE, 0x64 }, /* 48000 bits/sample, external input */
  348. { TM6000_REQ07_REE_VADC_CTRL_SEL_CONTROL, 0xc2 },
  349. { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */
  350. { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
  351. { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
  352. { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
  353. { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
  354. { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
  355. { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
  356. { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
  357. { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
  358. { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
  359. { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
  360. { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
  361. { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
  362. { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
  363. { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
  364. { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
  365. { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
  366. { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
  367. { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
  368. { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
  369. { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
  370. { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
  371. { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
  372. { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
  373. { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
  374. { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
  375. { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
  376. { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
  377. { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
  378. { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
  379. { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
  380. { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
  381. { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
  382. { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
  383. { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
  384. { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
  385. { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
  386. { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
  387. { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
  388. { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
  389. { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
  390. { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
  391. { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
  392. { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
  393. { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
  394. { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
  395. { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
  396. { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
  397. { TM6010_REQ07_RC3_HSTART1, 0x88 },
  398. { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */
  399. { TM6010_REQ05_R18_IMASK7, 0x00 },
  400. };
  401. static struct reg_init tm6010_init_tab[] = {
  402. { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 },
  403. { TM6010_REQ07_RC4_HSTART0, 0xa0 },
  404. { TM6010_REQ07_RC6_HEND0, 0x40 },
  405. { TM6010_REQ07_RCA_VEND0, 0x31 },
  406. { TM6010_REQ07_RCC_ACTIVE_IF, 0xe1 },
  407. { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 },
  408. { TM6010_REQ07_RFE_POWER_DOWN, 0x7f },
  409. { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 },
  410. { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 },
  411. { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 },
  412. { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 },
  413. { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 },
  414. { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
  415. { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
  416. { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
  417. { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
  418. { TM6010_REQ07_R3F_RESET, 0x01 },
  419. { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
  420. { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
  421. { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
  422. { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
  423. { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
  424. { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
  425. { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
  426. { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
  427. { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
  428. { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
  429. { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
  430. { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
  431. { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
  432. { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
  433. { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
  434. { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
  435. { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
  436. { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
  437. { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
  438. { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
  439. { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
  440. { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
  441. { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
  442. { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
  443. { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
  444. { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
  445. { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
  446. { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
  447. { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
  448. { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
  449. { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
  450. { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
  451. { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
  452. { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
  453. { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
  454. { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
  455. { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
  456. { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
  457. { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
  458. { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
  459. { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
  460. { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
  461. { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
  462. { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
  463. { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
  464. { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
  465. { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
  466. { TM6010_REQ07_RC3_HSTART1, 0x88 },
  467. { TM6010_REQ07_R3F_RESET, 0x00 },
  468. { TM6010_REQ05_R18_IMASK7, 0x00 },
  469. { TM6010_REQ07_RD8_IR_LEADER1, 0xaa },
  470. { TM6010_REQ07_RD8_IR_LEADER0, 0x30 },
  471. { TM6010_REQ07_RD8_IR_PULSE_CNT1, 0x20 },
  472. { TM6010_REQ07_RD8_IR_PULSE_CNT0, 0xd0 },
  473. { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
  474. { TM6010_REQ07_RD8_IR, 0x2f },
  475. /* set remote wakeup key:any key wakeup */
  476. { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
  477. { TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0xff },
  478. };
  479. int tm6000_init(struct tm6000_core *dev)
  480. {
  481. int board, rc = 0, i, size;
  482. struct reg_init *tab;
  483. /* Check board revision */
  484. board = tm6000_get_reg32(dev, REQ_40_GET_VERSION, 0, 0);
  485. if (board >= 0) {
  486. switch (board & 0xff) {
  487. case 0xf3:
  488. printk(KERN_INFO "Found tm6000\n");
  489. if (dev->dev_type != TM6000)
  490. dev->dev_type = TM6000;
  491. break;
  492. case 0xf4:
  493. printk(KERN_INFO "Found tm6010\n");
  494. if (dev->dev_type != TM6010)
  495. dev->dev_type = TM6010;
  496. break;
  497. default:
  498. printk(KERN_INFO "Unknown board version = 0x%08x\n", board);
  499. }
  500. } else
  501. printk(KERN_ERR "Error %i while retrieving board version\n", board);
  502. if (dev->dev_type == TM6010) {
  503. tab = tm6010_init_tab;
  504. size = ARRAY_SIZE(tm6010_init_tab);
  505. } else {
  506. tab = tm6000_init_tab;
  507. size = ARRAY_SIZE(tm6000_init_tab);
  508. }
  509. /* Load board's initialization table */
  510. for (i = 0; i < size; i++) {
  511. rc = tm6000_set_reg(dev, tab[i].req, tab[i].reg, tab[i].val);
  512. if (rc < 0) {
  513. printk(KERN_ERR "Error %i while setting req %d, "
  514. "reg %d to value %d\n", rc,
  515. tab[i].req, tab[i].reg, tab[i].val);
  516. return rc;
  517. }
  518. }
  519. msleep(5); /* Just to be conservative */
  520. rc = tm6000_cards_setup(dev);
  521. return rc;
  522. }
  523. int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
  524. {
  525. int val = 0;
  526. u8 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
  527. u8 areg_0a = 0x91; /* SIF 48KHz */
  528. switch (bitrate) {
  529. case 48000:
  530. areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
  531. areg_0a = 0x91; /* SIF 48KHz */
  532. dev->audio_bitrate = bitrate;
  533. break;
  534. case 32000:
  535. areg_f0 = 0x00; /* ADC MCLK = 375 Fs */
  536. areg_0a = 0x90; /* SIF 32KHz */
  537. dev->audio_bitrate = bitrate;
  538. break;
  539. default:
  540. return -EINVAL;
  541. }
  542. /* enable I2S, if we use sif or external I2S device */
  543. if (dev->dev_type == TM6010) {
  544. val = tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, areg_0a);
  545. if (val < 0)
  546. return val;
  547. val = tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
  548. areg_f0, 0xf0);
  549. if (val < 0)
  550. return val;
  551. } else {
  552. val = tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
  553. areg_f0, 0xf0);
  554. if (val < 0)
  555. return val;
  556. }
  557. return 0;
  558. }
  559. EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
  560. int tm6000_set_audio_rinput(struct tm6000_core *dev)
  561. {
  562. if (dev->dev_type == TM6010) {
  563. /* Audio crossbar setting, default SIF1 */
  564. u8 areg_f0;
  565. u8 areg_07 = 0x10;
  566. switch (dev->rinput.amux) {
  567. case TM6000_AMUX_SIF1:
  568. case TM6000_AMUX_SIF2:
  569. areg_f0 = 0x03;
  570. areg_07 = 0x30;
  571. break;
  572. case TM6000_AMUX_ADC1:
  573. areg_f0 = 0x00;
  574. break;
  575. case TM6000_AMUX_ADC2:
  576. areg_f0 = 0x08;
  577. break;
  578. case TM6000_AMUX_I2S:
  579. areg_f0 = 0x04;
  580. break;
  581. default:
  582. printk(KERN_INFO "%s: audio input dosn't support\n",
  583. dev->name);
  584. return 0;
  585. break;
  586. }
  587. /* Set audio input crossbar */
  588. tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
  589. areg_f0, 0x0f);
  590. /* Mux overflow workaround */
  591. tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
  592. areg_07, 0xf0);
  593. } else {
  594. u8 areg_eb;
  595. /* Audio setting, default LINE1 */
  596. switch (dev->rinput.amux) {
  597. case TM6000_AMUX_ADC1:
  598. areg_eb = 0x00;
  599. break;
  600. case TM6000_AMUX_ADC2:
  601. areg_eb = 0x04;
  602. break;
  603. default:
  604. printk(KERN_INFO "%s: audio input dosn't support\n",
  605. dev->name);
  606. return 0;
  607. break;
  608. }
  609. /* Set audio input */
  610. tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
  611. areg_eb, 0x0f);
  612. }
  613. return 0;
  614. }
  615. static void tm6010_set_mute_sif(struct tm6000_core *dev, u8 mute)
  616. {
  617. u8 mute_reg = 0;
  618. if (mute)
  619. mute_reg = 0x08;
  620. tm6000_set_reg_mask(dev, TM6010_REQ08_R0A_A_I2S_MOD, mute_reg, 0x08);
  621. }
  622. static void tm6010_set_mute_adc(struct tm6000_core *dev, u8 mute)
  623. {
  624. u8 mute_reg = 0;
  625. if (mute)
  626. mute_reg = 0x20;
  627. if (dev->dev_type == TM6010) {
  628. tm6000_set_reg_mask(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL,
  629. mute_reg, 0x20);
  630. tm6000_set_reg_mask(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL,
  631. mute_reg, 0x20);
  632. } else {
  633. tm6000_set_reg_mask(dev, TM6000_REQ07_REC_VADC_AADC_LVOL,
  634. mute_reg, 0x20);
  635. tm6000_set_reg_mask(dev, TM6000_REQ07_RED_VADC_AADC_RVOL,
  636. mute_reg, 0x20);
  637. }
  638. }
  639. int tm6000_tvaudio_set_mute(struct tm6000_core *dev, u8 mute)
  640. {
  641. enum tm6000_mux mux;
  642. if (dev->radio)
  643. mux = dev->rinput.amux;
  644. else
  645. mux = dev->vinput[dev->input].amux;
  646. switch (mux) {
  647. case TM6000_AMUX_SIF1:
  648. case TM6000_AMUX_SIF2:
  649. if (dev->dev_type == TM6010)
  650. tm6010_set_mute_sif(dev, mute);
  651. else {
  652. printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has"
  653. " SIF audio inputs. Please check the %s"
  654. " configuration.\n", dev->name);
  655. return -EINVAL;
  656. }
  657. break;
  658. case TM6000_AMUX_ADC1:
  659. case TM6000_AMUX_ADC2:
  660. tm6010_set_mute_adc(dev, mute);
  661. break;
  662. default:
  663. return -EINVAL;
  664. break;
  665. }
  666. return 0;
  667. }
  668. static void tm6010_set_volume_sif(struct tm6000_core *dev, int vol)
  669. {
  670. u8 vol_reg;
  671. vol_reg = vol & 0x0F;
  672. if (vol < 0)
  673. vol_reg |= 0x40;
  674. tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, vol_reg);
  675. tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, vol_reg);
  676. }
  677. static void tm6010_set_volume_adc(struct tm6000_core *dev, int vol)
  678. {
  679. u8 vol_reg;
  680. vol_reg = (vol + 0x10) & 0x1f;
  681. if (dev->dev_type == TM6010) {
  682. tm6000_set_reg(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, vol_reg);
  683. tm6000_set_reg(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, vol_reg);
  684. } else {
  685. tm6000_set_reg(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, vol_reg);
  686. tm6000_set_reg(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, vol_reg);
  687. }
  688. }
  689. void tm6000_set_volume(struct tm6000_core *dev, int vol)
  690. {
  691. enum tm6000_mux mux;
  692. if (dev->radio) {
  693. mux = dev->rinput.amux;
  694. vol += 8; /* Offset to 0 dB */
  695. } else
  696. mux = dev->vinput[dev->input].amux;
  697. switch (mux) {
  698. case TM6000_AMUX_SIF1:
  699. case TM6000_AMUX_SIF2:
  700. if (dev->dev_type == TM6010)
  701. tm6010_set_volume_sif(dev, vol);
  702. else
  703. printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has"
  704. " SIF audio inputs. Please check the %s"
  705. " configuration.\n", dev->name);
  706. break;
  707. case TM6000_AMUX_ADC1:
  708. case TM6000_AMUX_ADC2:
  709. tm6010_set_volume_adc(dev, vol);
  710. break;
  711. default:
  712. break;
  713. }
  714. }
  715. static LIST_HEAD(tm6000_devlist);
  716. static DEFINE_MUTEX(tm6000_devlist_mutex);
  717. /*
  718. * tm6000_realease_resource()
  719. */
  720. void tm6000_remove_from_devlist(struct tm6000_core *dev)
  721. {
  722. mutex_lock(&tm6000_devlist_mutex);
  723. list_del(&dev->devlist);
  724. mutex_unlock(&tm6000_devlist_mutex);
  725. };
  726. void tm6000_add_into_devlist(struct tm6000_core *dev)
  727. {
  728. mutex_lock(&tm6000_devlist_mutex);
  729. list_add_tail(&dev->devlist, &tm6000_devlist);
  730. mutex_unlock(&tm6000_devlist_mutex);
  731. };
  732. /*
  733. * Extension interface
  734. */
  735. static LIST_HEAD(tm6000_extension_devlist);
  736. int tm6000_call_fillbuf(struct tm6000_core *dev, enum tm6000_ops_type type,
  737. char *buf, int size)
  738. {
  739. struct tm6000_ops *ops = NULL;
  740. /* FIXME: tm6000_extension_devlist_lock should be a spinlock */
  741. if (!list_empty(&tm6000_extension_devlist)) {
  742. list_for_each_entry(ops, &tm6000_extension_devlist, next) {
  743. if (ops->fillbuf && ops->type == type)
  744. ops->fillbuf(dev, buf, size);
  745. }
  746. }
  747. return 0;
  748. }
  749. int tm6000_register_extension(struct tm6000_ops *ops)
  750. {
  751. struct tm6000_core *dev = NULL;
  752. mutex_lock(&tm6000_devlist_mutex);
  753. list_add_tail(&ops->next, &tm6000_extension_devlist);
  754. list_for_each_entry(dev, &tm6000_devlist, devlist) {
  755. ops->init(dev);
  756. printk(KERN_INFO "%s: Initialized (%s) extension\n",
  757. dev->name, ops->name);
  758. }
  759. mutex_unlock(&tm6000_devlist_mutex);
  760. return 0;
  761. }
  762. EXPORT_SYMBOL(tm6000_register_extension);
  763. void tm6000_unregister_extension(struct tm6000_ops *ops)
  764. {
  765. struct tm6000_core *dev = NULL;
  766. mutex_lock(&tm6000_devlist_mutex);
  767. list_for_each_entry(dev, &tm6000_devlist, devlist)
  768. ops->fini(dev);
  769. printk(KERN_INFO "tm6000: Remove (%s) extension\n", ops->name);
  770. list_del(&ops->next);
  771. mutex_unlock(&tm6000_devlist_mutex);
  772. }
  773. EXPORT_SYMBOL(tm6000_unregister_extension);
  774. void tm6000_init_extension(struct tm6000_core *dev)
  775. {
  776. struct tm6000_ops *ops = NULL;
  777. mutex_lock(&tm6000_devlist_mutex);
  778. if (!list_empty(&tm6000_extension_devlist)) {
  779. list_for_each_entry(ops, &tm6000_extension_devlist, next) {
  780. if (ops->init)
  781. ops->init(dev);
  782. }
  783. }
  784. mutex_unlock(&tm6000_devlist_mutex);
  785. }
  786. void tm6000_close_extension(struct tm6000_core *dev)
  787. {
  788. struct tm6000_ops *ops = NULL;
  789. mutex_lock(&tm6000_devlist_mutex);
  790. if (!list_empty(&tm6000_extension_devlist)) {
  791. list_for_each_entry(ops, &tm6000_extension_devlist, next) {
  792. if (ops->fini)
  793. ops->fini(dev);
  794. }
  795. }
  796. mutex_unlock(&tm6000_devlist_mutex);
  797. }