ste-dbx5x0.dtsi 23 KB

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  1. /*
  2. * Copyright 2012 Linaro Ltd
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include <dt-bindings/interrupt-controller/irq.h>
  12. #include <dt-bindings/mfd/dbx500-prcmu.h>
  13. #include "skeleton.dtsi"
  14. / {
  15. soc {
  16. #address-cells = <1>;
  17. #size-cells = <1>;
  18. compatible = "stericsson,db8500";
  19. interrupt-parent = <&intc>;
  20. ranges;
  21. intc: interrupt-controller@a0411000 {
  22. compatible = "arm,cortex-a9-gic";
  23. #interrupt-cells = <3>;
  24. #address-cells = <1>;
  25. interrupt-controller;
  26. reg = <0xa0411000 0x1000>,
  27. <0xa0410100 0x100>;
  28. };
  29. L2: l2-cache {
  30. compatible = "arm,pl310-cache";
  31. reg = <0xa0412000 0x1000>;
  32. interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
  33. cache-unified;
  34. cache-level = <2>;
  35. };
  36. pmu {
  37. compatible = "arm,cortex-a9-pmu";
  38. interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
  39. };
  40. clocks {
  41. compatible = "stericsson,u8500-clks";
  42. prcmu_clk: prcmu-clock {
  43. #clock-cells = <1>;
  44. };
  45. prcc_pclk: prcc-periph-clock {
  46. #clock-cells = <2>;
  47. };
  48. prcc_kclk: prcc-kernel-clock {
  49. #clock-cells = <2>;
  50. };
  51. rtc_clk: rtc32k-clock {
  52. #clock-cells = <0>;
  53. };
  54. smp_twd_clk: smp-twd-clock {
  55. #clock-cells = <0>;
  56. };
  57. };
  58. mtu@a03c6000 {
  59. /* Nomadik System Timer */
  60. compatible = "st,nomadik-mtu";
  61. reg = <0xa03c6000 0x1000>;
  62. interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
  63. clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;
  64. clock-names = "timclk", "apb_pclk";
  65. };
  66. timer@a0410600 {
  67. compatible = "arm,cortex-a9-twd-timer";
  68. reg = <0xa0410600 0x20>;
  69. interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
  70. clocks = <&smp_twd_clk>;
  71. };
  72. rtc@80154000 {
  73. compatible = "arm,rtc-pl031", "arm,primecell";
  74. reg = <0x80154000 0x1000>;
  75. interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
  76. clocks = <&rtc_clk>;
  77. clock-names = "apb_pclk";
  78. };
  79. gpio0: gpio@8012e000 {
  80. compatible = "stericsson,db8500-gpio",
  81. "st,nomadik-gpio";
  82. reg = <0x8012e000 0x80>;
  83. interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
  84. interrupt-controller;
  85. #interrupt-cells = <2>;
  86. st,supports-sleepmode;
  87. gpio-controller;
  88. #gpio-cells = <2>;
  89. gpio-bank = <0>;
  90. clocks = <&prcc_pclk 1 9>;
  91. };
  92. gpio1: gpio@8012e080 {
  93. compatible = "stericsson,db8500-gpio",
  94. "st,nomadik-gpio";
  95. reg = <0x8012e080 0x80>;
  96. interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
  97. interrupt-controller;
  98. #interrupt-cells = <2>;
  99. st,supports-sleepmode;
  100. gpio-controller;
  101. #gpio-cells = <2>;
  102. gpio-bank = <1>;
  103. clocks = <&prcc_pclk 1 9>;
  104. };
  105. gpio2: gpio@8000e000 {
  106. compatible = "stericsson,db8500-gpio",
  107. "st,nomadik-gpio";
  108. reg = <0x8000e000 0x80>;
  109. interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH>;
  110. interrupt-controller;
  111. #interrupt-cells = <2>;
  112. st,supports-sleepmode;
  113. gpio-controller;
  114. #gpio-cells = <2>;
  115. gpio-bank = <2>;
  116. clocks = <&prcc_pclk 3 8>;
  117. };
  118. gpio3: gpio@8000e080 {
  119. compatible = "stericsson,db8500-gpio",
  120. "st,nomadik-gpio";
  121. reg = <0x8000e080 0x80>;
  122. interrupts = <0 122 IRQ_TYPE_LEVEL_HIGH>;
  123. interrupt-controller;
  124. #interrupt-cells = <2>;
  125. st,supports-sleepmode;
  126. gpio-controller;
  127. #gpio-cells = <2>;
  128. gpio-bank = <3>;
  129. clocks = <&prcc_pclk 3 8>;
  130. };
  131. gpio4: gpio@8000e100 {
  132. compatible = "stericsson,db8500-gpio",
  133. "st,nomadik-gpio";
  134. reg = <0x8000e100 0x80>;
  135. interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
  136. interrupt-controller;
  137. #interrupt-cells = <2>;
  138. st,supports-sleepmode;
  139. gpio-controller;
  140. #gpio-cells = <2>;
  141. gpio-bank = <4>;
  142. clocks = <&prcc_pclk 3 8>;
  143. };
  144. gpio5: gpio@8000e180 {
  145. compatible = "stericsson,db8500-gpio",
  146. "st,nomadik-gpio";
  147. reg = <0x8000e180 0x80>;
  148. interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
  149. interrupt-controller;
  150. #interrupt-cells = <2>;
  151. st,supports-sleepmode;
  152. gpio-controller;
  153. #gpio-cells = <2>;
  154. gpio-bank = <5>;
  155. clocks = <&prcc_pclk 3 8>;
  156. };
  157. gpio6: gpio@8011e000 {
  158. compatible = "stericsson,db8500-gpio",
  159. "st,nomadik-gpio";
  160. reg = <0x8011e000 0x80>;
  161. interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
  162. interrupt-controller;
  163. #interrupt-cells = <2>;
  164. st,supports-sleepmode;
  165. gpio-controller;
  166. #gpio-cells = <2>;
  167. gpio-bank = <6>;
  168. clocks = <&prcc_pclk 2 1>;
  169. };
  170. gpio7: gpio@8011e080 {
  171. compatible = "stericsson,db8500-gpio",
  172. "st,nomadik-gpio";
  173. reg = <0x8011e080 0x80>;
  174. interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
  175. interrupt-controller;
  176. #interrupt-cells = <2>;
  177. st,supports-sleepmode;
  178. gpio-controller;
  179. #gpio-cells = <2>;
  180. gpio-bank = <7>;
  181. clocks = <&prcc_pclk 2 1>;
  182. };
  183. gpio8: gpio@a03fe000 {
  184. compatible = "stericsson,db8500-gpio",
  185. "st,nomadik-gpio";
  186. reg = <0xa03fe000 0x80>;
  187. interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>;
  188. interrupt-controller;
  189. #interrupt-cells = <2>;
  190. st,supports-sleepmode;
  191. gpio-controller;
  192. #gpio-cells = <2>;
  193. gpio-bank = <8>;
  194. clocks = <&prcc_pclk 6 1>;
  195. };
  196. pinctrl {
  197. compatible = "stericsson,db8500-pinctrl";
  198. prcm = <&prcmu>;
  199. };
  200. usb_per5@a03e0000 {
  201. compatible = "stericsson,db8500-musb";
  202. reg = <0xa03e0000 0x10000>;
  203. interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
  204. interrupt-names = "mc";
  205. dr_mode = "otg";
  206. dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
  207. <&dma 38 0 0x0>, /* Logical - MemToDev */
  208. <&dma 37 0 0x2>, /* Logical - DevToMem */
  209. <&dma 37 0 0x0>, /* Logical - MemToDev */
  210. <&dma 36 0 0x2>, /* Logical - DevToMem */
  211. <&dma 36 0 0x0>, /* Logical - MemToDev */
  212. <&dma 19 0 0x2>, /* Logical - DevToMem */
  213. <&dma 19 0 0x0>, /* Logical - MemToDev */
  214. <&dma 18 0 0x2>, /* Logical - DevToMem */
  215. <&dma 18 0 0x0>, /* Logical - MemToDev */
  216. <&dma 17 0 0x2>, /* Logical - DevToMem */
  217. <&dma 17 0 0x0>, /* Logical - MemToDev */
  218. <&dma 16 0 0x2>, /* Logical - DevToMem */
  219. <&dma 16 0 0x0>, /* Logical - MemToDev */
  220. <&dma 39 0 0x2>, /* Logical - DevToMem */
  221. <&dma 39 0 0x0>; /* Logical - MemToDev */
  222. dma-names = "iep_1_9", "oep_1_9",
  223. "iep_2_10", "oep_2_10",
  224. "iep_3_11", "oep_3_11",
  225. "iep_4_12", "oep_4_12",
  226. "iep_5_13", "oep_5_13",
  227. "iep_6_14", "oep_6_14",
  228. "iep_7_15", "oep_7_15",
  229. "iep_8", "oep_8";
  230. clocks = <&prcc_pclk 5 0>;
  231. };
  232. dma: dma-controller@801C0000 {
  233. compatible = "stericsson,db8500-dma40", "stericsson,dma40";
  234. reg = <0x801C0000 0x1000 0x40010000 0x800>;
  235. reg-names = "base", "lcpa";
  236. interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
  237. #dma-cells = <3>;
  238. memcpy-channels = <56 57 58 59 60>;
  239. clocks = <&prcmu_clk PRCMU_DMACLK>;
  240. };
  241. prcmu: prcmu@80157000 {
  242. compatible = "stericsson,db8500-prcmu";
  243. reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
  244. reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
  245. interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
  246. #address-cells = <1>;
  247. #size-cells = <1>;
  248. interrupt-controller;
  249. #interrupt-cells = <2>;
  250. ranges;
  251. prcmu-timer-4@80157450 {
  252. compatible = "stericsson,db8500-prcmu-timer-4";
  253. reg = <0x80157450 0xC>;
  254. };
  255. thermal@801573c0 {
  256. compatible = "stericsson,db8500-thermal";
  257. reg = <0x801573c0 0x40>;
  258. interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
  259. <22 IRQ_TYPE_LEVEL_HIGH>;
  260. interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
  261. status = "disabled";
  262. };
  263. db8500-prcmu-regulators {
  264. compatible = "stericsson,db8500-prcmu-regulator";
  265. // DB8500_REGULATOR_VAPE
  266. db8500_vape_reg: db8500_vape {
  267. regulator-compatible = "db8500_vape";
  268. regulator-always-on;
  269. };
  270. // DB8500_REGULATOR_VARM
  271. db8500_varm_reg: db8500_varm {
  272. regulator-compatible = "db8500_varm";
  273. };
  274. // DB8500_REGULATOR_VMODEM
  275. db8500_vmodem_reg: db8500_vmodem {
  276. regulator-compatible = "db8500_vmodem";
  277. };
  278. // DB8500_REGULATOR_VPLL
  279. db8500_vpll_reg: db8500_vpll {
  280. regulator-compatible = "db8500_vpll";
  281. };
  282. // DB8500_REGULATOR_VSMPS1
  283. db8500_vsmps1_reg: db8500_vsmps1 {
  284. regulator-compatible = "db8500_vsmps1";
  285. };
  286. // DB8500_REGULATOR_VSMPS2
  287. db8500_vsmps2_reg: db8500_vsmps2 {
  288. regulator-compatible = "db8500_vsmps2";
  289. };
  290. // DB8500_REGULATOR_VSMPS3
  291. db8500_vsmps3_reg: db8500_vsmps3 {
  292. regulator-compatible = "db8500_vsmps3";
  293. };
  294. // DB8500_REGULATOR_VRF1
  295. db8500_vrf1_reg: db8500_vrf1 {
  296. regulator-compatible = "db8500_vrf1";
  297. };
  298. // DB8500_REGULATOR_SWITCH_SVAMMDSP
  299. db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
  300. regulator-compatible = "db8500_sva_mmdsp";
  301. };
  302. // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
  303. db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
  304. regulator-compatible = "db8500_sva_mmdsp_ret";
  305. };
  306. // DB8500_REGULATOR_SWITCH_SVAPIPE
  307. db8500_sva_pipe_reg: db8500_sva_pipe {
  308. regulator-compatible = "db8500_sva_pipe";
  309. };
  310. // DB8500_REGULATOR_SWITCH_SIAMMDSP
  311. db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
  312. regulator-compatible = "db8500_sia_mmdsp";
  313. };
  314. // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
  315. db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
  316. };
  317. // DB8500_REGULATOR_SWITCH_SIAPIPE
  318. db8500_sia_pipe_reg: db8500_sia_pipe {
  319. regulator-compatible = "db8500_sia_pipe";
  320. };
  321. // DB8500_REGULATOR_SWITCH_SGA
  322. db8500_sga_reg: db8500_sga {
  323. regulator-compatible = "db8500_sga";
  324. vin-supply = <&db8500_vape_reg>;
  325. };
  326. // DB8500_REGULATOR_SWITCH_B2R2_MCDE
  327. db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
  328. regulator-compatible = "db8500_b2r2_mcde";
  329. vin-supply = <&db8500_vape_reg>;
  330. };
  331. // DB8500_REGULATOR_SWITCH_ESRAM12
  332. db8500_esram12_reg: db8500_esram12 {
  333. regulator-compatible = "db8500_esram12";
  334. };
  335. // DB8500_REGULATOR_SWITCH_ESRAM12RET
  336. db8500_esram12_ret_reg: db8500_esram12_ret {
  337. regulator-compatible = "db8500_esram12_ret";
  338. };
  339. // DB8500_REGULATOR_SWITCH_ESRAM34
  340. db8500_esram34_reg: db8500_esram34 {
  341. regulator-compatible = "db8500_esram34";
  342. };
  343. // DB8500_REGULATOR_SWITCH_ESRAM34RET
  344. db8500_esram34_ret_reg: db8500_esram34_ret {
  345. regulator-compatible = "db8500_esram34_ret";
  346. };
  347. };
  348. ab8500 {
  349. compatible = "stericsson,ab8500";
  350. interrupt-parent = <&intc>;
  351. interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
  352. interrupt-controller;
  353. #interrupt-cells = <2>;
  354. ab8500_gpio: ab8500-gpio {
  355. gpio-controller;
  356. #gpio-cells = <2>;
  357. };
  358. ab8500-rtc {
  359. compatible = "stericsson,ab8500-rtc";
  360. interrupts = <17 IRQ_TYPE_LEVEL_HIGH
  361. 18 IRQ_TYPE_LEVEL_HIGH>;
  362. interrupt-names = "60S", "ALARM";
  363. };
  364. ab8500-gpadc {
  365. compatible = "stericsson,ab8500-gpadc";
  366. interrupts = <32 IRQ_TYPE_LEVEL_HIGH
  367. 39 IRQ_TYPE_LEVEL_HIGH>;
  368. interrupt-names = "HW_CONV_END", "SW_CONV_END";
  369. vddadc-supply = <&ab8500_ldo_tvout_reg>;
  370. };
  371. ab8500_battery: ab8500_battery {
  372. stericsson,battery-type = "LIPO";
  373. thermistor-on-batctrl;
  374. };
  375. ab8500_fg {
  376. compatible = "stericsson,ab8500-fg";
  377. battery = <&ab8500_battery>;
  378. };
  379. ab8500_btemp {
  380. compatible = "stericsson,ab8500-btemp";
  381. battery = <&ab8500_battery>;
  382. };
  383. ab8500_charger {
  384. compatible = "stericsson,ab8500-charger";
  385. battery = <&ab8500_battery>;
  386. vddadc-supply = <&ab8500_ldo_tvout_reg>;
  387. };
  388. ab8500_chargalg {
  389. compatible = "stericsson,ab8500-chargalg";
  390. battery = <&ab8500_battery>;
  391. };
  392. ab8500_usb {
  393. compatible = "stericsson,ab8500-usb";
  394. interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
  395. 96 IRQ_TYPE_LEVEL_HIGH
  396. 14 IRQ_TYPE_LEVEL_HIGH
  397. 15 IRQ_TYPE_LEVEL_HIGH
  398. 79 IRQ_TYPE_LEVEL_HIGH
  399. 74 IRQ_TYPE_LEVEL_HIGH
  400. 75 IRQ_TYPE_LEVEL_HIGH>;
  401. interrupt-names = "ID_WAKEUP_R",
  402. "ID_WAKEUP_F",
  403. "VBUS_DET_F",
  404. "VBUS_DET_R",
  405. "USB_LINK_STATUS",
  406. "USB_ADP_PROBE_PLUG",
  407. "USB_ADP_PROBE_UNPLUG";
  408. vddulpivio18-supply = <&ab8500_ldo_intcore_reg>;
  409. v-ape-supply = <&db8500_vape_reg>;
  410. musb_1v8-supply = <&db8500_vsmps2_reg>;
  411. };
  412. ab8500-ponkey {
  413. compatible = "stericsson,ab8500-poweron-key";
  414. interrupts = <6 IRQ_TYPE_LEVEL_HIGH
  415. 7 IRQ_TYPE_LEVEL_HIGH>;
  416. interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
  417. };
  418. ab8500-sysctrl {
  419. compatible = "stericsson,ab8500-sysctrl";
  420. };
  421. ab8500-pwm {
  422. compatible = "stericsson,ab8500-pwm";
  423. };
  424. ab8500-debugfs {
  425. compatible = "stericsson,ab8500-debug";
  426. };
  427. codec: ab8500-codec {
  428. compatible = "stericsson,ab8500-codec";
  429. V-AUD-supply = <&ab8500_ldo_audio_reg>;
  430. V-AMIC1-supply = <&ab8500_ldo_anamic1_reg>;
  431. V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>;
  432. V-DMIC-supply = <&ab8500_ldo_dmic_reg>;
  433. stericsson,earpeice-cmv = <950>; /* Units in mV. */
  434. };
  435. ext_regulators: ab8500-ext-regulators {
  436. compatible = "stericsson,ab8500-ext-regulator";
  437. ab8500_ext1_reg: ab8500_ext1 {
  438. regulator-compatible = "ab8500_ext1";
  439. regulator-min-microvolt = <1800000>;
  440. regulator-max-microvolt = <1800000>;
  441. regulator-boot-on;
  442. regulator-always-on;
  443. };
  444. ab8500_ext2_reg: ab8500_ext2 {
  445. regulator-compatible = "ab8500_ext2";
  446. regulator-min-microvolt = <1360000>;
  447. regulator-max-microvolt = <1360000>;
  448. regulator-boot-on;
  449. regulator-always-on;
  450. };
  451. ab8500_ext3_reg: ab8500_ext3 {
  452. regulator-compatible = "ab8500_ext3";
  453. regulator-min-microvolt = <3400000>;
  454. regulator-max-microvolt = <3400000>;
  455. regulator-boot-on;
  456. };
  457. };
  458. ab8500-regulators {
  459. compatible = "stericsson,ab8500-regulator";
  460. vin-supply = <&ab8500_ext3_reg>;
  461. // supplies to the display/camera
  462. ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
  463. regulator-compatible = "ab8500_ldo_aux1";
  464. regulator-min-microvolt = <2500000>;
  465. regulator-max-microvolt = <2900000>;
  466. regulator-boot-on;
  467. /* BUG: If turned off MMC will be affected. */
  468. regulator-always-on;
  469. };
  470. // supplies to the on-board eMMC
  471. ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
  472. regulator-compatible = "ab8500_ldo_aux2";
  473. regulator-min-microvolt = <1100000>;
  474. regulator-max-microvolt = <3300000>;
  475. };
  476. // supply for VAUX3; SDcard slots
  477. ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
  478. regulator-compatible = "ab8500_ldo_aux3";
  479. regulator-min-microvolt = <1100000>;
  480. regulator-max-microvolt = <3300000>;
  481. };
  482. // supply for v-intcore12; VINTCORE12 LDO
  483. ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
  484. regulator-compatible = "ab8500_ldo_intcore";
  485. };
  486. // supply for tvout; gpadc; TVOUT LDO
  487. ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
  488. regulator-compatible = "ab8500_ldo_tvout";
  489. };
  490. // supply for ab8500-usb; USB LDO
  491. ab8500_ldo_usb_reg: ab8500_ldo_usb {
  492. regulator-compatible = "ab8500_ldo_usb";
  493. };
  494. // supply for ab8500-vaudio; VAUDIO LDO
  495. ab8500_ldo_audio_reg: ab8500_ldo_audio {
  496. regulator-compatible = "ab8500_ldo_audio";
  497. };
  498. // supply for v-anamic1 VAMIC1 LDO
  499. ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
  500. regulator-compatible = "ab8500_ldo_anamic1";
  501. };
  502. // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
  503. ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
  504. regulator-compatible = "ab8500_ldo_anamic2";
  505. };
  506. // supply for v-dmic; VDMIC LDO
  507. ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
  508. regulator-compatible = "ab8500_ldo_dmic";
  509. };
  510. // supply for U8500 CSI/DSI; VANA LDO
  511. ab8500_ldo_ana_reg: ab8500_ldo_ana {
  512. regulator-compatible = "ab8500_ldo_ana";
  513. };
  514. };
  515. };
  516. };
  517. i2c@80004000 {
  518. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
  519. reg = <0x80004000 0x1000>;
  520. interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
  521. #address-cells = <1>;
  522. #size-cells = <0>;
  523. v-i2c-supply = <&db8500_vape_reg>;
  524. clock-frequency = <400000>;
  525. clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;
  526. clock-names = "i2cclk", "apb_pclk";
  527. };
  528. i2c@80122000 {
  529. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
  530. reg = <0x80122000 0x1000>;
  531. interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
  532. #address-cells = <1>;
  533. #size-cells = <0>;
  534. v-i2c-supply = <&db8500_vape_reg>;
  535. clock-frequency = <400000>;
  536. clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;
  537. clock-names = "i2cclk", "apb_pclk";
  538. };
  539. i2c@80128000 {
  540. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
  541. reg = <0x80128000 0x1000>;
  542. interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
  543. #address-cells = <1>;
  544. #size-cells = <0>;
  545. v-i2c-supply = <&db8500_vape_reg>;
  546. clock-frequency = <400000>;
  547. clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;
  548. clock-names = "i2cclk", "apb_pclk";
  549. };
  550. i2c@80110000 {
  551. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
  552. reg = <0x80110000 0x1000>;
  553. interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
  554. #address-cells = <1>;
  555. #size-cells = <0>;
  556. v-i2c-supply = <&db8500_vape_reg>;
  557. clock-frequency = <400000>;
  558. clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
  559. clock-names = "i2cclk", "apb_pclk";
  560. };
  561. i2c@8012a000 {
  562. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
  563. reg = <0x8012a000 0x1000>;
  564. interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
  565. #address-cells = <1>;
  566. #size-cells = <0>;
  567. v-i2c-supply = <&db8500_vape_reg>;
  568. clock-frequency = <400000>;
  569. clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>;
  570. clock-names = "i2cclk", "apb_pclk";
  571. };
  572. ssp@80002000 {
  573. compatible = "arm,pl022", "arm,primecell";
  574. reg = <0x80002000 0x1000>;
  575. interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
  576. #address-cells = <1>;
  577. #size-cells = <0>;
  578. status = "disabled";
  579. };
  580. uart@80120000 {
  581. compatible = "arm,pl011", "arm,primecell";
  582. reg = <0x80120000 0x1000>;
  583. interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
  584. dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
  585. <&dma 13 0 0x0>; /* Logical - MemToDev */
  586. dma-names = "rx", "tx";
  587. clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;
  588. clock-names = "uart", "apb_pclk";
  589. status = "disabled";
  590. };
  591. uart@80121000 {
  592. compatible = "arm,pl011", "arm,primecell";
  593. reg = <0x80121000 0x1000>;
  594. interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
  595. dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
  596. <&dma 12 0 0x0>; /* Logical - MemToDev */
  597. dma-names = "rx", "tx";
  598. clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;
  599. clock-names = "uart", "apb_pclk";
  600. status = "disabled";
  601. };
  602. uart@80007000 {
  603. compatible = "arm,pl011", "arm,primecell";
  604. reg = <0x80007000 0x1000>;
  605. interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
  606. dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
  607. <&dma 11 0 0x0>; /* Logical - MemToDev */
  608. dma-names = "rx", "tx";
  609. clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;
  610. clock-names = "uart", "apb_pclk";
  611. status = "disabled";
  612. };
  613. sdi0_per1@80126000 {
  614. compatible = "arm,pl18x", "arm,primecell";
  615. reg = <0x80126000 0x1000>;
  616. interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
  617. dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
  618. <&dma 29 0 0x0>; /* Logical - MemToDev */
  619. dma-names = "rx", "tx";
  620. clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
  621. clock-names = "sdi", "apb_pclk";
  622. status = "disabled";
  623. };
  624. sdi1_per2@80118000 {
  625. compatible = "arm,pl18x", "arm,primecell";
  626. reg = <0x80118000 0x1000>;
  627. interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
  628. dmas = <&dma 32 0 0x2>, /* Logical - DevToMem */
  629. <&dma 32 0 0x0>; /* Logical - MemToDev */
  630. dma-names = "rx", "tx";
  631. clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;
  632. clock-names = "sdi", "apb_pclk";
  633. status = "disabled";
  634. };
  635. sdi2_per3@80005000 {
  636. compatible = "arm,pl18x", "arm,primecell";
  637. reg = <0x80005000 0x1000>;
  638. interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
  639. dmas = <&dma 28 0 0x2>, /* Logical - DevToMem */
  640. <&dma 28 0 0x0>; /* Logical - MemToDev */
  641. dma-names = "rx", "tx";
  642. clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;
  643. clock-names = "sdi", "apb_pclk";
  644. status = "disabled";
  645. };
  646. sdi3_per2@80119000 {
  647. compatible = "arm,pl18x", "arm,primecell";
  648. reg = <0x80119000 0x1000>;
  649. interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
  650. clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;
  651. clock-names = "sdi", "apb_pclk";
  652. status = "disabled";
  653. };
  654. sdi4_per2@80114000 {
  655. compatible = "arm,pl18x", "arm,primecell";
  656. reg = <0x80114000 0x1000>;
  657. interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
  658. dmas = <&dma 42 0 0x2>, /* Logical - DevToMem */
  659. <&dma 42 0 0x0>; /* Logical - MemToDev */
  660. dma-names = "rx", "tx";
  661. clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;
  662. clock-names = "sdi", "apb_pclk";
  663. status = "disabled";
  664. };
  665. sdi5_per3@80008000 {
  666. compatible = "arm,pl18x", "arm,primecell";
  667. reg = <0x80008000 0x1000>;
  668. interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
  669. clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;
  670. clock-names = "sdi", "apb_pclk";
  671. status = "disabled";
  672. };
  673. msp0: msp@80123000 {
  674. compatible = "stericsson,ux500-msp-i2s";
  675. reg = <0x80123000 0x1000>;
  676. interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
  677. v-ape-supply = <&db8500_vape_reg>;
  678. clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;
  679. clock-names = "msp", "apb_pclk";
  680. status = "disabled";
  681. };
  682. msp1: msp@80124000 {
  683. compatible = "stericsson,ux500-msp-i2s";
  684. reg = <0x80124000 0x1000>;
  685. interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
  686. v-ape-supply = <&db8500_vape_reg>;
  687. clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;
  688. clock-names = "msp", "apb_pclk";
  689. status = "disabled";
  690. };
  691. // HDMI sound
  692. msp2: msp@80117000 {
  693. compatible = "stericsson,ux500-msp-i2s";
  694. reg = <0x80117000 0x1000>;
  695. interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
  696. v-ape-supply = <&db8500_vape_reg>;
  697. clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;
  698. clock-names = "msp", "apb_pclk";
  699. status = "disabled";
  700. };
  701. msp3: msp@80125000 {
  702. compatible = "stericsson,ux500-msp-i2s";
  703. reg = <0x80125000 0x1000>;
  704. interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
  705. v-ape-supply = <&db8500_vape_reg>;
  706. clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;
  707. clock-names = "msp", "apb_pclk";
  708. status = "disabled";
  709. };
  710. external-bus@50000000 {
  711. compatible = "simple-bus";
  712. reg = <0x50000000 0x4000000>;
  713. #address-cells = <1>;
  714. #size-cells = <1>;
  715. ranges = <0 0x50000000 0x4000000>;
  716. status = "disabled";
  717. };
  718. cpufreq-cooling {
  719. compatible = "stericsson,db8500-cpufreq-cooling";
  720. status = "disabled";
  721. };
  722. vmmci: regulator-gpio {
  723. compatible = "regulator-gpio";
  724. regulator-min-microvolt = <1800000>;
  725. regulator-max-microvolt = <2900000>;
  726. regulator-name = "mmci-reg";
  727. regulator-type = "voltage";
  728. startup-delay-us = <100>;
  729. enable-active-high;
  730. states = <1800000 0x1
  731. 2900000 0x0>;
  732. status = "disabled";
  733. };
  734. cryp@a03cb000 {
  735. compatible = "stericsson,ux500-cryp";
  736. reg = <0xa03cb000 0x1000>;
  737. interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
  738. v-ape-supply = <&db8500_vape_reg>;
  739. };
  740. hash@a03c2000 {
  741. compatible = "stericsson,ux500-hash";
  742. reg = <0xa03c2000 0x1000>;
  743. v-ape-supply = <&db8500_vape_reg>;
  744. };
  745. };
  746. };