iwl4965-base.c 228 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-4965.h"
  46. #include "iwl-core.h"
  47. #include "iwl-io.h"
  48. #include "iwl-helpers.h"
  49. #include "iwl-sta.h"
  50. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  51. struct iwl4965_tx_queue *txq);
  52. /******************************************************************************
  53. *
  54. * module boiler plate
  55. *
  56. ******************************************************************************/
  57. /*
  58. * module name, copyright, version, etc.
  59. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  60. */
  61. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  62. #ifdef CONFIG_IWLWIFI_DEBUG
  63. #define VD "d"
  64. #else
  65. #define VD
  66. #endif
  67. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  68. #define VS "s"
  69. #else
  70. #define VS
  71. #endif
  72. #define DRV_VERSION IWLWIFI_VERSION VD VS
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT);
  76. MODULE_LICENSE("GPL");
  77. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  78. {
  79. u16 fc = le16_to_cpu(hdr->frame_control);
  80. int hdr_len = ieee80211_get_hdrlen(fc);
  81. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  82. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  83. return NULL;
  84. }
  85. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  86. struct iwl_priv *priv, enum ieee80211_band band)
  87. {
  88. return priv->hw->wiphy->bands[band];
  89. }
  90. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  91. {
  92. /* Single white space is for Linksys APs */
  93. if (essid_len == 1 && essid[0] == ' ')
  94. return 1;
  95. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  96. while (essid_len) {
  97. essid_len--;
  98. if (essid[essid_len] != '\0')
  99. return 0;
  100. }
  101. return 1;
  102. }
  103. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  104. {
  105. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  106. const char *s = essid;
  107. char *d = escaped;
  108. if (iwl4965_is_empty_essid(essid, essid_len)) {
  109. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  110. return escaped;
  111. }
  112. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  113. while (essid_len--) {
  114. if (*s == '\0') {
  115. *d++ = '\\';
  116. *d++ = '0';
  117. s++;
  118. } else
  119. *d++ = *s++;
  120. }
  121. *d = '\0';
  122. return escaped;
  123. }
  124. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  125. * DMA services
  126. *
  127. * Theory of operation
  128. *
  129. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  130. * of buffer descriptors, each of which points to one or more data buffers for
  131. * the device to read from or fill. Driver and device exchange status of each
  132. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  133. * entries in each circular buffer, to protect against confusing empty and full
  134. * queue states.
  135. *
  136. * The device reads or writes the data in the queues via the device's several
  137. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  138. *
  139. * For Tx queue, there are low mark and high mark limits. If, after queuing
  140. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  141. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  142. * Tx queue resumed.
  143. *
  144. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  145. * queue (#4) for sending commands to the device firmware, and 15 other
  146. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  147. *
  148. * See more detailed info in iwl-4965-hw.h.
  149. ***************************************************/
  150. int iwl4965_queue_space(const struct iwl4965_queue *q)
  151. {
  152. int s = q->read_ptr - q->write_ptr;
  153. if (q->read_ptr > q->write_ptr)
  154. s -= q->n_bd;
  155. if (s <= 0)
  156. s += q->n_window;
  157. /* keep some reserve to not confuse empty and full situations */
  158. s -= 2;
  159. if (s < 0)
  160. s = 0;
  161. return s;
  162. }
  163. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  164. {
  165. return q->write_ptr > q->read_ptr ?
  166. (i >= q->read_ptr && i < q->write_ptr) :
  167. !(i < q->read_ptr && i >= q->write_ptr);
  168. }
  169. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  170. {
  171. /* This is for scan command, the big buffer at end of command array */
  172. if (is_huge)
  173. return q->n_window; /* must be power of 2 */
  174. /* Otherwise, use normal size buffers */
  175. return index & (q->n_window - 1);
  176. }
  177. /**
  178. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  179. */
  180. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  181. int count, int slots_num, u32 id)
  182. {
  183. q->n_bd = count;
  184. q->n_window = slots_num;
  185. q->id = id;
  186. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  187. * and iwl_queue_dec_wrap are broken. */
  188. BUG_ON(!is_power_of_2(count));
  189. /* slots_num must be power-of-two size, otherwise
  190. * get_cmd_index is broken. */
  191. BUG_ON(!is_power_of_2(slots_num));
  192. q->low_mark = q->n_window / 4;
  193. if (q->low_mark < 4)
  194. q->low_mark = 4;
  195. q->high_mark = q->n_window / 8;
  196. if (q->high_mark < 2)
  197. q->high_mark = 2;
  198. q->write_ptr = q->read_ptr = 0;
  199. return 0;
  200. }
  201. /**
  202. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  203. */
  204. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  205. struct iwl4965_tx_queue *txq, u32 id)
  206. {
  207. struct pci_dev *dev = priv->pci_dev;
  208. /* Driver private data, only for Tx (not command) queues,
  209. * not shared with device. */
  210. if (id != IWL_CMD_QUEUE_NUM) {
  211. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  212. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  213. if (!txq->txb) {
  214. IWL_ERROR("kmalloc for auxiliary BD "
  215. "structures failed\n");
  216. goto error;
  217. }
  218. } else
  219. txq->txb = NULL;
  220. /* Circular buffer of transmit frame descriptors (TFDs),
  221. * shared with device */
  222. txq->bd = pci_alloc_consistent(dev,
  223. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  224. &txq->q.dma_addr);
  225. if (!txq->bd) {
  226. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  227. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  228. goto error;
  229. }
  230. txq->q.id = id;
  231. return 0;
  232. error:
  233. if (txq->txb) {
  234. kfree(txq->txb);
  235. txq->txb = NULL;
  236. }
  237. return -ENOMEM;
  238. }
  239. /**
  240. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  241. */
  242. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  243. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  244. {
  245. struct pci_dev *dev = priv->pci_dev;
  246. int len;
  247. int rc = 0;
  248. /*
  249. * Alloc buffer array for commands (Tx or other types of commands).
  250. * For the command queue (#4), allocate command space + one big
  251. * command for scan, since scan command is very huge; the system will
  252. * not have two scans at the same time, so only one is needed.
  253. * For normal Tx queues (all other queues), no super-size command
  254. * space is needed.
  255. */
  256. len = sizeof(struct iwl_cmd) * slots_num;
  257. if (txq_id == IWL_CMD_QUEUE_NUM)
  258. len += IWL_MAX_SCAN_SIZE;
  259. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  260. if (!txq->cmd)
  261. return -ENOMEM;
  262. /* Alloc driver data array and TFD circular buffer */
  263. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  264. if (rc) {
  265. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  266. return -ENOMEM;
  267. }
  268. txq->need_update = 0;
  269. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  270. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  271. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  272. /* Initialize queue's high/low-water marks, and head/tail indexes */
  273. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  274. /* Tell device where to find queue */
  275. iwl4965_hw_tx_queue_init(priv, txq);
  276. return 0;
  277. }
  278. /**
  279. * iwl4965_tx_queue_free - Deallocate DMA queue.
  280. * @txq: Transmit queue to deallocate.
  281. *
  282. * Empty queue by removing and destroying all BD's.
  283. * Free all buffers.
  284. * 0-fill, but do not free "txq" descriptor structure.
  285. */
  286. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  287. {
  288. struct iwl4965_queue *q = &txq->q;
  289. struct pci_dev *dev = priv->pci_dev;
  290. int len;
  291. if (q->n_bd == 0)
  292. return;
  293. /* first, empty all BD's */
  294. for (; q->write_ptr != q->read_ptr;
  295. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  296. iwl4965_hw_txq_free_tfd(priv, txq);
  297. len = sizeof(struct iwl_cmd) * q->n_window;
  298. if (q->id == IWL_CMD_QUEUE_NUM)
  299. len += IWL_MAX_SCAN_SIZE;
  300. /* De-alloc array of command/tx buffers */
  301. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  302. /* De-alloc circular buffer of TFDs */
  303. if (txq->q.n_bd)
  304. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  305. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  306. /* De-alloc array of per-TFD driver data */
  307. if (txq->txb) {
  308. kfree(txq->txb);
  309. txq->txb = NULL;
  310. }
  311. /* 0-fill queue descriptor structure */
  312. memset(txq, 0, sizeof(*txq));
  313. }
  314. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  315. /*************** STATION TABLE MANAGEMENT ****
  316. * mac80211 should be examined to determine if sta_info is duplicating
  317. * the functionality provided here
  318. */
  319. /**************************************************************/
  320. #if 0 /* temporary disable till we add real remove station */
  321. /**
  322. * iwl4965_remove_station - Remove driver's knowledge of station.
  323. *
  324. * NOTE: This does not remove station from device's station table.
  325. */
  326. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  327. {
  328. int index = IWL_INVALID_STATION;
  329. int i;
  330. unsigned long flags;
  331. spin_lock_irqsave(&priv->sta_lock, flags);
  332. if (is_ap)
  333. index = IWL_AP_ID;
  334. else if (is_broadcast_ether_addr(addr))
  335. index = priv->hw_setting.bcast_sta_id;
  336. else
  337. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  338. if (priv->stations[i].used &&
  339. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  340. addr)) {
  341. index = i;
  342. break;
  343. }
  344. if (unlikely(index == IWL_INVALID_STATION))
  345. goto out;
  346. if (priv->stations[index].used) {
  347. priv->stations[index].used = 0;
  348. priv->num_stations--;
  349. }
  350. BUG_ON(priv->num_stations < 0);
  351. out:
  352. spin_unlock_irqrestore(&priv->sta_lock, flags);
  353. return 0;
  354. }
  355. #endif
  356. /**
  357. * iwl4965_add_station_flags - Add station to tables in driver and device
  358. */
  359. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  360. int is_ap, u8 flags, void *ht_data)
  361. {
  362. int i;
  363. int index = IWL_INVALID_STATION;
  364. struct iwl4965_station_entry *station;
  365. unsigned long flags_spin;
  366. DECLARE_MAC_BUF(mac);
  367. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  368. if (is_ap)
  369. index = IWL_AP_ID;
  370. else if (is_broadcast_ether_addr(addr))
  371. index = priv->hw_setting.bcast_sta_id;
  372. else
  373. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  374. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  375. addr)) {
  376. index = i;
  377. break;
  378. }
  379. if (!priv->stations[i].used &&
  380. index == IWL_INVALID_STATION)
  381. index = i;
  382. }
  383. /* These two conditions have the same outcome, but keep them separate
  384. since they have different meanings */
  385. if (unlikely(index == IWL_INVALID_STATION)) {
  386. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  387. return index;
  388. }
  389. if (priv->stations[index].used &&
  390. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  391. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  392. return index;
  393. }
  394. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  395. station = &priv->stations[index];
  396. station->used = 1;
  397. priv->num_stations++;
  398. /* Set up the REPLY_ADD_STA command to send to device */
  399. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  400. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  401. station->sta.mode = 0;
  402. station->sta.sta.sta_id = index;
  403. station->sta.station_flags = 0;
  404. #ifdef CONFIG_IWL4965_HT
  405. /* BCAST station and IBSS stations do not work in HT mode */
  406. if (index != priv->hw_setting.bcast_sta_id &&
  407. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  408. iwl4965_set_ht_add_station(priv, index,
  409. (struct ieee80211_ht_info *) ht_data);
  410. #endif /*CONFIG_IWL4965_HT*/
  411. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  412. /* Add station to device's station table */
  413. iwl4965_send_add_station(priv, &station->sta, flags);
  414. return index;
  415. }
  416. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  417. /**
  418. * iwl4965_enqueue_hcmd - enqueue a uCode command
  419. * @priv: device private data point
  420. * @cmd: a point to the ucode command structure
  421. *
  422. * The function returns < 0 values to indicate the operation is
  423. * failed. On success, it turns the index (> 0) of command in the
  424. * command queue.
  425. */
  426. int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  427. {
  428. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  429. struct iwl4965_queue *q = &txq->q;
  430. struct iwl4965_tfd_frame *tfd;
  431. u32 *control_flags;
  432. struct iwl_cmd *out_cmd;
  433. u32 idx;
  434. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  435. dma_addr_t phys_addr;
  436. int ret;
  437. unsigned long flags;
  438. /* If any of the command structures end up being larger than
  439. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  440. * we will need to increase the size of the TFD entries */
  441. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  442. !(cmd->meta.flags & CMD_SIZE_HUGE));
  443. if (iwl_is_rfkill(priv)) {
  444. IWL_DEBUG_INFO("Not sending command - RF KILL");
  445. return -EIO;
  446. }
  447. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  448. IWL_ERROR("No space for Tx\n");
  449. return -ENOSPC;
  450. }
  451. spin_lock_irqsave(&priv->hcmd_lock, flags);
  452. tfd = &txq->bd[q->write_ptr];
  453. memset(tfd, 0, sizeof(*tfd));
  454. control_flags = (u32 *) tfd;
  455. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  456. out_cmd = &txq->cmd[idx];
  457. out_cmd->hdr.cmd = cmd->id;
  458. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  459. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  460. /* At this point, the out_cmd now has all of the incoming cmd
  461. * information */
  462. out_cmd->hdr.flags = 0;
  463. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  464. INDEX_TO_SEQ(q->write_ptr));
  465. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  466. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  467. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  468. offsetof(struct iwl_cmd, hdr);
  469. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  470. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  471. "%d bytes at %d[%d]:%d\n",
  472. get_cmd_string(out_cmd->hdr.cmd),
  473. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  474. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  475. txq->need_update = 1;
  476. /* Set up entry in queue's byte count circular buffer */
  477. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  478. /* Increment and update queue's write index */
  479. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  480. iwl4965_tx_queue_update_write_ptr(priv, txq);
  481. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  482. return ret ? ret : idx;
  483. }
  484. static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  485. {
  486. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  487. if (hw_decrypt)
  488. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  489. else
  490. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  491. }
  492. int iwl4965_send_statistics_request(struct iwl_priv *priv)
  493. {
  494. u32 flags = 0;
  495. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  496. sizeof(flags), &flags);
  497. }
  498. /**
  499. * iwl4965_rxon_add_station - add station into station table.
  500. *
  501. * there is only one AP station with id= IWL_AP_ID
  502. * NOTE: mutex must be held before calling this fnction
  503. */
  504. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  505. const u8 *addr, int is_ap)
  506. {
  507. u8 sta_id;
  508. /* Add station to device's station table */
  509. #ifdef CONFIG_IWL4965_HT
  510. struct ieee80211_conf *conf = &priv->hw->conf;
  511. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  512. if ((is_ap) &&
  513. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  514. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  515. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  516. 0, cur_ht_config);
  517. else
  518. #endif /* CONFIG_IWL4965_HT */
  519. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  520. 0, NULL);
  521. /* Set up default rate scaling table in device's station table */
  522. iwl4965_add_station(priv, addr, is_ap);
  523. return sta_id;
  524. }
  525. /**
  526. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  527. *
  528. * NOTE: This is really only useful during development and can eventually
  529. * be #ifdef'd out once the driver is stable and folks aren't actively
  530. * making changes
  531. */
  532. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  533. {
  534. int error = 0;
  535. int counter = 1;
  536. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  537. error |= le32_to_cpu(rxon->flags &
  538. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  539. RXON_FLG_RADAR_DETECT_MSK));
  540. if (error)
  541. IWL_WARNING("check 24G fields %d | %d\n",
  542. counter++, error);
  543. } else {
  544. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  545. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  546. if (error)
  547. IWL_WARNING("check 52 fields %d | %d\n",
  548. counter++, error);
  549. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  550. if (error)
  551. IWL_WARNING("check 52 CCK %d | %d\n",
  552. counter++, error);
  553. }
  554. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  555. if (error)
  556. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  557. /* make sure basic rates 6Mbps and 1Mbps are supported */
  558. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  559. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  560. if (error)
  561. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  562. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  563. if (error)
  564. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  565. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  566. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  567. if (error)
  568. IWL_WARNING("check CCK and short slot %d | %d\n",
  569. counter++, error);
  570. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  571. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  572. if (error)
  573. IWL_WARNING("check CCK & auto detect %d | %d\n",
  574. counter++, error);
  575. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  576. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  577. if (error)
  578. IWL_WARNING("check TGG and auto detect %d | %d\n",
  579. counter++, error);
  580. if (error)
  581. IWL_WARNING("Tuning to channel %d\n",
  582. le16_to_cpu(rxon->channel));
  583. if (error) {
  584. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  585. return -1;
  586. }
  587. return 0;
  588. }
  589. /**
  590. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  591. * @priv: staging_rxon is compared to active_rxon
  592. *
  593. * If the RXON structure is changing enough to require a new tune,
  594. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  595. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  596. */
  597. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  598. {
  599. /* These items are only settable from the full RXON command */
  600. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  601. compare_ether_addr(priv->staging_rxon.bssid_addr,
  602. priv->active_rxon.bssid_addr) ||
  603. compare_ether_addr(priv->staging_rxon.node_addr,
  604. priv->active_rxon.node_addr) ||
  605. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  606. priv->active_rxon.wlap_bssid_addr) ||
  607. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  608. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  609. (priv->staging_rxon.air_propagation !=
  610. priv->active_rxon.air_propagation) ||
  611. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  612. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  613. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  614. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  615. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  616. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  617. return 1;
  618. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  619. * be updated with the RXON_ASSOC command -- however only some
  620. * flag transitions are allowed using RXON_ASSOC */
  621. /* Check if we are not switching bands */
  622. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  623. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  624. return 1;
  625. /* Check if we are switching association toggle */
  626. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  627. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  628. return 1;
  629. return 0;
  630. }
  631. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  632. {
  633. int rc = 0;
  634. struct iwl4965_rx_packet *res = NULL;
  635. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  636. struct iwl_host_cmd cmd = {
  637. .id = REPLY_RXON_ASSOC,
  638. .len = sizeof(rxon_assoc),
  639. .meta.flags = CMD_WANT_SKB,
  640. .data = &rxon_assoc,
  641. };
  642. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  643. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  644. if ((rxon1->flags == rxon2->flags) &&
  645. (rxon1->filter_flags == rxon2->filter_flags) &&
  646. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  647. (rxon1->ofdm_ht_single_stream_basic_rates ==
  648. rxon2->ofdm_ht_single_stream_basic_rates) &&
  649. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  650. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  651. (rxon1->rx_chain == rxon2->rx_chain) &&
  652. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  653. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  654. return 0;
  655. }
  656. rxon_assoc.flags = priv->staging_rxon.flags;
  657. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  658. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  659. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  660. rxon_assoc.reserved = 0;
  661. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  662. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  663. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  664. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  665. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  666. rc = iwl_send_cmd_sync(priv, &cmd);
  667. if (rc)
  668. return rc;
  669. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  670. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  671. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  672. rc = -EIO;
  673. }
  674. priv->alloc_rxb_skb--;
  675. dev_kfree_skb_any(cmd.meta.u.skb);
  676. return rc;
  677. }
  678. /**
  679. * iwl4965_commit_rxon - commit staging_rxon to hardware
  680. *
  681. * The RXON command in staging_rxon is committed to the hardware and
  682. * the active_rxon structure is updated with the new data. This
  683. * function correctly transitions out of the RXON_ASSOC_MSK state if
  684. * a HW tune is required based on the RXON structure changes.
  685. */
  686. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  687. {
  688. /* cast away the const for active_rxon in this function */
  689. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  690. DECLARE_MAC_BUF(mac);
  691. int rc = 0;
  692. if (!iwl_is_alive(priv))
  693. return -1;
  694. /* always get timestamp with Rx frame */
  695. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  696. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  697. if (rc) {
  698. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  699. return -EINVAL;
  700. }
  701. /* If we don't need to send a full RXON, we can use
  702. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  703. * and other flags for the current radio configuration. */
  704. if (!iwl4965_full_rxon_required(priv)) {
  705. rc = iwl4965_send_rxon_assoc(priv);
  706. if (rc) {
  707. IWL_ERROR("Error setting RXON_ASSOC "
  708. "configuration (%d).\n", rc);
  709. return rc;
  710. }
  711. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  712. return 0;
  713. }
  714. /* station table will be cleared */
  715. priv->assoc_station_added = 0;
  716. #ifdef CONFIG_IWL4965_SENSITIVITY
  717. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  718. if (!priv->error_recovering)
  719. priv->start_calib = 0;
  720. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  721. #endif /* CONFIG_IWL4965_SENSITIVITY */
  722. /* If we are currently associated and the new config requires
  723. * an RXON_ASSOC and the new config wants the associated mask enabled,
  724. * we must clear the associated from the active configuration
  725. * before we apply the new config */
  726. if (iwl_is_associated(priv) &&
  727. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  728. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  729. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  730. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  731. sizeof(struct iwl4965_rxon_cmd),
  732. &priv->active_rxon);
  733. /* If the mask clearing failed then we set
  734. * active_rxon back to what it was previously */
  735. if (rc) {
  736. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  737. IWL_ERROR("Error clearing ASSOC_MSK on current "
  738. "configuration (%d).\n", rc);
  739. return rc;
  740. }
  741. }
  742. IWL_DEBUG_INFO("Sending RXON\n"
  743. "* with%s RXON_FILTER_ASSOC_MSK\n"
  744. "* channel = %d\n"
  745. "* bssid = %s\n",
  746. ((priv->staging_rxon.filter_flags &
  747. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  748. le16_to_cpu(priv->staging_rxon.channel),
  749. print_mac(mac, priv->staging_rxon.bssid_addr));
  750. iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
  751. /* Apply the new configuration */
  752. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  753. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  754. if (rc) {
  755. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  756. return rc;
  757. }
  758. iwlcore_clear_stations_table(priv);
  759. #ifdef CONFIG_IWL4965_SENSITIVITY
  760. if (!priv->error_recovering)
  761. priv->start_calib = 0;
  762. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  763. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  764. #endif /* CONFIG_IWL4965_SENSITIVITY */
  765. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  766. /* If we issue a new RXON command which required a tune then we must
  767. * send a new TXPOWER command or we won't be able to Tx any frames */
  768. rc = iwl4965_hw_reg_send_txpower(priv);
  769. if (rc) {
  770. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  771. return rc;
  772. }
  773. /* Add the broadcast address so we can send broadcast frames */
  774. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  775. IWL_INVALID_STATION) {
  776. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  777. return -EIO;
  778. }
  779. /* If we have set the ASSOC_MSK and we are in BSS mode then
  780. * add the IWL_AP_ID to the station rate table */
  781. if (iwl_is_associated(priv) &&
  782. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  783. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  784. == IWL_INVALID_STATION) {
  785. IWL_ERROR("Error adding AP address for transmit.\n");
  786. return -EIO;
  787. }
  788. priv->assoc_station_added = 1;
  789. if (priv->default_wep_key &&
  790. iwl_send_static_wepkey_cmd(priv, 0))
  791. IWL_ERROR("Could not send WEP static key.\n");
  792. }
  793. return 0;
  794. }
  795. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  796. {
  797. struct iwl4965_bt_cmd bt_cmd = {
  798. .flags = 3,
  799. .lead_time = 0xAA,
  800. .max_kill = 1,
  801. .kill_ack_mask = 0,
  802. .kill_cts_mask = 0,
  803. };
  804. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  805. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  806. }
  807. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  808. {
  809. int rc = 0;
  810. struct iwl4965_rx_packet *res;
  811. struct iwl_host_cmd cmd = {
  812. .id = REPLY_SCAN_ABORT_CMD,
  813. .meta.flags = CMD_WANT_SKB,
  814. };
  815. /* If there isn't a scan actively going on in the hardware
  816. * then we are in between scan bands and not actually
  817. * actively scanning, so don't send the abort command */
  818. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  819. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  820. return 0;
  821. }
  822. rc = iwl_send_cmd_sync(priv, &cmd);
  823. if (rc) {
  824. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  825. return rc;
  826. }
  827. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  828. if (res->u.status != CAN_ABORT_STATUS) {
  829. /* The scan abort will return 1 for success or
  830. * 2 for "failure". A failure condition can be
  831. * due to simply not being in an active scan which
  832. * can occur if we send the scan abort before we
  833. * the microcode has notified us that a scan is
  834. * completed. */
  835. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  836. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  837. clear_bit(STATUS_SCAN_HW, &priv->status);
  838. }
  839. dev_kfree_skb_any(cmd.meta.u.skb);
  840. return rc;
  841. }
  842. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  843. struct iwl_cmd *cmd,
  844. struct sk_buff *skb)
  845. {
  846. return 1;
  847. }
  848. /*
  849. * CARD_STATE_CMD
  850. *
  851. * Use: Sets the device's internal card state to enable, disable, or halt
  852. *
  853. * When in the 'enable' state the card operates as normal.
  854. * When in the 'disable' state, the card enters into a low power mode.
  855. * When in the 'halt' state, the card is shut down and must be fully
  856. * restarted to come back on.
  857. */
  858. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  859. {
  860. struct iwl_host_cmd cmd = {
  861. .id = REPLY_CARD_STATE_CMD,
  862. .len = sizeof(u32),
  863. .data = &flags,
  864. .meta.flags = meta_flag,
  865. };
  866. if (meta_flag & CMD_ASYNC)
  867. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  868. return iwl_send_cmd(priv, &cmd);
  869. }
  870. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  871. struct iwl_cmd *cmd, struct sk_buff *skb)
  872. {
  873. struct iwl4965_rx_packet *res = NULL;
  874. if (!skb) {
  875. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  876. return 1;
  877. }
  878. res = (struct iwl4965_rx_packet *)skb->data;
  879. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  880. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  881. res->hdr.flags);
  882. return 1;
  883. }
  884. switch (res->u.add_sta.status) {
  885. case ADD_STA_SUCCESS_MSK:
  886. break;
  887. default:
  888. break;
  889. }
  890. /* We didn't cache the SKB; let the caller free it */
  891. return 1;
  892. }
  893. int iwl4965_send_add_station(struct iwl_priv *priv,
  894. struct iwl4965_addsta_cmd *sta, u8 flags)
  895. {
  896. struct iwl4965_rx_packet *res = NULL;
  897. int rc = 0;
  898. struct iwl_host_cmd cmd = {
  899. .id = REPLY_ADD_STA,
  900. .len = sizeof(struct iwl4965_addsta_cmd),
  901. .meta.flags = flags,
  902. .data = sta,
  903. };
  904. if (flags & CMD_ASYNC)
  905. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  906. else
  907. cmd.meta.flags |= CMD_WANT_SKB;
  908. rc = iwl_send_cmd(priv, &cmd);
  909. if (rc || (flags & CMD_ASYNC))
  910. return rc;
  911. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  912. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  913. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  914. res->hdr.flags);
  915. rc = -EIO;
  916. }
  917. if (rc == 0) {
  918. switch (res->u.add_sta.status) {
  919. case ADD_STA_SUCCESS_MSK:
  920. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  921. break;
  922. default:
  923. rc = -EIO;
  924. IWL_WARNING("REPLY_ADD_STA failed\n");
  925. break;
  926. }
  927. }
  928. priv->alloc_rxb_skb--;
  929. dev_kfree_skb_any(cmd.meta.u.skb);
  930. return rc;
  931. }
  932. static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  933. struct ieee80211_key_conf *keyconf,
  934. u8 sta_id)
  935. {
  936. unsigned long flags;
  937. __le16 key_flags = 0;
  938. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  939. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  940. if (sta_id == priv->hw_setting.bcast_sta_id)
  941. key_flags |= STA_KEY_MULTICAST_MSK;
  942. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  943. keyconf->hw_key_idx = keyconf->keyidx;
  944. key_flags &= ~STA_KEY_FLG_INVALID;
  945. spin_lock_irqsave(&priv->sta_lock, flags);
  946. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  947. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  948. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  949. keyconf->keylen);
  950. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  951. keyconf->keylen);
  952. priv->stations[sta_id].sta.key.key_offset =
  953. iwl_get_free_ucode_key_index(priv);
  954. priv->stations[sta_id].sta.key.key_flags = key_flags;
  955. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  956. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  957. spin_unlock_irqrestore(&priv->sta_lock, flags);
  958. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  959. return iwl4965_send_add_station(priv,
  960. &priv->stations[sta_id].sta, CMD_ASYNC);
  961. }
  962. static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  963. struct ieee80211_key_conf *keyconf,
  964. u8 sta_id)
  965. {
  966. unsigned long flags;
  967. int ret = 0;
  968. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  969. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  970. keyconf->hw_key_idx = keyconf->keyidx;
  971. spin_lock_irqsave(&priv->sta_lock, flags);
  972. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  973. priv->stations[sta_id].keyinfo.conf = keyconf;
  974. priv->stations[sta_id].keyinfo.keylen = 16;
  975. /* This copy is acutally not needed: we get the key with each TX */
  976. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
  977. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16);
  978. spin_unlock_irqrestore(&priv->sta_lock, flags);
  979. return ret;
  980. }
  981. static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  982. {
  983. unsigned long flags;
  984. priv->key_mapping_key = 0;
  985. spin_lock_irqsave(&priv->sta_lock, flags);
  986. if (!test_and_clear_bit(priv->stations[sta_id].sta.key.key_offset,
  987. &priv->ucode_key_table))
  988. IWL_ERROR("index %d not used in uCode key table.\n",
  989. priv->stations[sta_id].sta.key.key_offset);
  990. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  991. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  992. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  993. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  994. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  995. spin_unlock_irqrestore(&priv->sta_lock, flags);
  996. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  997. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  998. return 0;
  999. }
  1000. static int iwl4965_set_dynamic_key(struct iwl_priv *priv,
  1001. struct ieee80211_key_conf *key, u8 sta_id)
  1002. {
  1003. int ret;
  1004. priv->key_mapping_key = 1;
  1005. switch (key->alg) {
  1006. case ALG_CCMP:
  1007. ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id);
  1008. break;
  1009. case ALG_TKIP:
  1010. ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id);
  1011. break;
  1012. case ALG_WEP:
  1013. ret = iwl_set_wep_dynamic_key_info(priv, key, sta_id);
  1014. break;
  1015. default:
  1016. IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg);
  1017. ret = -EINVAL;
  1018. }
  1019. return ret;
  1020. }
  1021. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  1022. {
  1023. struct list_head *element;
  1024. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1025. priv->frames_count);
  1026. while (!list_empty(&priv->free_frames)) {
  1027. element = priv->free_frames.next;
  1028. list_del(element);
  1029. kfree(list_entry(element, struct iwl4965_frame, list));
  1030. priv->frames_count--;
  1031. }
  1032. if (priv->frames_count) {
  1033. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1034. priv->frames_count);
  1035. priv->frames_count = 0;
  1036. }
  1037. }
  1038. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  1039. {
  1040. struct iwl4965_frame *frame;
  1041. struct list_head *element;
  1042. if (list_empty(&priv->free_frames)) {
  1043. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1044. if (!frame) {
  1045. IWL_ERROR("Could not allocate frame!\n");
  1046. return NULL;
  1047. }
  1048. priv->frames_count++;
  1049. return frame;
  1050. }
  1051. element = priv->free_frames.next;
  1052. list_del(element);
  1053. return list_entry(element, struct iwl4965_frame, list);
  1054. }
  1055. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  1056. {
  1057. memset(frame, 0, sizeof(*frame));
  1058. list_add(&frame->list, &priv->free_frames);
  1059. }
  1060. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  1061. struct ieee80211_hdr *hdr,
  1062. const u8 *dest, int left)
  1063. {
  1064. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1065. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1066. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1067. return 0;
  1068. if (priv->ibss_beacon->len > left)
  1069. return 0;
  1070. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1071. return priv->ibss_beacon->len;
  1072. }
  1073. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1074. {
  1075. u8 i;
  1076. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1077. i = iwl4965_rates[i].next_ieee) {
  1078. if (rate_mask & (1 << i))
  1079. return iwl4965_rates[i].plcp;
  1080. }
  1081. return IWL_RATE_INVALID;
  1082. }
  1083. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  1084. {
  1085. struct iwl4965_frame *frame;
  1086. unsigned int frame_size;
  1087. int rc;
  1088. u8 rate;
  1089. frame = iwl4965_get_free_frame(priv);
  1090. if (!frame) {
  1091. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1092. "command.\n");
  1093. return -ENOMEM;
  1094. }
  1095. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1096. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1097. 0xFF0);
  1098. if (rate == IWL_INVALID_RATE)
  1099. rate = IWL_RATE_6M_PLCP;
  1100. } else {
  1101. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1102. if (rate == IWL_INVALID_RATE)
  1103. rate = IWL_RATE_1M_PLCP;
  1104. }
  1105. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1106. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1107. &frame->u.cmd[0]);
  1108. iwl4965_free_frame(priv, frame);
  1109. return rc;
  1110. }
  1111. /******************************************************************************
  1112. *
  1113. * Misc. internal state and helper functions
  1114. *
  1115. ******************************************************************************/
  1116. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1117. {
  1118. if (priv->hw_setting.shared_virt)
  1119. pci_free_consistent(priv->pci_dev,
  1120. sizeof(struct iwl4965_shared),
  1121. priv->hw_setting.shared_virt,
  1122. priv->hw_setting.shared_phys);
  1123. }
  1124. /**
  1125. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1126. *
  1127. * return : set the bit for each supported rate insert in ie
  1128. */
  1129. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1130. u16 basic_rate, int *left)
  1131. {
  1132. u16 ret_rates = 0, bit;
  1133. int i;
  1134. u8 *cnt = ie;
  1135. u8 *rates = ie + 1;
  1136. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1137. if (bit & supported_rate) {
  1138. ret_rates |= bit;
  1139. rates[*cnt] = iwl4965_rates[i].ieee |
  1140. ((bit & basic_rate) ? 0x80 : 0x00);
  1141. (*cnt)++;
  1142. (*left)--;
  1143. if ((*left <= 0) ||
  1144. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1145. break;
  1146. }
  1147. }
  1148. return ret_rates;
  1149. }
  1150. /**
  1151. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1152. */
  1153. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1154. enum ieee80211_band band,
  1155. struct ieee80211_mgmt *frame,
  1156. int left, int is_direct)
  1157. {
  1158. int len = 0;
  1159. u8 *pos = NULL;
  1160. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1161. #ifdef CONFIG_IWL4965_HT
  1162. const struct ieee80211_supported_band *sband =
  1163. iwl4965_get_hw_mode(priv, band);
  1164. #endif /* CONFIG_IWL4965_HT */
  1165. /* Make sure there is enough space for the probe request,
  1166. * two mandatory IEs and the data */
  1167. left -= 24;
  1168. if (left < 0)
  1169. return 0;
  1170. len += 24;
  1171. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1172. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1173. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1174. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1175. frame->seq_ctrl = 0;
  1176. /* fill in our indirect SSID IE */
  1177. /* ...next IE... */
  1178. left -= 2;
  1179. if (left < 0)
  1180. return 0;
  1181. len += 2;
  1182. pos = &(frame->u.probe_req.variable[0]);
  1183. *pos++ = WLAN_EID_SSID;
  1184. *pos++ = 0;
  1185. /* fill in our direct SSID IE... */
  1186. if (is_direct) {
  1187. /* ...next IE... */
  1188. left -= 2 + priv->essid_len;
  1189. if (left < 0)
  1190. return 0;
  1191. /* ... fill it in... */
  1192. *pos++ = WLAN_EID_SSID;
  1193. *pos++ = priv->essid_len;
  1194. memcpy(pos, priv->essid, priv->essid_len);
  1195. pos += priv->essid_len;
  1196. len += 2 + priv->essid_len;
  1197. }
  1198. /* fill in supported rate */
  1199. /* ...next IE... */
  1200. left -= 2;
  1201. if (left < 0)
  1202. return 0;
  1203. /* ... fill it in... */
  1204. *pos++ = WLAN_EID_SUPP_RATES;
  1205. *pos = 0;
  1206. /* exclude 60M rate */
  1207. active_rates = priv->rates_mask;
  1208. active_rates &= ~IWL_RATE_60M_MASK;
  1209. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1210. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1211. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1212. active_rate_basic, &left);
  1213. active_rates &= ~ret_rates;
  1214. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1215. active_rate_basic, &left);
  1216. active_rates &= ~ret_rates;
  1217. len += 2 + *pos;
  1218. pos += (*pos) + 1;
  1219. if (active_rates == 0)
  1220. goto fill_end;
  1221. /* fill in supported extended rate */
  1222. /* ...next IE... */
  1223. left -= 2;
  1224. if (left < 0)
  1225. return 0;
  1226. /* ... fill it in... */
  1227. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1228. *pos = 0;
  1229. iwl4965_supported_rate_to_ie(pos, active_rates,
  1230. active_rate_basic, &left);
  1231. if (*pos > 0)
  1232. len += 2 + *pos;
  1233. #ifdef CONFIG_IWL4965_HT
  1234. if (sband && sband->ht_info.ht_supported) {
  1235. struct ieee80211_ht_cap *ht_cap;
  1236. pos += (*pos) + 1;
  1237. *pos++ = WLAN_EID_HT_CAPABILITY;
  1238. *pos++ = sizeof(struct ieee80211_ht_cap);
  1239. ht_cap = (struct ieee80211_ht_cap *)pos;
  1240. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1241. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1242. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1243. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1244. ((sband->ht_info.ampdu_density << 2) &
  1245. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1246. len += 2 + sizeof(struct ieee80211_ht_cap);
  1247. }
  1248. #endif /*CONFIG_IWL4965_HT */
  1249. fill_end:
  1250. return (u16)len;
  1251. }
  1252. /*
  1253. * QoS support
  1254. */
  1255. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1256. struct iwl4965_qosparam_cmd *qos)
  1257. {
  1258. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1259. sizeof(struct iwl4965_qosparam_cmd), qos);
  1260. }
  1261. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1262. {
  1263. unsigned long flags;
  1264. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1265. return;
  1266. if (!priv->qos_data.qos_enable)
  1267. return;
  1268. spin_lock_irqsave(&priv->lock, flags);
  1269. priv->qos_data.def_qos_parm.qos_flags = 0;
  1270. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1271. !priv->qos_data.qos_cap.q_AP.txop_request)
  1272. priv->qos_data.def_qos_parm.qos_flags |=
  1273. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1274. if (priv->qos_data.qos_active)
  1275. priv->qos_data.def_qos_parm.qos_flags |=
  1276. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1277. #ifdef CONFIG_IWL4965_HT
  1278. if (priv->current_ht_config.is_ht)
  1279. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1280. #endif /* CONFIG_IWL4965_HT */
  1281. spin_unlock_irqrestore(&priv->lock, flags);
  1282. if (force || iwl_is_associated(priv)) {
  1283. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1284. priv->qos_data.qos_active,
  1285. priv->qos_data.def_qos_parm.qos_flags);
  1286. iwl4965_send_qos_params_command(priv,
  1287. &(priv->qos_data.def_qos_parm));
  1288. }
  1289. }
  1290. /*
  1291. * Power management (not Tx power!) functions
  1292. */
  1293. #define MSEC_TO_USEC 1024
  1294. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1295. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1296. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1297. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1298. __constant_cpu_to_le32(X1), \
  1299. __constant_cpu_to_le32(X2), \
  1300. __constant_cpu_to_le32(X3), \
  1301. __constant_cpu_to_le32(X4)}
  1302. /* default power management (not Tx power) table values */
  1303. /* for tim 0-10 */
  1304. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1305. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1306. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1307. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1308. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1309. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1310. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1311. };
  1312. /* for tim > 10 */
  1313. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1314. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1315. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1316. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1317. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1318. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1319. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1320. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1321. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1322. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1323. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1324. };
  1325. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1326. {
  1327. int rc = 0, i;
  1328. struct iwl4965_power_mgr *pow_data;
  1329. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1330. u16 pci_pm;
  1331. IWL_DEBUG_POWER("Initialize power \n");
  1332. pow_data = &(priv->power_data);
  1333. memset(pow_data, 0, sizeof(*pow_data));
  1334. pow_data->active_index = IWL_POWER_RANGE_0;
  1335. pow_data->dtim_val = 0xffff;
  1336. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1337. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1338. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1339. if (rc != 0)
  1340. return 0;
  1341. else {
  1342. struct iwl4965_powertable_cmd *cmd;
  1343. IWL_DEBUG_POWER("adjust power command flags\n");
  1344. for (i = 0; i < IWL_POWER_AC; i++) {
  1345. cmd = &pow_data->pwr_range_0[i].cmd;
  1346. if (pci_pm & 0x1)
  1347. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1348. else
  1349. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1350. }
  1351. }
  1352. return rc;
  1353. }
  1354. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1355. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1356. {
  1357. int rc = 0, i;
  1358. u8 skip;
  1359. u32 max_sleep = 0;
  1360. struct iwl4965_power_vec_entry *range;
  1361. u8 period = 0;
  1362. struct iwl4965_power_mgr *pow_data;
  1363. if (mode > IWL_POWER_INDEX_5) {
  1364. IWL_DEBUG_POWER("Error invalid power mode \n");
  1365. return -1;
  1366. }
  1367. pow_data = &(priv->power_data);
  1368. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1369. range = &pow_data->pwr_range_0[0];
  1370. else
  1371. range = &pow_data->pwr_range_1[1];
  1372. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1373. #ifdef IWL_MAC80211_DISABLE
  1374. if (priv->assoc_network != NULL) {
  1375. unsigned long flags;
  1376. period = priv->assoc_network->tim.tim_period;
  1377. }
  1378. #endif /*IWL_MAC80211_DISABLE */
  1379. skip = range[mode].no_dtim;
  1380. if (period == 0) {
  1381. period = 1;
  1382. skip = 0;
  1383. }
  1384. if (skip == 0) {
  1385. max_sleep = period;
  1386. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1387. } else {
  1388. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1389. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1390. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1391. }
  1392. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1393. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1394. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1395. }
  1396. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1397. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1398. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1399. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1400. le32_to_cpu(cmd->sleep_interval[0]),
  1401. le32_to_cpu(cmd->sleep_interval[1]),
  1402. le32_to_cpu(cmd->sleep_interval[2]),
  1403. le32_to_cpu(cmd->sleep_interval[3]),
  1404. le32_to_cpu(cmd->sleep_interval[4]));
  1405. return rc;
  1406. }
  1407. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1408. {
  1409. u32 uninitialized_var(final_mode);
  1410. int rc;
  1411. struct iwl4965_powertable_cmd cmd;
  1412. /* If on battery, set to 3,
  1413. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1414. * else user level */
  1415. switch (mode) {
  1416. case IWL_POWER_BATTERY:
  1417. final_mode = IWL_POWER_INDEX_3;
  1418. break;
  1419. case IWL_POWER_AC:
  1420. final_mode = IWL_POWER_MODE_CAM;
  1421. break;
  1422. default:
  1423. final_mode = mode;
  1424. break;
  1425. }
  1426. cmd.keep_alive_beacons = 0;
  1427. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1428. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1429. if (final_mode == IWL_POWER_MODE_CAM)
  1430. clear_bit(STATUS_POWER_PMI, &priv->status);
  1431. else
  1432. set_bit(STATUS_POWER_PMI, &priv->status);
  1433. return rc;
  1434. }
  1435. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1436. {
  1437. /* Filter incoming packets to determine if they are targeted toward
  1438. * this network, discarding packets coming from ourselves */
  1439. switch (priv->iw_mode) {
  1440. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1441. /* packets from our adapter are dropped (echo) */
  1442. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1443. return 0;
  1444. /* {broad,multi}cast packets to our IBSS go through */
  1445. if (is_multicast_ether_addr(header->addr1))
  1446. return !compare_ether_addr(header->addr3, priv->bssid);
  1447. /* packets to our adapter go through */
  1448. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1449. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1450. /* packets from our adapter are dropped (echo) */
  1451. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1452. return 0;
  1453. /* {broad,multi}cast packets to our BSS go through */
  1454. if (is_multicast_ether_addr(header->addr1))
  1455. return !compare_ether_addr(header->addr2, priv->bssid);
  1456. /* packets to our adapter go through */
  1457. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1458. default:
  1459. break;
  1460. }
  1461. return 1;
  1462. }
  1463. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1464. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1465. {
  1466. switch (status & TX_STATUS_MSK) {
  1467. case TX_STATUS_SUCCESS:
  1468. return "SUCCESS";
  1469. TX_STATUS_ENTRY(SHORT_LIMIT);
  1470. TX_STATUS_ENTRY(LONG_LIMIT);
  1471. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1472. TX_STATUS_ENTRY(MGMNT_ABORT);
  1473. TX_STATUS_ENTRY(NEXT_FRAG);
  1474. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1475. TX_STATUS_ENTRY(DEST_PS);
  1476. TX_STATUS_ENTRY(ABORTED);
  1477. TX_STATUS_ENTRY(BT_RETRY);
  1478. TX_STATUS_ENTRY(STA_INVALID);
  1479. TX_STATUS_ENTRY(FRAG_DROPPED);
  1480. TX_STATUS_ENTRY(TID_DISABLE);
  1481. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1482. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1483. TX_STATUS_ENTRY(TX_LOCKED);
  1484. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1485. }
  1486. return "UNKNOWN";
  1487. }
  1488. /**
  1489. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1490. *
  1491. * NOTE: priv->mutex is not required before calling this function
  1492. */
  1493. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1494. {
  1495. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1496. clear_bit(STATUS_SCANNING, &priv->status);
  1497. return 0;
  1498. }
  1499. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1500. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1501. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1502. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1503. queue_work(priv->workqueue, &priv->abort_scan);
  1504. } else
  1505. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1506. return test_bit(STATUS_SCANNING, &priv->status);
  1507. }
  1508. return 0;
  1509. }
  1510. /**
  1511. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1512. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1513. *
  1514. * NOTE: priv->mutex must be held before calling this function
  1515. */
  1516. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1517. {
  1518. unsigned long now = jiffies;
  1519. int ret;
  1520. ret = iwl4965_scan_cancel(priv);
  1521. if (ret && ms) {
  1522. mutex_unlock(&priv->mutex);
  1523. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1524. test_bit(STATUS_SCANNING, &priv->status))
  1525. msleep(1);
  1526. mutex_lock(&priv->mutex);
  1527. return test_bit(STATUS_SCANNING, &priv->status);
  1528. }
  1529. return ret;
  1530. }
  1531. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1532. {
  1533. /* Reset ieee stats */
  1534. /* We don't reset the net_device_stats (ieee->stats) on
  1535. * re-association */
  1536. priv->last_seq_num = -1;
  1537. priv->last_frag_num = -1;
  1538. priv->last_packet_time = 0;
  1539. iwl4965_scan_cancel(priv);
  1540. }
  1541. #define MAX_UCODE_BEACON_INTERVAL 4096
  1542. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1543. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1544. {
  1545. u16 new_val = 0;
  1546. u16 beacon_factor = 0;
  1547. beacon_factor =
  1548. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1549. / MAX_UCODE_BEACON_INTERVAL;
  1550. new_val = beacon_val / beacon_factor;
  1551. return cpu_to_le16(new_val);
  1552. }
  1553. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1554. {
  1555. u64 interval_tm_unit;
  1556. u64 tsf, result;
  1557. unsigned long flags;
  1558. struct ieee80211_conf *conf = NULL;
  1559. u16 beacon_int = 0;
  1560. conf = ieee80211_get_hw_conf(priv->hw);
  1561. spin_lock_irqsave(&priv->lock, flags);
  1562. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
  1563. priv->rxon_timing.timestamp.dw[0] =
  1564. cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
  1565. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1566. tsf = priv->timestamp;
  1567. beacon_int = priv->beacon_int;
  1568. spin_unlock_irqrestore(&priv->lock, flags);
  1569. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1570. if (beacon_int == 0) {
  1571. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1572. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1573. } else {
  1574. priv->rxon_timing.beacon_interval =
  1575. cpu_to_le16(beacon_int);
  1576. priv->rxon_timing.beacon_interval =
  1577. iwl4965_adjust_beacon_interval(
  1578. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1579. }
  1580. priv->rxon_timing.atim_window = 0;
  1581. } else {
  1582. priv->rxon_timing.beacon_interval =
  1583. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1584. /* TODO: we need to get atim_window from upper stack
  1585. * for now we set to 0 */
  1586. priv->rxon_timing.atim_window = 0;
  1587. }
  1588. interval_tm_unit =
  1589. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1590. result = do_div(tsf, interval_tm_unit);
  1591. priv->rxon_timing.beacon_init_val =
  1592. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1593. IWL_DEBUG_ASSOC
  1594. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1595. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1596. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1597. le16_to_cpu(priv->rxon_timing.atim_window));
  1598. }
  1599. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1600. {
  1601. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1602. IWL_ERROR("APs don't scan.\n");
  1603. return 0;
  1604. }
  1605. if (!iwl_is_ready_rf(priv)) {
  1606. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1607. return -EIO;
  1608. }
  1609. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1610. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1611. return -EAGAIN;
  1612. }
  1613. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1614. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1615. "Queuing.\n");
  1616. return -EAGAIN;
  1617. }
  1618. IWL_DEBUG_INFO("Starting scan...\n");
  1619. priv->scan_bands = 2;
  1620. set_bit(STATUS_SCANNING, &priv->status);
  1621. priv->scan_start = jiffies;
  1622. priv->scan_pass_start = priv->scan_start;
  1623. queue_work(priv->workqueue, &priv->request_scan);
  1624. return 0;
  1625. }
  1626. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1627. enum ieee80211_band band)
  1628. {
  1629. if (band == IEEE80211_BAND_5GHZ) {
  1630. priv->staging_rxon.flags &=
  1631. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1632. | RXON_FLG_CCK_MSK);
  1633. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1634. } else {
  1635. /* Copied from iwl4965_bg_post_associate() */
  1636. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1637. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1638. else
  1639. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1640. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1641. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1642. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1643. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1644. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1645. }
  1646. }
  1647. /*
  1648. * initialize rxon structure with default values from eeprom
  1649. */
  1650. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1651. {
  1652. const struct iwl_channel_info *ch_info;
  1653. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1654. switch (priv->iw_mode) {
  1655. case IEEE80211_IF_TYPE_AP:
  1656. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1657. break;
  1658. case IEEE80211_IF_TYPE_STA:
  1659. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1660. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1661. break;
  1662. case IEEE80211_IF_TYPE_IBSS:
  1663. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1664. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1665. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1666. RXON_FILTER_ACCEPT_GRP_MSK;
  1667. break;
  1668. case IEEE80211_IF_TYPE_MNTR:
  1669. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1670. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1671. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1672. break;
  1673. default:
  1674. IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
  1675. break;
  1676. }
  1677. #if 0
  1678. /* TODO: Figure out when short_preamble would be set and cache from
  1679. * that */
  1680. if (!hw_to_local(priv->hw)->short_preamble)
  1681. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1682. else
  1683. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1684. #endif
  1685. ch_info = iwl_get_channel_info(priv, priv->band,
  1686. le16_to_cpu(priv->staging_rxon.channel));
  1687. if (!ch_info)
  1688. ch_info = &priv->channel_info[0];
  1689. /*
  1690. * in some case A channels are all non IBSS
  1691. * in this case force B/G channel
  1692. */
  1693. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1694. !(is_channel_ibss(ch_info)))
  1695. ch_info = &priv->channel_info[0];
  1696. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1697. priv->band = ch_info->band;
  1698. iwl4965_set_flags_for_phymode(priv, priv->band);
  1699. priv->staging_rxon.ofdm_basic_rates =
  1700. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1701. priv->staging_rxon.cck_basic_rates =
  1702. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1703. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1704. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1705. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1706. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1707. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1708. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1709. iwl4965_set_rxon_chain(priv);
  1710. }
  1711. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1712. {
  1713. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1714. const struct iwl_channel_info *ch_info;
  1715. ch_info = iwl_get_channel_info(priv,
  1716. priv->band,
  1717. le16_to_cpu(priv->staging_rxon.channel));
  1718. if (!ch_info || !is_channel_ibss(ch_info)) {
  1719. IWL_ERROR("channel %d not IBSS channel\n",
  1720. le16_to_cpu(priv->staging_rxon.channel));
  1721. return -EINVAL;
  1722. }
  1723. }
  1724. priv->iw_mode = mode;
  1725. iwl4965_connection_init_rx_config(priv);
  1726. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1727. iwlcore_clear_stations_table(priv);
  1728. /* dont commit rxon if rf-kill is on*/
  1729. if (!iwl_is_ready_rf(priv))
  1730. return -EAGAIN;
  1731. cancel_delayed_work(&priv->scan_check);
  1732. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  1733. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  1734. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1735. return -EAGAIN;
  1736. }
  1737. iwl4965_commit_rxon(priv);
  1738. return 0;
  1739. }
  1740. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1741. struct ieee80211_tx_control *ctl,
  1742. struct iwl_cmd *cmd,
  1743. struct sk_buff *skb_frag,
  1744. int sta_id)
  1745. {
  1746. struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  1747. struct iwl_wep_key *wepkey;
  1748. int keyidx = 0;
  1749. BUG_ON(ctl->key_idx > 3);
  1750. switch (keyinfo->alg) {
  1751. case ALG_CCMP:
  1752. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  1753. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  1754. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1755. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  1756. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  1757. break;
  1758. case ALG_TKIP:
  1759. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  1760. ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
  1761. IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
  1762. IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
  1763. break;
  1764. case ALG_WEP:
  1765. wepkey = &priv->wep_keys[ctl->key_idx];
  1766. cmd->cmd.tx.sec_ctl = 0;
  1767. if (priv->default_wep_key) {
  1768. /* the WEP key was sent as static */
  1769. keyidx = ctl->key_idx;
  1770. memcpy(&cmd->cmd.tx.key[3], wepkey->key,
  1771. wepkey->key_size);
  1772. if (wepkey->key_size == WEP_KEY_LEN_128)
  1773. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1774. } else {
  1775. /* the WEP key was sent as dynamic */
  1776. keyidx = keyinfo->keyidx;
  1777. memcpy(&cmd->cmd.tx.key[3], keyinfo->key,
  1778. keyinfo->keylen);
  1779. if (keyinfo->keylen == WEP_KEY_LEN_128)
  1780. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1781. }
  1782. cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
  1783. (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
  1784. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1785. "with key %d\n", keyidx);
  1786. break;
  1787. default:
  1788. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  1789. break;
  1790. }
  1791. }
  1792. /*
  1793. * handle build REPLY_TX command notification.
  1794. */
  1795. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  1796. struct iwl_cmd *cmd,
  1797. struct ieee80211_tx_control *ctrl,
  1798. struct ieee80211_hdr *hdr,
  1799. int is_unicast, u8 std_id)
  1800. {
  1801. __le16 *qc;
  1802. u16 fc = le16_to_cpu(hdr->frame_control);
  1803. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  1804. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1805. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  1806. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1807. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  1808. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1809. if (ieee80211_is_probe_response(fc) &&
  1810. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1811. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1812. } else {
  1813. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1814. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1815. }
  1816. if (ieee80211_is_back_request(fc))
  1817. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  1818. cmd->cmd.tx.sta_id = std_id;
  1819. if (ieee80211_get_morefrag(hdr))
  1820. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1821. qc = ieee80211_get_qos_ctrl(hdr);
  1822. if (qc) {
  1823. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  1824. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1825. } else
  1826. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1827. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  1828. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1829. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1830. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  1831. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1832. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1833. }
  1834. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1835. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1836. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1837. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  1838. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  1839. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  1840. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  1841. else
  1842. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  1843. } else {
  1844. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  1845. }
  1846. cmd->cmd.tx.driver_txop = 0;
  1847. cmd->cmd.tx.tx_flags = tx_flags;
  1848. cmd->cmd.tx.next_frame_len = 0;
  1849. }
  1850. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1851. {
  1852. /* 0 - mgmt, 1 - cnt, 2 - data */
  1853. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1854. priv->tx_stats[idx].cnt++;
  1855. priv->tx_stats[idx].bytes += len;
  1856. }
  1857. /**
  1858. * iwl4965_get_sta_id - Find station's index within station table
  1859. *
  1860. * If new IBSS station, create new entry in station table
  1861. */
  1862. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  1863. struct ieee80211_hdr *hdr)
  1864. {
  1865. int sta_id;
  1866. u16 fc = le16_to_cpu(hdr->frame_control);
  1867. DECLARE_MAC_BUF(mac);
  1868. /* If this frame is broadcast or management, use broadcast station id */
  1869. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1870. is_multicast_ether_addr(hdr->addr1))
  1871. return priv->hw_setting.bcast_sta_id;
  1872. switch (priv->iw_mode) {
  1873. /* If we are a client station in a BSS network, use the special
  1874. * AP station entry (that's the only station we communicate with) */
  1875. case IEEE80211_IF_TYPE_STA:
  1876. return IWL_AP_ID;
  1877. /* If we are an AP, then find the station, or use BCAST */
  1878. case IEEE80211_IF_TYPE_AP:
  1879. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1880. if (sta_id != IWL_INVALID_STATION)
  1881. return sta_id;
  1882. return priv->hw_setting.bcast_sta_id;
  1883. /* If this frame is going out to an IBSS network, find the station,
  1884. * or create a new station table entry */
  1885. case IEEE80211_IF_TYPE_IBSS:
  1886. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1887. if (sta_id != IWL_INVALID_STATION)
  1888. return sta_id;
  1889. /* Create new station table entry */
  1890. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  1891. 0, CMD_ASYNC, NULL);
  1892. if (sta_id != IWL_INVALID_STATION)
  1893. return sta_id;
  1894. IWL_DEBUG_DROP("Station %s not in station map. "
  1895. "Defaulting to broadcast...\n",
  1896. print_mac(mac, hdr->addr1));
  1897. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1898. return priv->hw_setting.bcast_sta_id;
  1899. default:
  1900. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  1901. return priv->hw_setting.bcast_sta_id;
  1902. }
  1903. }
  1904. /*
  1905. * start REPLY_TX command process
  1906. */
  1907. static int iwl4965_tx_skb(struct iwl_priv *priv,
  1908. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  1909. {
  1910. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1911. struct iwl4965_tfd_frame *tfd;
  1912. u32 *control_flags;
  1913. int txq_id = ctl->queue;
  1914. struct iwl4965_tx_queue *txq = NULL;
  1915. struct iwl4965_queue *q = NULL;
  1916. dma_addr_t phys_addr;
  1917. dma_addr_t txcmd_phys;
  1918. dma_addr_t scratch_phys;
  1919. struct iwl_cmd *out_cmd = NULL;
  1920. u16 len, idx, len_org;
  1921. u8 id, hdr_len, unicast;
  1922. u8 sta_id;
  1923. u16 seq_number = 0;
  1924. u16 fc;
  1925. __le16 *qc;
  1926. u8 wait_write_ptr = 0;
  1927. unsigned long flags;
  1928. int rc;
  1929. spin_lock_irqsave(&priv->lock, flags);
  1930. if (iwl_is_rfkill(priv)) {
  1931. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1932. goto drop_unlock;
  1933. }
  1934. if (!priv->vif) {
  1935. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  1936. goto drop_unlock;
  1937. }
  1938. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1939. IWL_ERROR("ERROR: No TX rate available.\n");
  1940. goto drop_unlock;
  1941. }
  1942. unicast = !is_multicast_ether_addr(hdr->addr1);
  1943. id = 0;
  1944. fc = le16_to_cpu(hdr->frame_control);
  1945. #ifdef CONFIG_IWLWIFI_DEBUG
  1946. if (ieee80211_is_auth(fc))
  1947. IWL_DEBUG_TX("Sending AUTH frame\n");
  1948. else if (ieee80211_is_assoc_request(fc))
  1949. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1950. else if (ieee80211_is_reassoc_request(fc))
  1951. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1952. #endif
  1953. /* drop all data frame if we are not associated */
  1954. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  1955. (!iwl_is_associated(priv) ||
  1956. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  1957. !priv->assoc_station_added)) {
  1958. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  1959. goto drop_unlock;
  1960. }
  1961. spin_unlock_irqrestore(&priv->lock, flags);
  1962. hdr_len = ieee80211_get_hdrlen(fc);
  1963. /* Find (or create) index into station table for destination station */
  1964. sta_id = iwl4965_get_sta_id(priv, hdr);
  1965. if (sta_id == IWL_INVALID_STATION) {
  1966. DECLARE_MAC_BUF(mac);
  1967. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  1968. print_mac(mac, hdr->addr1));
  1969. goto drop;
  1970. }
  1971. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1972. qc = ieee80211_get_qos_ctrl(hdr);
  1973. if (qc) {
  1974. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1975. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  1976. IEEE80211_SCTL_SEQ;
  1977. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1978. (hdr->seq_ctrl &
  1979. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1980. seq_number += 0x10;
  1981. #ifdef CONFIG_IWL4965_HT
  1982. /* aggregation is on for this <sta,tid> */
  1983. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1984. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  1985. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  1986. #endif /* CONFIG_IWL4965_HT */
  1987. }
  1988. /* Descriptor for chosen Tx queue */
  1989. txq = &priv->txq[txq_id];
  1990. q = &txq->q;
  1991. spin_lock_irqsave(&priv->lock, flags);
  1992. /* Set up first empty TFD within this queue's circular TFD buffer */
  1993. tfd = &txq->bd[q->write_ptr];
  1994. memset(tfd, 0, sizeof(*tfd));
  1995. control_flags = (u32 *) tfd;
  1996. idx = get_cmd_index(q, q->write_ptr, 0);
  1997. /* Set up driver data for this TFD */
  1998. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  1999. txq->txb[q->write_ptr].skb[0] = skb;
  2000. memcpy(&(txq->txb[q->write_ptr].status.control),
  2001. ctl, sizeof(struct ieee80211_tx_control));
  2002. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2003. out_cmd = &txq->cmd[idx];
  2004. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2005. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2006. /*
  2007. * Set up the Tx-command (not MAC!) header.
  2008. * Store the chosen Tx queue and TFD index within the sequence field;
  2009. * after Tx, uCode's Tx response will return this value so driver can
  2010. * locate the frame within the tx queue and do post-tx processing.
  2011. */
  2012. out_cmd->hdr.cmd = REPLY_TX;
  2013. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2014. INDEX_TO_SEQ(q->write_ptr)));
  2015. /* Copy MAC header from skb into command buffer */
  2016. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2017. /*
  2018. * Use the first empty entry in this queue's command buffer array
  2019. * to contain the Tx command and MAC header concatenated together
  2020. * (payload data will be in another buffer).
  2021. * Size of this varies, due to varying MAC header length.
  2022. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2023. * of the MAC header (device reads on dword boundaries).
  2024. * We'll tell device about this padding later.
  2025. */
  2026. len = priv->hw_setting.tx_cmd_len +
  2027. sizeof(struct iwl_cmd_header) + hdr_len;
  2028. len_org = len;
  2029. len = (len + 3) & ~3;
  2030. if (len_org != len)
  2031. len_org = 1;
  2032. else
  2033. len_org = 0;
  2034. /* Physical address of this Tx command's header (not MAC header!),
  2035. * within command buffer array. */
  2036. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2037. offsetof(struct iwl_cmd, hdr);
  2038. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2039. * first entry */
  2040. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2041. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2042. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
  2043. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2044. * if any (802.11 null frames have no payload). */
  2045. len = skb->len - hdr_len;
  2046. if (len) {
  2047. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2048. len, PCI_DMA_TODEVICE);
  2049. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2050. }
  2051. /* Tell 4965 about any 2-byte padding after MAC header */
  2052. if (len_org)
  2053. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2054. /* Total # bytes to be transmitted */
  2055. len = (u16)skb->len;
  2056. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2057. /* TODO need this for burst mode later on */
  2058. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2059. /* set is_hcca to 0; it probably will never be implemented */
  2060. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2061. iwl_update_tx_stats(priv, fc, len);
  2062. scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
  2063. offsetof(struct iwl4965_tx_cmd, scratch);
  2064. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2065. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2066. if (!ieee80211_get_morefrag(hdr)) {
  2067. txq->need_update = 1;
  2068. if (qc) {
  2069. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2070. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2071. }
  2072. } else {
  2073. wait_write_ptr = 1;
  2074. txq->need_update = 0;
  2075. }
  2076. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2077. sizeof(out_cmd->cmd.tx));
  2078. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2079. ieee80211_get_hdrlen(fc));
  2080. /* Set up entry for this TFD in Tx byte-count array */
  2081. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2082. /* Tell device the write index *just past* this latest filled TFD */
  2083. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2084. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2085. spin_unlock_irqrestore(&priv->lock, flags);
  2086. if (rc)
  2087. return rc;
  2088. if ((iwl4965_queue_space(q) < q->high_mark)
  2089. && priv->mac80211_registered) {
  2090. if (wait_write_ptr) {
  2091. spin_lock_irqsave(&priv->lock, flags);
  2092. txq->need_update = 1;
  2093. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2094. spin_unlock_irqrestore(&priv->lock, flags);
  2095. }
  2096. ieee80211_stop_queue(priv->hw, ctl->queue);
  2097. }
  2098. return 0;
  2099. drop_unlock:
  2100. spin_unlock_irqrestore(&priv->lock, flags);
  2101. drop:
  2102. return -1;
  2103. }
  2104. static void iwl4965_set_rate(struct iwl_priv *priv)
  2105. {
  2106. const struct ieee80211_supported_band *hw = NULL;
  2107. struct ieee80211_rate *rate;
  2108. int i;
  2109. hw = iwl4965_get_hw_mode(priv, priv->band);
  2110. if (!hw) {
  2111. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2112. return;
  2113. }
  2114. priv->active_rate = 0;
  2115. priv->active_rate_basic = 0;
  2116. for (i = 0; i < hw->n_bitrates; i++) {
  2117. rate = &(hw->bitrates[i]);
  2118. if (rate->hw_value < IWL_RATE_COUNT)
  2119. priv->active_rate |= (1 << rate->hw_value);
  2120. }
  2121. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2122. priv->active_rate, priv->active_rate_basic);
  2123. /*
  2124. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2125. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2126. * OFDM
  2127. */
  2128. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2129. priv->staging_rxon.cck_basic_rates =
  2130. ((priv->active_rate_basic &
  2131. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2132. else
  2133. priv->staging_rxon.cck_basic_rates =
  2134. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2135. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2136. priv->staging_rxon.ofdm_basic_rates =
  2137. ((priv->active_rate_basic &
  2138. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2139. IWL_FIRST_OFDM_RATE) & 0xFF;
  2140. else
  2141. priv->staging_rxon.ofdm_basic_rates =
  2142. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2143. }
  2144. void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2145. {
  2146. unsigned long flags;
  2147. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2148. return;
  2149. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2150. disable_radio ? "OFF" : "ON");
  2151. if (disable_radio) {
  2152. iwl4965_scan_cancel(priv);
  2153. /* FIXME: This is a workaround for AP */
  2154. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2155. spin_lock_irqsave(&priv->lock, flags);
  2156. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2157. CSR_UCODE_SW_BIT_RFKILL);
  2158. spin_unlock_irqrestore(&priv->lock, flags);
  2159. /* call the host command only if no hw rf-kill set */
  2160. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  2161. iwl4965_send_card_state(priv,
  2162. CARD_STATE_CMD_DISABLE,
  2163. 0);
  2164. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2165. /* make sure mac80211 stop sending Tx frame */
  2166. if (priv->mac80211_registered)
  2167. ieee80211_stop_queues(priv->hw);
  2168. }
  2169. return;
  2170. }
  2171. spin_lock_irqsave(&priv->lock, flags);
  2172. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2173. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2174. spin_unlock_irqrestore(&priv->lock, flags);
  2175. /* wake up ucode */
  2176. msleep(10);
  2177. spin_lock_irqsave(&priv->lock, flags);
  2178. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2179. if (!iwl_grab_nic_access(priv))
  2180. iwl_release_nic_access(priv);
  2181. spin_unlock_irqrestore(&priv->lock, flags);
  2182. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2183. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2184. "disabled by HW switch\n");
  2185. return;
  2186. }
  2187. queue_work(priv->workqueue, &priv->restart);
  2188. return;
  2189. }
  2190. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2191. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2192. {
  2193. u16 fc =
  2194. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2195. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2196. return;
  2197. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2198. return;
  2199. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2200. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2201. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2202. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2203. * Decryption will be done in SW. */
  2204. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2205. RX_RES_STATUS_BAD_KEY_TTAK)
  2206. break;
  2207. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2208. RX_RES_STATUS_BAD_ICV_MIC)
  2209. stats->flag |= RX_FLAG_MMIC_ERROR;
  2210. case RX_RES_STATUS_SEC_TYPE_WEP:
  2211. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2212. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2213. RX_RES_STATUS_DECRYPT_OK) {
  2214. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2215. stats->flag |= RX_FLAG_DECRYPTED;
  2216. }
  2217. break;
  2218. default:
  2219. break;
  2220. }
  2221. }
  2222. #define IWL_PACKET_RETRY_TIME HZ
  2223. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2224. {
  2225. u16 sc = le16_to_cpu(header->seq_ctrl);
  2226. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2227. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2228. u16 *last_seq, *last_frag;
  2229. unsigned long *last_time;
  2230. switch (priv->iw_mode) {
  2231. case IEEE80211_IF_TYPE_IBSS:{
  2232. struct list_head *p;
  2233. struct iwl4965_ibss_seq *entry = NULL;
  2234. u8 *mac = header->addr2;
  2235. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2236. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2237. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2238. if (!compare_ether_addr(entry->mac, mac))
  2239. break;
  2240. }
  2241. if (p == &priv->ibss_mac_hash[index]) {
  2242. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2243. if (!entry) {
  2244. IWL_ERROR("Cannot malloc new mac entry\n");
  2245. return 0;
  2246. }
  2247. memcpy(entry->mac, mac, ETH_ALEN);
  2248. entry->seq_num = seq;
  2249. entry->frag_num = frag;
  2250. entry->packet_time = jiffies;
  2251. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2252. return 0;
  2253. }
  2254. last_seq = &entry->seq_num;
  2255. last_frag = &entry->frag_num;
  2256. last_time = &entry->packet_time;
  2257. break;
  2258. }
  2259. case IEEE80211_IF_TYPE_STA:
  2260. last_seq = &priv->last_seq_num;
  2261. last_frag = &priv->last_frag_num;
  2262. last_time = &priv->last_packet_time;
  2263. break;
  2264. default:
  2265. return 0;
  2266. }
  2267. if ((*last_seq == seq) &&
  2268. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2269. if (*last_frag == frag)
  2270. goto drop;
  2271. if (*last_frag + 1 != frag)
  2272. /* out-of-order fragment */
  2273. goto drop;
  2274. } else
  2275. *last_seq = seq;
  2276. *last_frag = frag;
  2277. *last_time = jiffies;
  2278. return 0;
  2279. drop:
  2280. return 1;
  2281. }
  2282. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2283. #include "iwl-spectrum.h"
  2284. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2285. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2286. #define TIME_UNIT 1024
  2287. /*
  2288. * extended beacon time format
  2289. * time in usec will be changed into a 32-bit value in 8:24 format
  2290. * the high 1 byte is the beacon counts
  2291. * the lower 3 bytes is the time in usec within one beacon interval
  2292. */
  2293. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2294. {
  2295. u32 quot;
  2296. u32 rem;
  2297. u32 interval = beacon_interval * 1024;
  2298. if (!interval || !usec)
  2299. return 0;
  2300. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2301. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2302. return (quot << 24) + rem;
  2303. }
  2304. /* base is usually what we get from ucode with each received frame,
  2305. * the same as HW timer counter counting down
  2306. */
  2307. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2308. {
  2309. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2310. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2311. u32 interval = beacon_interval * TIME_UNIT;
  2312. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2313. (addon & BEACON_TIME_MASK_HIGH);
  2314. if (base_low > addon_low)
  2315. res += base_low - addon_low;
  2316. else if (base_low < addon_low) {
  2317. res += interval + base_low - addon_low;
  2318. res += (1 << 24);
  2319. } else
  2320. res += (1 << 24);
  2321. return cpu_to_le32(res);
  2322. }
  2323. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2324. struct ieee80211_measurement_params *params,
  2325. u8 type)
  2326. {
  2327. struct iwl4965_spectrum_cmd spectrum;
  2328. struct iwl4965_rx_packet *res;
  2329. struct iwl_host_cmd cmd = {
  2330. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2331. .data = (void *)&spectrum,
  2332. .meta.flags = CMD_WANT_SKB,
  2333. };
  2334. u32 add_time = le64_to_cpu(params->start_time);
  2335. int rc;
  2336. int spectrum_resp_status;
  2337. int duration = le16_to_cpu(params->duration);
  2338. if (iwl_is_associated(priv))
  2339. add_time =
  2340. iwl4965_usecs_to_beacons(
  2341. le64_to_cpu(params->start_time) - priv->last_tsf,
  2342. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2343. memset(&spectrum, 0, sizeof(spectrum));
  2344. spectrum.channel_count = cpu_to_le16(1);
  2345. spectrum.flags =
  2346. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2347. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2348. cmd.len = sizeof(spectrum);
  2349. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2350. if (iwl_is_associated(priv))
  2351. spectrum.start_time =
  2352. iwl4965_add_beacon_time(priv->last_beacon_time,
  2353. add_time,
  2354. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2355. else
  2356. spectrum.start_time = 0;
  2357. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2358. spectrum.channels[0].channel = params->channel;
  2359. spectrum.channels[0].type = type;
  2360. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2361. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2362. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2363. rc = iwl_send_cmd_sync(priv, &cmd);
  2364. if (rc)
  2365. return rc;
  2366. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2367. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2368. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2369. rc = -EIO;
  2370. }
  2371. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2372. switch (spectrum_resp_status) {
  2373. case 0: /* Command will be handled */
  2374. if (res->u.spectrum.id != 0xff) {
  2375. IWL_DEBUG_INFO
  2376. ("Replaced existing measurement: %d\n",
  2377. res->u.spectrum.id);
  2378. priv->measurement_status &= ~MEASUREMENT_READY;
  2379. }
  2380. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2381. rc = 0;
  2382. break;
  2383. case 1: /* Command will not be handled */
  2384. rc = -EAGAIN;
  2385. break;
  2386. }
  2387. dev_kfree_skb_any(cmd.meta.u.skb);
  2388. return rc;
  2389. }
  2390. #endif
  2391. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2392. struct iwl4965_tx_info *tx_sta)
  2393. {
  2394. tx_sta->status.ack_signal = 0;
  2395. tx_sta->status.excessive_retries = 0;
  2396. tx_sta->status.queue_length = 0;
  2397. tx_sta->status.queue_number = 0;
  2398. if (in_interrupt())
  2399. ieee80211_tx_status_irqsafe(priv->hw,
  2400. tx_sta->skb[0], &(tx_sta->status));
  2401. else
  2402. ieee80211_tx_status(priv->hw,
  2403. tx_sta->skb[0], &(tx_sta->status));
  2404. tx_sta->skb[0] = NULL;
  2405. }
  2406. /**
  2407. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2408. *
  2409. * When FW advances 'R' index, all entries between old and new 'R' index
  2410. * need to be reclaimed. As result, some free space forms. If there is
  2411. * enough free space (> low mark), wake the stack that feeds us.
  2412. */
  2413. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2414. {
  2415. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2416. struct iwl4965_queue *q = &txq->q;
  2417. int nfreed = 0;
  2418. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2419. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2420. "is out of range [0-%d] %d %d.\n", txq_id,
  2421. index, q->n_bd, q->write_ptr, q->read_ptr);
  2422. return 0;
  2423. }
  2424. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2425. q->read_ptr != index;
  2426. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2427. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2428. iwl4965_txstatus_to_ieee(priv,
  2429. &(txq->txb[txq->q.read_ptr]));
  2430. iwl4965_hw_txq_free_tfd(priv, txq);
  2431. } else if (nfreed > 1) {
  2432. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2433. q->write_ptr, q->read_ptr);
  2434. queue_work(priv->workqueue, &priv->restart);
  2435. }
  2436. nfreed++;
  2437. }
  2438. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2439. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2440. priv->mac80211_registered)
  2441. ieee80211_wake_queue(priv->hw, txq_id); */
  2442. return nfreed;
  2443. }
  2444. static int iwl4965_is_tx_success(u32 status)
  2445. {
  2446. status &= TX_STATUS_MSK;
  2447. return (status == TX_STATUS_SUCCESS)
  2448. || (status == TX_STATUS_DIRECT_DONE);
  2449. }
  2450. /******************************************************************************
  2451. *
  2452. * Generic RX handler implementations
  2453. *
  2454. ******************************************************************************/
  2455. #ifdef CONFIG_IWL4965_HT
  2456. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2457. struct ieee80211_hdr *hdr)
  2458. {
  2459. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2460. return IWL_AP_ID;
  2461. else {
  2462. u8 *da = ieee80211_get_DA(hdr);
  2463. return iwl4965_hw_find_station(priv, da);
  2464. }
  2465. }
  2466. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2467. struct iwl_priv *priv, int txq_id, int idx)
  2468. {
  2469. if (priv->txq[txq_id].txb[idx].skb[0])
  2470. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2471. txb[idx].skb[0]->data;
  2472. return NULL;
  2473. }
  2474. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2475. {
  2476. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2477. tx_resp->frame_count);
  2478. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2479. }
  2480. /**
  2481. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2482. */
  2483. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2484. struct iwl4965_ht_agg *agg,
  2485. struct iwl4965_tx_resp_agg *tx_resp,
  2486. u16 start_idx)
  2487. {
  2488. u16 status;
  2489. struct agg_tx_status *frame_status = &tx_resp->status;
  2490. struct ieee80211_tx_status *tx_status = NULL;
  2491. struct ieee80211_hdr *hdr = NULL;
  2492. int i, sh;
  2493. int txq_id, idx;
  2494. u16 seq;
  2495. if (agg->wait_for_ba)
  2496. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2497. agg->frame_count = tx_resp->frame_count;
  2498. agg->start_idx = start_idx;
  2499. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2500. agg->bitmap = 0;
  2501. /* # frames attempted by Tx command */
  2502. if (agg->frame_count == 1) {
  2503. /* Only one frame was attempted; no block-ack will arrive */
  2504. status = le16_to_cpu(frame_status[0].status);
  2505. seq = le16_to_cpu(frame_status[0].sequence);
  2506. idx = SEQ_TO_INDEX(seq);
  2507. txq_id = SEQ_TO_QUEUE(seq);
  2508. /* FIXME: code repetition */
  2509. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2510. agg->frame_count, agg->start_idx, idx);
  2511. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2512. tx_status->retry_count = tx_resp->failure_frame;
  2513. tx_status->queue_number = status & 0xff;
  2514. tx_status->queue_length = tx_resp->failure_rts;
  2515. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2516. tx_status->flags = iwl4965_is_tx_success(status)?
  2517. IEEE80211_TX_STATUS_ACK : 0;
  2518. iwl4965_hwrate_to_tx_control(priv,
  2519. le32_to_cpu(tx_resp->rate_n_flags),
  2520. &tx_status->control);
  2521. /* FIXME: code repetition end */
  2522. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2523. status & 0xff, tx_resp->failure_frame);
  2524. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2525. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2526. agg->wait_for_ba = 0;
  2527. } else {
  2528. /* Two or more frames were attempted; expect block-ack */
  2529. u64 bitmap = 0;
  2530. int start = agg->start_idx;
  2531. /* Construct bit-map of pending frames within Tx window */
  2532. for (i = 0; i < agg->frame_count; i++) {
  2533. u16 sc;
  2534. status = le16_to_cpu(frame_status[i].status);
  2535. seq = le16_to_cpu(frame_status[i].sequence);
  2536. idx = SEQ_TO_INDEX(seq);
  2537. txq_id = SEQ_TO_QUEUE(seq);
  2538. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2539. AGG_TX_STATE_ABORT_MSK))
  2540. continue;
  2541. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2542. agg->frame_count, txq_id, idx);
  2543. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2544. sc = le16_to_cpu(hdr->seq_ctrl);
  2545. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2546. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2547. " idx=%d, seq_idx=%d, seq=%d\n",
  2548. idx, SEQ_TO_SN(sc),
  2549. hdr->seq_ctrl);
  2550. return -1;
  2551. }
  2552. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2553. i, idx, SEQ_TO_SN(sc));
  2554. sh = idx - start;
  2555. if (sh > 64) {
  2556. sh = (start - idx) + 0xff;
  2557. bitmap = bitmap << sh;
  2558. sh = 0;
  2559. start = idx;
  2560. } else if (sh < -64)
  2561. sh = 0xff - (start - idx);
  2562. else if (sh < 0) {
  2563. sh = start - idx;
  2564. start = idx;
  2565. bitmap = bitmap << sh;
  2566. sh = 0;
  2567. }
  2568. bitmap |= (1 << sh);
  2569. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2570. start, (u32)(bitmap & 0xFFFFFFFF));
  2571. }
  2572. agg->bitmap = bitmap;
  2573. agg->start_idx = start;
  2574. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2575. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2576. agg->frame_count, agg->start_idx,
  2577. (unsigned long long)agg->bitmap);
  2578. if (bitmap)
  2579. agg->wait_for_ba = 1;
  2580. }
  2581. return 0;
  2582. }
  2583. #endif
  2584. /**
  2585. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2586. */
  2587. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2588. struct iwl4965_rx_mem_buffer *rxb)
  2589. {
  2590. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2591. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2592. int txq_id = SEQ_TO_QUEUE(sequence);
  2593. int index = SEQ_TO_INDEX(sequence);
  2594. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2595. struct ieee80211_tx_status *tx_status;
  2596. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2597. u32 status = le32_to_cpu(tx_resp->status);
  2598. #ifdef CONFIG_IWL4965_HT
  2599. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2600. struct ieee80211_hdr *hdr;
  2601. __le16 *qc;
  2602. #endif
  2603. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2604. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2605. "is out of range [0-%d] %d %d\n", txq_id,
  2606. index, txq->q.n_bd, txq->q.write_ptr,
  2607. txq->q.read_ptr);
  2608. return;
  2609. }
  2610. #ifdef CONFIG_IWL4965_HT
  2611. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2612. qc = ieee80211_get_qos_ctrl(hdr);
  2613. if (qc)
  2614. tid = le16_to_cpu(*qc) & 0xf;
  2615. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2616. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2617. IWL_ERROR("Station not known\n");
  2618. return;
  2619. }
  2620. if (txq->sched_retry) {
  2621. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2622. struct iwl4965_ht_agg *agg = NULL;
  2623. if (!qc)
  2624. return;
  2625. agg = &priv->stations[sta_id].tid[tid].agg;
  2626. iwl4965_tx_status_reply_tx(priv, agg,
  2627. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2628. if ((tx_resp->frame_count == 1) &&
  2629. !iwl4965_is_tx_success(status)) {
  2630. /* TODO: send BAR */
  2631. }
  2632. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2633. int freed;
  2634. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2635. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2636. "%d index %d\n", scd_ssn , index);
  2637. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2638. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2639. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2640. txq_id >= 0 && priv->mac80211_registered &&
  2641. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2642. ieee80211_wake_queue(priv->hw, txq_id);
  2643. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2644. }
  2645. } else {
  2646. #endif /* CONFIG_IWL4965_HT */
  2647. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2648. tx_status->retry_count = tx_resp->failure_frame;
  2649. tx_status->queue_number = status;
  2650. tx_status->queue_length = tx_resp->bt_kill_count;
  2651. tx_status->queue_length |= tx_resp->failure_rts;
  2652. tx_status->flags =
  2653. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2654. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2655. &tx_status->control);
  2656. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2657. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2658. status, le32_to_cpu(tx_resp->rate_n_flags),
  2659. tx_resp->failure_frame);
  2660. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2661. if (index != -1) {
  2662. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2663. #ifdef CONFIG_IWL4965_HT
  2664. if (tid != MAX_TID_COUNT)
  2665. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2666. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2667. (txq_id >= 0) &&
  2668. priv->mac80211_registered)
  2669. ieee80211_wake_queue(priv->hw, txq_id);
  2670. if (tid != MAX_TID_COUNT)
  2671. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2672. #endif
  2673. }
  2674. #ifdef CONFIG_IWL4965_HT
  2675. }
  2676. #endif /* CONFIG_IWL4965_HT */
  2677. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2678. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2679. }
  2680. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2681. struct iwl4965_rx_mem_buffer *rxb)
  2682. {
  2683. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2684. struct iwl4965_alive_resp *palive;
  2685. struct delayed_work *pwork;
  2686. palive = &pkt->u.alive_frame;
  2687. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2688. "0x%01X 0x%01X\n",
  2689. palive->is_valid, palive->ver_type,
  2690. palive->ver_subtype);
  2691. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2692. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2693. memcpy(&priv->card_alive_init,
  2694. &pkt->u.alive_frame,
  2695. sizeof(struct iwl4965_init_alive_resp));
  2696. pwork = &priv->init_alive_start;
  2697. } else {
  2698. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2699. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2700. sizeof(struct iwl4965_alive_resp));
  2701. pwork = &priv->alive_start;
  2702. }
  2703. /* We delay the ALIVE response by 5ms to
  2704. * give the HW RF Kill time to activate... */
  2705. if (palive->is_valid == UCODE_VALID_OK)
  2706. queue_delayed_work(priv->workqueue, pwork,
  2707. msecs_to_jiffies(5));
  2708. else
  2709. IWL_WARNING("uCode did not respond OK.\n");
  2710. }
  2711. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2712. struct iwl4965_rx_mem_buffer *rxb)
  2713. {
  2714. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2715. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2716. return;
  2717. }
  2718. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2719. struct iwl4965_rx_mem_buffer *rxb)
  2720. {
  2721. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2722. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2723. "seq 0x%04X ser 0x%08X\n",
  2724. le32_to_cpu(pkt->u.err_resp.error_type),
  2725. get_cmd_string(pkt->u.err_resp.cmd_id),
  2726. pkt->u.err_resp.cmd_id,
  2727. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2728. le32_to_cpu(pkt->u.err_resp.error_info));
  2729. }
  2730. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2731. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2732. {
  2733. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2734. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2735. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2736. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2737. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2738. rxon->channel = csa->channel;
  2739. priv->staging_rxon.channel = csa->channel;
  2740. }
  2741. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2742. struct iwl4965_rx_mem_buffer *rxb)
  2743. {
  2744. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2745. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2746. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2747. if (!report->state) {
  2748. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2749. "Spectrum Measure Notification: Start\n");
  2750. return;
  2751. }
  2752. memcpy(&priv->measure_report, report, sizeof(*report));
  2753. priv->measurement_status |= MEASUREMENT_READY;
  2754. #endif
  2755. }
  2756. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  2757. struct iwl4965_rx_mem_buffer *rxb)
  2758. {
  2759. #ifdef CONFIG_IWLWIFI_DEBUG
  2760. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2761. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2762. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2763. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2764. #endif
  2765. }
  2766. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2767. struct iwl4965_rx_mem_buffer *rxb)
  2768. {
  2769. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2770. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2771. "notification for %s:\n",
  2772. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2773. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2774. }
  2775. static void iwl4965_bg_beacon_update(struct work_struct *work)
  2776. {
  2777. struct iwl_priv *priv =
  2778. container_of(work, struct iwl_priv, beacon_update);
  2779. struct sk_buff *beacon;
  2780. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2781. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  2782. if (!beacon) {
  2783. IWL_ERROR("update beacon failed\n");
  2784. return;
  2785. }
  2786. mutex_lock(&priv->mutex);
  2787. /* new beacon skb is allocated every time; dispose previous.*/
  2788. if (priv->ibss_beacon)
  2789. dev_kfree_skb(priv->ibss_beacon);
  2790. priv->ibss_beacon = beacon;
  2791. mutex_unlock(&priv->mutex);
  2792. iwl4965_send_beacon_cmd(priv);
  2793. }
  2794. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  2795. struct iwl4965_rx_mem_buffer *rxb)
  2796. {
  2797. #ifdef CONFIG_IWLWIFI_DEBUG
  2798. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2799. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  2800. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  2801. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2802. "tsf %d %d rate %d\n",
  2803. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2804. beacon->beacon_notify_hdr.failure_frame,
  2805. le32_to_cpu(beacon->ibss_mgr_status),
  2806. le32_to_cpu(beacon->high_tsf),
  2807. le32_to_cpu(beacon->low_tsf), rate);
  2808. #endif
  2809. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  2810. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2811. queue_work(priv->workqueue, &priv->beacon_update);
  2812. }
  2813. /* Service response to REPLY_SCAN_CMD (0x80) */
  2814. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  2815. struct iwl4965_rx_mem_buffer *rxb)
  2816. {
  2817. #ifdef CONFIG_IWLWIFI_DEBUG
  2818. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2819. struct iwl4965_scanreq_notification *notif =
  2820. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  2821. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2822. #endif
  2823. }
  2824. /* Service SCAN_START_NOTIFICATION (0x82) */
  2825. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  2826. struct iwl4965_rx_mem_buffer *rxb)
  2827. {
  2828. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2829. struct iwl4965_scanstart_notification *notif =
  2830. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  2831. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2832. IWL_DEBUG_SCAN("Scan start: "
  2833. "%d [802.11%s] "
  2834. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2835. notif->channel,
  2836. notif->band ? "bg" : "a",
  2837. notif->tsf_high,
  2838. notif->tsf_low, notif->status, notif->beacon_timer);
  2839. }
  2840. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2841. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  2842. struct iwl4965_rx_mem_buffer *rxb)
  2843. {
  2844. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2845. struct iwl4965_scanresults_notification *notif =
  2846. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  2847. IWL_DEBUG_SCAN("Scan ch.res: "
  2848. "%d [802.11%s] "
  2849. "(TSF: 0x%08X:%08X) - %d "
  2850. "elapsed=%lu usec (%dms since last)\n",
  2851. notif->channel,
  2852. notif->band ? "bg" : "a",
  2853. le32_to_cpu(notif->tsf_high),
  2854. le32_to_cpu(notif->tsf_low),
  2855. le32_to_cpu(notif->statistics[0]),
  2856. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2857. jiffies_to_msecs(elapsed_jiffies
  2858. (priv->last_scan_jiffies, jiffies)));
  2859. priv->last_scan_jiffies = jiffies;
  2860. priv->next_scan_jiffies = 0;
  2861. }
  2862. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2863. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  2864. struct iwl4965_rx_mem_buffer *rxb)
  2865. {
  2866. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2867. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2868. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2869. scan_notif->scanned_channels,
  2870. scan_notif->tsf_low,
  2871. scan_notif->tsf_high, scan_notif->status);
  2872. /* The HW is no longer scanning */
  2873. clear_bit(STATUS_SCAN_HW, &priv->status);
  2874. /* The scan completion notification came in, so kill that timer... */
  2875. cancel_delayed_work(&priv->scan_check);
  2876. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2877. (priv->scan_bands == 2) ? "2.4" : "5.2",
  2878. jiffies_to_msecs(elapsed_jiffies
  2879. (priv->scan_pass_start, jiffies)));
  2880. /* Remove this scanned band from the list
  2881. * of pending bands to scan */
  2882. priv->scan_bands--;
  2883. /* If a request to abort was given, or the scan did not succeed
  2884. * then we reset the scan state machine and terminate,
  2885. * re-queuing another scan if one has been requested */
  2886. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2887. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2888. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2889. } else {
  2890. /* If there are more bands on this scan pass reschedule */
  2891. if (priv->scan_bands > 0)
  2892. goto reschedule;
  2893. }
  2894. priv->last_scan_jiffies = jiffies;
  2895. priv->next_scan_jiffies = 0;
  2896. IWL_DEBUG_INFO("Setting scan to off\n");
  2897. clear_bit(STATUS_SCANNING, &priv->status);
  2898. IWL_DEBUG_INFO("Scan took %dms\n",
  2899. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2900. queue_work(priv->workqueue, &priv->scan_completed);
  2901. return;
  2902. reschedule:
  2903. priv->scan_pass_start = jiffies;
  2904. queue_work(priv->workqueue, &priv->request_scan);
  2905. }
  2906. /* Handle notification from uCode that card's power state is changing
  2907. * due to software, hardware, or critical temperature RFKILL */
  2908. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  2909. struct iwl4965_rx_mem_buffer *rxb)
  2910. {
  2911. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2912. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2913. unsigned long status = priv->status;
  2914. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2915. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2916. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2917. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  2918. RF_CARD_DISABLED)) {
  2919. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2920. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2921. if (!iwl_grab_nic_access(priv)) {
  2922. iwl_write_direct32(
  2923. priv, HBUS_TARG_MBX_C,
  2924. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2925. iwl_release_nic_access(priv);
  2926. }
  2927. if (!(flags & RXON_CARD_DISABLED)) {
  2928. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2929. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2930. if (!iwl_grab_nic_access(priv)) {
  2931. iwl_write_direct32(
  2932. priv, HBUS_TARG_MBX_C,
  2933. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2934. iwl_release_nic_access(priv);
  2935. }
  2936. }
  2937. if (flags & RF_CARD_DISABLED) {
  2938. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2939. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  2940. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2941. if (!iwl_grab_nic_access(priv))
  2942. iwl_release_nic_access(priv);
  2943. }
  2944. }
  2945. if (flags & HW_CARD_DISABLED)
  2946. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2947. else
  2948. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2949. if (flags & SW_CARD_DISABLED)
  2950. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2951. else
  2952. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2953. if (!(flags & RXON_CARD_DISABLED))
  2954. iwl4965_scan_cancel(priv);
  2955. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2956. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2957. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2958. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2959. queue_work(priv->workqueue, &priv->rf_kill);
  2960. else
  2961. wake_up_interruptible(&priv->wait_command_queue);
  2962. }
  2963. /**
  2964. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  2965. *
  2966. * Setup the RX handlers for each of the reply types sent from the uCode
  2967. * to the host.
  2968. *
  2969. * This function chains into the hardware specific files for them to setup
  2970. * any hardware specific handlers as well.
  2971. */
  2972. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  2973. {
  2974. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  2975. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  2976. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  2977. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  2978. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2979. iwl4965_rx_spectrum_measure_notif;
  2980. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  2981. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2982. iwl4965_rx_pm_debug_statistics_notif;
  2983. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  2984. /*
  2985. * The same handler is used for both the REPLY to a discrete
  2986. * statistics request from the host as well as for the periodic
  2987. * statistics notifications (after received beacons) from the uCode.
  2988. */
  2989. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  2990. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  2991. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  2992. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  2993. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2994. iwl4965_rx_scan_results_notif;
  2995. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2996. iwl4965_rx_scan_complete_notif;
  2997. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  2998. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  2999. /* Set up hardware specific Rx handlers */
  3000. iwl4965_hw_rx_handler_setup(priv);
  3001. }
  3002. /**
  3003. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3004. * @rxb: Rx buffer to reclaim
  3005. *
  3006. * If an Rx buffer has an async callback associated with it the callback
  3007. * will be executed. The attached skb (if present) will only be freed
  3008. * if the callback returns 1
  3009. */
  3010. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  3011. struct iwl4965_rx_mem_buffer *rxb)
  3012. {
  3013. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3014. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3015. int txq_id = SEQ_TO_QUEUE(sequence);
  3016. int index = SEQ_TO_INDEX(sequence);
  3017. int huge = sequence & SEQ_HUGE_FRAME;
  3018. int cmd_index;
  3019. struct iwl_cmd *cmd;
  3020. /* If a Tx command is being handled and it isn't in the actual
  3021. * command queue then there a command routing bug has been introduced
  3022. * in the queue management code. */
  3023. if (txq_id != IWL_CMD_QUEUE_NUM)
  3024. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3025. txq_id, pkt->hdr.cmd);
  3026. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3027. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3028. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3029. /* Input error checking is done when commands are added to queue. */
  3030. if (cmd->meta.flags & CMD_WANT_SKB) {
  3031. cmd->meta.source->u.skb = rxb->skb;
  3032. rxb->skb = NULL;
  3033. } else if (cmd->meta.u.callback &&
  3034. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3035. rxb->skb = NULL;
  3036. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3037. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3038. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3039. wake_up_interruptible(&priv->wait_command_queue);
  3040. }
  3041. }
  3042. /************************** RX-FUNCTIONS ****************************/
  3043. /*
  3044. * Rx theory of operation
  3045. *
  3046. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3047. * each of which point to Receive Buffers to be filled by 4965. These get
  3048. * used not only for Rx frames, but for any command response or notification
  3049. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3050. * of indexes into the circular buffer.
  3051. *
  3052. * Rx Queue Indexes
  3053. * The host/firmware share two index registers for managing the Rx buffers.
  3054. *
  3055. * The READ index maps to the first position that the firmware may be writing
  3056. * to -- the driver can read up to (but not including) this position and get
  3057. * good data.
  3058. * The READ index is managed by the firmware once the card is enabled.
  3059. *
  3060. * The WRITE index maps to the last position the driver has read from -- the
  3061. * position preceding WRITE is the last slot the firmware can place a packet.
  3062. *
  3063. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3064. * WRITE = READ.
  3065. *
  3066. * During initialization, the host sets up the READ queue position to the first
  3067. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3068. *
  3069. * When the firmware places a packet in a buffer, it will advance the READ index
  3070. * and fire the RX interrupt. The driver can then query the READ index and
  3071. * process as many packets as possible, moving the WRITE index forward as it
  3072. * resets the Rx queue buffers with new memory.
  3073. *
  3074. * The management in the driver is as follows:
  3075. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3076. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3077. * to replenish the iwl->rxq->rx_free.
  3078. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3079. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3080. * 'processed' and 'read' driver indexes as well)
  3081. * + A received packet is processed and handed to the kernel network stack,
  3082. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3083. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3084. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3085. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3086. * were enough free buffers and RX_STALLED is set it is cleared.
  3087. *
  3088. *
  3089. * Driver sequence:
  3090. *
  3091. * iwl4965_rx_queue_alloc() Allocates rx_free
  3092. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3093. * iwl4965_rx_queue_restock
  3094. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3095. * queue, updates firmware pointers, and updates
  3096. * the WRITE index. If insufficient rx_free buffers
  3097. * are available, schedules iwl4965_rx_replenish
  3098. *
  3099. * -- enable interrupts --
  3100. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3101. * READ INDEX, detaching the SKB from the pool.
  3102. * Moves the packet buffer from queue to rx_used.
  3103. * Calls iwl4965_rx_queue_restock to refill any empty
  3104. * slots.
  3105. * ...
  3106. *
  3107. */
  3108. /**
  3109. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3110. */
  3111. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3112. {
  3113. int s = q->read - q->write;
  3114. if (s <= 0)
  3115. s += RX_QUEUE_SIZE;
  3116. /* keep some buffer to not confuse full and empty queue */
  3117. s -= 2;
  3118. if (s < 0)
  3119. s = 0;
  3120. return s;
  3121. }
  3122. /**
  3123. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3124. */
  3125. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3126. {
  3127. u32 reg = 0;
  3128. int rc = 0;
  3129. unsigned long flags;
  3130. spin_lock_irqsave(&q->lock, flags);
  3131. if (q->need_update == 0)
  3132. goto exit_unlock;
  3133. /* If power-saving is in use, make sure device is awake */
  3134. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3135. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3136. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3137. iwl_set_bit(priv, CSR_GP_CNTRL,
  3138. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3139. goto exit_unlock;
  3140. }
  3141. rc = iwl_grab_nic_access(priv);
  3142. if (rc)
  3143. goto exit_unlock;
  3144. /* Device expects a multiple of 8 */
  3145. iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3146. q->write & ~0x7);
  3147. iwl_release_nic_access(priv);
  3148. /* Else device is assumed to be awake */
  3149. } else
  3150. /* Device expects a multiple of 8 */
  3151. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3152. q->need_update = 0;
  3153. exit_unlock:
  3154. spin_unlock_irqrestore(&q->lock, flags);
  3155. return rc;
  3156. }
  3157. /**
  3158. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3159. */
  3160. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3161. dma_addr_t dma_addr)
  3162. {
  3163. return cpu_to_le32((u32)(dma_addr >> 8));
  3164. }
  3165. /**
  3166. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3167. *
  3168. * If there are slots in the RX queue that need to be restocked,
  3169. * and we have free pre-allocated buffers, fill the ranks as much
  3170. * as we can, pulling from rx_free.
  3171. *
  3172. * This moves the 'write' index forward to catch up with 'processed', and
  3173. * also updates the memory address in the firmware to reference the new
  3174. * target buffer.
  3175. */
  3176. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3177. {
  3178. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3179. struct list_head *element;
  3180. struct iwl4965_rx_mem_buffer *rxb;
  3181. unsigned long flags;
  3182. int write, rc;
  3183. spin_lock_irqsave(&rxq->lock, flags);
  3184. write = rxq->write & ~0x7;
  3185. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3186. /* Get next free Rx buffer, remove from free list */
  3187. element = rxq->rx_free.next;
  3188. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3189. list_del(element);
  3190. /* Point to Rx buffer via next RBD in circular buffer */
  3191. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3192. rxq->queue[rxq->write] = rxb;
  3193. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3194. rxq->free_count--;
  3195. }
  3196. spin_unlock_irqrestore(&rxq->lock, flags);
  3197. /* If the pre-allocated buffer pool is dropping low, schedule to
  3198. * refill it */
  3199. if (rxq->free_count <= RX_LOW_WATERMARK)
  3200. queue_work(priv->workqueue, &priv->rx_replenish);
  3201. /* If we've added more space for the firmware to place data, tell it.
  3202. * Increment device's write pointer in multiples of 8. */
  3203. if ((write != (rxq->write & ~0x7))
  3204. || (abs(rxq->write - rxq->read) > 7)) {
  3205. spin_lock_irqsave(&rxq->lock, flags);
  3206. rxq->need_update = 1;
  3207. spin_unlock_irqrestore(&rxq->lock, flags);
  3208. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3209. if (rc)
  3210. return rc;
  3211. }
  3212. return 0;
  3213. }
  3214. /**
  3215. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3216. *
  3217. * When moving to rx_free an SKB is allocated for the slot.
  3218. *
  3219. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3220. * This is called as a scheduled work item (except for during initialization)
  3221. */
  3222. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3223. {
  3224. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3225. struct list_head *element;
  3226. struct iwl4965_rx_mem_buffer *rxb;
  3227. unsigned long flags;
  3228. spin_lock_irqsave(&rxq->lock, flags);
  3229. while (!list_empty(&rxq->rx_used)) {
  3230. element = rxq->rx_used.next;
  3231. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3232. /* Alloc a new receive buffer */
  3233. rxb->skb =
  3234. alloc_skb(priv->hw_setting.rx_buf_size,
  3235. __GFP_NOWARN | GFP_ATOMIC);
  3236. if (!rxb->skb) {
  3237. if (net_ratelimit())
  3238. printk(KERN_CRIT DRV_NAME
  3239. ": Can not allocate SKB buffers\n");
  3240. /* We don't reschedule replenish work here -- we will
  3241. * call the restock method and if it still needs
  3242. * more buffers it will schedule replenish */
  3243. break;
  3244. }
  3245. priv->alloc_rxb_skb++;
  3246. list_del(element);
  3247. /* Get physical address of RB/SKB */
  3248. rxb->dma_addr =
  3249. pci_map_single(priv->pci_dev, rxb->skb->data,
  3250. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3251. list_add_tail(&rxb->list, &rxq->rx_free);
  3252. rxq->free_count++;
  3253. }
  3254. spin_unlock_irqrestore(&rxq->lock, flags);
  3255. }
  3256. /*
  3257. * this should be called while priv->lock is locked
  3258. */
  3259. static void __iwl4965_rx_replenish(void *data)
  3260. {
  3261. struct iwl_priv *priv = data;
  3262. iwl4965_rx_allocate(priv);
  3263. iwl4965_rx_queue_restock(priv);
  3264. }
  3265. void iwl4965_rx_replenish(void *data)
  3266. {
  3267. struct iwl_priv *priv = data;
  3268. unsigned long flags;
  3269. iwl4965_rx_allocate(priv);
  3270. spin_lock_irqsave(&priv->lock, flags);
  3271. iwl4965_rx_queue_restock(priv);
  3272. spin_unlock_irqrestore(&priv->lock, flags);
  3273. }
  3274. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3275. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3276. * This free routine walks the list of POOL entries and if SKB is set to
  3277. * non NULL it is unmapped and freed
  3278. */
  3279. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3280. {
  3281. int i;
  3282. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3283. if (rxq->pool[i].skb != NULL) {
  3284. pci_unmap_single(priv->pci_dev,
  3285. rxq->pool[i].dma_addr,
  3286. priv->hw_setting.rx_buf_size,
  3287. PCI_DMA_FROMDEVICE);
  3288. dev_kfree_skb(rxq->pool[i].skb);
  3289. }
  3290. }
  3291. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3292. rxq->dma_addr);
  3293. rxq->bd = NULL;
  3294. }
  3295. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3296. {
  3297. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3298. struct pci_dev *dev = priv->pci_dev;
  3299. int i;
  3300. spin_lock_init(&rxq->lock);
  3301. INIT_LIST_HEAD(&rxq->rx_free);
  3302. INIT_LIST_HEAD(&rxq->rx_used);
  3303. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3304. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3305. if (!rxq->bd)
  3306. return -ENOMEM;
  3307. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3308. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3309. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3310. /* Set us so that we have processed and used all buffers, but have
  3311. * not restocked the Rx queue with fresh buffers */
  3312. rxq->read = rxq->write = 0;
  3313. rxq->free_count = 0;
  3314. rxq->need_update = 0;
  3315. return 0;
  3316. }
  3317. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3318. {
  3319. unsigned long flags;
  3320. int i;
  3321. spin_lock_irqsave(&rxq->lock, flags);
  3322. INIT_LIST_HEAD(&rxq->rx_free);
  3323. INIT_LIST_HEAD(&rxq->rx_used);
  3324. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3325. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3326. /* In the reset function, these buffers may have been allocated
  3327. * to an SKB, so we need to unmap and free potential storage */
  3328. if (rxq->pool[i].skb != NULL) {
  3329. pci_unmap_single(priv->pci_dev,
  3330. rxq->pool[i].dma_addr,
  3331. priv->hw_setting.rx_buf_size,
  3332. PCI_DMA_FROMDEVICE);
  3333. priv->alloc_rxb_skb--;
  3334. dev_kfree_skb(rxq->pool[i].skb);
  3335. rxq->pool[i].skb = NULL;
  3336. }
  3337. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3338. }
  3339. /* Set us so that we have processed and used all buffers, but have
  3340. * not restocked the Rx queue with fresh buffers */
  3341. rxq->read = rxq->write = 0;
  3342. rxq->free_count = 0;
  3343. spin_unlock_irqrestore(&rxq->lock, flags);
  3344. }
  3345. /* Convert linear signal-to-noise ratio into dB */
  3346. static u8 ratio2dB[100] = {
  3347. /* 0 1 2 3 4 5 6 7 8 9 */
  3348. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3349. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3350. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3351. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3352. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3353. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3354. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3355. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3356. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3357. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3358. };
  3359. /* Calculates a relative dB value from a ratio of linear
  3360. * (i.e. not dB) signal levels.
  3361. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3362. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3363. {
  3364. /* 1000:1 or higher just report as 60 dB */
  3365. if (sig_ratio >= 1000)
  3366. return 60;
  3367. /* 100:1 or higher, divide by 10 and use table,
  3368. * add 20 dB to make up for divide by 10 */
  3369. if (sig_ratio >= 100)
  3370. return (20 + (int)ratio2dB[sig_ratio/10]);
  3371. /* We shouldn't see this */
  3372. if (sig_ratio < 1)
  3373. return 0;
  3374. /* Use table for ratios 1:1 - 99:1 */
  3375. return (int)ratio2dB[sig_ratio];
  3376. }
  3377. #define PERFECT_RSSI (-20) /* dBm */
  3378. #define WORST_RSSI (-95) /* dBm */
  3379. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3380. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3381. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3382. * about formulas used below. */
  3383. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3384. {
  3385. int sig_qual;
  3386. int degradation = PERFECT_RSSI - rssi_dbm;
  3387. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3388. * as indicator; formula is (signal dbm - noise dbm).
  3389. * SNR at or above 40 is a great signal (100%).
  3390. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3391. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3392. if (noise_dbm) {
  3393. if (rssi_dbm - noise_dbm >= 40)
  3394. return 100;
  3395. else if (rssi_dbm < noise_dbm)
  3396. return 0;
  3397. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3398. /* Else use just the signal level.
  3399. * This formula is a least squares fit of data points collected and
  3400. * compared with a reference system that had a percentage (%) display
  3401. * for signal quality. */
  3402. } else
  3403. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3404. (15 * RSSI_RANGE + 62 * degradation)) /
  3405. (RSSI_RANGE * RSSI_RANGE);
  3406. if (sig_qual > 100)
  3407. sig_qual = 100;
  3408. else if (sig_qual < 1)
  3409. sig_qual = 0;
  3410. return sig_qual;
  3411. }
  3412. /**
  3413. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3414. *
  3415. * Uses the priv->rx_handlers callback function array to invoke
  3416. * the appropriate handlers, including command responses,
  3417. * frame-received notifications, and other notifications.
  3418. */
  3419. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3420. {
  3421. struct iwl4965_rx_mem_buffer *rxb;
  3422. struct iwl4965_rx_packet *pkt;
  3423. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3424. u32 r, i;
  3425. int reclaim;
  3426. unsigned long flags;
  3427. u8 fill_rx = 0;
  3428. u32 count = 8;
  3429. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3430. * buffer that the driver may process (last buffer filled by ucode). */
  3431. r = iwl4965_hw_get_rx_read(priv);
  3432. i = rxq->read;
  3433. /* Rx interrupt, but nothing sent from uCode */
  3434. if (i == r)
  3435. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3436. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3437. fill_rx = 1;
  3438. while (i != r) {
  3439. rxb = rxq->queue[i];
  3440. /* If an RXB doesn't have a Rx queue slot associated with it,
  3441. * then a bug has been introduced in the queue refilling
  3442. * routines -- catch it here */
  3443. BUG_ON(rxb == NULL);
  3444. rxq->queue[i] = NULL;
  3445. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3446. priv->hw_setting.rx_buf_size,
  3447. PCI_DMA_FROMDEVICE);
  3448. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3449. /* Reclaim a command buffer only if this packet is a response
  3450. * to a (driver-originated) command.
  3451. * If the packet (e.g. Rx frame) originated from uCode,
  3452. * there is no command buffer to reclaim.
  3453. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3454. * but apparently a few don't get set; catch them here. */
  3455. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3456. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3457. (pkt->hdr.cmd != REPLY_RX) &&
  3458. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3459. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3460. (pkt->hdr.cmd != REPLY_TX);
  3461. /* Based on type of command response or notification,
  3462. * handle those that need handling via function in
  3463. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3464. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3465. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3466. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3467. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3468. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3469. } else {
  3470. /* No handling needed */
  3471. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3472. "r %d i %d No handler needed for %s, 0x%02x\n",
  3473. r, i, get_cmd_string(pkt->hdr.cmd),
  3474. pkt->hdr.cmd);
  3475. }
  3476. if (reclaim) {
  3477. /* Invoke any callbacks, transfer the skb to caller, and
  3478. * fire off the (possibly) blocking iwl_send_cmd()
  3479. * as we reclaim the driver command queue */
  3480. if (rxb && rxb->skb)
  3481. iwl4965_tx_cmd_complete(priv, rxb);
  3482. else
  3483. IWL_WARNING("Claim null rxb?\n");
  3484. }
  3485. /* For now we just don't re-use anything. We can tweak this
  3486. * later to try and re-use notification packets and SKBs that
  3487. * fail to Rx correctly */
  3488. if (rxb->skb != NULL) {
  3489. priv->alloc_rxb_skb--;
  3490. dev_kfree_skb_any(rxb->skb);
  3491. rxb->skb = NULL;
  3492. }
  3493. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3494. priv->hw_setting.rx_buf_size,
  3495. PCI_DMA_FROMDEVICE);
  3496. spin_lock_irqsave(&rxq->lock, flags);
  3497. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3498. spin_unlock_irqrestore(&rxq->lock, flags);
  3499. i = (i + 1) & RX_QUEUE_MASK;
  3500. /* If there are a lot of unused frames,
  3501. * restock the Rx queue so ucode wont assert. */
  3502. if (fill_rx) {
  3503. count++;
  3504. if (count >= 8) {
  3505. priv->rxq.read = i;
  3506. __iwl4965_rx_replenish(priv);
  3507. count = 0;
  3508. }
  3509. }
  3510. }
  3511. /* Backtrack one entry */
  3512. priv->rxq.read = i;
  3513. iwl4965_rx_queue_restock(priv);
  3514. }
  3515. /**
  3516. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3517. */
  3518. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3519. struct iwl4965_tx_queue *txq)
  3520. {
  3521. u32 reg = 0;
  3522. int rc = 0;
  3523. int txq_id = txq->q.id;
  3524. if (txq->need_update == 0)
  3525. return rc;
  3526. /* if we're trying to save power */
  3527. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3528. /* wake up nic if it's powered down ...
  3529. * uCode will wake up, and interrupt us again, so next
  3530. * time we'll skip this part. */
  3531. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3532. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3533. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3534. iwl_set_bit(priv, CSR_GP_CNTRL,
  3535. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3536. return rc;
  3537. }
  3538. /* restore this queue's parameters in nic hardware. */
  3539. rc = iwl_grab_nic_access(priv);
  3540. if (rc)
  3541. return rc;
  3542. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  3543. txq->q.write_ptr | (txq_id << 8));
  3544. iwl_release_nic_access(priv);
  3545. /* else not in power-save mode, uCode will never sleep when we're
  3546. * trying to tx (during RFKILL, we're not trying to tx). */
  3547. } else
  3548. iwl_write32(priv, HBUS_TARG_WRPTR,
  3549. txq->q.write_ptr | (txq_id << 8));
  3550. txq->need_update = 0;
  3551. return rc;
  3552. }
  3553. #ifdef CONFIG_IWLWIFI_DEBUG
  3554. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3555. {
  3556. DECLARE_MAC_BUF(mac);
  3557. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3558. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3559. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3560. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3561. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3562. le32_to_cpu(rxon->filter_flags));
  3563. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3564. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3565. rxon->ofdm_basic_rates);
  3566. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3567. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3568. print_mac(mac, rxon->node_addr));
  3569. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3570. print_mac(mac, rxon->bssid_addr));
  3571. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3572. }
  3573. #endif
  3574. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3575. {
  3576. IWL_DEBUG_ISR("Enabling interrupts\n");
  3577. set_bit(STATUS_INT_ENABLED, &priv->status);
  3578. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3579. }
  3580. /* call this function to flush any scheduled tasklet */
  3581. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  3582. {
  3583. /* wait to make sure we flush pedding tasklet*/
  3584. synchronize_irq(priv->pci_dev->irq);
  3585. tasklet_kill(&priv->irq_tasklet);
  3586. }
  3587. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3588. {
  3589. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3590. /* disable interrupts from uCode/NIC to host */
  3591. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3592. /* acknowledge/clear/reset any interrupts still pending
  3593. * from uCode or flow handler (Rx/Tx DMA) */
  3594. iwl_write32(priv, CSR_INT, 0xffffffff);
  3595. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3596. IWL_DEBUG_ISR("Disabled interrupts\n");
  3597. }
  3598. static const char *desc_lookup(int i)
  3599. {
  3600. switch (i) {
  3601. case 1:
  3602. return "FAIL";
  3603. case 2:
  3604. return "BAD_PARAM";
  3605. case 3:
  3606. return "BAD_CHECKSUM";
  3607. case 4:
  3608. return "NMI_INTERRUPT";
  3609. case 5:
  3610. return "SYSASSERT";
  3611. case 6:
  3612. return "FATAL_ERROR";
  3613. }
  3614. return "UNKNOWN";
  3615. }
  3616. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3617. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3618. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3619. {
  3620. u32 data2, line;
  3621. u32 desc, time, count, base, data1;
  3622. u32 blink1, blink2, ilink1, ilink2;
  3623. int rc;
  3624. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3625. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  3626. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3627. return;
  3628. }
  3629. rc = iwl_grab_nic_access(priv);
  3630. if (rc) {
  3631. IWL_WARNING("Can not read from adapter at this time.\n");
  3632. return;
  3633. }
  3634. count = iwl_read_targ_mem(priv, base);
  3635. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3636. IWL_ERROR("Start IWL Error Log Dump:\n");
  3637. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3638. }
  3639. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  3640. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  3641. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  3642. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  3643. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  3644. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  3645. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  3646. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  3647. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  3648. IWL_ERROR("Desc Time "
  3649. "data1 data2 line\n");
  3650. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3651. desc_lookup(desc), desc, time, data1, data2, line);
  3652. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3653. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3654. ilink1, ilink2);
  3655. iwl_release_nic_access(priv);
  3656. }
  3657. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3658. /**
  3659. * iwl4965_print_event_log - Dump error event log to syslog
  3660. *
  3661. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  3662. */
  3663. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3664. u32 num_events, u32 mode)
  3665. {
  3666. u32 i;
  3667. u32 base; /* SRAM byte address of event log header */
  3668. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3669. u32 ptr; /* SRAM byte address of log data */
  3670. u32 ev, time, data; /* event log data */
  3671. if (num_events == 0)
  3672. return;
  3673. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3674. if (mode == 0)
  3675. event_size = 2 * sizeof(u32);
  3676. else
  3677. event_size = 3 * sizeof(u32);
  3678. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3679. /* "time" is actually "data" for mode 0 (no timestamp).
  3680. * place event id # at far right for easier visual parsing. */
  3681. for (i = 0; i < num_events; i++) {
  3682. ev = iwl_read_targ_mem(priv, ptr);
  3683. ptr += sizeof(u32);
  3684. time = iwl_read_targ_mem(priv, ptr);
  3685. ptr += sizeof(u32);
  3686. if (mode == 0)
  3687. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3688. else {
  3689. data = iwl_read_targ_mem(priv, ptr);
  3690. ptr += sizeof(u32);
  3691. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3692. }
  3693. }
  3694. }
  3695. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3696. {
  3697. int rc;
  3698. u32 base; /* SRAM byte address of event log header */
  3699. u32 capacity; /* event log capacity in # entries */
  3700. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3701. u32 num_wraps; /* # times uCode wrapped to top of log */
  3702. u32 next_entry; /* index of next entry to be written by uCode */
  3703. u32 size; /* # entries that we'll print */
  3704. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3705. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  3706. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3707. return;
  3708. }
  3709. rc = iwl_grab_nic_access(priv);
  3710. if (rc) {
  3711. IWL_WARNING("Can not read from adapter at this time.\n");
  3712. return;
  3713. }
  3714. /* event log header */
  3715. capacity = iwl_read_targ_mem(priv, base);
  3716. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3717. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3718. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3719. size = num_wraps ? capacity : next_entry;
  3720. /* bail out if nothing in log */
  3721. if (size == 0) {
  3722. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3723. iwl_release_nic_access(priv);
  3724. return;
  3725. }
  3726. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3727. size, num_wraps);
  3728. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3729. * i.e the next one that uCode would fill. */
  3730. if (num_wraps)
  3731. iwl4965_print_event_log(priv, next_entry,
  3732. capacity - next_entry, mode);
  3733. /* (then/else) start at top of log */
  3734. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3735. iwl_release_nic_access(priv);
  3736. }
  3737. /**
  3738. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3739. */
  3740. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3741. {
  3742. /* Set the FW error flag -- cleared on iwl4965_down */
  3743. set_bit(STATUS_FW_ERROR, &priv->status);
  3744. /* Cancel currently queued command. */
  3745. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3746. #ifdef CONFIG_IWLWIFI_DEBUG
  3747. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3748. iwl4965_dump_nic_error_log(priv);
  3749. iwl4965_dump_nic_event_log(priv);
  3750. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3751. }
  3752. #endif
  3753. wake_up_interruptible(&priv->wait_command_queue);
  3754. /* Keep the restart process from trying to send host
  3755. * commands by clearing the INIT status bit */
  3756. clear_bit(STATUS_READY, &priv->status);
  3757. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3758. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3759. "Restarting adapter due to uCode error.\n");
  3760. if (iwl_is_associated(priv)) {
  3761. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3762. sizeof(priv->recovery_rxon));
  3763. priv->error_recovering = 1;
  3764. }
  3765. queue_work(priv->workqueue, &priv->restart);
  3766. }
  3767. }
  3768. static void iwl4965_error_recovery(struct iwl_priv *priv)
  3769. {
  3770. unsigned long flags;
  3771. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3772. sizeof(priv->staging_rxon));
  3773. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3774. iwl4965_commit_rxon(priv);
  3775. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  3776. spin_lock_irqsave(&priv->lock, flags);
  3777. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3778. priv->error_recovering = 0;
  3779. spin_unlock_irqrestore(&priv->lock, flags);
  3780. }
  3781. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  3782. {
  3783. u32 inta, handled = 0;
  3784. u32 inta_fh;
  3785. unsigned long flags;
  3786. #ifdef CONFIG_IWLWIFI_DEBUG
  3787. u32 inta_mask;
  3788. #endif
  3789. spin_lock_irqsave(&priv->lock, flags);
  3790. /* Ack/clear/reset pending uCode interrupts.
  3791. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3792. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3793. inta = iwl_read32(priv, CSR_INT);
  3794. iwl_write32(priv, CSR_INT, inta);
  3795. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3796. * Any new interrupts that happen after this, either while we're
  3797. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3798. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3799. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3800. #ifdef CONFIG_IWLWIFI_DEBUG
  3801. if (iwl_debug_level & IWL_DL_ISR) {
  3802. /* just for debug */
  3803. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3804. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3805. inta, inta_mask, inta_fh);
  3806. }
  3807. #endif
  3808. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3809. * atomic, make sure that inta covers all the interrupts that
  3810. * we've discovered, even if FH interrupt came in just after
  3811. * reading CSR_INT. */
  3812. if (inta_fh & CSR49_FH_INT_RX_MASK)
  3813. inta |= CSR_INT_BIT_FH_RX;
  3814. if (inta_fh & CSR49_FH_INT_TX_MASK)
  3815. inta |= CSR_INT_BIT_FH_TX;
  3816. /* Now service all interrupt bits discovered above. */
  3817. if (inta & CSR_INT_BIT_HW_ERR) {
  3818. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3819. /* Tell the device to stop sending interrupts */
  3820. iwl4965_disable_interrupts(priv);
  3821. iwl4965_irq_handle_error(priv);
  3822. handled |= CSR_INT_BIT_HW_ERR;
  3823. spin_unlock_irqrestore(&priv->lock, flags);
  3824. return;
  3825. }
  3826. #ifdef CONFIG_IWLWIFI_DEBUG
  3827. if (iwl_debug_level & (IWL_DL_ISR)) {
  3828. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3829. if (inta & CSR_INT_BIT_SCD)
  3830. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3831. "the frame/frames.\n");
  3832. /* Alive notification via Rx interrupt will do the real work */
  3833. if (inta & CSR_INT_BIT_ALIVE)
  3834. IWL_DEBUG_ISR("Alive interrupt\n");
  3835. }
  3836. #endif
  3837. /* Safely ignore these bits for debug checks below */
  3838. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3839. /* HW RF KILL switch toggled */
  3840. if (inta & CSR_INT_BIT_RF_KILL) {
  3841. int hw_rf_kill = 0;
  3842. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3843. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3844. hw_rf_kill = 1;
  3845. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3846. "RF_KILL bit toggled to %s.\n",
  3847. hw_rf_kill ? "disable radio":"enable radio");
  3848. /* Queue restart only if RF_KILL switch was set to "kill"
  3849. * when we loaded driver, and is now set to "enable".
  3850. * After we're Alive, RF_KILL gets handled by
  3851. * iwl4965_rx_card_state_notif() */
  3852. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3853. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3854. queue_work(priv->workqueue, &priv->restart);
  3855. }
  3856. handled |= CSR_INT_BIT_RF_KILL;
  3857. }
  3858. /* Chip got too hot and stopped itself */
  3859. if (inta & CSR_INT_BIT_CT_KILL) {
  3860. IWL_ERROR("Microcode CT kill error detected.\n");
  3861. handled |= CSR_INT_BIT_CT_KILL;
  3862. }
  3863. /* Error detected by uCode */
  3864. if (inta & CSR_INT_BIT_SW_ERR) {
  3865. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3866. inta);
  3867. iwl4965_irq_handle_error(priv);
  3868. handled |= CSR_INT_BIT_SW_ERR;
  3869. }
  3870. /* uCode wakes up after power-down sleep */
  3871. if (inta & CSR_INT_BIT_WAKEUP) {
  3872. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3873. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  3874. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  3875. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  3876. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  3877. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  3878. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  3879. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  3880. handled |= CSR_INT_BIT_WAKEUP;
  3881. }
  3882. /* All uCode command responses, including Tx command responses,
  3883. * Rx "responses" (frame-received notification), and other
  3884. * notifications from uCode come through here*/
  3885. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3886. iwl4965_rx_handle(priv);
  3887. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3888. }
  3889. if (inta & CSR_INT_BIT_FH_TX) {
  3890. IWL_DEBUG_ISR("Tx interrupt\n");
  3891. handled |= CSR_INT_BIT_FH_TX;
  3892. }
  3893. if (inta & ~handled)
  3894. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3895. if (inta & ~CSR_INI_SET_MASK) {
  3896. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  3897. inta & ~CSR_INI_SET_MASK);
  3898. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  3899. }
  3900. /* Re-enable all interrupts */
  3901. /* only Re-enable if diabled by irq */
  3902. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3903. iwl4965_enable_interrupts(priv);
  3904. #ifdef CONFIG_IWLWIFI_DEBUG
  3905. if (iwl_debug_level & (IWL_DL_ISR)) {
  3906. inta = iwl_read32(priv, CSR_INT);
  3907. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3908. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3909. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3910. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3911. }
  3912. #endif
  3913. spin_unlock_irqrestore(&priv->lock, flags);
  3914. }
  3915. static irqreturn_t iwl4965_isr(int irq, void *data)
  3916. {
  3917. struct iwl_priv *priv = data;
  3918. u32 inta, inta_mask;
  3919. u32 inta_fh;
  3920. if (!priv)
  3921. return IRQ_NONE;
  3922. spin_lock(&priv->lock);
  3923. /* Disable (but don't clear!) interrupts here to avoid
  3924. * back-to-back ISRs and sporadic interrupts from our NIC.
  3925. * If we have something to service, the tasklet will re-enable ints.
  3926. * If we *don't* have something, we'll re-enable before leaving here. */
  3927. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3928. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3929. /* Discover which interrupts are active/pending */
  3930. inta = iwl_read32(priv, CSR_INT);
  3931. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3932. /* Ignore interrupt if there's nothing in NIC to service.
  3933. * This may be due to IRQ shared with another device,
  3934. * or due to sporadic interrupts thrown from our NIC. */
  3935. if (!inta && !inta_fh) {
  3936. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3937. goto none;
  3938. }
  3939. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3940. /* Hardware disappeared. It might have already raised
  3941. * an interrupt */
  3942. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  3943. goto unplugged;
  3944. }
  3945. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3946. inta, inta_mask, inta_fh);
  3947. inta &= ~CSR_INT_BIT_SCD;
  3948. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  3949. if (likely(inta || inta_fh))
  3950. tasklet_schedule(&priv->irq_tasklet);
  3951. unplugged:
  3952. spin_unlock(&priv->lock);
  3953. return IRQ_HANDLED;
  3954. none:
  3955. /* re-enable interrupts here since we don't have anything to service. */
  3956. /* only Re-enable if diabled by irq */
  3957. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3958. iwl4965_enable_interrupts(priv);
  3959. spin_unlock(&priv->lock);
  3960. return IRQ_NONE;
  3961. }
  3962. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3963. * sending probe req. This should be set long enough to hear probe responses
  3964. * from more than one AP. */
  3965. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  3966. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  3967. /* For faster active scanning, scan will move to the next channel if fewer than
  3968. * PLCP_QUIET_THRESH packets are heard on this channel within
  3969. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3970. * time if it's a quiet channel (nothing responded to our probe, and there's
  3971. * no other traffic).
  3972. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3973. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3974. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  3975. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3976. * Must be set longer than active dwell time.
  3977. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3978. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3979. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3980. #define IWL_PASSIVE_DWELL_BASE (100)
  3981. #define IWL_CHANNEL_TUNE_TIME 5
  3982. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  3983. enum ieee80211_band band)
  3984. {
  3985. if (band == IEEE80211_BAND_5GHZ)
  3986. return IWL_ACTIVE_DWELL_TIME_52;
  3987. else
  3988. return IWL_ACTIVE_DWELL_TIME_24;
  3989. }
  3990. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  3991. enum ieee80211_band band)
  3992. {
  3993. u16 active = iwl4965_get_active_dwell_time(priv, band);
  3994. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  3995. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3996. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3997. if (iwl_is_associated(priv)) {
  3998. /* If we're associated, we clamp the maximum passive
  3999. * dwell time to be 98% of the beacon interval (minus
  4000. * 2 * channel tune time) */
  4001. passive = priv->beacon_int;
  4002. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4003. passive = IWL_PASSIVE_DWELL_BASE;
  4004. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4005. }
  4006. if (passive <= active)
  4007. passive = active + 1;
  4008. return passive;
  4009. }
  4010. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  4011. enum ieee80211_band band,
  4012. u8 is_active, u8 direct_mask,
  4013. struct iwl4965_scan_channel *scan_ch)
  4014. {
  4015. const struct ieee80211_channel *channels = NULL;
  4016. const struct ieee80211_supported_band *sband;
  4017. const struct iwl_channel_info *ch_info;
  4018. u16 passive_dwell = 0;
  4019. u16 active_dwell = 0;
  4020. int added, i;
  4021. sband = iwl4965_get_hw_mode(priv, band);
  4022. if (!sband)
  4023. return 0;
  4024. channels = sband->channels;
  4025. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4026. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4027. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4028. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  4029. continue;
  4030. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4031. le16_to_cpu(priv->active_rxon.channel)) {
  4032. if (iwl_is_associated(priv)) {
  4033. IWL_DEBUG_SCAN
  4034. ("Skipping current channel %d\n",
  4035. le16_to_cpu(priv->active_rxon.channel));
  4036. continue;
  4037. }
  4038. } else if (priv->only_active_channel)
  4039. continue;
  4040. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4041. ch_info = iwl_get_channel_info(priv, band,
  4042. scan_ch->channel);
  4043. if (!is_channel_valid(ch_info)) {
  4044. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4045. scan_ch->channel);
  4046. continue;
  4047. }
  4048. if (!is_active || is_channel_passive(ch_info) ||
  4049. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4050. scan_ch->type = 0; /* passive */
  4051. else
  4052. scan_ch->type = 1; /* active */
  4053. if (scan_ch->type & 1)
  4054. scan_ch->type |= (direct_mask << 1);
  4055. if (is_channel_narrow(ch_info))
  4056. scan_ch->type |= (1 << 7);
  4057. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4058. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4059. /* Set txpower levels to defaults */
  4060. scan_ch->tpc.dsp_atten = 110;
  4061. /* scan_pwr_info->tpc.dsp_atten; */
  4062. /*scan_pwr_info->tpc.tx_gain; */
  4063. if (band == IEEE80211_BAND_5GHZ)
  4064. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4065. else {
  4066. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4067. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4068. * power level:
  4069. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4070. */
  4071. }
  4072. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4073. scan_ch->channel,
  4074. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4075. (scan_ch->type & 1) ?
  4076. active_dwell : passive_dwell);
  4077. scan_ch++;
  4078. added++;
  4079. }
  4080. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4081. return added;
  4082. }
  4083. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  4084. struct ieee80211_rate *rates)
  4085. {
  4086. int i;
  4087. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4088. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4089. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4090. rates[i].hw_value_short = i;
  4091. rates[i].flags = 0;
  4092. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4093. /*
  4094. * If CCK != 1M then set short preamble rate flag.
  4095. */
  4096. rates[i].flags |=
  4097. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4098. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4099. }
  4100. }
  4101. }
  4102. /**
  4103. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4104. */
  4105. int iwl4965_init_geos(struct iwl_priv *priv)
  4106. {
  4107. struct iwl_channel_info *ch;
  4108. struct ieee80211_supported_band *sband;
  4109. struct ieee80211_channel *channels;
  4110. struct ieee80211_channel *geo_ch;
  4111. struct ieee80211_rate *rates;
  4112. int i = 0;
  4113. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4114. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4115. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4116. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4117. return 0;
  4118. }
  4119. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4120. priv->channel_count, GFP_KERNEL);
  4121. if (!channels)
  4122. return -ENOMEM;
  4123. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4124. GFP_KERNEL);
  4125. if (!rates) {
  4126. kfree(channels);
  4127. return -ENOMEM;
  4128. }
  4129. /* 5.2GHz channels start after the 2.4GHz channels */
  4130. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4131. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4132. /* just OFDM */
  4133. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4134. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4135. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
  4136. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4137. sband->channels = channels;
  4138. /* OFDM & CCK */
  4139. sband->bitrates = rates;
  4140. sband->n_bitrates = IWL_RATE_COUNT;
  4141. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
  4142. priv->ieee_channels = channels;
  4143. priv->ieee_rates = rates;
  4144. iwl4965_init_hw_rates(priv, rates);
  4145. for (i = 0; i < priv->channel_count; i++) {
  4146. ch = &priv->channel_info[i];
  4147. /* FIXME: might be removed if scan is OK */
  4148. if (!is_channel_valid(ch))
  4149. continue;
  4150. if (is_channel_a_band(ch))
  4151. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4152. else
  4153. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4154. geo_ch = &sband->channels[sband->n_channels++];
  4155. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4156. geo_ch->max_power = ch->max_power_avg;
  4157. geo_ch->max_antenna_gain = 0xff;
  4158. geo_ch->hw_value = ch->channel;
  4159. if (is_channel_valid(ch)) {
  4160. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4161. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4162. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4163. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4164. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4165. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4166. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4167. priv->max_channel_txpower_limit =
  4168. ch->max_power_avg;
  4169. } else {
  4170. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4171. }
  4172. /* Save flags for reg domain usage */
  4173. geo_ch->orig_flags = geo_ch->flags;
  4174. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4175. ch->channel, geo_ch->center_freq,
  4176. is_channel_a_band(ch) ? "5.2" : "2.4",
  4177. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4178. "restricted" : "valid",
  4179. geo_ch->flags);
  4180. }
  4181. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4182. priv->cfg->sku & IWL_SKU_A) {
  4183. printk(KERN_INFO DRV_NAME
  4184. ": Incorrectly detected BG card as ABG. Please send "
  4185. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4186. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4187. priv->cfg->sku &= ~IWL_SKU_A;
  4188. }
  4189. printk(KERN_INFO DRV_NAME
  4190. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4191. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4192. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4193. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4194. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4195. &priv->bands[IEEE80211_BAND_2GHZ];
  4196. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4197. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4198. &priv->bands[IEEE80211_BAND_5GHZ];
  4199. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4200. return 0;
  4201. }
  4202. /*
  4203. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4204. */
  4205. void iwl4965_free_geos(struct iwl_priv *priv)
  4206. {
  4207. kfree(priv->ieee_channels);
  4208. kfree(priv->ieee_rates);
  4209. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4210. }
  4211. /******************************************************************************
  4212. *
  4213. * uCode download functions
  4214. *
  4215. ******************************************************************************/
  4216. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4217. {
  4218. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4219. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4220. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4221. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4222. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4223. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4224. }
  4225. /**
  4226. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4227. * looking at all data.
  4228. */
  4229. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4230. u32 len)
  4231. {
  4232. u32 val;
  4233. u32 save_len = len;
  4234. int rc = 0;
  4235. u32 errcnt;
  4236. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4237. rc = iwl_grab_nic_access(priv);
  4238. if (rc)
  4239. return rc;
  4240. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4241. errcnt = 0;
  4242. for (; len > 0; len -= sizeof(u32), image++) {
  4243. /* read data comes through single port, auto-incr addr */
  4244. /* NOTE: Use the debugless read so we don't flood kernel log
  4245. * if IWL_DL_IO is set */
  4246. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4247. if (val != le32_to_cpu(*image)) {
  4248. IWL_ERROR("uCode INST section is invalid at "
  4249. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4250. save_len - len, val, le32_to_cpu(*image));
  4251. rc = -EIO;
  4252. errcnt++;
  4253. if (errcnt >= 20)
  4254. break;
  4255. }
  4256. }
  4257. iwl_release_nic_access(priv);
  4258. if (!errcnt)
  4259. IWL_DEBUG_INFO
  4260. ("ucode image in INSTRUCTION memory is good\n");
  4261. return rc;
  4262. }
  4263. /**
  4264. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4265. * using sample data 100 bytes apart. If these sample points are good,
  4266. * it's a pretty good bet that everything between them is good, too.
  4267. */
  4268. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4269. {
  4270. u32 val;
  4271. int rc = 0;
  4272. u32 errcnt = 0;
  4273. u32 i;
  4274. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4275. rc = iwl_grab_nic_access(priv);
  4276. if (rc)
  4277. return rc;
  4278. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4279. /* read data comes through single port, auto-incr addr */
  4280. /* NOTE: Use the debugless read so we don't flood kernel log
  4281. * if IWL_DL_IO is set */
  4282. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4283. i + RTC_INST_LOWER_BOUND);
  4284. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4285. if (val != le32_to_cpu(*image)) {
  4286. #if 0 /* Enable this if you want to see details */
  4287. IWL_ERROR("uCode INST section is invalid at "
  4288. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4289. i, val, *image);
  4290. #endif
  4291. rc = -EIO;
  4292. errcnt++;
  4293. if (errcnt >= 3)
  4294. break;
  4295. }
  4296. }
  4297. iwl_release_nic_access(priv);
  4298. return rc;
  4299. }
  4300. /**
  4301. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4302. * and verify its contents
  4303. */
  4304. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4305. {
  4306. __le32 *image;
  4307. u32 len;
  4308. int rc = 0;
  4309. /* Try bootstrap */
  4310. image = (__le32 *)priv->ucode_boot.v_addr;
  4311. len = priv->ucode_boot.len;
  4312. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4313. if (rc == 0) {
  4314. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4315. return 0;
  4316. }
  4317. /* Try initialize */
  4318. image = (__le32 *)priv->ucode_init.v_addr;
  4319. len = priv->ucode_init.len;
  4320. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4321. if (rc == 0) {
  4322. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4323. return 0;
  4324. }
  4325. /* Try runtime/protocol */
  4326. image = (__le32 *)priv->ucode_code.v_addr;
  4327. len = priv->ucode_code.len;
  4328. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4329. if (rc == 0) {
  4330. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4331. return 0;
  4332. }
  4333. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4334. /* Since nothing seems to match, show first several data entries in
  4335. * instruction SRAM, so maybe visual inspection will give a clue.
  4336. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4337. image = (__le32 *)priv->ucode_boot.v_addr;
  4338. len = priv->ucode_boot.len;
  4339. rc = iwl4965_verify_inst_full(priv, image, len);
  4340. return rc;
  4341. }
  4342. static void iwl4965_nic_start(struct iwl_priv *priv)
  4343. {
  4344. /* Remove all resets to allow NIC to operate */
  4345. iwl_write32(priv, CSR_RESET, 0);
  4346. }
  4347. /**
  4348. * iwl4965_read_ucode - Read uCode images from disk file.
  4349. *
  4350. * Copy into buffers for card to fetch via bus-mastering
  4351. */
  4352. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4353. {
  4354. struct iwl4965_ucode *ucode;
  4355. int ret;
  4356. const struct firmware *ucode_raw;
  4357. const char *name = priv->cfg->fw_name;
  4358. u8 *src;
  4359. size_t len;
  4360. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4361. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4362. * request_firmware() is synchronous, file is in memory on return. */
  4363. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4364. if (ret < 0) {
  4365. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4366. name, ret);
  4367. goto error;
  4368. }
  4369. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4370. name, ucode_raw->size);
  4371. /* Make sure that we got at least our header! */
  4372. if (ucode_raw->size < sizeof(*ucode)) {
  4373. IWL_ERROR("File size way too small!\n");
  4374. ret = -EINVAL;
  4375. goto err_release;
  4376. }
  4377. /* Data from ucode file: header followed by uCode images */
  4378. ucode = (void *)ucode_raw->data;
  4379. ver = le32_to_cpu(ucode->ver);
  4380. inst_size = le32_to_cpu(ucode->inst_size);
  4381. data_size = le32_to_cpu(ucode->data_size);
  4382. init_size = le32_to_cpu(ucode->init_size);
  4383. init_data_size = le32_to_cpu(ucode->init_data_size);
  4384. boot_size = le32_to_cpu(ucode->boot_size);
  4385. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4386. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4387. inst_size);
  4388. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4389. data_size);
  4390. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4391. init_size);
  4392. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4393. init_data_size);
  4394. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4395. boot_size);
  4396. /* Verify size of file vs. image size info in file's header */
  4397. if (ucode_raw->size < sizeof(*ucode) +
  4398. inst_size + data_size + init_size +
  4399. init_data_size + boot_size) {
  4400. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4401. (int)ucode_raw->size);
  4402. ret = -EINVAL;
  4403. goto err_release;
  4404. }
  4405. /* Verify that uCode images will fit in card's SRAM */
  4406. if (inst_size > IWL_MAX_INST_SIZE) {
  4407. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4408. inst_size);
  4409. ret = -EINVAL;
  4410. goto err_release;
  4411. }
  4412. if (data_size > IWL_MAX_DATA_SIZE) {
  4413. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4414. data_size);
  4415. ret = -EINVAL;
  4416. goto err_release;
  4417. }
  4418. if (init_size > IWL_MAX_INST_SIZE) {
  4419. IWL_DEBUG_INFO
  4420. ("uCode init instr len %d too large to fit in\n",
  4421. init_size);
  4422. ret = -EINVAL;
  4423. goto err_release;
  4424. }
  4425. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4426. IWL_DEBUG_INFO
  4427. ("uCode init data len %d too large to fit in\n",
  4428. init_data_size);
  4429. ret = -EINVAL;
  4430. goto err_release;
  4431. }
  4432. if (boot_size > IWL_MAX_BSM_SIZE) {
  4433. IWL_DEBUG_INFO
  4434. ("uCode boot instr len %d too large to fit in\n",
  4435. boot_size);
  4436. ret = -EINVAL;
  4437. goto err_release;
  4438. }
  4439. /* Allocate ucode buffers for card's bus-master loading ... */
  4440. /* Runtime instructions and 2 copies of data:
  4441. * 1) unmodified from disk
  4442. * 2) backup cache for save/restore during power-downs */
  4443. priv->ucode_code.len = inst_size;
  4444. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4445. priv->ucode_data.len = data_size;
  4446. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4447. priv->ucode_data_backup.len = data_size;
  4448. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4449. /* Initialization instructions and data */
  4450. if (init_size && init_data_size) {
  4451. priv->ucode_init.len = init_size;
  4452. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4453. priv->ucode_init_data.len = init_data_size;
  4454. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4455. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4456. goto err_pci_alloc;
  4457. }
  4458. /* Bootstrap (instructions only, no data) */
  4459. if (boot_size) {
  4460. priv->ucode_boot.len = boot_size;
  4461. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4462. if (!priv->ucode_boot.v_addr)
  4463. goto err_pci_alloc;
  4464. }
  4465. /* Copy images into buffers for card's bus-master reads ... */
  4466. /* Runtime instructions (first block of data in file) */
  4467. src = &ucode->data[0];
  4468. len = priv->ucode_code.len;
  4469. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4470. memcpy(priv->ucode_code.v_addr, src, len);
  4471. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4472. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4473. /* Runtime data (2nd block)
  4474. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  4475. src = &ucode->data[inst_size];
  4476. len = priv->ucode_data.len;
  4477. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4478. memcpy(priv->ucode_data.v_addr, src, len);
  4479. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4480. /* Initialization instructions (3rd block) */
  4481. if (init_size) {
  4482. src = &ucode->data[inst_size + data_size];
  4483. len = priv->ucode_init.len;
  4484. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4485. len);
  4486. memcpy(priv->ucode_init.v_addr, src, len);
  4487. }
  4488. /* Initialization data (4th block) */
  4489. if (init_data_size) {
  4490. src = &ucode->data[inst_size + data_size + init_size];
  4491. len = priv->ucode_init_data.len;
  4492. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  4493. len);
  4494. memcpy(priv->ucode_init_data.v_addr, src, len);
  4495. }
  4496. /* Bootstrap instructions (5th block) */
  4497. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4498. len = priv->ucode_boot.len;
  4499. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  4500. memcpy(priv->ucode_boot.v_addr, src, len);
  4501. /* We have our copies now, allow OS release its copies */
  4502. release_firmware(ucode_raw);
  4503. return 0;
  4504. err_pci_alloc:
  4505. IWL_ERROR("failed to allocate pci memory\n");
  4506. ret = -ENOMEM;
  4507. iwl4965_dealloc_ucode_pci(priv);
  4508. err_release:
  4509. release_firmware(ucode_raw);
  4510. error:
  4511. return ret;
  4512. }
  4513. /**
  4514. * iwl4965_set_ucode_ptrs - Set uCode address location
  4515. *
  4516. * Tell initialization uCode where to find runtime uCode.
  4517. *
  4518. * BSM registers initially contain pointers to initialization uCode.
  4519. * We need to replace them to load runtime uCode inst and data,
  4520. * and to save runtime data when powering down.
  4521. */
  4522. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  4523. {
  4524. dma_addr_t pinst;
  4525. dma_addr_t pdata;
  4526. int rc = 0;
  4527. unsigned long flags;
  4528. /* bits 35:4 for 4965 */
  4529. pinst = priv->ucode_code.p_addr >> 4;
  4530. pdata = priv->ucode_data_backup.p_addr >> 4;
  4531. spin_lock_irqsave(&priv->lock, flags);
  4532. rc = iwl_grab_nic_access(priv);
  4533. if (rc) {
  4534. spin_unlock_irqrestore(&priv->lock, flags);
  4535. return rc;
  4536. }
  4537. /* Tell bootstrap uCode where to find image to load */
  4538. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4539. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4540. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4541. priv->ucode_data.len);
  4542. /* Inst bytecount must be last to set up, bit 31 signals uCode
  4543. * that all new ptr/size info is in place */
  4544. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4545. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4546. iwl_release_nic_access(priv);
  4547. spin_unlock_irqrestore(&priv->lock, flags);
  4548. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4549. return rc;
  4550. }
  4551. /**
  4552. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  4553. *
  4554. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4555. *
  4556. * The 4965 "initialize" ALIVE reply contains calibration data for:
  4557. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  4558. * (3945 does not contain this data).
  4559. *
  4560. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4561. */
  4562. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  4563. {
  4564. /* Check alive response for "valid" sign from uCode */
  4565. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4566. /* We had an error bringing up the hardware, so take it
  4567. * all the way back down so we can try again */
  4568. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4569. goto restart;
  4570. }
  4571. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4572. * This is a paranoid check, because we would not have gotten the
  4573. * "initialize" alive if code weren't properly loaded. */
  4574. if (iwl4965_verify_ucode(priv)) {
  4575. /* Runtime instruction load was bad;
  4576. * take it all the way back down so we can try again */
  4577. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4578. goto restart;
  4579. }
  4580. /* Calculate temperature */
  4581. priv->temperature = iwl4965_get_temperature(priv);
  4582. /* Send pointers to protocol/runtime uCode image ... init code will
  4583. * load and launch runtime uCode, which will send us another "Alive"
  4584. * notification. */
  4585. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4586. if (iwl4965_set_ucode_ptrs(priv)) {
  4587. /* Runtime instruction load won't happen;
  4588. * take it all the way back down so we can try again */
  4589. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4590. goto restart;
  4591. }
  4592. return;
  4593. restart:
  4594. queue_work(priv->workqueue, &priv->restart);
  4595. }
  4596. /**
  4597. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  4598. * from protocol/runtime uCode (initialization uCode's
  4599. * Alive gets handled by iwl4965_init_alive_start()).
  4600. */
  4601. static void iwl4965_alive_start(struct iwl_priv *priv)
  4602. {
  4603. int ret = 0;
  4604. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4605. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4606. /* We had an error bringing up the hardware, so take it
  4607. * all the way back down so we can try again */
  4608. IWL_DEBUG_INFO("Alive failed.\n");
  4609. goto restart;
  4610. }
  4611. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4612. * This is a paranoid check, because we would not have gotten the
  4613. * "runtime" alive if code weren't properly loaded. */
  4614. if (iwl4965_verify_ucode(priv)) {
  4615. /* Runtime instruction load was bad;
  4616. * take it all the way back down so we can try again */
  4617. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4618. goto restart;
  4619. }
  4620. iwlcore_clear_stations_table(priv);
  4621. ret = priv->cfg->ops->lib->alive_notify(priv);
  4622. if (ret) {
  4623. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  4624. ret);
  4625. goto restart;
  4626. }
  4627. /* After the ALIVE response, we can send host commands to 4965 uCode */
  4628. set_bit(STATUS_ALIVE, &priv->status);
  4629. /* Clear out the uCode error bit if it is set */
  4630. clear_bit(STATUS_FW_ERROR, &priv->status);
  4631. if (iwl_is_rfkill(priv))
  4632. return;
  4633. ieee80211_start_queues(priv->hw);
  4634. priv->active_rate = priv->rates_mask;
  4635. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4636. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4637. if (iwl_is_associated(priv)) {
  4638. struct iwl4965_rxon_cmd *active_rxon =
  4639. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  4640. memcpy(&priv->staging_rxon, &priv->active_rxon,
  4641. sizeof(priv->staging_rxon));
  4642. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4643. } else {
  4644. /* Initialize our rx_config data */
  4645. iwl4965_connection_init_rx_config(priv);
  4646. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4647. }
  4648. /* Configure Bluetooth device coexistence support */
  4649. iwl4965_send_bt_config(priv);
  4650. /* Configure the adapter for unassociated operation */
  4651. iwl4965_commit_rxon(priv);
  4652. /* At this point, the NIC is initialized and operational */
  4653. priv->notif_missed_beacons = 0;
  4654. iwl4965_rf_kill_ct_config(priv);
  4655. iwl_leds_register(priv);
  4656. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4657. set_bit(STATUS_READY, &priv->status);
  4658. wake_up_interruptible(&priv->wait_command_queue);
  4659. if (priv->error_recovering)
  4660. iwl4965_error_recovery(priv);
  4661. iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
  4662. ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
  4663. return;
  4664. restart:
  4665. queue_work(priv->workqueue, &priv->restart);
  4666. }
  4667. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  4668. static void __iwl4965_down(struct iwl_priv *priv)
  4669. {
  4670. unsigned long flags;
  4671. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4672. struct ieee80211_conf *conf = NULL;
  4673. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4674. conf = ieee80211_get_hw_conf(priv->hw);
  4675. if (!exit_pending)
  4676. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4677. iwl_leds_unregister(priv);
  4678. iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
  4679. iwlcore_clear_stations_table(priv);
  4680. /* Unblock any waiting calls */
  4681. wake_up_interruptible_all(&priv->wait_command_queue);
  4682. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4683. * exiting the module */
  4684. if (!exit_pending)
  4685. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4686. /* stop and reset the on-board processor */
  4687. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4688. /* tell the device to stop sending interrupts */
  4689. spin_lock_irqsave(&priv->lock, flags);
  4690. iwl4965_disable_interrupts(priv);
  4691. spin_unlock_irqrestore(&priv->lock, flags);
  4692. iwl_synchronize_irq(priv);
  4693. if (priv->mac80211_registered)
  4694. ieee80211_stop_queues(priv->hw);
  4695. /* If we have not previously called iwl4965_init() then
  4696. * clear all bits but the RF Kill and SUSPEND bits and return */
  4697. if (!iwl_is_init(priv)) {
  4698. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4699. STATUS_RF_KILL_HW |
  4700. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4701. STATUS_RF_KILL_SW |
  4702. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4703. STATUS_GEO_CONFIGURED |
  4704. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4705. STATUS_IN_SUSPEND;
  4706. goto exit;
  4707. }
  4708. /* ...otherwise clear out all the status bits but the RF Kill and
  4709. * SUSPEND bits and continue taking the NIC down. */
  4710. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4711. STATUS_RF_KILL_HW |
  4712. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4713. STATUS_RF_KILL_SW |
  4714. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4715. STATUS_GEO_CONFIGURED |
  4716. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4717. STATUS_IN_SUSPEND |
  4718. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4719. STATUS_FW_ERROR;
  4720. spin_lock_irqsave(&priv->lock, flags);
  4721. iwl_clear_bit(priv, CSR_GP_CNTRL,
  4722. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4723. spin_unlock_irqrestore(&priv->lock, flags);
  4724. iwl4965_hw_txq_ctx_stop(priv);
  4725. iwl4965_hw_rxq_stop(priv);
  4726. spin_lock_irqsave(&priv->lock, flags);
  4727. if (!iwl_grab_nic_access(priv)) {
  4728. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4729. APMG_CLK_VAL_DMA_CLK_RQT);
  4730. iwl_release_nic_access(priv);
  4731. }
  4732. spin_unlock_irqrestore(&priv->lock, flags);
  4733. udelay(5);
  4734. iwl4965_hw_nic_stop_master(priv);
  4735. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  4736. iwl4965_hw_nic_reset(priv);
  4737. exit:
  4738. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  4739. if (priv->ibss_beacon)
  4740. dev_kfree_skb(priv->ibss_beacon);
  4741. priv->ibss_beacon = NULL;
  4742. /* clear out any free frames */
  4743. iwl4965_clear_free_frames(priv);
  4744. }
  4745. static void iwl4965_down(struct iwl_priv *priv)
  4746. {
  4747. mutex_lock(&priv->mutex);
  4748. __iwl4965_down(priv);
  4749. mutex_unlock(&priv->mutex);
  4750. iwl4965_cancel_deferred_work(priv);
  4751. }
  4752. #define MAX_HW_RESTARTS 5
  4753. static int __iwl4965_up(struct iwl_priv *priv)
  4754. {
  4755. int i;
  4756. int ret;
  4757. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4758. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  4759. return -EIO;
  4760. }
  4761. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4762. IWL_WARNING("Radio disabled by SW RF kill (module "
  4763. "parameter)\n");
  4764. iwl_rfkill_set_hw_state(priv);
  4765. return -ENODEV;
  4766. }
  4767. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4768. IWL_ERROR("ucode not available for device bringup\n");
  4769. return -EIO;
  4770. }
  4771. /* If platform's RF_KILL switch is NOT set to KILL */
  4772. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4773. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4774. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4775. else {
  4776. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4777. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4778. iwl_rfkill_set_hw_state(priv);
  4779. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  4780. return -ENODEV;
  4781. }
  4782. }
  4783. iwl_rfkill_set_hw_state(priv);
  4784. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4785. ret = priv->cfg->ops->lib->hw_nic_init(priv);
  4786. if (ret) {
  4787. IWL_ERROR("Unable to init nic\n");
  4788. return ret;
  4789. }
  4790. /* make sure rfkill handshake bits are cleared */
  4791. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4792. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4793. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4794. /* clear (again), then enable host interrupts */
  4795. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4796. iwl4965_enable_interrupts(priv);
  4797. /* really make sure rfkill handshake bits are cleared */
  4798. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4799. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4800. /* Copy original ucode data image from disk into backup cache.
  4801. * This will be used to initialize the on-board processor's
  4802. * data SRAM for a clean start when the runtime program first loads. */
  4803. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4804. priv->ucode_data.len);
  4805. /* We return success when we resume from suspend and rf_kill is on. */
  4806. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4807. return 0;
  4808. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4809. iwlcore_clear_stations_table(priv);
  4810. /* load bootstrap state machine,
  4811. * load bootstrap program into processor's memory,
  4812. * prepare to load the "initialize" uCode */
  4813. ret = priv->cfg->ops->lib->load_ucode(priv);
  4814. if (ret) {
  4815. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
  4816. continue;
  4817. }
  4818. /* start card; "initialize" will load runtime ucode */
  4819. iwl4965_nic_start(priv);
  4820. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4821. return 0;
  4822. }
  4823. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4824. __iwl4965_down(priv);
  4825. /* tried to restart and config the device for as long as our
  4826. * patience could withstand */
  4827. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  4828. return -EIO;
  4829. }
  4830. /*****************************************************************************
  4831. *
  4832. * Workqueue callbacks
  4833. *
  4834. *****************************************************************************/
  4835. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  4836. {
  4837. struct iwl_priv *priv =
  4838. container_of(data, struct iwl_priv, init_alive_start.work);
  4839. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4840. return;
  4841. mutex_lock(&priv->mutex);
  4842. iwl4965_init_alive_start(priv);
  4843. mutex_unlock(&priv->mutex);
  4844. }
  4845. static void iwl4965_bg_alive_start(struct work_struct *data)
  4846. {
  4847. struct iwl_priv *priv =
  4848. container_of(data, struct iwl_priv, alive_start.work);
  4849. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4850. return;
  4851. mutex_lock(&priv->mutex);
  4852. iwl4965_alive_start(priv);
  4853. mutex_unlock(&priv->mutex);
  4854. }
  4855. static void iwl4965_bg_rf_kill(struct work_struct *work)
  4856. {
  4857. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4858. wake_up_interruptible(&priv->wait_command_queue);
  4859. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4860. return;
  4861. mutex_lock(&priv->mutex);
  4862. if (!iwl_is_rfkill(priv)) {
  4863. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4864. "HW and/or SW RF Kill no longer active, restarting "
  4865. "device\n");
  4866. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4867. queue_work(priv->workqueue, &priv->restart);
  4868. } else {
  4869. /* make sure mac80211 stop sending Tx frame */
  4870. if (priv->mac80211_registered)
  4871. ieee80211_stop_queues(priv->hw);
  4872. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4873. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4874. "disabled by SW switch\n");
  4875. else
  4876. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  4877. "Kill switch must be turned off for "
  4878. "wireless networking to work.\n");
  4879. }
  4880. iwl_rfkill_set_hw_state(priv);
  4881. mutex_unlock(&priv->mutex);
  4882. }
  4883. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4884. static void iwl4965_bg_scan_check(struct work_struct *data)
  4885. {
  4886. struct iwl_priv *priv =
  4887. container_of(data, struct iwl_priv, scan_check.work);
  4888. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4889. return;
  4890. mutex_lock(&priv->mutex);
  4891. if (test_bit(STATUS_SCANNING, &priv->status) ||
  4892. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4893. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  4894. "Scan completion watchdog resetting adapter (%dms)\n",
  4895. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  4896. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4897. iwl4965_send_scan_abort(priv);
  4898. }
  4899. mutex_unlock(&priv->mutex);
  4900. }
  4901. static void iwl4965_bg_request_scan(struct work_struct *data)
  4902. {
  4903. struct iwl_priv *priv =
  4904. container_of(data, struct iwl_priv, request_scan);
  4905. struct iwl_host_cmd cmd = {
  4906. .id = REPLY_SCAN_CMD,
  4907. .len = sizeof(struct iwl4965_scan_cmd),
  4908. .meta.flags = CMD_SIZE_HUGE,
  4909. };
  4910. struct iwl4965_scan_cmd *scan;
  4911. struct ieee80211_conf *conf = NULL;
  4912. u16 cmd_len;
  4913. enum ieee80211_band band;
  4914. u8 direct_mask;
  4915. int ret = 0;
  4916. conf = ieee80211_get_hw_conf(priv->hw);
  4917. mutex_lock(&priv->mutex);
  4918. if (!iwl_is_ready(priv)) {
  4919. IWL_WARNING("request scan called when driver not ready.\n");
  4920. goto done;
  4921. }
  4922. /* Make sure the scan wasn't cancelled before this queued work
  4923. * was given the chance to run... */
  4924. if (!test_bit(STATUS_SCANNING, &priv->status))
  4925. goto done;
  4926. /* This should never be called or scheduled if there is currently
  4927. * a scan active in the hardware. */
  4928. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  4929. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  4930. "Ignoring second request.\n");
  4931. ret = -EIO;
  4932. goto done;
  4933. }
  4934. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4935. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  4936. goto done;
  4937. }
  4938. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4939. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  4940. goto done;
  4941. }
  4942. if (iwl_is_rfkill(priv)) {
  4943. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  4944. goto done;
  4945. }
  4946. if (!test_bit(STATUS_READY, &priv->status)) {
  4947. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  4948. goto done;
  4949. }
  4950. if (!priv->scan_bands) {
  4951. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  4952. goto done;
  4953. }
  4954. if (!priv->scan) {
  4955. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  4956. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  4957. if (!priv->scan) {
  4958. ret = -ENOMEM;
  4959. goto done;
  4960. }
  4961. }
  4962. scan = priv->scan;
  4963. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  4964. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  4965. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  4966. if (iwl_is_associated(priv)) {
  4967. u16 interval = 0;
  4968. u32 extra;
  4969. u32 suspend_time = 100;
  4970. u32 scan_suspend_time = 100;
  4971. unsigned long flags;
  4972. IWL_DEBUG_INFO("Scanning while associated...\n");
  4973. spin_lock_irqsave(&priv->lock, flags);
  4974. interval = priv->beacon_int;
  4975. spin_unlock_irqrestore(&priv->lock, flags);
  4976. scan->suspend_time = 0;
  4977. scan->max_out_time = cpu_to_le32(200 * 1024);
  4978. if (!interval)
  4979. interval = suspend_time;
  4980. extra = (suspend_time / interval) << 22;
  4981. scan_suspend_time = (extra |
  4982. ((suspend_time % interval) * 1024));
  4983. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  4984. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  4985. scan_suspend_time, interval);
  4986. }
  4987. /* We should add the ability for user to lock to PASSIVE ONLY */
  4988. if (priv->one_direct_scan) {
  4989. IWL_DEBUG_SCAN
  4990. ("Kicking off one direct scan for '%s'\n",
  4991. iwl4965_escape_essid(priv->direct_ssid,
  4992. priv->direct_ssid_len));
  4993. scan->direct_scan[0].id = WLAN_EID_SSID;
  4994. scan->direct_scan[0].len = priv->direct_ssid_len;
  4995. memcpy(scan->direct_scan[0].ssid,
  4996. priv->direct_ssid, priv->direct_ssid_len);
  4997. direct_mask = 1;
  4998. } else if (!iwl_is_associated(priv) && priv->essid_len) {
  4999. scan->direct_scan[0].id = WLAN_EID_SSID;
  5000. scan->direct_scan[0].len = priv->essid_len;
  5001. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5002. direct_mask = 1;
  5003. } else {
  5004. direct_mask = 0;
  5005. }
  5006. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5007. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5008. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5009. switch (priv->scan_bands) {
  5010. case 2:
  5011. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5012. scan->tx_cmd.rate_n_flags =
  5013. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5014. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5015. scan->good_CRC_th = 0;
  5016. band = IEEE80211_BAND_2GHZ;
  5017. break;
  5018. case 1:
  5019. scan->tx_cmd.rate_n_flags =
  5020. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5021. RATE_MCS_ANT_B_MSK);
  5022. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5023. band = IEEE80211_BAND_5GHZ;
  5024. break;
  5025. default:
  5026. IWL_WARNING("Invalid scan band count\n");
  5027. goto done;
  5028. }
  5029. /* We don't build a direct scan probe request; the uCode will do
  5030. * that based on the direct_mask added to each channel entry */
  5031. cmd_len = iwl4965_fill_probe_req(priv, band,
  5032. (struct ieee80211_mgmt *)scan->data,
  5033. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5034. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5035. /* select Rx chains */
  5036. /* Force use of chains B and C (0x6) for scan Rx.
  5037. * Avoid A (0x1) because of its off-channel reception on A-band.
  5038. * MIMO is not used here, but value is required to make uCode happy. */
  5039. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5040. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5041. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5042. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5043. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5044. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5045. if (direct_mask) {
  5046. IWL_DEBUG_SCAN
  5047. ("Initiating direct scan for %s.\n",
  5048. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5049. scan->channel_count =
  5050. iwl4965_get_channels_for_scan(
  5051. priv, band, 1, /* active */
  5052. direct_mask,
  5053. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5054. } else {
  5055. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5056. scan->channel_count =
  5057. iwl4965_get_channels_for_scan(
  5058. priv, band, 0, /* passive */
  5059. direct_mask,
  5060. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5061. }
  5062. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5063. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5064. cmd.data = scan;
  5065. scan->len = cpu_to_le16(cmd.len);
  5066. set_bit(STATUS_SCAN_HW, &priv->status);
  5067. ret = iwl_send_cmd_sync(priv, &cmd);
  5068. if (ret)
  5069. goto done;
  5070. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5071. IWL_SCAN_CHECK_WATCHDOG);
  5072. mutex_unlock(&priv->mutex);
  5073. return;
  5074. done:
  5075. /* inform mac80211 scan aborted */
  5076. queue_work(priv->workqueue, &priv->scan_completed);
  5077. mutex_unlock(&priv->mutex);
  5078. }
  5079. static void iwl4965_bg_up(struct work_struct *data)
  5080. {
  5081. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5082. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5083. return;
  5084. mutex_lock(&priv->mutex);
  5085. __iwl4965_up(priv);
  5086. mutex_unlock(&priv->mutex);
  5087. }
  5088. static void iwl4965_bg_restart(struct work_struct *data)
  5089. {
  5090. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5091. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5092. return;
  5093. iwl4965_down(priv);
  5094. queue_work(priv->workqueue, &priv->up);
  5095. }
  5096. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5097. {
  5098. struct iwl_priv *priv =
  5099. container_of(data, struct iwl_priv, rx_replenish);
  5100. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5101. return;
  5102. mutex_lock(&priv->mutex);
  5103. iwl4965_rx_replenish(priv);
  5104. mutex_unlock(&priv->mutex);
  5105. }
  5106. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5107. static void iwl4965_bg_post_associate(struct work_struct *data)
  5108. {
  5109. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5110. post_associate.work);
  5111. struct ieee80211_conf *conf = NULL;
  5112. int ret = 0;
  5113. DECLARE_MAC_BUF(mac);
  5114. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5115. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5116. return;
  5117. }
  5118. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5119. priv->assoc_id,
  5120. print_mac(mac, priv->active_rxon.bssid_addr));
  5121. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5122. return;
  5123. mutex_lock(&priv->mutex);
  5124. if (!priv->vif || !priv->is_open) {
  5125. mutex_unlock(&priv->mutex);
  5126. return;
  5127. }
  5128. iwl4965_scan_cancel_timeout(priv, 200);
  5129. conf = ieee80211_get_hw_conf(priv->hw);
  5130. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5131. iwl4965_commit_rxon(priv);
  5132. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5133. iwl4965_setup_rxon_timing(priv);
  5134. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5135. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5136. if (ret)
  5137. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5138. "Attempting to continue.\n");
  5139. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5140. #ifdef CONFIG_IWL4965_HT
  5141. if (priv->current_ht_config.is_ht)
  5142. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5143. #endif /* CONFIG_IWL4965_HT*/
  5144. iwl4965_set_rxon_chain(priv);
  5145. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5146. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5147. priv->assoc_id, priv->beacon_int);
  5148. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5149. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5150. else
  5151. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5152. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5153. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5154. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5155. else
  5156. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5157. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5158. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5159. }
  5160. iwl4965_commit_rxon(priv);
  5161. switch (priv->iw_mode) {
  5162. case IEEE80211_IF_TYPE_STA:
  5163. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5164. break;
  5165. case IEEE80211_IF_TYPE_IBSS:
  5166. /* clear out the station table */
  5167. iwlcore_clear_stations_table(priv);
  5168. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5169. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5170. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5171. iwl4965_send_beacon_cmd(priv);
  5172. break;
  5173. default:
  5174. IWL_ERROR("%s Should not be called in %d mode\n",
  5175. __FUNCTION__, priv->iw_mode);
  5176. break;
  5177. }
  5178. iwl4965_sequence_reset(priv);
  5179. #ifdef CONFIG_IWL4965_SENSITIVITY
  5180. /* Enable Rx differential gain and sensitivity calibrations */
  5181. iwl4965_chain_noise_reset(priv);
  5182. priv->start_calib = 1;
  5183. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5184. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5185. priv->assoc_station_added = 1;
  5186. iwl4965_activate_qos(priv, 0);
  5187. /* we have just associated, don't start scan too early */
  5188. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5189. mutex_unlock(&priv->mutex);
  5190. }
  5191. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5192. {
  5193. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5194. if (!iwl_is_ready(priv))
  5195. return;
  5196. mutex_lock(&priv->mutex);
  5197. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5198. iwl4965_send_scan_abort(priv);
  5199. mutex_unlock(&priv->mutex);
  5200. }
  5201. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5202. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5203. {
  5204. struct iwl_priv *priv =
  5205. container_of(work, struct iwl_priv, scan_completed);
  5206. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5207. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5208. return;
  5209. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5210. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5211. ieee80211_scan_completed(priv->hw);
  5212. /* Since setting the TXPOWER may have been deferred while
  5213. * performing the scan, fire one off */
  5214. mutex_lock(&priv->mutex);
  5215. iwl4965_hw_reg_send_txpower(priv);
  5216. mutex_unlock(&priv->mutex);
  5217. }
  5218. /*****************************************************************************
  5219. *
  5220. * mac80211 entry point functions
  5221. *
  5222. *****************************************************************************/
  5223. #define UCODE_READY_TIMEOUT (2 * HZ)
  5224. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5225. {
  5226. struct iwl_priv *priv = hw->priv;
  5227. int ret;
  5228. IWL_DEBUG_MAC80211("enter\n");
  5229. if (pci_enable_device(priv->pci_dev)) {
  5230. IWL_ERROR("Fail to pci_enable_device\n");
  5231. return -ENODEV;
  5232. }
  5233. pci_restore_state(priv->pci_dev);
  5234. pci_enable_msi(priv->pci_dev);
  5235. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5236. DRV_NAME, priv);
  5237. if (ret) {
  5238. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5239. goto out_disable_msi;
  5240. }
  5241. /* we should be verifying the device is ready to be opened */
  5242. mutex_lock(&priv->mutex);
  5243. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5244. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5245. * ucode filename and max sizes are card-specific. */
  5246. if (!priv->ucode_code.len) {
  5247. ret = iwl4965_read_ucode(priv);
  5248. if (ret) {
  5249. IWL_ERROR("Could not read microcode: %d\n", ret);
  5250. mutex_unlock(&priv->mutex);
  5251. goto out_release_irq;
  5252. }
  5253. }
  5254. ret = __iwl4965_up(priv);
  5255. mutex_unlock(&priv->mutex);
  5256. if (ret)
  5257. goto out_release_irq;
  5258. IWL_DEBUG_INFO("Start UP work done.\n");
  5259. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5260. return 0;
  5261. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5262. * mac80211 will not be run successfully. */
  5263. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5264. test_bit(STATUS_READY, &priv->status),
  5265. UCODE_READY_TIMEOUT);
  5266. if (!ret) {
  5267. if (!test_bit(STATUS_READY, &priv->status)) {
  5268. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5269. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5270. ret = -ETIMEDOUT;
  5271. goto out_release_irq;
  5272. }
  5273. }
  5274. priv->is_open = 1;
  5275. IWL_DEBUG_MAC80211("leave\n");
  5276. return 0;
  5277. out_release_irq:
  5278. free_irq(priv->pci_dev->irq, priv);
  5279. out_disable_msi:
  5280. pci_disable_msi(priv->pci_dev);
  5281. pci_disable_device(priv->pci_dev);
  5282. priv->is_open = 0;
  5283. IWL_DEBUG_MAC80211("leave - failed\n");
  5284. return ret;
  5285. }
  5286. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5287. {
  5288. struct iwl_priv *priv = hw->priv;
  5289. IWL_DEBUG_MAC80211("enter\n");
  5290. if (!priv->is_open) {
  5291. IWL_DEBUG_MAC80211("leave - skip\n");
  5292. return;
  5293. }
  5294. priv->is_open = 0;
  5295. if (iwl_is_ready_rf(priv)) {
  5296. /* stop mac, cancel any scan request and clear
  5297. * RXON_FILTER_ASSOC_MSK BIT
  5298. */
  5299. mutex_lock(&priv->mutex);
  5300. iwl4965_scan_cancel_timeout(priv, 100);
  5301. cancel_delayed_work(&priv->post_associate);
  5302. mutex_unlock(&priv->mutex);
  5303. }
  5304. iwl4965_down(priv);
  5305. flush_workqueue(priv->workqueue);
  5306. free_irq(priv->pci_dev->irq, priv);
  5307. pci_disable_msi(priv->pci_dev);
  5308. pci_save_state(priv->pci_dev);
  5309. pci_disable_device(priv->pci_dev);
  5310. IWL_DEBUG_MAC80211("leave\n");
  5311. }
  5312. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5313. struct ieee80211_tx_control *ctl)
  5314. {
  5315. struct iwl_priv *priv = hw->priv;
  5316. IWL_DEBUG_MAC80211("enter\n");
  5317. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5318. IWL_DEBUG_MAC80211("leave - monitor\n");
  5319. return -1;
  5320. }
  5321. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5322. ctl->tx_rate->bitrate);
  5323. if (iwl4965_tx_skb(priv, skb, ctl))
  5324. dev_kfree_skb_any(skb);
  5325. IWL_DEBUG_MAC80211("leave\n");
  5326. return 0;
  5327. }
  5328. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5329. struct ieee80211_if_init_conf *conf)
  5330. {
  5331. struct iwl_priv *priv = hw->priv;
  5332. unsigned long flags;
  5333. DECLARE_MAC_BUF(mac);
  5334. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5335. if (priv->vif) {
  5336. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5337. return -EOPNOTSUPP;
  5338. }
  5339. spin_lock_irqsave(&priv->lock, flags);
  5340. priv->vif = conf->vif;
  5341. spin_unlock_irqrestore(&priv->lock, flags);
  5342. mutex_lock(&priv->mutex);
  5343. if (conf->mac_addr) {
  5344. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5345. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5346. }
  5347. if (iwl_is_ready(priv))
  5348. iwl4965_set_mode(priv, conf->type);
  5349. mutex_unlock(&priv->mutex);
  5350. IWL_DEBUG_MAC80211("leave\n");
  5351. return 0;
  5352. }
  5353. /**
  5354. * iwl4965_mac_config - mac80211 config callback
  5355. *
  5356. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5357. * be set inappropriately and the driver currently sets the hardware up to
  5358. * use it whenever needed.
  5359. */
  5360. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5361. {
  5362. struct iwl_priv *priv = hw->priv;
  5363. const struct iwl_channel_info *ch_info;
  5364. unsigned long flags;
  5365. int ret = 0;
  5366. mutex_lock(&priv->mutex);
  5367. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5368. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5369. if (!iwl_is_ready(priv)) {
  5370. IWL_DEBUG_MAC80211("leave - not ready\n");
  5371. ret = -EIO;
  5372. goto out;
  5373. }
  5374. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  5375. test_bit(STATUS_SCANNING, &priv->status))) {
  5376. IWL_DEBUG_MAC80211("leave - scanning\n");
  5377. set_bit(STATUS_CONF_PENDING, &priv->status);
  5378. mutex_unlock(&priv->mutex);
  5379. return 0;
  5380. }
  5381. spin_lock_irqsave(&priv->lock, flags);
  5382. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  5383. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5384. if (!is_channel_valid(ch_info)) {
  5385. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5386. spin_unlock_irqrestore(&priv->lock, flags);
  5387. ret = -EINVAL;
  5388. goto out;
  5389. }
  5390. #ifdef CONFIG_IWL4965_HT
  5391. /* if we are switching from ht to 2.4 clear flags
  5392. * from any ht related info since 2.4 does not
  5393. * support ht */
  5394. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5395. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5396. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5397. #endif
  5398. )
  5399. priv->staging_rxon.flags = 0;
  5400. #endif /* CONFIG_IWL4965_HT */
  5401. iwlcore_set_rxon_channel(priv, conf->channel->band,
  5402. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5403. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  5404. /* The list of supported rates and rate mask can be different
  5405. * for each band; since the band may have changed, reset
  5406. * the rate mask to what mac80211 lists */
  5407. iwl4965_set_rate(priv);
  5408. spin_unlock_irqrestore(&priv->lock, flags);
  5409. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5410. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5411. iwl4965_hw_channel_switch(priv, conf->channel);
  5412. goto out;
  5413. }
  5414. #endif
  5415. if (priv->cfg->ops->lib->radio_kill_sw)
  5416. priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
  5417. if (!conf->radio_enabled) {
  5418. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5419. goto out;
  5420. }
  5421. if (iwl_is_rfkill(priv)) {
  5422. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5423. ret = -EIO;
  5424. goto out;
  5425. }
  5426. iwl4965_set_rate(priv);
  5427. if (memcmp(&priv->active_rxon,
  5428. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5429. iwl4965_commit_rxon(priv);
  5430. else
  5431. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5432. IWL_DEBUG_MAC80211("leave\n");
  5433. out:
  5434. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5435. mutex_unlock(&priv->mutex);
  5436. return ret;
  5437. }
  5438. static void iwl4965_config_ap(struct iwl_priv *priv)
  5439. {
  5440. int ret = 0;
  5441. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5442. return;
  5443. /* The following should be done only at AP bring up */
  5444. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5445. /* RXON - unassoc (to set timing command) */
  5446. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5447. iwl4965_commit_rxon(priv);
  5448. /* RXON Timing */
  5449. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5450. iwl4965_setup_rxon_timing(priv);
  5451. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5452. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5453. if (ret)
  5454. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5455. "Attempting to continue.\n");
  5456. iwl4965_set_rxon_chain(priv);
  5457. /* FIXME: what should be the assoc_id for AP? */
  5458. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5459. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5460. priv->staging_rxon.flags |=
  5461. RXON_FLG_SHORT_PREAMBLE_MSK;
  5462. else
  5463. priv->staging_rxon.flags &=
  5464. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5465. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5466. if (priv->assoc_capability &
  5467. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5468. priv->staging_rxon.flags |=
  5469. RXON_FLG_SHORT_SLOT_MSK;
  5470. else
  5471. priv->staging_rxon.flags &=
  5472. ~RXON_FLG_SHORT_SLOT_MSK;
  5473. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5474. priv->staging_rxon.flags &=
  5475. ~RXON_FLG_SHORT_SLOT_MSK;
  5476. }
  5477. /* restore RXON assoc */
  5478. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5479. iwl4965_commit_rxon(priv);
  5480. iwl4965_activate_qos(priv, 1);
  5481. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5482. }
  5483. iwl4965_send_beacon_cmd(priv);
  5484. /* FIXME - we need to add code here to detect a totally new
  5485. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5486. * clear sta table, add BCAST sta... */
  5487. }
  5488. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  5489. struct ieee80211_vif *vif,
  5490. struct ieee80211_if_conf *conf)
  5491. {
  5492. struct iwl_priv *priv = hw->priv;
  5493. DECLARE_MAC_BUF(mac);
  5494. unsigned long flags;
  5495. int rc;
  5496. if (conf == NULL)
  5497. return -EIO;
  5498. if (priv->vif != vif) {
  5499. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5500. mutex_unlock(&priv->mutex);
  5501. return 0;
  5502. }
  5503. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5504. (!conf->beacon || !conf->ssid_len)) {
  5505. IWL_DEBUG_MAC80211
  5506. ("Leaving in AP mode because HostAPD is not ready.\n");
  5507. return 0;
  5508. }
  5509. if (!iwl_is_alive(priv))
  5510. return -EAGAIN;
  5511. mutex_lock(&priv->mutex);
  5512. if (conf->bssid)
  5513. IWL_DEBUG_MAC80211("bssid: %s\n",
  5514. print_mac(mac, conf->bssid));
  5515. /*
  5516. * very dubious code was here; the probe filtering flag is never set:
  5517. *
  5518. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5519. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5520. */
  5521. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5522. if (!conf->bssid) {
  5523. conf->bssid = priv->mac_addr;
  5524. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5525. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5526. print_mac(mac, conf->bssid));
  5527. }
  5528. if (priv->ibss_beacon)
  5529. dev_kfree_skb(priv->ibss_beacon);
  5530. priv->ibss_beacon = conf->beacon;
  5531. }
  5532. if (iwl_is_rfkill(priv))
  5533. goto done;
  5534. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5535. !is_multicast_ether_addr(conf->bssid)) {
  5536. /* If there is currently a HW scan going on in the background
  5537. * then we need to cancel it else the RXON below will fail. */
  5538. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  5539. IWL_WARNING("Aborted scan still in progress "
  5540. "after 100ms\n");
  5541. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5542. mutex_unlock(&priv->mutex);
  5543. return -EAGAIN;
  5544. }
  5545. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5546. /* TODO: Audit driver for usage of these members and see
  5547. * if mac80211 deprecates them (priv->bssid looks like it
  5548. * shouldn't be there, but I haven't scanned the IBSS code
  5549. * to verify) - jpk */
  5550. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5551. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5552. iwl4965_config_ap(priv);
  5553. else {
  5554. rc = iwl4965_commit_rxon(priv);
  5555. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5556. iwl4965_rxon_add_station(
  5557. priv, priv->active_rxon.bssid_addr, 1);
  5558. }
  5559. } else {
  5560. iwl4965_scan_cancel_timeout(priv, 100);
  5561. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5562. iwl4965_commit_rxon(priv);
  5563. }
  5564. done:
  5565. spin_lock_irqsave(&priv->lock, flags);
  5566. if (!conf->ssid_len)
  5567. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5568. else
  5569. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5570. priv->essid_len = conf->ssid_len;
  5571. spin_unlock_irqrestore(&priv->lock, flags);
  5572. IWL_DEBUG_MAC80211("leave\n");
  5573. mutex_unlock(&priv->mutex);
  5574. return 0;
  5575. }
  5576. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  5577. unsigned int changed_flags,
  5578. unsigned int *total_flags,
  5579. int mc_count, struct dev_addr_list *mc_list)
  5580. {
  5581. /*
  5582. * XXX: dummy
  5583. * see also iwl4965_connection_init_rx_config
  5584. */
  5585. *total_flags = 0;
  5586. }
  5587. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  5588. struct ieee80211_if_init_conf *conf)
  5589. {
  5590. struct iwl_priv *priv = hw->priv;
  5591. IWL_DEBUG_MAC80211("enter\n");
  5592. mutex_lock(&priv->mutex);
  5593. if (iwl_is_ready_rf(priv)) {
  5594. iwl4965_scan_cancel_timeout(priv, 100);
  5595. cancel_delayed_work(&priv->post_associate);
  5596. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5597. iwl4965_commit_rxon(priv);
  5598. }
  5599. if (priv->vif == conf->vif) {
  5600. priv->vif = NULL;
  5601. memset(priv->bssid, 0, ETH_ALEN);
  5602. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5603. priv->essid_len = 0;
  5604. }
  5605. mutex_unlock(&priv->mutex);
  5606. IWL_DEBUG_MAC80211("leave\n");
  5607. }
  5608. #ifdef CONFIG_IWL4965_HT
  5609. static void iwl4965_ht_conf(struct iwl_priv *priv,
  5610. struct ieee80211_bss_conf *bss_conf)
  5611. {
  5612. struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
  5613. struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
  5614. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  5615. IWL_DEBUG_MAC80211("enter: \n");
  5616. iwl_conf->is_ht = bss_conf->assoc_ht;
  5617. if (!iwl_conf->is_ht)
  5618. return;
  5619. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5620. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  5621. iwl_conf->sgf |= 0x1;
  5622. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  5623. iwl_conf->sgf |= 0x2;
  5624. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  5625. iwl_conf->max_amsdu_size =
  5626. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  5627. iwl_conf->supported_chan_width =
  5628. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  5629. iwl_conf->extension_chan_offset =
  5630. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  5631. /* If no above or below channel supplied disable FAT channel */
  5632. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  5633. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  5634. iwl_conf->supported_chan_width = 0;
  5635. iwl_conf->tx_mimo_ps_mode =
  5636. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5637. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  5638. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  5639. iwl_conf->tx_chan_width =
  5640. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  5641. iwl_conf->ht_protection =
  5642. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  5643. iwl_conf->non_GF_STA_present =
  5644. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  5645. IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
  5646. IWL_DEBUG_MAC80211("leave\n");
  5647. }
  5648. #else
  5649. static inline void iwl4965_ht_conf(struct iwl_priv *priv,
  5650. struct ieee80211_bss_conf *bss_conf)
  5651. {
  5652. }
  5653. #endif
  5654. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  5655. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  5656. struct ieee80211_vif *vif,
  5657. struct ieee80211_bss_conf *bss_conf,
  5658. u32 changes)
  5659. {
  5660. struct iwl_priv *priv = hw->priv;
  5661. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  5662. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5663. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  5664. bss_conf->use_short_preamble);
  5665. if (bss_conf->use_short_preamble)
  5666. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5667. else
  5668. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5669. }
  5670. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5671. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  5672. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5673. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5674. else
  5675. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5676. }
  5677. if (changes & BSS_CHANGED_HT) {
  5678. IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
  5679. iwl4965_ht_conf(priv, bss_conf);
  5680. iwl4965_set_rxon_chain(priv);
  5681. }
  5682. if (changes & BSS_CHANGED_ASSOC) {
  5683. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  5684. if (bss_conf->assoc) {
  5685. priv->assoc_id = bss_conf->aid;
  5686. priv->beacon_int = bss_conf->beacon_int;
  5687. priv->timestamp = bss_conf->timestamp;
  5688. priv->assoc_capability = bss_conf->assoc_capability;
  5689. priv->next_scan_jiffies = jiffies +
  5690. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  5691. queue_work(priv->workqueue, &priv->post_associate.work);
  5692. } else {
  5693. priv->assoc_id = 0;
  5694. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  5695. }
  5696. } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  5697. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  5698. iwl4965_send_rxon_assoc(priv);
  5699. }
  5700. }
  5701. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5702. {
  5703. int rc = 0;
  5704. unsigned long flags;
  5705. struct iwl_priv *priv = hw->priv;
  5706. IWL_DEBUG_MAC80211("enter\n");
  5707. mutex_lock(&priv->mutex);
  5708. spin_lock_irqsave(&priv->lock, flags);
  5709. if (!iwl_is_ready_rf(priv)) {
  5710. rc = -EIO;
  5711. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5712. goto out_unlock;
  5713. }
  5714. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  5715. rc = -EIO;
  5716. IWL_ERROR("ERROR: APs don't scan\n");
  5717. goto out_unlock;
  5718. }
  5719. /* we don't schedule scan within next_scan_jiffies period */
  5720. if (priv->next_scan_jiffies &&
  5721. time_after(priv->next_scan_jiffies, jiffies)) {
  5722. rc = -EAGAIN;
  5723. goto out_unlock;
  5724. }
  5725. /* if we just finished scan ask for delay */
  5726. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  5727. IWL_DELAY_NEXT_SCAN, jiffies)) {
  5728. rc = -EAGAIN;
  5729. goto out_unlock;
  5730. }
  5731. if (len) {
  5732. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5733. iwl4965_escape_essid(ssid, len), (int)len);
  5734. priv->one_direct_scan = 1;
  5735. priv->direct_ssid_len = (u8)
  5736. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5737. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5738. } else
  5739. priv->one_direct_scan = 0;
  5740. rc = iwl4965_scan_initiate(priv);
  5741. IWL_DEBUG_MAC80211("leave\n");
  5742. out_unlock:
  5743. spin_unlock_irqrestore(&priv->lock, flags);
  5744. mutex_unlock(&priv->mutex);
  5745. return rc;
  5746. }
  5747. static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
  5748. struct ieee80211_key_conf *keyconf, const u8 *addr,
  5749. u32 iv32, u16 *phase1key)
  5750. {
  5751. struct iwl_priv *priv = hw->priv;
  5752. u8 sta_id = IWL_INVALID_STATION;
  5753. unsigned long flags;
  5754. __le16 key_flags = 0;
  5755. int i;
  5756. DECLARE_MAC_BUF(mac);
  5757. IWL_DEBUG_MAC80211("enter\n");
  5758. sta_id = iwl4965_hw_find_station(priv, addr);
  5759. if (sta_id == IWL_INVALID_STATION) {
  5760. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5761. print_mac(mac, addr));
  5762. return;
  5763. }
  5764. iwl4965_scan_cancel_timeout(priv, 100);
  5765. key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
  5766. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  5767. key_flags &= ~STA_KEY_FLG_INVALID;
  5768. if (sta_id == priv->hw_setting.bcast_sta_id)
  5769. key_flags |= STA_KEY_MULTICAST_MSK;
  5770. spin_lock_irqsave(&priv->sta_lock, flags);
  5771. priv->stations[sta_id].sta.key.key_offset =
  5772. iwl_get_free_ucode_key_index(priv);
  5773. priv->stations[sta_id].sta.key.key_flags = key_flags;
  5774. priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
  5775. for (i = 0; i < 5; i++)
  5776. priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
  5777. cpu_to_le16(phase1key[i]);
  5778. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  5779. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  5780. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  5781. spin_unlock_irqrestore(&priv->sta_lock, flags);
  5782. IWL_DEBUG_MAC80211("leave\n");
  5783. }
  5784. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5785. const u8 *local_addr, const u8 *addr,
  5786. struct ieee80211_key_conf *key)
  5787. {
  5788. struct iwl_priv *priv = hw->priv;
  5789. DECLARE_MAC_BUF(mac);
  5790. int ret = 0;
  5791. u8 sta_id = IWL_INVALID_STATION;
  5792. u8 is_default_wep_key = 0;
  5793. IWL_DEBUG_MAC80211("enter\n");
  5794. if (!priv->cfg->mod_params->hw_crypto) {
  5795. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5796. return -EOPNOTSUPP;
  5797. }
  5798. if (is_zero_ether_addr(addr))
  5799. /* only support pairwise keys */
  5800. return -EOPNOTSUPP;
  5801. sta_id = iwl4965_hw_find_station(priv, addr);
  5802. if (sta_id == IWL_INVALID_STATION) {
  5803. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5804. print_mac(mac, addr));
  5805. return -EINVAL;
  5806. }
  5807. mutex_lock(&priv->mutex);
  5808. iwl4965_scan_cancel_timeout(priv, 100);
  5809. mutex_unlock(&priv->mutex);
  5810. /* If we are getting WEP group key and we didn't receive any key mapping
  5811. * so far, we are in legacy wep mode (group key only), otherwise we are
  5812. * in 1X mode.
  5813. * In legacy wep mode, we use another host command to the uCode */
  5814. if (key->alg == ALG_WEP && sta_id == priv->hw_setting.bcast_sta_id &&
  5815. priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5816. if (cmd == SET_KEY)
  5817. is_default_wep_key = !priv->key_mapping_key;
  5818. else
  5819. is_default_wep_key = priv->default_wep_key;
  5820. }
  5821. switch (cmd) {
  5822. case SET_KEY:
  5823. if (is_default_wep_key)
  5824. ret = iwl_set_default_wep_key(priv, key);
  5825. else
  5826. ret = iwl4965_set_dynamic_key(priv, key, sta_id);
  5827. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  5828. break;
  5829. case DISABLE_KEY:
  5830. if (is_default_wep_key)
  5831. ret = iwl_remove_default_wep_key(priv, key);
  5832. else
  5833. ret = iwl4965_clear_sta_key_info(priv, sta_id);
  5834. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5835. break;
  5836. default:
  5837. ret = -EINVAL;
  5838. }
  5839. IWL_DEBUG_MAC80211("leave\n");
  5840. return ret;
  5841. }
  5842. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  5843. const struct ieee80211_tx_queue_params *params)
  5844. {
  5845. struct iwl_priv *priv = hw->priv;
  5846. unsigned long flags;
  5847. int q;
  5848. IWL_DEBUG_MAC80211("enter\n");
  5849. if (!iwl_is_ready_rf(priv)) {
  5850. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5851. return -EIO;
  5852. }
  5853. if (queue >= AC_NUM) {
  5854. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5855. return 0;
  5856. }
  5857. if (!priv->qos_data.qos_enable) {
  5858. priv->qos_data.qos_active = 0;
  5859. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  5860. return 0;
  5861. }
  5862. q = AC_NUM - 1 - queue;
  5863. spin_lock_irqsave(&priv->lock, flags);
  5864. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5865. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5866. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5867. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5868. cpu_to_le16((params->txop * 32));
  5869. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5870. priv->qos_data.qos_active = 1;
  5871. spin_unlock_irqrestore(&priv->lock, flags);
  5872. mutex_lock(&priv->mutex);
  5873. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5874. iwl4965_activate_qos(priv, 1);
  5875. else if (priv->assoc_id && iwl_is_associated(priv))
  5876. iwl4965_activate_qos(priv, 0);
  5877. mutex_unlock(&priv->mutex);
  5878. IWL_DEBUG_MAC80211("leave\n");
  5879. return 0;
  5880. }
  5881. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  5882. struct ieee80211_tx_queue_stats *stats)
  5883. {
  5884. struct iwl_priv *priv = hw->priv;
  5885. int i, avail;
  5886. struct iwl4965_tx_queue *txq;
  5887. struct iwl4965_queue *q;
  5888. unsigned long flags;
  5889. IWL_DEBUG_MAC80211("enter\n");
  5890. if (!iwl_is_ready_rf(priv)) {
  5891. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5892. return -EIO;
  5893. }
  5894. spin_lock_irqsave(&priv->lock, flags);
  5895. for (i = 0; i < AC_NUM; i++) {
  5896. txq = &priv->txq[i];
  5897. q = &txq->q;
  5898. avail = iwl4965_queue_space(q);
  5899. stats->data[i].len = q->n_window - avail;
  5900. stats->data[i].limit = q->n_window - q->high_mark;
  5901. stats->data[i].count = q->n_window;
  5902. }
  5903. spin_unlock_irqrestore(&priv->lock, flags);
  5904. IWL_DEBUG_MAC80211("leave\n");
  5905. return 0;
  5906. }
  5907. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  5908. struct ieee80211_low_level_stats *stats)
  5909. {
  5910. IWL_DEBUG_MAC80211("enter\n");
  5911. IWL_DEBUG_MAC80211("leave\n");
  5912. return 0;
  5913. }
  5914. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  5915. {
  5916. IWL_DEBUG_MAC80211("enter\n");
  5917. IWL_DEBUG_MAC80211("leave\n");
  5918. return 0;
  5919. }
  5920. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  5921. {
  5922. struct iwl_priv *priv = hw->priv;
  5923. unsigned long flags;
  5924. mutex_lock(&priv->mutex);
  5925. IWL_DEBUG_MAC80211("enter\n");
  5926. priv->lq_mngr.lq_ready = 0;
  5927. #ifdef CONFIG_IWL4965_HT
  5928. spin_lock_irqsave(&priv->lock, flags);
  5929. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  5930. spin_unlock_irqrestore(&priv->lock, flags);
  5931. #endif /* CONFIG_IWL4965_HT */
  5932. iwlcore_reset_qos(priv);
  5933. cancel_delayed_work(&priv->post_associate);
  5934. spin_lock_irqsave(&priv->lock, flags);
  5935. priv->assoc_id = 0;
  5936. priv->assoc_capability = 0;
  5937. priv->assoc_station_added = 0;
  5938. /* new association get rid of ibss beacon skb */
  5939. if (priv->ibss_beacon)
  5940. dev_kfree_skb(priv->ibss_beacon);
  5941. priv->ibss_beacon = NULL;
  5942. priv->beacon_int = priv->hw->conf.beacon_int;
  5943. priv->timestamp = 0;
  5944. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  5945. priv->beacon_int = 0;
  5946. spin_unlock_irqrestore(&priv->lock, flags);
  5947. if (!iwl_is_ready_rf(priv)) {
  5948. IWL_DEBUG_MAC80211("leave - not ready\n");
  5949. mutex_unlock(&priv->mutex);
  5950. return;
  5951. }
  5952. /* we are restarting association process
  5953. * clear RXON_FILTER_ASSOC_MSK bit
  5954. */
  5955. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5956. iwl4965_scan_cancel_timeout(priv, 100);
  5957. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5958. iwl4965_commit_rxon(priv);
  5959. }
  5960. /* Per mac80211.h: This is only used in IBSS mode... */
  5961. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5962. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  5963. mutex_unlock(&priv->mutex);
  5964. return;
  5965. }
  5966. priv->only_active_channel = 0;
  5967. iwl4965_set_rate(priv);
  5968. mutex_unlock(&priv->mutex);
  5969. IWL_DEBUG_MAC80211("leave\n");
  5970. }
  5971. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  5972. struct ieee80211_tx_control *control)
  5973. {
  5974. struct iwl_priv *priv = hw->priv;
  5975. unsigned long flags;
  5976. mutex_lock(&priv->mutex);
  5977. IWL_DEBUG_MAC80211("enter\n");
  5978. if (!iwl_is_ready_rf(priv)) {
  5979. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5980. mutex_unlock(&priv->mutex);
  5981. return -EIO;
  5982. }
  5983. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5984. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  5985. mutex_unlock(&priv->mutex);
  5986. return -EIO;
  5987. }
  5988. spin_lock_irqsave(&priv->lock, flags);
  5989. if (priv->ibss_beacon)
  5990. dev_kfree_skb(priv->ibss_beacon);
  5991. priv->ibss_beacon = skb;
  5992. priv->assoc_id = 0;
  5993. IWL_DEBUG_MAC80211("leave\n");
  5994. spin_unlock_irqrestore(&priv->lock, flags);
  5995. iwlcore_reset_qos(priv);
  5996. queue_work(priv->workqueue, &priv->post_associate.work);
  5997. mutex_unlock(&priv->mutex);
  5998. return 0;
  5999. }
  6000. /*****************************************************************************
  6001. *
  6002. * sysfs attributes
  6003. *
  6004. *****************************************************************************/
  6005. #ifdef CONFIG_IWLWIFI_DEBUG
  6006. /*
  6007. * The following adds a new attribute to the sysfs representation
  6008. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6009. * used for controlling the debug level.
  6010. *
  6011. * See the level definitions in iwl for details.
  6012. */
  6013. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6014. {
  6015. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6016. }
  6017. static ssize_t store_debug_level(struct device_driver *d,
  6018. const char *buf, size_t count)
  6019. {
  6020. char *p = (char *)buf;
  6021. u32 val;
  6022. val = simple_strtoul(p, &p, 0);
  6023. if (p == buf)
  6024. printk(KERN_INFO DRV_NAME
  6025. ": %s is not in hex or decimal form.\n", buf);
  6026. else
  6027. iwl_debug_level = val;
  6028. return strnlen(buf, count);
  6029. }
  6030. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6031. show_debug_level, store_debug_level);
  6032. #endif /* CONFIG_IWLWIFI_DEBUG */
  6033. static ssize_t show_temperature(struct device *d,
  6034. struct device_attribute *attr, char *buf)
  6035. {
  6036. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6037. if (!iwl_is_alive(priv))
  6038. return -EAGAIN;
  6039. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6040. }
  6041. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6042. static ssize_t show_rs_window(struct device *d,
  6043. struct device_attribute *attr,
  6044. char *buf)
  6045. {
  6046. struct iwl_priv *priv = d->driver_data;
  6047. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6048. }
  6049. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6050. static ssize_t show_tx_power(struct device *d,
  6051. struct device_attribute *attr, char *buf)
  6052. {
  6053. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6054. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6055. }
  6056. static ssize_t store_tx_power(struct device *d,
  6057. struct device_attribute *attr,
  6058. const char *buf, size_t count)
  6059. {
  6060. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6061. char *p = (char *)buf;
  6062. u32 val;
  6063. val = simple_strtoul(p, &p, 10);
  6064. if (p == buf)
  6065. printk(KERN_INFO DRV_NAME
  6066. ": %s is not in decimal form.\n", buf);
  6067. else
  6068. iwl4965_hw_reg_set_txpower(priv, val);
  6069. return count;
  6070. }
  6071. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6072. static ssize_t show_flags(struct device *d,
  6073. struct device_attribute *attr, char *buf)
  6074. {
  6075. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6076. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6077. }
  6078. static ssize_t store_flags(struct device *d,
  6079. struct device_attribute *attr,
  6080. const char *buf, size_t count)
  6081. {
  6082. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6083. u32 flags = simple_strtoul(buf, NULL, 0);
  6084. mutex_lock(&priv->mutex);
  6085. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6086. /* Cancel any currently running scans... */
  6087. if (iwl4965_scan_cancel_timeout(priv, 100))
  6088. IWL_WARNING("Could not cancel scan.\n");
  6089. else {
  6090. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6091. flags);
  6092. priv->staging_rxon.flags = cpu_to_le32(flags);
  6093. iwl4965_commit_rxon(priv);
  6094. }
  6095. }
  6096. mutex_unlock(&priv->mutex);
  6097. return count;
  6098. }
  6099. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6100. static ssize_t show_filter_flags(struct device *d,
  6101. struct device_attribute *attr, char *buf)
  6102. {
  6103. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6104. return sprintf(buf, "0x%04X\n",
  6105. le32_to_cpu(priv->active_rxon.filter_flags));
  6106. }
  6107. static ssize_t store_filter_flags(struct device *d,
  6108. struct device_attribute *attr,
  6109. const char *buf, size_t count)
  6110. {
  6111. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6112. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6113. mutex_lock(&priv->mutex);
  6114. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6115. /* Cancel any currently running scans... */
  6116. if (iwl4965_scan_cancel_timeout(priv, 100))
  6117. IWL_WARNING("Could not cancel scan.\n");
  6118. else {
  6119. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6120. "0x%04X\n", filter_flags);
  6121. priv->staging_rxon.filter_flags =
  6122. cpu_to_le32(filter_flags);
  6123. iwl4965_commit_rxon(priv);
  6124. }
  6125. }
  6126. mutex_unlock(&priv->mutex);
  6127. return count;
  6128. }
  6129. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6130. store_filter_flags);
  6131. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6132. static ssize_t show_measurement(struct device *d,
  6133. struct device_attribute *attr, char *buf)
  6134. {
  6135. struct iwl_priv *priv = dev_get_drvdata(d);
  6136. struct iwl4965_spectrum_notification measure_report;
  6137. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6138. u8 *data = (u8 *) & measure_report;
  6139. unsigned long flags;
  6140. spin_lock_irqsave(&priv->lock, flags);
  6141. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6142. spin_unlock_irqrestore(&priv->lock, flags);
  6143. return 0;
  6144. }
  6145. memcpy(&measure_report, &priv->measure_report, size);
  6146. priv->measurement_status = 0;
  6147. spin_unlock_irqrestore(&priv->lock, flags);
  6148. while (size && (PAGE_SIZE - len)) {
  6149. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6150. PAGE_SIZE - len, 1);
  6151. len = strlen(buf);
  6152. if (PAGE_SIZE - len)
  6153. buf[len++] = '\n';
  6154. ofs += 16;
  6155. size -= min(size, 16U);
  6156. }
  6157. return len;
  6158. }
  6159. static ssize_t store_measurement(struct device *d,
  6160. struct device_attribute *attr,
  6161. const char *buf, size_t count)
  6162. {
  6163. struct iwl_priv *priv = dev_get_drvdata(d);
  6164. struct ieee80211_measurement_params params = {
  6165. .channel = le16_to_cpu(priv->active_rxon.channel),
  6166. .start_time = cpu_to_le64(priv->last_tsf),
  6167. .duration = cpu_to_le16(1),
  6168. };
  6169. u8 type = IWL_MEASURE_BASIC;
  6170. u8 buffer[32];
  6171. u8 channel;
  6172. if (count) {
  6173. char *p = buffer;
  6174. strncpy(buffer, buf, min(sizeof(buffer), count));
  6175. channel = simple_strtoul(p, NULL, 0);
  6176. if (channel)
  6177. params.channel = channel;
  6178. p = buffer;
  6179. while (*p && *p != ' ')
  6180. p++;
  6181. if (*p)
  6182. type = simple_strtoul(p + 1, NULL, 0);
  6183. }
  6184. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6185. "channel %d (for '%s')\n", type, params.channel, buf);
  6186. iwl4965_get_measurement(priv, &params, type);
  6187. return count;
  6188. }
  6189. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6190. show_measurement, store_measurement);
  6191. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6192. static ssize_t store_retry_rate(struct device *d,
  6193. struct device_attribute *attr,
  6194. const char *buf, size_t count)
  6195. {
  6196. struct iwl_priv *priv = dev_get_drvdata(d);
  6197. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6198. if (priv->retry_rate <= 0)
  6199. priv->retry_rate = 1;
  6200. return count;
  6201. }
  6202. static ssize_t show_retry_rate(struct device *d,
  6203. struct device_attribute *attr, char *buf)
  6204. {
  6205. struct iwl_priv *priv = dev_get_drvdata(d);
  6206. return sprintf(buf, "%d", priv->retry_rate);
  6207. }
  6208. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6209. store_retry_rate);
  6210. static ssize_t store_power_level(struct device *d,
  6211. struct device_attribute *attr,
  6212. const char *buf, size_t count)
  6213. {
  6214. struct iwl_priv *priv = dev_get_drvdata(d);
  6215. int rc;
  6216. int mode;
  6217. mode = simple_strtoul(buf, NULL, 0);
  6218. mutex_lock(&priv->mutex);
  6219. if (!iwl_is_ready(priv)) {
  6220. rc = -EAGAIN;
  6221. goto out;
  6222. }
  6223. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6224. mode = IWL_POWER_AC;
  6225. else
  6226. mode |= IWL_POWER_ENABLED;
  6227. if (mode != priv->power_mode) {
  6228. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6229. if (rc) {
  6230. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6231. goto out;
  6232. }
  6233. priv->power_mode = mode;
  6234. }
  6235. rc = count;
  6236. out:
  6237. mutex_unlock(&priv->mutex);
  6238. return rc;
  6239. }
  6240. #define MAX_WX_STRING 80
  6241. /* Values are in microsecond */
  6242. static const s32 timeout_duration[] = {
  6243. 350000,
  6244. 250000,
  6245. 75000,
  6246. 37000,
  6247. 25000,
  6248. };
  6249. static const s32 period_duration[] = {
  6250. 400000,
  6251. 700000,
  6252. 1000000,
  6253. 1000000,
  6254. 1000000
  6255. };
  6256. static ssize_t show_power_level(struct device *d,
  6257. struct device_attribute *attr, char *buf)
  6258. {
  6259. struct iwl_priv *priv = dev_get_drvdata(d);
  6260. int level = IWL_POWER_LEVEL(priv->power_mode);
  6261. char *p = buf;
  6262. p += sprintf(p, "%d ", level);
  6263. switch (level) {
  6264. case IWL_POWER_MODE_CAM:
  6265. case IWL_POWER_AC:
  6266. p += sprintf(p, "(AC)");
  6267. break;
  6268. case IWL_POWER_BATTERY:
  6269. p += sprintf(p, "(BATTERY)");
  6270. break;
  6271. default:
  6272. p += sprintf(p,
  6273. "(Timeout %dms, Period %dms)",
  6274. timeout_duration[level - 1] / 1000,
  6275. period_duration[level - 1] / 1000);
  6276. }
  6277. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6278. p += sprintf(p, " OFF\n");
  6279. else
  6280. p += sprintf(p, " \n");
  6281. return (p - buf + 1);
  6282. }
  6283. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6284. store_power_level);
  6285. static ssize_t show_channels(struct device *d,
  6286. struct device_attribute *attr, char *buf)
  6287. {
  6288. /* all this shit doesn't belong into sysfs anyway */
  6289. return 0;
  6290. }
  6291. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6292. static ssize_t show_statistics(struct device *d,
  6293. struct device_attribute *attr, char *buf)
  6294. {
  6295. struct iwl_priv *priv = dev_get_drvdata(d);
  6296. u32 size = sizeof(struct iwl4965_notif_statistics);
  6297. u32 len = 0, ofs = 0;
  6298. u8 *data = (u8 *) & priv->statistics;
  6299. int rc = 0;
  6300. if (!iwl_is_alive(priv))
  6301. return -EAGAIN;
  6302. mutex_lock(&priv->mutex);
  6303. rc = iwl4965_send_statistics_request(priv);
  6304. mutex_unlock(&priv->mutex);
  6305. if (rc) {
  6306. len = sprintf(buf,
  6307. "Error sending statistics request: 0x%08X\n", rc);
  6308. return len;
  6309. }
  6310. while (size && (PAGE_SIZE - len)) {
  6311. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6312. PAGE_SIZE - len, 1);
  6313. len = strlen(buf);
  6314. if (PAGE_SIZE - len)
  6315. buf[len++] = '\n';
  6316. ofs += 16;
  6317. size -= min(size, 16U);
  6318. }
  6319. return len;
  6320. }
  6321. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6322. static ssize_t show_antenna(struct device *d,
  6323. struct device_attribute *attr, char *buf)
  6324. {
  6325. struct iwl_priv *priv = dev_get_drvdata(d);
  6326. if (!iwl_is_alive(priv))
  6327. return -EAGAIN;
  6328. return sprintf(buf, "%d\n", priv->antenna);
  6329. }
  6330. static ssize_t store_antenna(struct device *d,
  6331. struct device_attribute *attr,
  6332. const char *buf, size_t count)
  6333. {
  6334. int ant;
  6335. struct iwl_priv *priv = dev_get_drvdata(d);
  6336. if (count == 0)
  6337. return 0;
  6338. if (sscanf(buf, "%1i", &ant) != 1) {
  6339. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6340. return count;
  6341. }
  6342. if ((ant >= 0) && (ant <= 2)) {
  6343. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6344. priv->antenna = (enum iwl4965_antenna)ant;
  6345. } else
  6346. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6347. return count;
  6348. }
  6349. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6350. static ssize_t show_status(struct device *d,
  6351. struct device_attribute *attr, char *buf)
  6352. {
  6353. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6354. if (!iwl_is_alive(priv))
  6355. return -EAGAIN;
  6356. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6357. }
  6358. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6359. static ssize_t dump_error_log(struct device *d,
  6360. struct device_attribute *attr,
  6361. const char *buf, size_t count)
  6362. {
  6363. char *p = (char *)buf;
  6364. if (p[0] == '1')
  6365. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6366. return strnlen(buf, count);
  6367. }
  6368. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6369. static ssize_t dump_event_log(struct device *d,
  6370. struct device_attribute *attr,
  6371. const char *buf, size_t count)
  6372. {
  6373. char *p = (char *)buf;
  6374. if (p[0] == '1')
  6375. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6376. return strnlen(buf, count);
  6377. }
  6378. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6379. /*****************************************************************************
  6380. *
  6381. * driver setup and teardown
  6382. *
  6383. *****************************************************************************/
  6384. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6385. {
  6386. priv->workqueue = create_workqueue(DRV_NAME);
  6387. init_waitqueue_head(&priv->wait_command_queue);
  6388. INIT_WORK(&priv->up, iwl4965_bg_up);
  6389. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6390. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6391. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6392. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6393. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6394. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6395. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6396. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6397. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6398. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6399. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6400. iwl4965_hw_setup_deferred_work(priv);
  6401. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6402. iwl4965_irq_tasklet, (unsigned long)priv);
  6403. }
  6404. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6405. {
  6406. iwl4965_hw_cancel_deferred_work(priv);
  6407. cancel_delayed_work_sync(&priv->init_alive_start);
  6408. cancel_delayed_work(&priv->scan_check);
  6409. cancel_delayed_work(&priv->alive_start);
  6410. cancel_delayed_work(&priv->post_associate);
  6411. cancel_work_sync(&priv->beacon_update);
  6412. }
  6413. static struct attribute *iwl4965_sysfs_entries[] = {
  6414. &dev_attr_antenna.attr,
  6415. &dev_attr_channels.attr,
  6416. &dev_attr_dump_errors.attr,
  6417. &dev_attr_dump_events.attr,
  6418. &dev_attr_flags.attr,
  6419. &dev_attr_filter_flags.attr,
  6420. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6421. &dev_attr_measurement.attr,
  6422. #endif
  6423. &dev_attr_power_level.attr,
  6424. &dev_attr_retry_rate.attr,
  6425. &dev_attr_rs_window.attr,
  6426. &dev_attr_statistics.attr,
  6427. &dev_attr_status.attr,
  6428. &dev_attr_temperature.attr,
  6429. &dev_attr_tx_power.attr,
  6430. NULL
  6431. };
  6432. static struct attribute_group iwl4965_attribute_group = {
  6433. .name = NULL, /* put in device directory */
  6434. .attrs = iwl4965_sysfs_entries,
  6435. };
  6436. static struct ieee80211_ops iwl4965_hw_ops = {
  6437. .tx = iwl4965_mac_tx,
  6438. .start = iwl4965_mac_start,
  6439. .stop = iwl4965_mac_stop,
  6440. .add_interface = iwl4965_mac_add_interface,
  6441. .remove_interface = iwl4965_mac_remove_interface,
  6442. .config = iwl4965_mac_config,
  6443. .config_interface = iwl4965_mac_config_interface,
  6444. .configure_filter = iwl4965_configure_filter,
  6445. .set_key = iwl4965_mac_set_key,
  6446. .update_tkip_key = iwl4965_mac_update_tkip_key,
  6447. .get_stats = iwl4965_mac_get_stats,
  6448. .get_tx_stats = iwl4965_mac_get_tx_stats,
  6449. .conf_tx = iwl4965_mac_conf_tx,
  6450. .get_tsf = iwl4965_mac_get_tsf,
  6451. .reset_tsf = iwl4965_mac_reset_tsf,
  6452. .beacon_update = iwl4965_mac_beacon_update,
  6453. .bss_info_changed = iwl4965_bss_info_changed,
  6454. #ifdef CONFIG_IWL4965_HT
  6455. .ampdu_action = iwl4965_mac_ampdu_action,
  6456. #endif /* CONFIG_IWL4965_HT */
  6457. .hw_scan = iwl4965_mac_hw_scan
  6458. };
  6459. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6460. {
  6461. int err = 0;
  6462. struct iwl_priv *priv;
  6463. struct ieee80211_hw *hw;
  6464. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  6465. unsigned long flags;
  6466. DECLARE_MAC_BUF(mac);
  6467. /************************
  6468. * 1. Allocating HW data
  6469. ************************/
  6470. /* Disabling hardware scan means that mac80211 will perform scans
  6471. * "the hard way", rather than using device's scan. */
  6472. if (cfg->mod_params->disable_hw_scan) {
  6473. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6474. iwl4965_hw_ops.hw_scan = NULL;
  6475. }
  6476. hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
  6477. if (!hw) {
  6478. err = -ENOMEM;
  6479. goto out;
  6480. }
  6481. priv = hw->priv;
  6482. /* At this point both hw and priv are allocated. */
  6483. SET_IEEE80211_DEV(hw, &pdev->dev);
  6484. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6485. priv->cfg = cfg;
  6486. priv->pci_dev = pdev;
  6487. #ifdef CONFIG_IWLWIFI_DEBUG
  6488. iwl_debug_level = priv->cfg->mod_params->debug;
  6489. atomic_set(&priv->restrict_refcnt, 0);
  6490. #endif
  6491. /**************************
  6492. * 2. Initializing PCI bus
  6493. **************************/
  6494. if (pci_enable_device(pdev)) {
  6495. err = -ENODEV;
  6496. goto out_ieee80211_free_hw;
  6497. }
  6498. pci_set_master(pdev);
  6499. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6500. if (!err)
  6501. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6502. if (err) {
  6503. printk(KERN_WARNING DRV_NAME
  6504. ": No suitable DMA available.\n");
  6505. goto out_pci_disable_device;
  6506. }
  6507. err = pci_request_regions(pdev, DRV_NAME);
  6508. if (err)
  6509. goto out_pci_disable_device;
  6510. pci_set_drvdata(pdev, priv);
  6511. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6512. * PCI Tx retries from interfering with C3 CPU state */
  6513. pci_write_config_byte(pdev, 0x41, 0x00);
  6514. /***********************
  6515. * 3. Read REV register
  6516. ***********************/
  6517. priv->hw_base = pci_iomap(pdev, 0, 0);
  6518. if (!priv->hw_base) {
  6519. err = -ENODEV;
  6520. goto out_pci_release_regions;
  6521. }
  6522. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6523. (unsigned long long) pci_resource_len(pdev, 0));
  6524. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6525. printk(KERN_INFO DRV_NAME
  6526. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  6527. /*****************
  6528. * 4. Read EEPROM
  6529. *****************/
  6530. /* nic init */
  6531. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  6532. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  6533. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  6534. err = iwl_poll_bit(priv, CSR_GP_CNTRL,
  6535. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  6536. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  6537. if (err < 0) {
  6538. IWL_DEBUG_INFO("Failed to init the card\n");
  6539. goto out_iounmap;
  6540. }
  6541. /* Read the EEPROM */
  6542. err = iwl_eeprom_init(priv);
  6543. if (err) {
  6544. IWL_ERROR("Unable to init EEPROM\n");
  6545. goto out_iounmap;
  6546. }
  6547. /* MAC Address location in EEPROM same for 3945/4965 */
  6548. iwl_eeprom_get_mac(priv, priv->mac_addr);
  6549. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  6550. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6551. /************************
  6552. * 5. Setup HW constants
  6553. ************************/
  6554. /* Device-specific setup */
  6555. if (iwl4965_hw_set_hw_setting(priv)) {
  6556. IWL_ERROR("failed to set hw settings\n");
  6557. goto out_iounmap;
  6558. }
  6559. /*******************
  6560. * 6. Setup hw/priv
  6561. *******************/
  6562. err = iwl_setup(priv);
  6563. if (err)
  6564. goto out_unset_hw_settings;
  6565. /* At this point both hw and priv are initialized. */
  6566. /**********************************
  6567. * 7. Initialize module parameters
  6568. **********************************/
  6569. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6570. if (priv->cfg->mod_params->disable) {
  6571. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6572. IWL_DEBUG_INFO("Radio disabled.\n");
  6573. }
  6574. if (priv->cfg->mod_params->enable_qos)
  6575. priv->qos_data.qos_enable = 1;
  6576. /********************
  6577. * 8. Setup services
  6578. ********************/
  6579. spin_lock_irqsave(&priv->lock, flags);
  6580. iwl4965_disable_interrupts(priv);
  6581. spin_unlock_irqrestore(&priv->lock, flags);
  6582. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6583. if (err) {
  6584. IWL_ERROR("failed to create sysfs device attributes\n");
  6585. goto out_unset_hw_settings;
  6586. }
  6587. err = iwl_dbgfs_register(priv, DRV_NAME);
  6588. if (err) {
  6589. IWL_ERROR("failed to create debugfs files\n");
  6590. goto out_remove_sysfs;
  6591. }
  6592. iwl4965_setup_deferred_work(priv);
  6593. iwl4965_setup_rx_handlers(priv);
  6594. /********************
  6595. * 9. Conclude
  6596. ********************/
  6597. pci_save_state(pdev);
  6598. pci_disable_device(pdev);
  6599. /* notify iwlcore to init */
  6600. iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
  6601. return 0;
  6602. out_remove_sysfs:
  6603. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6604. out_unset_hw_settings:
  6605. iwl4965_unset_hw_setting(priv);
  6606. out_iounmap:
  6607. pci_iounmap(pdev, priv->hw_base);
  6608. out_pci_release_regions:
  6609. pci_release_regions(pdev);
  6610. pci_set_drvdata(pdev, NULL);
  6611. out_pci_disable_device:
  6612. pci_disable_device(pdev);
  6613. out_ieee80211_free_hw:
  6614. ieee80211_free_hw(priv->hw);
  6615. out:
  6616. return err;
  6617. }
  6618. static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
  6619. {
  6620. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6621. struct list_head *p, *q;
  6622. int i;
  6623. unsigned long flags;
  6624. if (!priv)
  6625. return;
  6626. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6627. if (priv->mac80211_registered) {
  6628. ieee80211_unregister_hw(priv->hw);
  6629. priv->mac80211_registered = 0;
  6630. }
  6631. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6632. iwl4965_down(priv);
  6633. /* make sure we flush any pending irq or
  6634. * tasklet for the driver
  6635. */
  6636. spin_lock_irqsave(&priv->lock, flags);
  6637. iwl4965_disable_interrupts(priv);
  6638. spin_unlock_irqrestore(&priv->lock, flags);
  6639. iwl_synchronize_irq(priv);
  6640. /* Free MAC hash list for ADHOC */
  6641. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  6642. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  6643. list_del(p);
  6644. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  6645. }
  6646. }
  6647. iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
  6648. iwl_dbgfs_unregister(priv);
  6649. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6650. iwl4965_dealloc_ucode_pci(priv);
  6651. if (priv->rxq.bd)
  6652. iwl4965_rx_queue_free(priv, &priv->rxq);
  6653. iwl4965_hw_txq_ctx_free(priv);
  6654. iwl4965_unset_hw_setting(priv);
  6655. iwlcore_clear_stations_table(priv);
  6656. /*netif_stop_queue(dev); */
  6657. flush_workqueue(priv->workqueue);
  6658. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  6659. * priv->workqueue... so we can't take down the workqueue
  6660. * until now... */
  6661. destroy_workqueue(priv->workqueue);
  6662. priv->workqueue = NULL;
  6663. pci_iounmap(pdev, priv->hw_base);
  6664. pci_release_regions(pdev);
  6665. pci_disable_device(pdev);
  6666. pci_set_drvdata(pdev, NULL);
  6667. iwl_free_channel_map(priv);
  6668. iwl4965_free_geos(priv);
  6669. if (priv->ibss_beacon)
  6670. dev_kfree_skb(priv->ibss_beacon);
  6671. ieee80211_free_hw(priv->hw);
  6672. }
  6673. #ifdef CONFIG_PM
  6674. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6675. {
  6676. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6677. if (priv->is_open) {
  6678. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6679. iwl4965_mac_stop(priv->hw);
  6680. priv->is_open = 1;
  6681. }
  6682. pci_set_power_state(pdev, PCI_D3hot);
  6683. return 0;
  6684. }
  6685. static int iwl4965_pci_resume(struct pci_dev *pdev)
  6686. {
  6687. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6688. pci_set_power_state(pdev, PCI_D0);
  6689. if (priv->is_open)
  6690. iwl4965_mac_start(priv->hw);
  6691. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6692. return 0;
  6693. }
  6694. #endif /* CONFIG_PM */
  6695. /*****************************************************************************
  6696. *
  6697. * driver and module entry point
  6698. *
  6699. *****************************************************************************/
  6700. static struct pci_driver iwl4965_driver = {
  6701. .name = DRV_NAME,
  6702. .id_table = iwl4965_hw_card_ids,
  6703. .probe = iwl4965_pci_probe,
  6704. .remove = __devexit_p(iwl4965_pci_remove),
  6705. #ifdef CONFIG_PM
  6706. .suspend = iwl4965_pci_suspend,
  6707. .resume = iwl4965_pci_resume,
  6708. #endif
  6709. };
  6710. static int __init iwl4965_init(void)
  6711. {
  6712. int ret;
  6713. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6714. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6715. ret = iwl4965_rate_control_register();
  6716. if (ret) {
  6717. IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
  6718. return ret;
  6719. }
  6720. ret = pci_register_driver(&iwl4965_driver);
  6721. if (ret) {
  6722. IWL_ERROR("Unable to initialize PCI module\n");
  6723. goto error_register;
  6724. }
  6725. #ifdef CONFIG_IWLWIFI_DEBUG
  6726. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6727. if (ret) {
  6728. IWL_ERROR("Unable to create driver sysfs file\n");
  6729. goto error_debug;
  6730. }
  6731. #endif
  6732. return ret;
  6733. #ifdef CONFIG_IWLWIFI_DEBUG
  6734. error_debug:
  6735. pci_unregister_driver(&iwl4965_driver);
  6736. #endif
  6737. error_register:
  6738. iwl4965_rate_control_unregister();
  6739. return ret;
  6740. }
  6741. static void __exit iwl4965_exit(void)
  6742. {
  6743. #ifdef CONFIG_IWLWIFI_DEBUG
  6744. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6745. #endif
  6746. pci_unregister_driver(&iwl4965_driver);
  6747. iwl4965_rate_control_unregister();
  6748. }
  6749. module_exit(iwl4965_exit);
  6750. module_init(iwl4965_init);