board-3430sdp.c 19 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/spi/ads7846.h>
  22. #include <linux/i2c/twl.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <plat/mcspi.h>
  31. #include <plat/board.h>
  32. #include <plat/usb.h>
  33. #include <plat/common.h>
  34. #include <plat/dma.h>
  35. #include <plat/gpmc.h>
  36. #include <plat/display.h>
  37. #include <plat/control.h>
  38. #include <plat/gpmc-smc91x.h>
  39. #include <mach/board-sdp.h>
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #define CONFIG_DISABLE_HFCLK 1
  44. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  45. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  46. #define ENABLE_VAUX3_DEDICATED 0x03
  47. #define ENABLE_VAUX3_DEV_GRP 0x20
  48. #define TWL4030_MSECURE_GPIO 22
  49. static int board_keymap[] = {
  50. KEY(0, 0, KEY_LEFT),
  51. KEY(0, 1, KEY_RIGHT),
  52. KEY(0, 2, KEY_A),
  53. KEY(0, 3, KEY_B),
  54. KEY(0, 4, KEY_C),
  55. KEY(1, 0, KEY_DOWN),
  56. KEY(1, 1, KEY_UP),
  57. KEY(1, 2, KEY_E),
  58. KEY(1, 3, KEY_F),
  59. KEY(1, 4, KEY_G),
  60. KEY(2, 0, KEY_ENTER),
  61. KEY(2, 1, KEY_I),
  62. KEY(2, 2, KEY_J),
  63. KEY(2, 3, KEY_K),
  64. KEY(2, 4, KEY_3),
  65. KEY(3, 0, KEY_M),
  66. KEY(3, 1, KEY_N),
  67. KEY(3, 2, KEY_O),
  68. KEY(3, 3, KEY_P),
  69. KEY(3, 4, KEY_Q),
  70. KEY(4, 0, KEY_R),
  71. KEY(4, 1, KEY_4),
  72. KEY(4, 2, KEY_T),
  73. KEY(4, 3, KEY_U),
  74. KEY(4, 4, KEY_D),
  75. KEY(5, 0, KEY_V),
  76. KEY(5, 1, KEY_W),
  77. KEY(5, 2, KEY_L),
  78. KEY(5, 3, KEY_S),
  79. KEY(5, 4, KEY_H),
  80. 0
  81. };
  82. static struct matrix_keymap_data board_map_data = {
  83. .keymap = board_keymap,
  84. .keymap_size = ARRAY_SIZE(board_keymap),
  85. };
  86. static struct twl4030_keypad_data sdp3430_kp_data = {
  87. .keymap_data = &board_map_data,
  88. .rows = 5,
  89. .cols = 6,
  90. .rep = 1,
  91. };
  92. static int ts_gpio; /* Needed for ads7846_get_pendown_state */
  93. /**
  94. * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
  95. *
  96. * @return - void. If request gpio fails then Flag KERN_ERR.
  97. */
  98. static void ads7846_dev_init(void)
  99. {
  100. if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
  101. printk(KERN_ERR "can't get ads746 pen down GPIO\n");
  102. return;
  103. }
  104. gpio_direction_input(ts_gpio);
  105. omap_set_gpio_debounce(ts_gpio, 1);
  106. omap_set_gpio_debounce_time(ts_gpio, 0xa);
  107. }
  108. static int ads7846_get_pendown_state(void)
  109. {
  110. return !gpio_get_value(ts_gpio);
  111. }
  112. static struct ads7846_platform_data tsc2046_config __initdata = {
  113. .get_pendown_state = ads7846_get_pendown_state,
  114. .keep_vref_on = 1,
  115. };
  116. static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
  117. .turbo_mode = 0,
  118. .single_channel = 1, /* 0: slave, 1: master */
  119. };
  120. static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
  121. [0] = {
  122. /*
  123. * TSC2046 operates at a max freqency of 2MHz, so
  124. * operate slightly below at 1.5MHz
  125. */
  126. .modalias = "ads7846",
  127. .bus_num = 1,
  128. .chip_select = 0,
  129. .max_speed_hz = 1500000,
  130. .controller_data = &tsc2046_mcspi_config,
  131. .irq = 0,
  132. .platform_data = &tsc2046_config,
  133. },
  134. };
  135. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  136. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  137. static unsigned backlight_gpio;
  138. static unsigned enable_gpio;
  139. static int lcd_enabled;
  140. static int dvi_enabled;
  141. static void __init sdp3430_display_init(void)
  142. {
  143. int r;
  144. enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
  145. backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
  146. r = gpio_request(enable_gpio, "LCD reset");
  147. if (r) {
  148. printk(KERN_ERR "failed to get LCD reset GPIO\n");
  149. goto err0;
  150. }
  151. r = gpio_request(backlight_gpio, "LCD Backlight");
  152. if (r) {
  153. printk(KERN_ERR "failed to get LCD backlight GPIO\n");
  154. goto err1;
  155. }
  156. gpio_direction_output(enable_gpio, 0);
  157. gpio_direction_output(backlight_gpio, 0);
  158. return;
  159. err1:
  160. gpio_free(enable_gpio);
  161. err0:
  162. return;
  163. }
  164. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  165. {
  166. if (dvi_enabled) {
  167. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  168. return -EINVAL;
  169. }
  170. gpio_direction_output(enable_gpio, 1);
  171. gpio_direction_output(backlight_gpio, 1);
  172. lcd_enabled = 1;
  173. return 0;
  174. }
  175. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  176. {
  177. lcd_enabled = 0;
  178. gpio_direction_output(enable_gpio, 0);
  179. gpio_direction_output(backlight_gpio, 0);
  180. }
  181. static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
  182. {
  183. if (lcd_enabled) {
  184. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  185. return -EINVAL;
  186. }
  187. dvi_enabled = 1;
  188. return 0;
  189. }
  190. static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
  191. {
  192. dvi_enabled = 0;
  193. }
  194. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  195. {
  196. return 0;
  197. }
  198. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  199. {
  200. }
  201. static struct omap_dss_device sdp3430_lcd_device = {
  202. .name = "lcd",
  203. .driver_name = "sharp_ls_panel",
  204. .type = OMAP_DISPLAY_TYPE_DPI,
  205. .phy.dpi.data_lines = 16,
  206. .platform_enable = sdp3430_panel_enable_lcd,
  207. .platform_disable = sdp3430_panel_disable_lcd,
  208. };
  209. static struct omap_dss_device sdp3430_dvi_device = {
  210. .name = "dvi",
  211. .driver_name = "generic_panel",
  212. .type = OMAP_DISPLAY_TYPE_DPI,
  213. .phy.dpi.data_lines = 24,
  214. .platform_enable = sdp3430_panel_enable_dvi,
  215. .platform_disable = sdp3430_panel_disable_dvi,
  216. };
  217. static struct omap_dss_device sdp3430_tv_device = {
  218. .name = "tv",
  219. .driver_name = "venc",
  220. .type = OMAP_DISPLAY_TYPE_VENC,
  221. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  222. .platform_enable = sdp3430_panel_enable_tv,
  223. .platform_disable = sdp3430_panel_disable_tv,
  224. };
  225. static struct omap_dss_device *sdp3430_dss_devices[] = {
  226. &sdp3430_lcd_device,
  227. &sdp3430_dvi_device,
  228. &sdp3430_tv_device,
  229. };
  230. static struct omap_dss_board_info sdp3430_dss_data = {
  231. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  232. .devices = sdp3430_dss_devices,
  233. .default_device = &sdp3430_lcd_device,
  234. };
  235. static struct platform_device sdp3430_dss_device = {
  236. .name = "omapdss",
  237. .id = -1,
  238. .dev = {
  239. .platform_data = &sdp3430_dss_data,
  240. },
  241. };
  242. static struct regulator_consumer_supply sdp3430_vdda_dac_supply = {
  243. .supply = "vdda_dac",
  244. .dev = &sdp3430_dss_device.dev,
  245. };
  246. static struct platform_device *sdp3430_devices[] __initdata = {
  247. &sdp3430_dss_device,
  248. };
  249. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  250. };
  251. static void __init omap_3430sdp_init_irq(void)
  252. {
  253. omap_board_config = sdp3430_config;
  254. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  255. omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
  256. omap_init_irq();
  257. omap_gpio_init();
  258. }
  259. static int sdp3430_batt_table[] = {
  260. /* 0 C*/
  261. 30800, 29500, 28300, 27100,
  262. 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
  263. 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
  264. 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
  265. 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
  266. 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
  267. 4040, 3910, 3790, 3670, 3550
  268. };
  269. static struct twl4030_bci_platform_data sdp3430_bci_data = {
  270. .battery_tmp_tbl = sdp3430_batt_table,
  271. .tblsize = ARRAY_SIZE(sdp3430_batt_table),
  272. };
  273. static struct omap2_hsmmc_info mmc[] = {
  274. {
  275. .mmc = 1,
  276. /* 8 bits (default) requires S6.3 == ON,
  277. * so the SIM card isn't used; else 4 bits.
  278. */
  279. .wires = 8,
  280. .gpio_wp = 4,
  281. },
  282. {
  283. .mmc = 2,
  284. .wires = 8,
  285. .gpio_wp = 7,
  286. },
  287. {} /* Terminator */
  288. };
  289. static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
  290. .supply = "vmmc",
  291. };
  292. static struct regulator_consumer_supply sdp3430_vsim_supply = {
  293. .supply = "vmmc_aux",
  294. };
  295. static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
  296. .supply = "vmmc",
  297. };
  298. static int sdp3430_twl_gpio_setup(struct device *dev,
  299. unsigned gpio, unsigned ngpio)
  300. {
  301. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  302. * gpio + 1 is "mmc1_cd" (input/IRQ)
  303. */
  304. mmc[0].gpio_cd = gpio + 0;
  305. mmc[1].gpio_cd = gpio + 1;
  306. omap2_hsmmc_init(mmc);
  307. /* link regulators to MMC adapters ... we "know" the
  308. * regulators will be set up only *after* we return.
  309. */
  310. sdp3430_vmmc1_supply.dev = mmc[0].dev;
  311. sdp3430_vsim_supply.dev = mmc[0].dev;
  312. sdp3430_vmmc2_supply.dev = mmc[1].dev;
  313. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  314. gpio_request(gpio + 7, "sub_lcd_en_bkl");
  315. gpio_direction_output(gpio + 7, 0);
  316. /* gpio + 15 is "sub_lcd_nRST" (output) */
  317. gpio_request(gpio + 15, "sub_lcd_nRST");
  318. gpio_direction_output(gpio + 15, 0);
  319. return 0;
  320. }
  321. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  322. .gpio_base = OMAP_MAX_GPIO_LINES,
  323. .irq_base = TWL4030_GPIO_IRQ_BASE,
  324. .irq_end = TWL4030_GPIO_IRQ_END,
  325. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  326. | BIT(16) | BIT(17),
  327. .setup = sdp3430_twl_gpio_setup,
  328. };
  329. static struct twl4030_usb_data sdp3430_usb_data = {
  330. .usb_mode = T2_USB_MODE_ULPI,
  331. };
  332. static struct twl4030_madc_platform_data sdp3430_madc_data = {
  333. .irq_line = 1,
  334. };
  335. /*
  336. * Apply all the fixed voltages since most versions of U-Boot
  337. * don't bother with that initialization.
  338. */
  339. /* VAUX1 for mainboard (irda and sub-lcd) */
  340. static struct regulator_init_data sdp3430_vaux1 = {
  341. .constraints = {
  342. .min_uV = 2800000,
  343. .max_uV = 2800000,
  344. .apply_uV = true,
  345. .valid_modes_mask = REGULATOR_MODE_NORMAL
  346. | REGULATOR_MODE_STANDBY,
  347. .valid_ops_mask = REGULATOR_CHANGE_MODE
  348. | REGULATOR_CHANGE_STATUS,
  349. },
  350. };
  351. /* VAUX2 for camera module */
  352. static struct regulator_init_data sdp3430_vaux2 = {
  353. .constraints = {
  354. .min_uV = 2800000,
  355. .max_uV = 2800000,
  356. .apply_uV = true,
  357. .valid_modes_mask = REGULATOR_MODE_NORMAL
  358. | REGULATOR_MODE_STANDBY,
  359. .valid_ops_mask = REGULATOR_CHANGE_MODE
  360. | REGULATOR_CHANGE_STATUS,
  361. },
  362. };
  363. /* VAUX3 for LCD board */
  364. static struct regulator_init_data sdp3430_vaux3 = {
  365. .constraints = {
  366. .min_uV = 2800000,
  367. .max_uV = 2800000,
  368. .apply_uV = true,
  369. .valid_modes_mask = REGULATOR_MODE_NORMAL
  370. | REGULATOR_MODE_STANDBY,
  371. .valid_ops_mask = REGULATOR_CHANGE_MODE
  372. | REGULATOR_CHANGE_STATUS,
  373. },
  374. };
  375. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  376. static struct regulator_init_data sdp3430_vaux4 = {
  377. .constraints = {
  378. .min_uV = 1800000,
  379. .max_uV = 1800000,
  380. .apply_uV = true,
  381. .valid_modes_mask = REGULATOR_MODE_NORMAL
  382. | REGULATOR_MODE_STANDBY,
  383. .valid_ops_mask = REGULATOR_CHANGE_MODE
  384. | REGULATOR_CHANGE_STATUS,
  385. },
  386. };
  387. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  388. static struct regulator_init_data sdp3430_vmmc1 = {
  389. .constraints = {
  390. .min_uV = 1850000,
  391. .max_uV = 3150000,
  392. .valid_modes_mask = REGULATOR_MODE_NORMAL
  393. | REGULATOR_MODE_STANDBY,
  394. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  395. | REGULATOR_CHANGE_MODE
  396. | REGULATOR_CHANGE_STATUS,
  397. },
  398. .num_consumer_supplies = 1,
  399. .consumer_supplies = &sdp3430_vmmc1_supply,
  400. };
  401. /* VMMC2 for MMC2 card */
  402. static struct regulator_init_data sdp3430_vmmc2 = {
  403. .constraints = {
  404. .min_uV = 1850000,
  405. .max_uV = 1850000,
  406. .apply_uV = true,
  407. .valid_modes_mask = REGULATOR_MODE_NORMAL
  408. | REGULATOR_MODE_STANDBY,
  409. .valid_ops_mask = REGULATOR_CHANGE_MODE
  410. | REGULATOR_CHANGE_STATUS,
  411. },
  412. .num_consumer_supplies = 1,
  413. .consumer_supplies = &sdp3430_vmmc2_supply,
  414. };
  415. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  416. static struct regulator_init_data sdp3430_vsim = {
  417. .constraints = {
  418. .min_uV = 1800000,
  419. .max_uV = 3000000,
  420. .valid_modes_mask = REGULATOR_MODE_NORMAL
  421. | REGULATOR_MODE_STANDBY,
  422. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  423. | REGULATOR_CHANGE_MODE
  424. | REGULATOR_CHANGE_STATUS,
  425. },
  426. .num_consumer_supplies = 1,
  427. .consumer_supplies = &sdp3430_vsim_supply,
  428. };
  429. /* VDAC for DSS driving S-Video */
  430. static struct regulator_init_data sdp3430_vdac = {
  431. .constraints = {
  432. .min_uV = 1800000,
  433. .max_uV = 1800000,
  434. .apply_uV = true,
  435. .valid_modes_mask = REGULATOR_MODE_NORMAL
  436. | REGULATOR_MODE_STANDBY,
  437. .valid_ops_mask = REGULATOR_CHANGE_MODE
  438. | REGULATOR_CHANGE_STATUS,
  439. },
  440. .num_consumer_supplies = 1,
  441. .consumer_supplies = &sdp3430_vdda_dac_supply,
  442. };
  443. /* VPLL2 for digital video outputs */
  444. static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
  445. {
  446. .supply = "vdvi",
  447. .dev = &sdp3430_lcd_device.dev,
  448. },
  449. {
  450. .supply = "vdds_dsi",
  451. .dev = &sdp3430_dss_device.dev,
  452. }
  453. };
  454. static struct regulator_init_data sdp3430_vpll2 = {
  455. .constraints = {
  456. .name = "VDVI",
  457. .min_uV = 1800000,
  458. .max_uV = 1800000,
  459. .apply_uV = true,
  460. .valid_modes_mask = REGULATOR_MODE_NORMAL
  461. | REGULATOR_MODE_STANDBY,
  462. .valid_ops_mask = REGULATOR_CHANGE_MODE
  463. | REGULATOR_CHANGE_STATUS,
  464. },
  465. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
  466. .consumer_supplies = sdp3430_vpll2_supplies,
  467. };
  468. static struct twl4030_codec_audio_data sdp3430_audio = {
  469. .audio_mclk = 26000000,
  470. };
  471. static struct twl4030_codec_data sdp3430_codec = {
  472. .audio_mclk = 26000000,
  473. .audio = &sdp3430_audio,
  474. };
  475. static struct twl4030_platform_data sdp3430_twldata = {
  476. .irq_base = TWL4030_IRQ_BASE,
  477. .irq_end = TWL4030_IRQ_END,
  478. /* platform_data for children goes here */
  479. .bci = &sdp3430_bci_data,
  480. .gpio = &sdp3430_gpio_data,
  481. .madc = &sdp3430_madc_data,
  482. .keypad = &sdp3430_kp_data,
  483. .usb = &sdp3430_usb_data,
  484. .codec = &sdp3430_codec,
  485. .vaux1 = &sdp3430_vaux1,
  486. .vaux2 = &sdp3430_vaux2,
  487. .vaux3 = &sdp3430_vaux3,
  488. .vaux4 = &sdp3430_vaux4,
  489. .vmmc1 = &sdp3430_vmmc1,
  490. .vmmc2 = &sdp3430_vmmc2,
  491. .vsim = &sdp3430_vsim,
  492. .vdac = &sdp3430_vdac,
  493. .vpll2 = &sdp3430_vpll2,
  494. };
  495. static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
  496. {
  497. I2C_BOARD_INFO("twl4030", 0x48),
  498. .flags = I2C_CLIENT_WAKE,
  499. .irq = INT_34XX_SYS_NIRQ,
  500. .platform_data = &sdp3430_twldata,
  501. },
  502. };
  503. static int __init omap3430_i2c_init(void)
  504. {
  505. /* i2c1 for PMIC only */
  506. omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
  507. ARRAY_SIZE(sdp3430_i2c_boardinfo));
  508. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  509. omap_register_i2c_bus(2, 400, NULL, 0);
  510. /* i2c3 on display connector (for DVI, tfp410) */
  511. omap_register_i2c_bus(3, 400, NULL, 0);
  512. return 0;
  513. }
  514. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  515. static struct omap_smc91x_platform_data board_smc91x_data = {
  516. .cs = 3,
  517. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  518. IORESOURCE_IRQ_LOWLEVEL,
  519. };
  520. static void __init board_smc91x_init(void)
  521. {
  522. if (omap_rev() > OMAP3430_REV_ES1_0)
  523. board_smc91x_data.gpio_irq = 6;
  524. else
  525. board_smc91x_data.gpio_irq = 29;
  526. gpmc_smc91x_init(&board_smc91x_data);
  527. }
  528. #else
  529. static inline void board_smc91x_init(void)
  530. {
  531. }
  532. #endif
  533. static void enable_board_wakeup_source(void)
  534. {
  535. /* T2 interrupt line (keypad) */
  536. omap_mux_init_signal("sys_nirq",
  537. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  538. }
  539. static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
  540. .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
  541. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  542. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  543. .phy_reset = true,
  544. .reset_gpio_port[0] = 57,
  545. .reset_gpio_port[1] = 61,
  546. .reset_gpio_port[2] = -EINVAL
  547. };
  548. #ifdef CONFIG_OMAP_MUX
  549. static struct omap_board_mux board_mux[] __initdata = {
  550. { .reg_offset = OMAP_MUX_TERMINATOR },
  551. };
  552. #else
  553. #define board_mux NULL
  554. #endif
  555. static struct mtd_partition sdp_nor_partitions[] = {
  556. /* bootloader (U-Boot, etc) in first sector */
  557. {
  558. .name = "Bootloader-NOR",
  559. .offset = 0,
  560. .size = SZ_256K,
  561. .mask_flags = MTD_WRITEABLE, /* force read-only */
  562. },
  563. /* bootloader params in the next sector */
  564. {
  565. .name = "Params-NOR",
  566. .offset = MTDPART_OFS_APPEND,
  567. .size = SZ_256K,
  568. .mask_flags = 0,
  569. },
  570. /* kernel */
  571. {
  572. .name = "Kernel-NOR",
  573. .offset = MTDPART_OFS_APPEND,
  574. .size = SZ_2M,
  575. .mask_flags = 0
  576. },
  577. /* file system */
  578. {
  579. .name = "Filesystem-NOR",
  580. .offset = MTDPART_OFS_APPEND,
  581. .size = MTDPART_SIZ_FULL,
  582. .mask_flags = 0
  583. }
  584. };
  585. static struct mtd_partition sdp_onenand_partitions[] = {
  586. {
  587. .name = "X-Loader-OneNAND",
  588. .offset = 0,
  589. .size = 4 * (64 * 2048),
  590. .mask_flags = MTD_WRITEABLE /* force read-only */
  591. },
  592. {
  593. .name = "U-Boot-OneNAND",
  594. .offset = MTDPART_OFS_APPEND,
  595. .size = 2 * (64 * 2048),
  596. .mask_flags = MTD_WRITEABLE /* force read-only */
  597. },
  598. {
  599. .name = "U-Boot Environment-OneNAND",
  600. .offset = MTDPART_OFS_APPEND,
  601. .size = 1 * (64 * 2048),
  602. },
  603. {
  604. .name = "Kernel-OneNAND",
  605. .offset = MTDPART_OFS_APPEND,
  606. .size = 16 * (64 * 2048),
  607. },
  608. {
  609. .name = "File System-OneNAND",
  610. .offset = MTDPART_OFS_APPEND,
  611. .size = MTDPART_SIZ_FULL,
  612. },
  613. };
  614. static struct mtd_partition sdp_nand_partitions[] = {
  615. /* All the partition sizes are listed in terms of NAND block size */
  616. {
  617. .name = "X-Loader-NAND",
  618. .offset = 0,
  619. .size = 4 * (64 * 2048),
  620. .mask_flags = MTD_WRITEABLE, /* force read-only */
  621. },
  622. {
  623. .name = "U-Boot-NAND",
  624. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  625. .size = 10 * (64 * 2048),
  626. .mask_flags = MTD_WRITEABLE, /* force read-only */
  627. },
  628. {
  629. .name = "Boot Env-NAND",
  630. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  631. .size = 6 * (64 * 2048),
  632. },
  633. {
  634. .name = "Kernel-NAND",
  635. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  636. .size = 40 * (64 * 2048),
  637. },
  638. {
  639. .name = "File System - NAND",
  640. .size = MTDPART_SIZ_FULL,
  641. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  642. },
  643. };
  644. static struct flash_partitions sdp_flash_partitions[] = {
  645. {
  646. .parts = sdp_nor_partitions,
  647. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  648. },
  649. {
  650. .parts = sdp_onenand_partitions,
  651. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  652. },
  653. {
  654. .parts = sdp_nand_partitions,
  655. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  656. },
  657. };
  658. static void __init omap_3430sdp_init(void)
  659. {
  660. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  661. omap3430_i2c_init();
  662. platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
  663. if (omap_rev() > OMAP3430_REV_ES1_0)
  664. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
  665. else
  666. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
  667. sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
  668. spi_register_board_info(sdp3430_spi_board_info,
  669. ARRAY_SIZE(sdp3430_spi_board_info));
  670. ads7846_dev_init();
  671. omap_serial_init();
  672. usb_musb_init();
  673. board_smc91x_init();
  674. sdp_flash_init(sdp_flash_partitions);
  675. sdp3430_display_init();
  676. enable_board_wakeup_source();
  677. usb_ehci_init(&ehci_pdata);
  678. }
  679. static void __init omap_3430sdp_map_io(void)
  680. {
  681. omap2_set_globals_343x();
  682. omap34xx_map_common_io();
  683. }
  684. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  685. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  686. .phys_io = 0x48000000,
  687. .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
  688. .boot_params = 0x80000100,
  689. .map_io = omap_3430sdp_map_io,
  690. .init_irq = omap_3430sdp_init_irq,
  691. .init_machine = omap_3430sdp_init,
  692. .timer = &omap_timer,
  693. MACHINE_END