iwl3945-base.c 240 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/etherdevice.h>
  50. #include <linux/if_arp.h>
  51. #include <net/ieee80211_radiotap.h>
  52. #include <net/mac80211.h>
  53. #include <asm/div64.h>
  54. #define IWL 3945
  55. #include "iwlwifi.h"
  56. #include "iwl-3945.h"
  57. #include "iwl-helpers.h"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. u32 iwl_debug_level;
  60. #endif
  61. /******************************************************************************
  62. *
  63. * module boiler plate
  64. *
  65. ******************************************************************************/
  66. /* module parameters */
  67. int iwl_param_disable_hw_scan;
  68. int iwl_param_debug;
  69. int iwl_param_disable; /* def: enable radio */
  70. int iwl_param_antenna; /* def: 0 = both antennas (use diversity) */
  71. int iwl_param_hwcrypto; /* def: using software encryption */
  72. int iwl_param_qos_enable = 1;
  73. int iwl_param_queues_num = IWL_MAX_NUM_QUEUES;
  74. /*
  75. * module name, copyright, version, etc.
  76. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  77. */
  78. #define DRV_DESCRIPTION \
  79. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  80. #ifdef CONFIG_IWLWIFI_DEBUG
  81. #define VD "d"
  82. #else
  83. #define VD
  84. #endif
  85. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  86. #define VS "s"
  87. #else
  88. #define VS
  89. #endif
  90. #define IWLWIFI_VERSION "1.1.17k" VD VS
  91. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  92. #define DRV_VERSION IWLWIFI_VERSION
  93. /* Change firmware file name, using "-" and incrementing number,
  94. * *only* when uCode interface or architecture changes so that it
  95. * is not compatible with earlier drivers.
  96. * This number will also appear in << 8 position of 1st dword of uCode file */
  97. #define IWL3945_UCODE_API "-1"
  98. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  99. MODULE_VERSION(DRV_VERSION);
  100. MODULE_AUTHOR(DRV_COPYRIGHT);
  101. MODULE_LICENSE("GPL");
  102. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  103. {
  104. u16 fc = le16_to_cpu(hdr->frame_control);
  105. int hdr_len = ieee80211_get_hdrlen(fc);
  106. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  107. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  108. return NULL;
  109. }
  110. static const struct ieee80211_hw_mode *iwl_get_hw_mode(
  111. struct iwl_priv *priv, int mode)
  112. {
  113. int i;
  114. for (i = 0; i < 3; i++)
  115. if (priv->modes[i].mode == mode)
  116. return &priv->modes[i];
  117. return NULL;
  118. }
  119. static int iwl_is_empty_essid(const char *essid, int essid_len)
  120. {
  121. /* Single white space is for Linksys APs */
  122. if (essid_len == 1 && essid[0] == ' ')
  123. return 1;
  124. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  125. while (essid_len) {
  126. essid_len--;
  127. if (essid[essid_len] != '\0')
  128. return 0;
  129. }
  130. return 1;
  131. }
  132. static const char *iwl_escape_essid(const char *essid, u8 essid_len)
  133. {
  134. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  135. const char *s = essid;
  136. char *d = escaped;
  137. if (iwl_is_empty_essid(essid, essid_len)) {
  138. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  139. return escaped;
  140. }
  141. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  142. while (essid_len--) {
  143. if (*s == '\0') {
  144. *d++ = '\\';
  145. *d++ = '0';
  146. s++;
  147. } else
  148. *d++ = *s++;
  149. }
  150. *d = '\0';
  151. return escaped;
  152. }
  153. static void iwl_print_hex_dump(int level, void *p, u32 len)
  154. {
  155. #ifdef CONFIG_IWLWIFI_DEBUG
  156. if (!(iwl_debug_level & level))
  157. return;
  158. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  159. p, len, 1);
  160. #endif
  161. }
  162. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  163. * DMA services
  164. *
  165. * Theory of operation
  166. *
  167. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  168. * 2 empty entries always kept in the buffer to protect from overflow.
  169. *
  170. * For Tx queue, there are low mark and high mark limits. If, after queuing
  171. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  172. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  173. * Tx queue resumed.
  174. *
  175. * The IWL operates with six queues, one receive queue in the device's
  176. * sram, one transmit queue for sending commands to the device firmware,
  177. * and four transmit queues for data.
  178. ***************************************************/
  179. static int iwl_queue_space(const struct iwl_queue *q)
  180. {
  181. int s = q->last_used - q->first_empty;
  182. if (q->last_used > q->first_empty)
  183. s -= q->n_bd;
  184. if (s <= 0)
  185. s += q->n_window;
  186. /* keep some reserve to not confuse empty and full situations */
  187. s -= 2;
  188. if (s < 0)
  189. s = 0;
  190. return s;
  191. }
  192. /* XXX: n_bd must be power-of-two size */
  193. static inline int iwl_queue_inc_wrap(int index, int n_bd)
  194. {
  195. return ++index & (n_bd - 1);
  196. }
  197. /* XXX: n_bd must be power-of-two size */
  198. static inline int iwl_queue_dec_wrap(int index, int n_bd)
  199. {
  200. return --index & (n_bd - 1);
  201. }
  202. static inline int x2_queue_used(const struct iwl_queue *q, int i)
  203. {
  204. return q->first_empty > q->last_used ?
  205. (i >= q->last_used && i < q->first_empty) :
  206. !(i < q->last_used && i >= q->first_empty);
  207. }
  208. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  209. {
  210. if (is_huge)
  211. return q->n_window;
  212. return index & (q->n_window - 1);
  213. }
  214. static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  215. int count, int slots_num, u32 id)
  216. {
  217. q->n_bd = count;
  218. q->n_window = slots_num;
  219. q->id = id;
  220. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  221. * and iwl_queue_dec_wrap are broken. */
  222. BUG_ON(!is_power_of_2(count));
  223. /* slots_num must be power-of-two size, otherwise
  224. * get_cmd_index is broken. */
  225. BUG_ON(!is_power_of_2(slots_num));
  226. q->low_mark = q->n_window / 4;
  227. if (q->low_mark < 4)
  228. q->low_mark = 4;
  229. q->high_mark = q->n_window / 8;
  230. if (q->high_mark < 2)
  231. q->high_mark = 2;
  232. q->first_empty = q->last_used = 0;
  233. return 0;
  234. }
  235. static int iwl_tx_queue_alloc(struct iwl_priv *priv,
  236. struct iwl_tx_queue *txq, u32 id)
  237. {
  238. struct pci_dev *dev = priv->pci_dev;
  239. if (id != IWL_CMD_QUEUE_NUM) {
  240. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  241. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  242. if (!txq->txb) {
  243. IWL_ERROR("kmalloc for auxilary BD "
  244. "structures failed\n");
  245. goto error;
  246. }
  247. } else
  248. txq->txb = NULL;
  249. txq->bd = pci_alloc_consistent(dev,
  250. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  251. &txq->q.dma_addr);
  252. if (!txq->bd) {
  253. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  254. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  255. goto error;
  256. }
  257. txq->q.id = id;
  258. return 0;
  259. error:
  260. if (txq->txb) {
  261. kfree(txq->txb);
  262. txq->txb = NULL;
  263. }
  264. return -ENOMEM;
  265. }
  266. int iwl_tx_queue_init(struct iwl_priv *priv,
  267. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  268. {
  269. struct pci_dev *dev = priv->pci_dev;
  270. int len;
  271. int rc = 0;
  272. /* alocate command space + one big command for scan since scan
  273. * command is very huge the system will not have two scan at the
  274. * same time */
  275. len = sizeof(struct iwl_cmd) * slots_num;
  276. if (txq_id == IWL_CMD_QUEUE_NUM)
  277. len += IWL_MAX_SCAN_SIZE;
  278. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  279. if (!txq->cmd)
  280. return -ENOMEM;
  281. rc = iwl_tx_queue_alloc(priv, txq, txq_id);
  282. if (rc) {
  283. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  284. return -ENOMEM;
  285. }
  286. txq->need_update = 0;
  287. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  288. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  289. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  290. iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  291. iwl_hw_tx_queue_init(priv, txq);
  292. return 0;
  293. }
  294. /**
  295. * iwl_tx_queue_free - Deallocate DMA queue.
  296. * @txq: Transmit queue to deallocate.
  297. *
  298. * Empty queue by removing and destroying all BD's.
  299. * Free all buffers. txq itself is not freed.
  300. *
  301. */
  302. void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  303. {
  304. struct iwl_queue *q = &txq->q;
  305. struct pci_dev *dev = priv->pci_dev;
  306. int len;
  307. if (q->n_bd == 0)
  308. return;
  309. /* first, empty all BD's */
  310. for (; q->first_empty != q->last_used;
  311. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
  312. iwl_hw_txq_free_tfd(priv, txq);
  313. len = sizeof(struct iwl_cmd) * q->n_window;
  314. if (q->id == IWL_CMD_QUEUE_NUM)
  315. len += IWL_MAX_SCAN_SIZE;
  316. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  317. /* free buffers belonging to queue itself */
  318. if (txq->q.n_bd)
  319. pci_free_consistent(dev, sizeof(struct iwl_tfd_frame) *
  320. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  321. if (txq->txb) {
  322. kfree(txq->txb);
  323. txq->txb = NULL;
  324. }
  325. /* 0 fill whole structure */
  326. memset(txq, 0, sizeof(*txq));
  327. }
  328. const u8 BROADCAST_ADDR[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  329. /*************** STATION TABLE MANAGEMENT ****
  330. *
  331. * NOTE: This needs to be overhauled to better synchronize between
  332. * how the iwl-4965.c is using iwl_hw_find_station vs. iwl-3945.c
  333. *
  334. * mac80211 should also be examined to determine if sta_info is duplicating
  335. * the functionality provided here
  336. */
  337. /**************************************************************/
  338. #if 0 /* temparary disable till we add real remove station */
  339. static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  340. {
  341. int index = IWL_INVALID_STATION;
  342. int i;
  343. unsigned long flags;
  344. spin_lock_irqsave(&priv->sta_lock, flags);
  345. if (is_ap)
  346. index = IWL_AP_ID;
  347. else if (is_broadcast_ether_addr(addr))
  348. index = priv->hw_setting.bcast_sta_id;
  349. else
  350. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  351. if (priv->stations[i].used &&
  352. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  353. addr)) {
  354. index = i;
  355. break;
  356. }
  357. if (unlikely(index == IWL_INVALID_STATION))
  358. goto out;
  359. if (priv->stations[index].used) {
  360. priv->stations[index].used = 0;
  361. priv->num_stations--;
  362. }
  363. BUG_ON(priv->num_stations < 0);
  364. out:
  365. spin_unlock_irqrestore(&priv->sta_lock, flags);
  366. return 0;
  367. }
  368. #endif
  369. static void iwl_clear_stations_table(struct iwl_priv *priv)
  370. {
  371. unsigned long flags;
  372. spin_lock_irqsave(&priv->sta_lock, flags);
  373. priv->num_stations = 0;
  374. memset(priv->stations, 0, sizeof(priv->stations));
  375. spin_unlock_irqrestore(&priv->sta_lock, flags);
  376. }
  377. u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  378. {
  379. int i;
  380. int index = IWL_INVALID_STATION;
  381. struct iwl_station_entry *station;
  382. unsigned long flags_spin;
  383. DECLARE_MAC_BUF(mac);
  384. u8 rate;
  385. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  386. if (is_ap)
  387. index = IWL_AP_ID;
  388. else if (is_broadcast_ether_addr(addr))
  389. index = priv->hw_setting.bcast_sta_id;
  390. else
  391. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  392. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  393. addr)) {
  394. index = i;
  395. break;
  396. }
  397. if (!priv->stations[i].used &&
  398. index == IWL_INVALID_STATION)
  399. index = i;
  400. }
  401. /* These twh conditions has the same outcome but keep them separate
  402. since they have different meaning */
  403. if (unlikely(index == IWL_INVALID_STATION)) {
  404. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  405. return index;
  406. }
  407. if (priv->stations[index].used &&
  408. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  409. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  410. return index;
  411. }
  412. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  413. station = &priv->stations[index];
  414. station->used = 1;
  415. priv->num_stations++;
  416. memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd));
  417. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  418. station->sta.mode = 0;
  419. station->sta.sta.sta_id = index;
  420. station->sta.station_flags = 0;
  421. rate = (priv->phymode == MODE_IEEE80211A) ? IWL_RATE_6M_PLCP :
  422. IWL_RATE_1M_PLCP | priv->hw_setting.cck_flag;
  423. /* Turn on both antennas for the station... */
  424. station->sta.rate_n_flags =
  425. iwl_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  426. station->current_rate.rate_n_flags =
  427. le16_to_cpu(station->sta.rate_n_flags);
  428. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  429. iwl_send_add_station(priv, &station->sta, flags);
  430. return index;
  431. }
  432. /*************** DRIVER STATUS FUNCTIONS *****/
  433. static inline int iwl_is_ready(struct iwl_priv *priv)
  434. {
  435. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  436. * set but EXIT_PENDING is not */
  437. return test_bit(STATUS_READY, &priv->status) &&
  438. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  439. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  440. }
  441. static inline int iwl_is_alive(struct iwl_priv *priv)
  442. {
  443. return test_bit(STATUS_ALIVE, &priv->status);
  444. }
  445. static inline int iwl_is_init(struct iwl_priv *priv)
  446. {
  447. return test_bit(STATUS_INIT, &priv->status);
  448. }
  449. static inline int iwl_is_rfkill(struct iwl_priv *priv)
  450. {
  451. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  452. test_bit(STATUS_RF_KILL_SW, &priv->status);
  453. }
  454. static inline int iwl_is_ready_rf(struct iwl_priv *priv)
  455. {
  456. if (iwl_is_rfkill(priv))
  457. return 0;
  458. return iwl_is_ready(priv);
  459. }
  460. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  461. #define IWL_CMD(x) case x : return #x
  462. static const char *get_cmd_string(u8 cmd)
  463. {
  464. switch (cmd) {
  465. IWL_CMD(REPLY_ALIVE);
  466. IWL_CMD(REPLY_ERROR);
  467. IWL_CMD(REPLY_RXON);
  468. IWL_CMD(REPLY_RXON_ASSOC);
  469. IWL_CMD(REPLY_QOS_PARAM);
  470. IWL_CMD(REPLY_RXON_TIMING);
  471. IWL_CMD(REPLY_ADD_STA);
  472. IWL_CMD(REPLY_REMOVE_STA);
  473. IWL_CMD(REPLY_REMOVE_ALL_STA);
  474. IWL_CMD(REPLY_3945_RX);
  475. IWL_CMD(REPLY_TX);
  476. IWL_CMD(REPLY_RATE_SCALE);
  477. IWL_CMD(REPLY_LEDS_CMD);
  478. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  479. IWL_CMD(RADAR_NOTIFICATION);
  480. IWL_CMD(REPLY_QUIET_CMD);
  481. IWL_CMD(REPLY_CHANNEL_SWITCH);
  482. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  483. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  484. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  485. IWL_CMD(POWER_TABLE_CMD);
  486. IWL_CMD(PM_SLEEP_NOTIFICATION);
  487. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  488. IWL_CMD(REPLY_SCAN_CMD);
  489. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  490. IWL_CMD(SCAN_START_NOTIFICATION);
  491. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  492. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  493. IWL_CMD(BEACON_NOTIFICATION);
  494. IWL_CMD(REPLY_TX_BEACON);
  495. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  496. IWL_CMD(QUIET_NOTIFICATION);
  497. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  498. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  499. IWL_CMD(REPLY_BT_CONFIG);
  500. IWL_CMD(REPLY_STATISTICS_CMD);
  501. IWL_CMD(STATISTICS_NOTIFICATION);
  502. IWL_CMD(REPLY_CARD_STATE_CMD);
  503. IWL_CMD(CARD_STATE_NOTIFICATION);
  504. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  505. default:
  506. return "UNKNOWN";
  507. }
  508. }
  509. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  510. /**
  511. * iwl_enqueue_hcmd - enqueue a uCode command
  512. * @priv: device private data point
  513. * @cmd: a point to the ucode command structure
  514. *
  515. * The function returns < 0 values to indicate the operation is
  516. * failed. On success, it turns the index (> 0) of command in the
  517. * command queue.
  518. */
  519. static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  520. {
  521. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  522. struct iwl_queue *q = &txq->q;
  523. struct iwl_tfd_frame *tfd;
  524. u32 *control_flags;
  525. struct iwl_cmd *out_cmd;
  526. u32 idx;
  527. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  528. dma_addr_t phys_addr;
  529. int pad;
  530. u16 count;
  531. int ret;
  532. unsigned long flags;
  533. /* If any of the command structures end up being larger than
  534. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  535. * we will need to increase the size of the TFD entries */
  536. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  537. !(cmd->meta.flags & CMD_SIZE_HUGE));
  538. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  539. IWL_ERROR("No space for Tx\n");
  540. return -ENOSPC;
  541. }
  542. spin_lock_irqsave(&priv->hcmd_lock, flags);
  543. tfd = &txq->bd[q->first_empty];
  544. memset(tfd, 0, sizeof(*tfd));
  545. control_flags = (u32 *) tfd;
  546. idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
  547. out_cmd = &txq->cmd[idx];
  548. out_cmd->hdr.cmd = cmd->id;
  549. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  550. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  551. /* At this point, the out_cmd now has all of the incoming cmd
  552. * information */
  553. out_cmd->hdr.flags = 0;
  554. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  555. INDEX_TO_SEQ(q->first_empty));
  556. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  557. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  558. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  559. offsetof(struct iwl_cmd, hdr);
  560. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  561. pad = U32_PAD(cmd->len);
  562. count = TFD_CTL_COUNT_GET(*control_flags);
  563. *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
  564. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  565. "%d bytes at %d[%d]:%d\n",
  566. get_cmd_string(out_cmd->hdr.cmd),
  567. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  568. fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
  569. txq->need_update = 1;
  570. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  571. ret = iwl_tx_queue_update_write_ptr(priv, txq);
  572. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  573. return ret ? ret : idx;
  574. }
  575. int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  576. {
  577. int ret;
  578. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  579. /* An asynchronous command can not expect an SKB to be set. */
  580. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  581. /* An asynchronous command MUST have a callback. */
  582. BUG_ON(!cmd->meta.u.callback);
  583. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  584. return -EBUSY;
  585. ret = iwl_enqueue_hcmd(priv, cmd);
  586. if (ret < 0) {
  587. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  588. get_cmd_string(cmd->id), ret);
  589. return ret;
  590. }
  591. return 0;
  592. }
  593. int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  594. {
  595. int cmd_idx;
  596. int ret;
  597. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  598. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  599. /* A synchronous command can not have a callback set. */
  600. BUG_ON(cmd->meta.u.callback != NULL);
  601. if (atomic_xchg(&entry, 1)) {
  602. IWL_ERROR("Error sending %s: Already sending a host command\n",
  603. get_cmd_string(cmd->id));
  604. return -EBUSY;
  605. }
  606. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  607. if (cmd->meta.flags & CMD_WANT_SKB)
  608. cmd->meta.source = &cmd->meta;
  609. cmd_idx = iwl_enqueue_hcmd(priv, cmd);
  610. if (cmd_idx < 0) {
  611. ret = cmd_idx;
  612. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  613. get_cmd_string(cmd->id), ret);
  614. goto out;
  615. }
  616. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  617. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  618. HOST_COMPLETE_TIMEOUT);
  619. if (!ret) {
  620. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  621. IWL_ERROR("Error sending %s: time out after %dms.\n",
  622. get_cmd_string(cmd->id),
  623. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  624. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  625. ret = -ETIMEDOUT;
  626. goto cancel;
  627. }
  628. }
  629. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  630. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  631. get_cmd_string(cmd->id));
  632. ret = -ECANCELED;
  633. goto fail;
  634. }
  635. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  636. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  637. get_cmd_string(cmd->id));
  638. ret = -EIO;
  639. goto fail;
  640. }
  641. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  642. IWL_ERROR("Error: Response NULL in '%s'\n",
  643. get_cmd_string(cmd->id));
  644. ret = -EIO;
  645. goto out;
  646. }
  647. ret = 0;
  648. goto out;
  649. cancel:
  650. if (cmd->meta.flags & CMD_WANT_SKB) {
  651. struct iwl_cmd *qcmd;
  652. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  653. * TX cmd queue. Otherwise in case the cmd comes
  654. * in later, it will possibly set an invalid
  655. * address (cmd->meta.source). */
  656. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  657. qcmd->meta.flags &= ~CMD_WANT_SKB;
  658. }
  659. fail:
  660. if (cmd->meta.u.skb) {
  661. dev_kfree_skb_any(cmd->meta.u.skb);
  662. cmd->meta.u.skb = NULL;
  663. }
  664. out:
  665. atomic_set(&entry, 0);
  666. return ret;
  667. }
  668. int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  669. {
  670. /* A command can not be asynchronous AND expect an SKB to be set. */
  671. BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
  672. (cmd->meta.flags & CMD_WANT_SKB));
  673. if (cmd->meta.flags & CMD_ASYNC)
  674. return iwl_send_cmd_async(priv, cmd);
  675. return iwl_send_cmd_sync(priv, cmd);
  676. }
  677. int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  678. {
  679. struct iwl_host_cmd cmd = {
  680. .id = id,
  681. .len = len,
  682. .data = data,
  683. };
  684. return iwl_send_cmd_sync(priv, &cmd);
  685. }
  686. static int __must_check iwl_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  687. {
  688. struct iwl_host_cmd cmd = {
  689. .id = id,
  690. .len = sizeof(val),
  691. .data = &val,
  692. };
  693. return iwl_send_cmd_sync(priv, &cmd);
  694. }
  695. int iwl_send_statistics_request(struct iwl_priv *priv)
  696. {
  697. return iwl_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  698. }
  699. /**
  700. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  701. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  702. * @channel: Any channel valid for the requested phymode
  703. * In addition to setting the staging RXON, priv->phymode is also set.
  704. *
  705. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  706. * in the staging RXON flag structure based on the phymode
  707. */
  708. static int iwl_set_rxon_channel(struct iwl_priv *priv, u8 phymode, u16 channel)
  709. {
  710. if (!iwl_get_channel_info(priv, phymode, channel)) {
  711. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  712. channel, phymode);
  713. return -EINVAL;
  714. }
  715. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  716. (priv->phymode == phymode))
  717. return 0;
  718. priv->staging_rxon.channel = cpu_to_le16(channel);
  719. if (phymode == MODE_IEEE80211A)
  720. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  721. else
  722. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  723. priv->phymode = phymode;
  724. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  725. return 0;
  726. }
  727. /**
  728. * iwl_check_rxon_cmd - validate RXON structure is valid
  729. *
  730. * NOTE: This is really only useful during development and can eventually
  731. * be #ifdef'd out once the driver is stable and folks aren't actively
  732. * making changes
  733. */
  734. static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
  735. {
  736. int error = 0;
  737. int counter = 1;
  738. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  739. error |= le32_to_cpu(rxon->flags &
  740. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  741. RXON_FLG_RADAR_DETECT_MSK));
  742. if (error)
  743. IWL_WARNING("check 24G fields %d | %d\n",
  744. counter++, error);
  745. } else {
  746. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  747. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  748. if (error)
  749. IWL_WARNING("check 52 fields %d | %d\n",
  750. counter++, error);
  751. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  752. if (error)
  753. IWL_WARNING("check 52 CCK %d | %d\n",
  754. counter++, error);
  755. }
  756. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  757. if (error)
  758. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  759. /* make sure basic rates 6Mbps and 1Mbps are supported */
  760. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  761. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  762. if (error)
  763. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  764. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  765. if (error)
  766. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  767. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  768. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  769. if (error)
  770. IWL_WARNING("check CCK and short slot %d | %d\n",
  771. counter++, error);
  772. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  773. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  774. if (error)
  775. IWL_WARNING("check CCK & auto detect %d | %d\n",
  776. counter++, error);
  777. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  778. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  779. if (error)
  780. IWL_WARNING("check TGG and auto detect %d | %d\n",
  781. counter++, error);
  782. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  783. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  784. RXON_FLG_ANT_A_MSK)) == 0);
  785. if (error)
  786. IWL_WARNING("check antenna %d %d\n", counter++, error);
  787. if (error)
  788. IWL_WARNING("Tuning to channel %d\n",
  789. le16_to_cpu(rxon->channel));
  790. if (error) {
  791. IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
  792. return -1;
  793. }
  794. return 0;
  795. }
  796. /**
  797. * iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  798. * @priv: staging_rxon is comapred to active_rxon
  799. *
  800. * If the RXON structure is changing sufficient to require a new
  801. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  802. * to indicate a new tune is required.
  803. */
  804. static int iwl_full_rxon_required(struct iwl_priv *priv)
  805. {
  806. /* These items are only settable from the full RXON command */
  807. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  808. compare_ether_addr(priv->staging_rxon.bssid_addr,
  809. priv->active_rxon.bssid_addr) ||
  810. compare_ether_addr(priv->staging_rxon.node_addr,
  811. priv->active_rxon.node_addr) ||
  812. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  813. priv->active_rxon.wlap_bssid_addr) ||
  814. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  815. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  816. (priv->staging_rxon.air_propagation !=
  817. priv->active_rxon.air_propagation) ||
  818. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  819. return 1;
  820. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  821. * be updated with the RXON_ASSOC command -- however only some
  822. * flag transitions are allowed using RXON_ASSOC */
  823. /* Check if we are not switching bands */
  824. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  825. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  826. return 1;
  827. /* Check if we are switching association toggle */
  828. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  829. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  830. return 1;
  831. return 0;
  832. }
  833. static int iwl_send_rxon_assoc(struct iwl_priv *priv)
  834. {
  835. int rc = 0;
  836. struct iwl_rx_packet *res = NULL;
  837. struct iwl_rxon_assoc_cmd rxon_assoc;
  838. struct iwl_host_cmd cmd = {
  839. .id = REPLY_RXON_ASSOC,
  840. .len = sizeof(rxon_assoc),
  841. .meta.flags = CMD_WANT_SKB,
  842. .data = &rxon_assoc,
  843. };
  844. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  845. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  846. if ((rxon1->flags == rxon2->flags) &&
  847. (rxon1->filter_flags == rxon2->filter_flags) &&
  848. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  849. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  850. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  851. return 0;
  852. }
  853. rxon_assoc.flags = priv->staging_rxon.flags;
  854. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  855. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  856. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  857. rxon_assoc.reserved = 0;
  858. rc = iwl_send_cmd_sync(priv, &cmd);
  859. if (rc)
  860. return rc;
  861. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  862. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  863. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  864. rc = -EIO;
  865. }
  866. priv->alloc_rxb_skb--;
  867. dev_kfree_skb_any(cmd.meta.u.skb);
  868. return rc;
  869. }
  870. /**
  871. * iwl_commit_rxon - commit staging_rxon to hardware
  872. *
  873. * The RXON command in staging_rxon is commited to the hardware and
  874. * the active_rxon structure is updated with the new data. This
  875. * function correctly transitions out of the RXON_ASSOC_MSK state if
  876. * a HW tune is required based on the RXON structure changes.
  877. */
  878. static int iwl_commit_rxon(struct iwl_priv *priv)
  879. {
  880. /* cast away the const for active_rxon in this function */
  881. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  882. int rc = 0;
  883. DECLARE_MAC_BUF(mac);
  884. if (!iwl_is_alive(priv))
  885. return -1;
  886. /* always get timestamp with Rx frame */
  887. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  888. /* select antenna */
  889. priv->staging_rxon.flags &=
  890. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  891. priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
  892. rc = iwl_check_rxon_cmd(&priv->staging_rxon);
  893. if (rc) {
  894. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  895. return -EINVAL;
  896. }
  897. /* If we don't need to send a full RXON, we can use
  898. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  899. * and other flags for the current radio configuration. */
  900. if (!iwl_full_rxon_required(priv)) {
  901. rc = iwl_send_rxon_assoc(priv);
  902. if (rc) {
  903. IWL_ERROR("Error setting RXON_ASSOC "
  904. "configuration (%d).\n", rc);
  905. return rc;
  906. }
  907. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  908. return 0;
  909. }
  910. /* If we are currently associated and the new config requires
  911. * an RXON_ASSOC and the new config wants the associated mask enabled,
  912. * we must clear the associated from the active configuration
  913. * before we apply the new config */
  914. if (iwl_is_associated(priv) &&
  915. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  916. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  917. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  918. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  919. sizeof(struct iwl_rxon_cmd),
  920. &priv->active_rxon);
  921. /* If the mask clearing failed then we set
  922. * active_rxon back to what it was previously */
  923. if (rc) {
  924. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  925. IWL_ERROR("Error clearing ASSOC_MSK on current "
  926. "configuration (%d).\n", rc);
  927. return rc;
  928. }
  929. }
  930. IWL_DEBUG_INFO("Sending RXON\n"
  931. "* with%s RXON_FILTER_ASSOC_MSK\n"
  932. "* channel = %d\n"
  933. "* bssid = %s\n",
  934. ((priv->staging_rxon.filter_flags &
  935. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  936. le16_to_cpu(priv->staging_rxon.channel),
  937. print_mac(mac, priv->staging_rxon.bssid_addr));
  938. /* Apply the new configuration */
  939. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  940. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  941. if (rc) {
  942. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  943. return rc;
  944. }
  945. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  946. iwl_clear_stations_table(priv);
  947. /* If we issue a new RXON command which required a tune then we must
  948. * send a new TXPOWER command or we won't be able to Tx any frames */
  949. rc = iwl_hw_reg_send_txpower(priv);
  950. if (rc) {
  951. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  952. return rc;
  953. }
  954. /* Add the broadcast address so we can send broadcast frames */
  955. if (iwl_add_station(priv, BROADCAST_ADDR, 0, 0) ==
  956. IWL_INVALID_STATION) {
  957. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  958. return -EIO;
  959. }
  960. /* If we have set the ASSOC_MSK and we are in BSS mode then
  961. * add the IWL_AP_ID to the station rate table */
  962. if (iwl_is_associated(priv) &&
  963. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  964. if (iwl_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
  965. == IWL_INVALID_STATION) {
  966. IWL_ERROR("Error adding AP address for transmit.\n");
  967. return -EIO;
  968. }
  969. /* Init the hardware's rate fallback order based on the
  970. * phymode */
  971. rc = iwl3945_init_hw_rate_table(priv);
  972. if (rc) {
  973. IWL_ERROR("Error setting HW rate table: %02X\n", rc);
  974. return -EIO;
  975. }
  976. return 0;
  977. }
  978. static int iwl_send_bt_config(struct iwl_priv *priv)
  979. {
  980. struct iwl_bt_cmd bt_cmd = {
  981. .flags = 3,
  982. .lead_time = 0xAA,
  983. .max_kill = 1,
  984. .kill_ack_mask = 0,
  985. .kill_cts_mask = 0,
  986. };
  987. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  988. sizeof(struct iwl_bt_cmd), &bt_cmd);
  989. }
  990. static int iwl_send_scan_abort(struct iwl_priv *priv)
  991. {
  992. int rc = 0;
  993. struct iwl_rx_packet *res;
  994. struct iwl_host_cmd cmd = {
  995. .id = REPLY_SCAN_ABORT_CMD,
  996. .meta.flags = CMD_WANT_SKB,
  997. };
  998. /* If there isn't a scan actively going on in the hardware
  999. * then we are in between scan bands and not actually
  1000. * actively scanning, so don't send the abort command */
  1001. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1002. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1003. return 0;
  1004. }
  1005. rc = iwl_send_cmd_sync(priv, &cmd);
  1006. if (rc) {
  1007. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1008. return rc;
  1009. }
  1010. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1011. if (res->u.status != CAN_ABORT_STATUS) {
  1012. /* The scan abort will return 1 for success or
  1013. * 2 for "failure". A failure condition can be
  1014. * due to simply not being in an active scan which
  1015. * can occur if we send the scan abort before we
  1016. * the microcode has notified us that a scan is
  1017. * completed. */
  1018. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1019. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1020. clear_bit(STATUS_SCAN_HW, &priv->status);
  1021. }
  1022. dev_kfree_skb_any(cmd.meta.u.skb);
  1023. return rc;
  1024. }
  1025. static int iwl_card_state_sync_callback(struct iwl_priv *priv,
  1026. struct iwl_cmd *cmd,
  1027. struct sk_buff *skb)
  1028. {
  1029. return 1;
  1030. }
  1031. /*
  1032. * CARD_STATE_CMD
  1033. *
  1034. * Use: Sets the internal card state to enable, disable, or halt
  1035. *
  1036. * When in the 'enable' state the card operates as normal.
  1037. * When in the 'disable' state, the card enters into a low power mode.
  1038. * When in the 'halt' state, the card is shut down and must be fully
  1039. * restarted to come back on.
  1040. */
  1041. static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1042. {
  1043. struct iwl_host_cmd cmd = {
  1044. .id = REPLY_CARD_STATE_CMD,
  1045. .len = sizeof(u32),
  1046. .data = &flags,
  1047. .meta.flags = meta_flag,
  1048. };
  1049. if (meta_flag & CMD_ASYNC)
  1050. cmd.meta.u.callback = iwl_card_state_sync_callback;
  1051. return iwl_send_cmd(priv, &cmd);
  1052. }
  1053. static int iwl_add_sta_sync_callback(struct iwl_priv *priv,
  1054. struct iwl_cmd *cmd, struct sk_buff *skb)
  1055. {
  1056. struct iwl_rx_packet *res = NULL;
  1057. if (!skb) {
  1058. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1059. return 1;
  1060. }
  1061. res = (struct iwl_rx_packet *)skb->data;
  1062. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1063. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1064. res->hdr.flags);
  1065. return 1;
  1066. }
  1067. switch (res->u.add_sta.status) {
  1068. case ADD_STA_SUCCESS_MSK:
  1069. break;
  1070. default:
  1071. break;
  1072. }
  1073. /* We didn't cache the SKB; let the caller free it */
  1074. return 1;
  1075. }
  1076. int iwl_send_add_station(struct iwl_priv *priv,
  1077. struct iwl_addsta_cmd *sta, u8 flags)
  1078. {
  1079. struct iwl_rx_packet *res = NULL;
  1080. int rc = 0;
  1081. struct iwl_host_cmd cmd = {
  1082. .id = REPLY_ADD_STA,
  1083. .len = sizeof(struct iwl_addsta_cmd),
  1084. .meta.flags = flags,
  1085. .data = sta,
  1086. };
  1087. if (flags & CMD_ASYNC)
  1088. cmd.meta.u.callback = iwl_add_sta_sync_callback;
  1089. else
  1090. cmd.meta.flags |= CMD_WANT_SKB;
  1091. rc = iwl_send_cmd(priv, &cmd);
  1092. if (rc || (flags & CMD_ASYNC))
  1093. return rc;
  1094. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1095. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1096. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1097. res->hdr.flags);
  1098. rc = -EIO;
  1099. }
  1100. if (rc == 0) {
  1101. switch (res->u.add_sta.status) {
  1102. case ADD_STA_SUCCESS_MSK:
  1103. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1104. break;
  1105. default:
  1106. rc = -EIO;
  1107. IWL_WARNING("REPLY_ADD_STA failed\n");
  1108. break;
  1109. }
  1110. }
  1111. priv->alloc_rxb_skb--;
  1112. dev_kfree_skb_any(cmd.meta.u.skb);
  1113. return rc;
  1114. }
  1115. static int iwl_update_sta_key_info(struct iwl_priv *priv,
  1116. struct ieee80211_key_conf *keyconf,
  1117. u8 sta_id)
  1118. {
  1119. unsigned long flags;
  1120. __le16 key_flags = 0;
  1121. switch (keyconf->alg) {
  1122. case ALG_CCMP:
  1123. key_flags |= STA_KEY_FLG_CCMP;
  1124. key_flags |= cpu_to_le16(
  1125. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1126. key_flags &= ~STA_KEY_FLG_INVALID;
  1127. break;
  1128. case ALG_TKIP:
  1129. case ALG_WEP:
  1130. return -EINVAL;
  1131. default:
  1132. return -EINVAL;
  1133. }
  1134. spin_lock_irqsave(&priv->sta_lock, flags);
  1135. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1136. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1137. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1138. keyconf->keylen);
  1139. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1140. keyconf->keylen);
  1141. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1142. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1143. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1144. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1145. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1146. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1147. return 0;
  1148. }
  1149. static int iwl_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1150. {
  1151. unsigned long flags;
  1152. spin_lock_irqsave(&priv->sta_lock, flags);
  1153. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  1154. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl_keyinfo));
  1155. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1156. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1157. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1158. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1159. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1160. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1161. return 0;
  1162. }
  1163. static void iwl_clear_free_frames(struct iwl_priv *priv)
  1164. {
  1165. struct list_head *element;
  1166. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1167. priv->frames_count);
  1168. while (!list_empty(&priv->free_frames)) {
  1169. element = priv->free_frames.next;
  1170. list_del(element);
  1171. kfree(list_entry(element, struct iwl_frame, list));
  1172. priv->frames_count--;
  1173. }
  1174. if (priv->frames_count) {
  1175. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1176. priv->frames_count);
  1177. priv->frames_count = 0;
  1178. }
  1179. }
  1180. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  1181. {
  1182. struct iwl_frame *frame;
  1183. struct list_head *element;
  1184. if (list_empty(&priv->free_frames)) {
  1185. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1186. if (!frame) {
  1187. IWL_ERROR("Could not allocate frame!\n");
  1188. return NULL;
  1189. }
  1190. priv->frames_count++;
  1191. return frame;
  1192. }
  1193. element = priv->free_frames.next;
  1194. list_del(element);
  1195. return list_entry(element, struct iwl_frame, list);
  1196. }
  1197. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  1198. {
  1199. memset(frame, 0, sizeof(*frame));
  1200. list_add(&frame->list, &priv->free_frames);
  1201. }
  1202. unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  1203. struct ieee80211_hdr *hdr,
  1204. const u8 *dest, int left)
  1205. {
  1206. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1207. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1208. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1209. return 0;
  1210. if (priv->ibss_beacon->len > left)
  1211. return 0;
  1212. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1213. return priv->ibss_beacon->len;
  1214. }
  1215. static int iwl_rate_index_from_plcp(int plcp)
  1216. {
  1217. int i = 0;
  1218. for (i = 0; i < IWL_RATE_COUNT; i++)
  1219. if (iwl_rates[i].plcp == plcp)
  1220. return i;
  1221. return -1;
  1222. }
  1223. static u8 iwl_rate_get_lowest_plcp(int rate_mask)
  1224. {
  1225. u8 i;
  1226. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1227. i = iwl_rates[i].next_ieee) {
  1228. if (rate_mask & (1 << i))
  1229. return iwl_rates[i].plcp;
  1230. }
  1231. return IWL_RATE_INVALID;
  1232. }
  1233. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  1234. {
  1235. struct iwl_frame *frame;
  1236. unsigned int frame_size;
  1237. int rc;
  1238. u8 rate;
  1239. frame = iwl_get_free_frame(priv);
  1240. if (!frame) {
  1241. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1242. "command.\n");
  1243. return -ENOMEM;
  1244. }
  1245. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1246. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic &
  1247. 0xFF0);
  1248. if (rate == IWL_INVALID_RATE)
  1249. rate = IWL_RATE_6M_PLCP;
  1250. } else {
  1251. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1252. if (rate == IWL_INVALID_RATE)
  1253. rate = IWL_RATE_1M_PLCP;
  1254. }
  1255. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  1256. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1257. &frame->u.cmd[0]);
  1258. iwl_free_frame(priv, frame);
  1259. return rc;
  1260. }
  1261. /******************************************************************************
  1262. *
  1263. * EEPROM related functions
  1264. *
  1265. ******************************************************************************/
  1266. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1267. {
  1268. memcpy(mac, priv->eeprom.mac_address, 6);
  1269. }
  1270. /**
  1271. * iwl_eeprom_init - read EEPROM contents
  1272. *
  1273. * Load the EEPROM from adapter into priv->eeprom
  1274. *
  1275. * NOTE: This routine uses the non-debug IO access functions.
  1276. */
  1277. int iwl_eeprom_init(struct iwl_priv *priv)
  1278. {
  1279. u16 *e = (u16 *)&priv->eeprom;
  1280. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1281. u32 r;
  1282. int sz = sizeof(priv->eeprom);
  1283. int rc;
  1284. int i;
  1285. u16 addr;
  1286. /* The EEPROM structure has several padding buffers within it
  1287. * and when adding new EEPROM maps is subject to programmer errors
  1288. * which may be very difficult to identify without explicitly
  1289. * checking the resulting size of the eeprom map. */
  1290. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1291. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1292. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1293. return -ENOENT;
  1294. }
  1295. rc = iwl_eeprom_aqcuire_semaphore(priv);
  1296. if (rc < 0) {
  1297. IWL_ERROR("Failed to aqcuire EEPROM semaphore.\n");
  1298. return -ENOENT;
  1299. }
  1300. /* eeprom is an array of 16bit values */
  1301. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1302. _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
  1303. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1304. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1305. i += IWL_EEPROM_ACCESS_DELAY) {
  1306. r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
  1307. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1308. break;
  1309. udelay(IWL_EEPROM_ACCESS_DELAY);
  1310. }
  1311. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1312. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1313. return -ETIMEDOUT;
  1314. }
  1315. e[addr / 2] = le16_to_cpu(r >> 16);
  1316. }
  1317. return 0;
  1318. }
  1319. /******************************************************************************
  1320. *
  1321. * Misc. internal state and helper functions
  1322. *
  1323. ******************************************************************************/
  1324. #ifdef CONFIG_IWLWIFI_DEBUG
  1325. /**
  1326. * iwl_report_frame - dump frame to syslog during debug sessions
  1327. *
  1328. * hack this function to show different aspects of received frames,
  1329. * including selective frame dumps.
  1330. * group100 parameter selects whether to show 1 out of 100 good frames.
  1331. *
  1332. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1333. * info output is okay, but some of this stuff (e.g. iwl_rx_frame_stats)
  1334. * is 3945-specific and gives bad output for 4965. Need to split the
  1335. * functionality, keep common stuff here.
  1336. */
  1337. void iwl_report_frame(struct iwl_priv *priv,
  1338. struct iwl_rx_packet *pkt,
  1339. struct ieee80211_hdr *header, int group100)
  1340. {
  1341. u32 to_us;
  1342. u32 print_summary = 0;
  1343. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1344. u32 hundred = 0;
  1345. u32 dataframe = 0;
  1346. u16 fc;
  1347. u16 seq_ctl;
  1348. u16 channel;
  1349. u16 phy_flags;
  1350. int rate_sym;
  1351. u16 length;
  1352. u16 status;
  1353. u16 bcn_tmr;
  1354. u32 tsf_low;
  1355. u64 tsf;
  1356. u8 rssi;
  1357. u8 agc;
  1358. u16 sig_avg;
  1359. u16 noise_diff;
  1360. struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1361. struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1362. struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1363. u8 *data = IWL_RX_DATA(pkt);
  1364. /* MAC header */
  1365. fc = le16_to_cpu(header->frame_control);
  1366. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1367. /* metadata */
  1368. channel = le16_to_cpu(rx_hdr->channel);
  1369. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1370. rate_sym = rx_hdr->rate;
  1371. length = le16_to_cpu(rx_hdr->len);
  1372. /* end-of-frame status and timestamp */
  1373. status = le32_to_cpu(rx_end->status);
  1374. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1375. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1376. tsf = le64_to_cpu(rx_end->timestamp);
  1377. /* signal statistics */
  1378. rssi = rx_stats->rssi;
  1379. agc = rx_stats->agc;
  1380. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1381. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1382. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1383. /* if data frame is to us and all is good,
  1384. * (optionally) print summary for only 1 out of every 100 */
  1385. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1386. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1387. dataframe = 1;
  1388. if (!group100)
  1389. print_summary = 1; /* print each frame */
  1390. else if (priv->framecnt_to_us < 100) {
  1391. priv->framecnt_to_us++;
  1392. print_summary = 0;
  1393. } else {
  1394. priv->framecnt_to_us = 0;
  1395. print_summary = 1;
  1396. hundred = 1;
  1397. }
  1398. } else {
  1399. /* print summary for all other frames */
  1400. print_summary = 1;
  1401. }
  1402. if (print_summary) {
  1403. char *title;
  1404. u32 rate;
  1405. if (hundred)
  1406. title = "100Frames";
  1407. else if (fc & IEEE80211_FCTL_RETRY)
  1408. title = "Retry";
  1409. else if (ieee80211_is_assoc_response(fc))
  1410. title = "AscRsp";
  1411. else if (ieee80211_is_reassoc_response(fc))
  1412. title = "RasRsp";
  1413. else if (ieee80211_is_probe_response(fc)) {
  1414. title = "PrbRsp";
  1415. print_dump = 1; /* dump frame contents */
  1416. } else if (ieee80211_is_beacon(fc)) {
  1417. title = "Beacon";
  1418. print_dump = 1; /* dump frame contents */
  1419. } else if (ieee80211_is_atim(fc))
  1420. title = "ATIM";
  1421. else if (ieee80211_is_auth(fc))
  1422. title = "Auth";
  1423. else if (ieee80211_is_deauth(fc))
  1424. title = "DeAuth";
  1425. else if (ieee80211_is_disassoc(fc))
  1426. title = "DisAssoc";
  1427. else
  1428. title = "Frame";
  1429. rate = iwl_rate_index_from_plcp(rate_sym);
  1430. if (rate == -1)
  1431. rate = 0;
  1432. else
  1433. rate = iwl_rates[rate].ieee / 2;
  1434. /* print frame summary.
  1435. * MAC addresses show just the last byte (for brevity),
  1436. * but you can hack it to show more, if you'd like to. */
  1437. if (dataframe)
  1438. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1439. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1440. title, fc, header->addr1[5],
  1441. length, rssi, channel, rate);
  1442. else {
  1443. /* src/dst addresses assume managed mode */
  1444. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1445. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1446. "phy=0x%02x, chnl=%d\n",
  1447. title, fc, header->addr1[5],
  1448. header->addr3[5], rssi,
  1449. tsf_low - priv->scan_start_tsf,
  1450. phy_flags, channel);
  1451. }
  1452. }
  1453. if (print_dump)
  1454. iwl_print_hex_dump(IWL_DL_RX, data, length);
  1455. }
  1456. #endif
  1457. static void iwl_unset_hw_setting(struct iwl_priv *priv)
  1458. {
  1459. if (priv->hw_setting.shared_virt)
  1460. pci_free_consistent(priv->pci_dev,
  1461. sizeof(struct iwl_shared),
  1462. priv->hw_setting.shared_virt,
  1463. priv->hw_setting.shared_phys);
  1464. }
  1465. /**
  1466. * iwl_supported_rate_to_ie - fill in the supported rate in IE field
  1467. *
  1468. * return : set the bit for each supported rate insert in ie
  1469. */
  1470. static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1471. u16 basic_rate, int *left)
  1472. {
  1473. u16 ret_rates = 0, bit;
  1474. int i;
  1475. u8 *cnt = ie;
  1476. u8 *rates = ie + 1;
  1477. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1478. if (bit & supported_rate) {
  1479. ret_rates |= bit;
  1480. rates[*cnt] = iwl_rates[i].ieee |
  1481. ((bit & basic_rate) ? 0x80 : 0x00);
  1482. (*cnt)++;
  1483. (*left)--;
  1484. if ((*left <= 0) ||
  1485. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1486. break;
  1487. }
  1488. }
  1489. return ret_rates;
  1490. }
  1491. /**
  1492. * iwl_fill_probe_req - fill in all required fields and IE for probe request
  1493. */
  1494. static u16 iwl_fill_probe_req(struct iwl_priv *priv,
  1495. struct ieee80211_mgmt *frame,
  1496. int left, int is_direct)
  1497. {
  1498. int len = 0;
  1499. u8 *pos = NULL;
  1500. u16 active_rates, ret_rates, cck_rates;
  1501. /* Make sure there is enough space for the probe request,
  1502. * two mandatory IEs and the data */
  1503. left -= 24;
  1504. if (left < 0)
  1505. return 0;
  1506. len += 24;
  1507. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1508. memcpy(frame->da, BROADCAST_ADDR, ETH_ALEN);
  1509. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1510. memcpy(frame->bssid, BROADCAST_ADDR, ETH_ALEN);
  1511. frame->seq_ctrl = 0;
  1512. /* fill in our indirect SSID IE */
  1513. /* ...next IE... */
  1514. left -= 2;
  1515. if (left < 0)
  1516. return 0;
  1517. len += 2;
  1518. pos = &(frame->u.probe_req.variable[0]);
  1519. *pos++ = WLAN_EID_SSID;
  1520. *pos++ = 0;
  1521. /* fill in our direct SSID IE... */
  1522. if (is_direct) {
  1523. /* ...next IE... */
  1524. left -= 2 + priv->essid_len;
  1525. if (left < 0)
  1526. return 0;
  1527. /* ... fill it in... */
  1528. *pos++ = WLAN_EID_SSID;
  1529. *pos++ = priv->essid_len;
  1530. memcpy(pos, priv->essid, priv->essid_len);
  1531. pos += priv->essid_len;
  1532. len += 2 + priv->essid_len;
  1533. }
  1534. /* fill in supported rate */
  1535. /* ...next IE... */
  1536. left -= 2;
  1537. if (left < 0)
  1538. return 0;
  1539. /* ... fill it in... */
  1540. *pos++ = WLAN_EID_SUPP_RATES;
  1541. *pos = 0;
  1542. priv->active_rate = priv->rates_mask;
  1543. active_rates = priv->active_rate;
  1544. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1545. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1546. ret_rates = iwl_supported_rate_to_ie(pos, cck_rates,
  1547. priv->active_rate_basic, &left);
  1548. active_rates &= ~ret_rates;
  1549. ret_rates = iwl_supported_rate_to_ie(pos, active_rates,
  1550. priv->active_rate_basic, &left);
  1551. active_rates &= ~ret_rates;
  1552. len += 2 + *pos;
  1553. pos += (*pos) + 1;
  1554. if (active_rates == 0)
  1555. goto fill_end;
  1556. /* fill in supported extended rate */
  1557. /* ...next IE... */
  1558. left -= 2;
  1559. if (left < 0)
  1560. return 0;
  1561. /* ... fill it in... */
  1562. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1563. *pos = 0;
  1564. iwl_supported_rate_to_ie(pos, active_rates,
  1565. priv->active_rate_basic, &left);
  1566. if (*pos > 0)
  1567. len += 2 + *pos;
  1568. fill_end:
  1569. return (u16)len;
  1570. }
  1571. /*
  1572. * QoS support
  1573. */
  1574. #ifdef CONFIG_IWLWIFI_QOS
  1575. static int iwl_send_qos_params_command(struct iwl_priv *priv,
  1576. struct iwl_qosparam_cmd *qos)
  1577. {
  1578. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1579. sizeof(struct iwl_qosparam_cmd), qos);
  1580. }
  1581. static void iwl_reset_qos(struct iwl_priv *priv)
  1582. {
  1583. u16 cw_min = 15;
  1584. u16 cw_max = 1023;
  1585. u8 aifs = 2;
  1586. u8 is_legacy = 0;
  1587. unsigned long flags;
  1588. int i;
  1589. spin_lock_irqsave(&priv->lock, flags);
  1590. priv->qos_data.qos_active = 0;
  1591. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1592. if (priv->qos_data.qos_enable)
  1593. priv->qos_data.qos_active = 1;
  1594. if (!(priv->active_rate & 0xfff0)) {
  1595. cw_min = 31;
  1596. is_legacy = 1;
  1597. }
  1598. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1599. if (priv->qos_data.qos_enable)
  1600. priv->qos_data.qos_active = 1;
  1601. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1602. cw_min = 31;
  1603. is_legacy = 1;
  1604. }
  1605. if (priv->qos_data.qos_active)
  1606. aifs = 3;
  1607. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1608. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1609. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1610. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1611. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1612. if (priv->qos_data.qos_active) {
  1613. i = 1;
  1614. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1615. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1616. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1617. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1618. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1619. i = 2;
  1620. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1621. cpu_to_le16((cw_min + 1) / 2 - 1);
  1622. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1623. cpu_to_le16(cw_max);
  1624. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1625. if (is_legacy)
  1626. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1627. cpu_to_le16(6016);
  1628. else
  1629. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1630. cpu_to_le16(3008);
  1631. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1632. i = 3;
  1633. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1634. cpu_to_le16((cw_min + 1) / 4 - 1);
  1635. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1636. cpu_to_le16((cw_max + 1) / 2 - 1);
  1637. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1638. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1639. if (is_legacy)
  1640. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1641. cpu_to_le16(3264);
  1642. else
  1643. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1644. cpu_to_le16(1504);
  1645. } else {
  1646. for (i = 1; i < 4; i++) {
  1647. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1648. cpu_to_le16(cw_min);
  1649. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1650. cpu_to_le16(cw_max);
  1651. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1652. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1653. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1654. }
  1655. }
  1656. IWL_DEBUG_QOS("set QoS to default \n");
  1657. spin_unlock_irqrestore(&priv->lock, flags);
  1658. }
  1659. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  1660. {
  1661. unsigned long flags;
  1662. if (priv == NULL)
  1663. return;
  1664. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1665. return;
  1666. if (!priv->qos_data.qos_enable)
  1667. return;
  1668. spin_lock_irqsave(&priv->lock, flags);
  1669. priv->qos_data.def_qos_parm.qos_flags = 0;
  1670. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1671. !priv->qos_data.qos_cap.q_AP.txop_request)
  1672. priv->qos_data.def_qos_parm.qos_flags |=
  1673. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1674. if (priv->qos_data.qos_active)
  1675. priv->qos_data.def_qos_parm.qos_flags |=
  1676. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1677. spin_unlock_irqrestore(&priv->lock, flags);
  1678. if (force || iwl_is_associated(priv)) {
  1679. IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
  1680. priv->qos_data.qos_active);
  1681. iwl_send_qos_params_command(priv,
  1682. &(priv->qos_data.def_qos_parm));
  1683. }
  1684. }
  1685. #endif /* CONFIG_IWLWIFI_QOS */
  1686. /*
  1687. * Power management (not Tx power!) functions
  1688. */
  1689. #define MSEC_TO_USEC 1024
  1690. #define NOSLP __constant_cpu_to_le32(0)
  1691. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
  1692. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1693. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1694. __constant_cpu_to_le32(X1), \
  1695. __constant_cpu_to_le32(X2), \
  1696. __constant_cpu_to_le32(X3), \
  1697. __constant_cpu_to_le32(X4)}
  1698. /* default power management (not Tx power) table values */
  1699. /* for tim 0-10 */
  1700. static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = {
  1701. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1702. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1703. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1704. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1705. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1706. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1707. };
  1708. /* for tim > 10 */
  1709. static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = {
  1710. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1711. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1712. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1713. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1714. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1715. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1716. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1717. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1718. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1719. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1720. };
  1721. int iwl_power_init_handle(struct iwl_priv *priv)
  1722. {
  1723. int rc = 0, i;
  1724. struct iwl_power_mgr *pow_data;
  1725. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC;
  1726. u16 pci_pm;
  1727. IWL_DEBUG_POWER("Initialize power \n");
  1728. pow_data = &(priv->power_data);
  1729. memset(pow_data, 0, sizeof(*pow_data));
  1730. pow_data->active_index = IWL_POWER_RANGE_0;
  1731. pow_data->dtim_val = 0xffff;
  1732. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1733. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1734. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1735. if (rc != 0)
  1736. return 0;
  1737. else {
  1738. struct iwl_powertable_cmd *cmd;
  1739. IWL_DEBUG_POWER("adjust power command flags\n");
  1740. for (i = 0; i < IWL_POWER_AC; i++) {
  1741. cmd = &pow_data->pwr_range_0[i].cmd;
  1742. if (pci_pm & 0x1)
  1743. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1744. else
  1745. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1746. }
  1747. }
  1748. return rc;
  1749. }
  1750. static int iwl_update_power_cmd(struct iwl_priv *priv,
  1751. struct iwl_powertable_cmd *cmd, u32 mode)
  1752. {
  1753. int rc = 0, i;
  1754. u8 skip;
  1755. u32 max_sleep = 0;
  1756. struct iwl_power_vec_entry *range;
  1757. u8 period = 0;
  1758. struct iwl_power_mgr *pow_data;
  1759. if (mode > IWL_POWER_INDEX_5) {
  1760. IWL_DEBUG_POWER("Error invalid power mode \n");
  1761. return -1;
  1762. }
  1763. pow_data = &(priv->power_data);
  1764. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1765. range = &pow_data->pwr_range_0[0];
  1766. else
  1767. range = &pow_data->pwr_range_1[1];
  1768. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  1769. #ifdef IWL_MAC80211_DISABLE
  1770. if (priv->assoc_network != NULL) {
  1771. unsigned long flags;
  1772. period = priv->assoc_network->tim.tim_period;
  1773. }
  1774. #endif /*IWL_MAC80211_DISABLE */
  1775. skip = range[mode].no_dtim;
  1776. if (period == 0) {
  1777. period = 1;
  1778. skip = 0;
  1779. }
  1780. if (skip == 0) {
  1781. max_sleep = period;
  1782. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1783. } else {
  1784. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1785. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1786. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1787. }
  1788. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1789. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1790. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1791. }
  1792. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1793. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1794. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1795. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1796. le32_to_cpu(cmd->sleep_interval[0]),
  1797. le32_to_cpu(cmd->sleep_interval[1]),
  1798. le32_to_cpu(cmd->sleep_interval[2]),
  1799. le32_to_cpu(cmd->sleep_interval[3]),
  1800. le32_to_cpu(cmd->sleep_interval[4]));
  1801. return rc;
  1802. }
  1803. static int iwl_send_power_mode(struct iwl_priv *priv, u32 mode)
  1804. {
  1805. u32 final_mode = mode;
  1806. int rc;
  1807. struct iwl_powertable_cmd cmd;
  1808. /* If on battery, set to 3,
  1809. * if plugged into AC power, set to CAM ("continuosly aware mode"),
  1810. * else user level */
  1811. switch (mode) {
  1812. case IWL_POWER_BATTERY:
  1813. final_mode = IWL_POWER_INDEX_3;
  1814. break;
  1815. case IWL_POWER_AC:
  1816. final_mode = IWL_POWER_MODE_CAM;
  1817. break;
  1818. default:
  1819. final_mode = mode;
  1820. break;
  1821. }
  1822. iwl_update_power_cmd(priv, &cmd, final_mode);
  1823. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1824. if (final_mode == IWL_POWER_MODE_CAM)
  1825. clear_bit(STATUS_POWER_PMI, &priv->status);
  1826. else
  1827. set_bit(STATUS_POWER_PMI, &priv->status);
  1828. return rc;
  1829. }
  1830. int iwl_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1831. {
  1832. /* Filter incoming packets to determine if they are targeted toward
  1833. * this network, discarding packets coming from ourselves */
  1834. switch (priv->iw_mode) {
  1835. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1836. /* packets from our adapter are dropped (echo) */
  1837. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1838. return 0;
  1839. /* {broad,multi}cast packets to our IBSS go through */
  1840. if (is_multicast_ether_addr(header->addr1))
  1841. return !compare_ether_addr(header->addr3, priv->bssid);
  1842. /* packets to our adapter go through */
  1843. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1844. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1845. /* packets from our adapter are dropped (echo) */
  1846. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1847. return 0;
  1848. /* {broad,multi}cast packets to our BSS go through */
  1849. if (is_multicast_ether_addr(header->addr1))
  1850. return !compare_ether_addr(header->addr2, priv->bssid);
  1851. /* packets to our adapter go through */
  1852. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1853. }
  1854. return 1;
  1855. }
  1856. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1857. const char *iwl_get_tx_fail_reason(u32 status)
  1858. {
  1859. switch (status & TX_STATUS_MSK) {
  1860. case TX_STATUS_SUCCESS:
  1861. return "SUCCESS";
  1862. TX_STATUS_ENTRY(SHORT_LIMIT);
  1863. TX_STATUS_ENTRY(LONG_LIMIT);
  1864. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1865. TX_STATUS_ENTRY(MGMNT_ABORT);
  1866. TX_STATUS_ENTRY(NEXT_FRAG);
  1867. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1868. TX_STATUS_ENTRY(DEST_PS);
  1869. TX_STATUS_ENTRY(ABORTED);
  1870. TX_STATUS_ENTRY(BT_RETRY);
  1871. TX_STATUS_ENTRY(STA_INVALID);
  1872. TX_STATUS_ENTRY(FRAG_DROPPED);
  1873. TX_STATUS_ENTRY(TID_DISABLE);
  1874. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1875. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1876. TX_STATUS_ENTRY(TX_LOCKED);
  1877. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1878. }
  1879. return "UNKNOWN";
  1880. }
  1881. /**
  1882. * iwl_scan_cancel - Cancel any currently executing HW scan
  1883. *
  1884. * NOTE: priv->mutex is not required before calling this function
  1885. */
  1886. static int iwl_scan_cancel(struct iwl_priv *priv)
  1887. {
  1888. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1889. clear_bit(STATUS_SCANNING, &priv->status);
  1890. return 0;
  1891. }
  1892. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1893. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1894. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1895. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1896. queue_work(priv->workqueue, &priv->abort_scan);
  1897. } else
  1898. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1899. return test_bit(STATUS_SCANNING, &priv->status);
  1900. }
  1901. return 0;
  1902. }
  1903. /**
  1904. * iwl_scan_cancel_timeout - Cancel any currently executing HW scan
  1905. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1906. *
  1907. * NOTE: priv->mutex must be held before calling this function
  1908. */
  1909. static int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1910. {
  1911. unsigned long now = jiffies;
  1912. int ret;
  1913. ret = iwl_scan_cancel(priv);
  1914. if (ret && ms) {
  1915. mutex_unlock(&priv->mutex);
  1916. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1917. test_bit(STATUS_SCANNING, &priv->status))
  1918. msleep(1);
  1919. mutex_lock(&priv->mutex);
  1920. return test_bit(STATUS_SCANNING, &priv->status);
  1921. }
  1922. return ret;
  1923. }
  1924. static void iwl_sequence_reset(struct iwl_priv *priv)
  1925. {
  1926. /* Reset ieee stats */
  1927. /* We don't reset the net_device_stats (ieee->stats) on
  1928. * re-association */
  1929. priv->last_seq_num = -1;
  1930. priv->last_frag_num = -1;
  1931. priv->last_packet_time = 0;
  1932. iwl_scan_cancel(priv);
  1933. }
  1934. #define MAX_UCODE_BEACON_INTERVAL 1024
  1935. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1936. static __le16 iwl_adjust_beacon_interval(u16 beacon_val)
  1937. {
  1938. u16 new_val = 0;
  1939. u16 beacon_factor = 0;
  1940. beacon_factor =
  1941. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1942. / MAX_UCODE_BEACON_INTERVAL;
  1943. new_val = beacon_val / beacon_factor;
  1944. return cpu_to_le16(new_val);
  1945. }
  1946. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  1947. {
  1948. u64 interval_tm_unit;
  1949. u64 tsf, result;
  1950. unsigned long flags;
  1951. struct ieee80211_conf *conf = NULL;
  1952. u16 beacon_int = 0;
  1953. conf = ieee80211_get_hw_conf(priv->hw);
  1954. spin_lock_irqsave(&priv->lock, flags);
  1955. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1956. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1957. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1958. tsf = priv->timestamp1;
  1959. tsf = ((tsf << 32) | priv->timestamp0);
  1960. beacon_int = priv->beacon_int;
  1961. spin_unlock_irqrestore(&priv->lock, flags);
  1962. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1963. if (beacon_int == 0) {
  1964. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1965. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1966. } else {
  1967. priv->rxon_timing.beacon_interval =
  1968. cpu_to_le16(beacon_int);
  1969. priv->rxon_timing.beacon_interval =
  1970. iwl_adjust_beacon_interval(
  1971. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1972. }
  1973. priv->rxon_timing.atim_window = 0;
  1974. } else {
  1975. priv->rxon_timing.beacon_interval =
  1976. iwl_adjust_beacon_interval(conf->beacon_int);
  1977. /* TODO: we need to get atim_window from upper stack
  1978. * for now we set to 0 */
  1979. priv->rxon_timing.atim_window = 0;
  1980. }
  1981. interval_tm_unit =
  1982. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1983. result = do_div(tsf, interval_tm_unit);
  1984. priv->rxon_timing.beacon_init_val =
  1985. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1986. IWL_DEBUG_ASSOC
  1987. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1988. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1989. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1990. le16_to_cpu(priv->rxon_timing.atim_window));
  1991. }
  1992. static int iwl_scan_initiate(struct iwl_priv *priv)
  1993. {
  1994. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1995. IWL_ERROR("APs don't scan.\n");
  1996. return 0;
  1997. }
  1998. if (!iwl_is_ready_rf(priv)) {
  1999. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2000. return -EIO;
  2001. }
  2002. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2003. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2004. return -EAGAIN;
  2005. }
  2006. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2007. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2008. "Queuing.\n");
  2009. return -EAGAIN;
  2010. }
  2011. IWL_DEBUG_INFO("Starting scan...\n");
  2012. priv->scan_bands = 2;
  2013. set_bit(STATUS_SCANNING, &priv->status);
  2014. priv->scan_start = jiffies;
  2015. priv->scan_pass_start = priv->scan_start;
  2016. queue_work(priv->workqueue, &priv->request_scan);
  2017. return 0;
  2018. }
  2019. static int iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  2020. {
  2021. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  2022. if (hw_decrypt)
  2023. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2024. else
  2025. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2026. return 0;
  2027. }
  2028. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode)
  2029. {
  2030. if (phymode == MODE_IEEE80211A) {
  2031. priv->staging_rxon.flags &=
  2032. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2033. | RXON_FLG_CCK_MSK);
  2034. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2035. } else {
  2036. /* Copied from iwl_bg_post_associate() */
  2037. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2038. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2039. else
  2040. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2041. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2042. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2043. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2044. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2045. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2046. }
  2047. }
  2048. /*
  2049. * initilize rxon structure with default values fromm eeprom
  2050. */
  2051. static void iwl_connection_init_rx_config(struct iwl_priv *priv)
  2052. {
  2053. const struct iwl_channel_info *ch_info;
  2054. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2055. switch (priv->iw_mode) {
  2056. case IEEE80211_IF_TYPE_AP:
  2057. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2058. break;
  2059. case IEEE80211_IF_TYPE_STA:
  2060. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2061. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2062. break;
  2063. case IEEE80211_IF_TYPE_IBSS:
  2064. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2065. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2066. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2067. RXON_FILTER_ACCEPT_GRP_MSK;
  2068. break;
  2069. case IEEE80211_IF_TYPE_MNTR:
  2070. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2071. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2072. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2073. break;
  2074. }
  2075. #if 0
  2076. /* TODO: Figure out when short_preamble would be set and cache from
  2077. * that */
  2078. if (!hw_to_local(priv->hw)->short_preamble)
  2079. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2080. else
  2081. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2082. #endif
  2083. ch_info = iwl_get_channel_info(priv, priv->phymode,
  2084. le16_to_cpu(priv->staging_rxon.channel));
  2085. if (!ch_info)
  2086. ch_info = &priv->channel_info[0];
  2087. /*
  2088. * in some case A channels are all non IBSS
  2089. * in this case force B/G channel
  2090. */
  2091. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2092. !(is_channel_ibss(ch_info)))
  2093. ch_info = &priv->channel_info[0];
  2094. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2095. if (is_channel_a_band(ch_info))
  2096. priv->phymode = MODE_IEEE80211A;
  2097. else
  2098. priv->phymode = MODE_IEEE80211G;
  2099. iwl_set_flags_for_phymode(priv, priv->phymode);
  2100. priv->staging_rxon.ofdm_basic_rates =
  2101. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2102. priv->staging_rxon.cck_basic_rates =
  2103. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2104. }
  2105. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  2106. {
  2107. if (!iwl_is_ready_rf(priv))
  2108. return -EAGAIN;
  2109. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2110. const struct iwl_channel_info *ch_info;
  2111. ch_info = iwl_get_channel_info(priv,
  2112. priv->phymode,
  2113. le16_to_cpu(priv->staging_rxon.channel));
  2114. if (!ch_info || !is_channel_ibss(ch_info)) {
  2115. IWL_ERROR("channel %d not IBSS channel\n",
  2116. le16_to_cpu(priv->staging_rxon.channel));
  2117. return -EINVAL;
  2118. }
  2119. }
  2120. cancel_delayed_work(&priv->scan_check);
  2121. if (iwl_scan_cancel_timeout(priv, 100)) {
  2122. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2123. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2124. return -EAGAIN;
  2125. }
  2126. priv->iw_mode = mode;
  2127. iwl_connection_init_rx_config(priv);
  2128. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2129. iwl_clear_stations_table(priv);
  2130. iwl_commit_rxon(priv);
  2131. return 0;
  2132. }
  2133. static void iwl_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2134. struct ieee80211_tx_control *ctl,
  2135. struct iwl_cmd *cmd,
  2136. struct sk_buff *skb_frag,
  2137. int last_frag)
  2138. {
  2139. struct iwl_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2140. switch (keyinfo->alg) {
  2141. case ALG_CCMP:
  2142. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2143. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2144. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2145. break;
  2146. case ALG_TKIP:
  2147. #if 0
  2148. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2149. if (last_frag)
  2150. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2151. 8);
  2152. else
  2153. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2154. #endif
  2155. break;
  2156. case ALG_WEP:
  2157. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2158. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2159. if (keyinfo->keylen == 13)
  2160. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2161. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2162. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2163. "with key %d\n", ctl->key_idx);
  2164. break;
  2165. default:
  2166. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2167. break;
  2168. }
  2169. }
  2170. /*
  2171. * handle build REPLY_TX command notification.
  2172. */
  2173. static void iwl_build_tx_cmd_basic(struct iwl_priv *priv,
  2174. struct iwl_cmd *cmd,
  2175. struct ieee80211_tx_control *ctrl,
  2176. struct ieee80211_hdr *hdr,
  2177. int is_unicast, u8 std_id)
  2178. {
  2179. __le16 *qc;
  2180. u16 fc = le16_to_cpu(hdr->frame_control);
  2181. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2182. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2183. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2184. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2185. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2186. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2187. if (ieee80211_is_probe_response(fc) &&
  2188. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2189. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2190. } else {
  2191. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2192. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2193. }
  2194. cmd->cmd.tx.sta_id = std_id;
  2195. if (ieee80211_get_morefrag(hdr))
  2196. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2197. qc = ieee80211_get_qos_ctrl(hdr);
  2198. if (qc) {
  2199. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2200. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2201. } else
  2202. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2203. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2204. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2205. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2206. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2207. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2208. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2209. }
  2210. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2211. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2212. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2213. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2214. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2215. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2216. cmd->cmd.tx.timeout.pm_frame_timeout =
  2217. cpu_to_le16(3);
  2218. else
  2219. cmd->cmd.tx.timeout.pm_frame_timeout =
  2220. cpu_to_le16(2);
  2221. } else
  2222. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2223. cmd->cmd.tx.driver_txop = 0;
  2224. cmd->cmd.tx.tx_flags = tx_flags;
  2225. cmd->cmd.tx.next_frame_len = 0;
  2226. }
  2227. static int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  2228. {
  2229. int sta_id;
  2230. u16 fc = le16_to_cpu(hdr->frame_control);
  2231. /* If this frame is broadcast or not data then use the broadcast
  2232. * station id */
  2233. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2234. is_multicast_ether_addr(hdr->addr1))
  2235. return priv->hw_setting.bcast_sta_id;
  2236. switch (priv->iw_mode) {
  2237. /* If this frame is part of a BSS network (we're a station), then
  2238. * we use the AP's station id */
  2239. case IEEE80211_IF_TYPE_STA:
  2240. return IWL_AP_ID;
  2241. /* If we are an AP, then find the station, or use BCAST */
  2242. case IEEE80211_IF_TYPE_AP:
  2243. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2244. if (sta_id != IWL_INVALID_STATION)
  2245. return sta_id;
  2246. return priv->hw_setting.bcast_sta_id;
  2247. /* If this frame is part of a IBSS network, then we use the
  2248. * target specific station id */
  2249. case IEEE80211_IF_TYPE_IBSS: {
  2250. DECLARE_MAC_BUF(mac);
  2251. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2252. if (sta_id != IWL_INVALID_STATION)
  2253. return sta_id;
  2254. sta_id = iwl_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  2255. if (sta_id != IWL_INVALID_STATION)
  2256. return sta_id;
  2257. IWL_DEBUG_DROP("Station %s not in station map. "
  2258. "Defaulting to broadcast...\n",
  2259. print_mac(mac, hdr->addr1));
  2260. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2261. return priv->hw_setting.bcast_sta_id;
  2262. }
  2263. default:
  2264. IWL_WARNING("Unkown mode of operation: %d", priv->iw_mode);
  2265. return priv->hw_setting.bcast_sta_id;
  2266. }
  2267. }
  2268. /*
  2269. * start REPLY_TX command process
  2270. */
  2271. static int iwl_tx_skb(struct iwl_priv *priv,
  2272. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2273. {
  2274. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2275. struct iwl_tfd_frame *tfd;
  2276. u32 *control_flags;
  2277. int txq_id = ctl->queue;
  2278. struct iwl_tx_queue *txq = NULL;
  2279. struct iwl_queue *q = NULL;
  2280. dma_addr_t phys_addr;
  2281. dma_addr_t txcmd_phys;
  2282. struct iwl_cmd *out_cmd = NULL;
  2283. u16 len, idx, len_org;
  2284. u8 id, hdr_len, unicast;
  2285. u8 sta_id;
  2286. u16 seq_number = 0;
  2287. u16 fc;
  2288. __le16 *qc;
  2289. u8 wait_write_ptr = 0;
  2290. unsigned long flags;
  2291. int rc;
  2292. spin_lock_irqsave(&priv->lock, flags);
  2293. if (iwl_is_rfkill(priv)) {
  2294. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2295. goto drop_unlock;
  2296. }
  2297. if (!priv->interface_id) {
  2298. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2299. goto drop_unlock;
  2300. }
  2301. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2302. IWL_ERROR("ERROR: No TX rate available.\n");
  2303. goto drop_unlock;
  2304. }
  2305. unicast = !is_multicast_ether_addr(hdr->addr1);
  2306. id = 0;
  2307. fc = le16_to_cpu(hdr->frame_control);
  2308. #ifdef CONFIG_IWLWIFI_DEBUG
  2309. if (ieee80211_is_auth(fc))
  2310. IWL_DEBUG_TX("Sending AUTH frame\n");
  2311. else if (ieee80211_is_assoc_request(fc))
  2312. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2313. else if (ieee80211_is_reassoc_request(fc))
  2314. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2315. #endif
  2316. if (!iwl_is_associated(priv) &&
  2317. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2318. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  2319. goto drop_unlock;
  2320. }
  2321. spin_unlock_irqrestore(&priv->lock, flags);
  2322. hdr_len = ieee80211_get_hdrlen(fc);
  2323. sta_id = iwl_get_sta_id(priv, hdr);
  2324. if (sta_id == IWL_INVALID_STATION) {
  2325. DECLARE_MAC_BUF(mac);
  2326. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2327. print_mac(mac, hdr->addr1));
  2328. goto drop;
  2329. }
  2330. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2331. qc = ieee80211_get_qos_ctrl(hdr);
  2332. if (qc) {
  2333. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2334. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2335. IEEE80211_SCTL_SEQ;
  2336. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2337. (hdr->seq_ctrl &
  2338. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2339. seq_number += 0x10;
  2340. }
  2341. txq = &priv->txq[txq_id];
  2342. q = &txq->q;
  2343. spin_lock_irqsave(&priv->lock, flags);
  2344. tfd = &txq->bd[q->first_empty];
  2345. memset(tfd, 0, sizeof(*tfd));
  2346. control_flags = (u32 *) tfd;
  2347. idx = get_cmd_index(q, q->first_empty, 0);
  2348. memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
  2349. txq->txb[q->first_empty].skb[0] = skb;
  2350. memcpy(&(txq->txb[q->first_empty].status.control),
  2351. ctl, sizeof(struct ieee80211_tx_control));
  2352. out_cmd = &txq->cmd[idx];
  2353. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2354. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2355. out_cmd->hdr.cmd = REPLY_TX;
  2356. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2357. INDEX_TO_SEQ(q->first_empty)));
  2358. /* copy frags header */
  2359. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2360. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2361. len = priv->hw_setting.tx_cmd_len +
  2362. sizeof(struct iwl_cmd_header) + hdr_len;
  2363. len_org = len;
  2364. len = (len + 3) & ~3;
  2365. if (len_org != len)
  2366. len_org = 1;
  2367. else
  2368. len_org = 0;
  2369. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2370. offsetof(struct iwl_cmd, hdr);
  2371. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2372. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2373. iwl_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2374. /* 802.11 null functions have no payload... */
  2375. len = skb->len - hdr_len;
  2376. if (len) {
  2377. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2378. len, PCI_DMA_TODEVICE);
  2379. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2380. }
  2381. /* If there is no payload, then only one TFD is used */
  2382. if (!len)
  2383. *control_flags = TFD_CTL_COUNT_SET(1);
  2384. else
  2385. *control_flags = TFD_CTL_COUNT_SET(2) |
  2386. TFD_CTL_PAD_SET(U32_PAD(len));
  2387. len = (u16)skb->len;
  2388. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2389. /* TODO need this for burst mode later on */
  2390. iwl_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2391. /* set is_hcca to 0; it probably will never be implemented */
  2392. iwl_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2393. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  2394. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  2395. if (!ieee80211_get_morefrag(hdr)) {
  2396. txq->need_update = 1;
  2397. if (qc) {
  2398. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2399. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2400. }
  2401. } else {
  2402. wait_write_ptr = 1;
  2403. txq->need_update = 0;
  2404. }
  2405. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2406. sizeof(out_cmd->cmd.tx));
  2407. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2408. ieee80211_get_hdrlen(fc));
  2409. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  2410. rc = iwl_tx_queue_update_write_ptr(priv, txq);
  2411. spin_unlock_irqrestore(&priv->lock, flags);
  2412. if (rc)
  2413. return rc;
  2414. if ((iwl_queue_space(q) < q->high_mark)
  2415. && priv->mac80211_registered) {
  2416. if (wait_write_ptr) {
  2417. spin_lock_irqsave(&priv->lock, flags);
  2418. txq->need_update = 1;
  2419. iwl_tx_queue_update_write_ptr(priv, txq);
  2420. spin_unlock_irqrestore(&priv->lock, flags);
  2421. }
  2422. ieee80211_stop_queue(priv->hw, ctl->queue);
  2423. }
  2424. return 0;
  2425. drop_unlock:
  2426. spin_unlock_irqrestore(&priv->lock, flags);
  2427. drop:
  2428. return -1;
  2429. }
  2430. static void iwl_set_rate(struct iwl_priv *priv)
  2431. {
  2432. const struct ieee80211_hw_mode *hw = NULL;
  2433. struct ieee80211_rate *rate;
  2434. int i;
  2435. hw = iwl_get_hw_mode(priv, priv->phymode);
  2436. if (!hw) {
  2437. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2438. return;
  2439. }
  2440. priv->active_rate = 0;
  2441. priv->active_rate_basic = 0;
  2442. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2443. hw->mode == MODE_IEEE80211A ?
  2444. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2445. for (i = 0; i < hw->num_rates; i++) {
  2446. rate = &(hw->rates[i]);
  2447. if ((rate->val < IWL_RATE_COUNT) &&
  2448. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2449. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2450. rate->val, iwl_rates[rate->val].plcp,
  2451. (rate->flags & IEEE80211_RATE_BASIC) ?
  2452. "*" : "");
  2453. priv->active_rate |= (1 << rate->val);
  2454. if (rate->flags & IEEE80211_RATE_BASIC)
  2455. priv->active_rate_basic |= (1 << rate->val);
  2456. } else
  2457. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2458. rate->val, iwl_rates[rate->val].plcp);
  2459. }
  2460. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2461. priv->active_rate, priv->active_rate_basic);
  2462. /*
  2463. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2464. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2465. * OFDM
  2466. */
  2467. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2468. priv->staging_rxon.cck_basic_rates =
  2469. ((priv->active_rate_basic &
  2470. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2471. else
  2472. priv->staging_rxon.cck_basic_rates =
  2473. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2474. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2475. priv->staging_rxon.ofdm_basic_rates =
  2476. ((priv->active_rate_basic &
  2477. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2478. IWL_FIRST_OFDM_RATE) & 0xFF;
  2479. else
  2480. priv->staging_rxon.ofdm_basic_rates =
  2481. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2482. }
  2483. static void iwl_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2484. {
  2485. unsigned long flags;
  2486. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2487. return;
  2488. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2489. disable_radio ? "OFF" : "ON");
  2490. if (disable_radio) {
  2491. iwl_scan_cancel(priv);
  2492. /* FIXME: This is a workaround for AP */
  2493. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2494. spin_lock_irqsave(&priv->lock, flags);
  2495. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2496. CSR_UCODE_SW_BIT_RFKILL);
  2497. spin_unlock_irqrestore(&priv->lock, flags);
  2498. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2499. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2500. }
  2501. return;
  2502. }
  2503. spin_lock_irqsave(&priv->lock, flags);
  2504. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2505. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2506. spin_unlock_irqrestore(&priv->lock, flags);
  2507. /* wake up ucode */
  2508. msleep(10);
  2509. spin_lock_irqsave(&priv->lock, flags);
  2510. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2511. if (!iwl_grab_restricted_access(priv))
  2512. iwl_release_restricted_access(priv);
  2513. spin_unlock_irqrestore(&priv->lock, flags);
  2514. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2515. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2516. "disabled by HW switch\n");
  2517. return;
  2518. }
  2519. queue_work(priv->workqueue, &priv->restart);
  2520. return;
  2521. }
  2522. void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2523. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2524. {
  2525. u16 fc =
  2526. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2527. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2528. return;
  2529. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2530. return;
  2531. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2532. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2533. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2534. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2535. RX_RES_STATUS_BAD_ICV_MIC)
  2536. stats->flag |= RX_FLAG_MMIC_ERROR;
  2537. case RX_RES_STATUS_SEC_TYPE_WEP:
  2538. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2539. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2540. RX_RES_STATUS_DECRYPT_OK) {
  2541. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2542. stats->flag |= RX_FLAG_DECRYPTED;
  2543. }
  2544. break;
  2545. default:
  2546. break;
  2547. }
  2548. }
  2549. void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
  2550. struct iwl_rx_mem_buffer *rxb,
  2551. void *data, short len,
  2552. struct ieee80211_rx_status *stats,
  2553. u16 phy_flags)
  2554. {
  2555. struct iwl_rt_rx_hdr *iwl_rt;
  2556. /* First cache any information we need before we overwrite
  2557. * the information provided in the skb from the hardware */
  2558. s8 signal = stats->ssi;
  2559. s8 noise = 0;
  2560. int rate = stats->rate;
  2561. u64 tsf = stats->mactime;
  2562. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2563. /* We received data from the HW, so stop the watchdog */
  2564. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl_rt)) {
  2565. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2566. return;
  2567. }
  2568. /* copy the frame data to write after where the radiotap header goes */
  2569. iwl_rt = (void *)rxb->skb->data;
  2570. memmove(iwl_rt->payload, data, len);
  2571. iwl_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2572. iwl_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2573. /* total header + data */
  2574. iwl_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl_rt));
  2575. /* Set the size of the skb to the size of the frame */
  2576. skb_put(rxb->skb, sizeof(*iwl_rt) + len);
  2577. /* Big bitfield of all the fields we provide in radiotap */
  2578. iwl_rt->rt_hdr.it_present =
  2579. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2580. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2581. (1 << IEEE80211_RADIOTAP_RATE) |
  2582. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2583. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2584. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2585. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2586. /* Zero the flags, we'll add to them as we go */
  2587. iwl_rt->rt_flags = 0;
  2588. iwl_rt->rt_tsf = cpu_to_le64(tsf);
  2589. /* Convert to dBm */
  2590. iwl_rt->rt_dbmsignal = signal;
  2591. iwl_rt->rt_dbmnoise = noise;
  2592. /* Convert the channel frequency and set the flags */
  2593. iwl_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2594. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2595. iwl_rt->rt_chbitmask =
  2596. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2597. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2598. iwl_rt->rt_chbitmask =
  2599. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2600. else /* 802.11g */
  2601. iwl_rt->rt_chbitmask =
  2602. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2603. rate = iwl_rate_index_from_plcp(rate);
  2604. if (rate == -1)
  2605. iwl_rt->rt_rate = 0;
  2606. else
  2607. iwl_rt->rt_rate = iwl_rates[rate].ieee;
  2608. /* antenna number */
  2609. iwl_rt->rt_antenna =
  2610. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2611. /* set the preamble flag if we have it */
  2612. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2613. iwl_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2614. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2615. stats->flag |= RX_FLAG_RADIOTAP;
  2616. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2617. rxb->skb = NULL;
  2618. }
  2619. #define IWL_PACKET_RETRY_TIME HZ
  2620. int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2621. {
  2622. u16 sc = le16_to_cpu(header->seq_ctrl);
  2623. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2624. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2625. u16 *last_seq, *last_frag;
  2626. unsigned long *last_time;
  2627. switch (priv->iw_mode) {
  2628. case IEEE80211_IF_TYPE_IBSS:{
  2629. struct list_head *p;
  2630. struct iwl_ibss_seq *entry = NULL;
  2631. u8 *mac = header->addr2;
  2632. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2633. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2634. entry =
  2635. list_entry(p, struct iwl_ibss_seq, list);
  2636. if (!compare_ether_addr(entry->mac, mac))
  2637. break;
  2638. }
  2639. if (p == &priv->ibss_mac_hash[index]) {
  2640. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2641. if (!entry) {
  2642. IWL_ERROR
  2643. ("Cannot malloc new mac entry\n");
  2644. return 0;
  2645. }
  2646. memcpy(entry->mac, mac, ETH_ALEN);
  2647. entry->seq_num = seq;
  2648. entry->frag_num = frag;
  2649. entry->packet_time = jiffies;
  2650. list_add(&entry->list,
  2651. &priv->ibss_mac_hash[index]);
  2652. return 0;
  2653. }
  2654. last_seq = &entry->seq_num;
  2655. last_frag = &entry->frag_num;
  2656. last_time = &entry->packet_time;
  2657. break;
  2658. }
  2659. case IEEE80211_IF_TYPE_STA:
  2660. last_seq = &priv->last_seq_num;
  2661. last_frag = &priv->last_frag_num;
  2662. last_time = &priv->last_packet_time;
  2663. break;
  2664. default:
  2665. return 0;
  2666. }
  2667. if ((*last_seq == seq) &&
  2668. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2669. if (*last_frag == frag)
  2670. goto drop;
  2671. if (*last_frag + 1 != frag)
  2672. /* out-of-order fragment */
  2673. goto drop;
  2674. } else
  2675. *last_seq = seq;
  2676. *last_frag = frag;
  2677. *last_time = jiffies;
  2678. return 0;
  2679. drop:
  2680. return 1;
  2681. }
  2682. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2683. #include "iwl-spectrum.h"
  2684. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2685. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2686. #define TIME_UNIT 1024
  2687. /*
  2688. * extended beacon time format
  2689. * time in usec will be changed into a 32-bit value in 8:24 format
  2690. * the high 1 byte is the beacon counts
  2691. * the lower 3 bytes is the time in usec within one beacon interval
  2692. */
  2693. static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2694. {
  2695. u32 quot;
  2696. u32 rem;
  2697. u32 interval = beacon_interval * 1024;
  2698. if (!interval || !usec)
  2699. return 0;
  2700. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2701. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2702. return (quot << 24) + rem;
  2703. }
  2704. /* base is usually what we get from ucode with each received frame,
  2705. * the same as HW timer counter counting down
  2706. */
  2707. static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2708. {
  2709. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2710. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2711. u32 interval = beacon_interval * TIME_UNIT;
  2712. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2713. (addon & BEACON_TIME_MASK_HIGH);
  2714. if (base_low > addon_low)
  2715. res += base_low - addon_low;
  2716. else if (base_low < addon_low) {
  2717. res += interval + base_low - addon_low;
  2718. res += (1 << 24);
  2719. } else
  2720. res += (1 << 24);
  2721. return cpu_to_le32(res);
  2722. }
  2723. static int iwl_get_measurement(struct iwl_priv *priv,
  2724. struct ieee80211_measurement_params *params,
  2725. u8 type)
  2726. {
  2727. struct iwl_spectrum_cmd spectrum;
  2728. struct iwl_rx_packet *res;
  2729. struct iwl_host_cmd cmd = {
  2730. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2731. .data = (void *)&spectrum,
  2732. .meta.flags = CMD_WANT_SKB,
  2733. };
  2734. u32 add_time = le64_to_cpu(params->start_time);
  2735. int rc;
  2736. int spectrum_resp_status;
  2737. int duration = le16_to_cpu(params->duration);
  2738. if (iwl_is_associated(priv))
  2739. add_time =
  2740. iwl_usecs_to_beacons(
  2741. le64_to_cpu(params->start_time) - priv->last_tsf,
  2742. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2743. memset(&spectrum, 0, sizeof(spectrum));
  2744. spectrum.channel_count = cpu_to_le16(1);
  2745. spectrum.flags =
  2746. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2747. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2748. cmd.len = sizeof(spectrum);
  2749. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2750. if (iwl_is_associated(priv))
  2751. spectrum.start_time =
  2752. iwl_add_beacon_time(priv->last_beacon_time,
  2753. add_time,
  2754. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2755. else
  2756. spectrum.start_time = 0;
  2757. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2758. spectrum.channels[0].channel = params->channel;
  2759. spectrum.channels[0].type = type;
  2760. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2761. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2762. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2763. rc = iwl_send_cmd_sync(priv, &cmd);
  2764. if (rc)
  2765. return rc;
  2766. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2767. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2768. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2769. rc = -EIO;
  2770. }
  2771. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2772. switch (spectrum_resp_status) {
  2773. case 0: /* Command will be handled */
  2774. if (res->u.spectrum.id != 0xff) {
  2775. IWL_DEBUG_INFO
  2776. ("Replaced existing measurement: %d\n",
  2777. res->u.spectrum.id);
  2778. priv->measurement_status &= ~MEASUREMENT_READY;
  2779. }
  2780. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2781. rc = 0;
  2782. break;
  2783. case 1: /* Command will not be handled */
  2784. rc = -EAGAIN;
  2785. break;
  2786. }
  2787. dev_kfree_skb_any(cmd.meta.u.skb);
  2788. return rc;
  2789. }
  2790. #endif
  2791. static void iwl_txstatus_to_ieee(struct iwl_priv *priv,
  2792. struct iwl_tx_info *tx_sta)
  2793. {
  2794. tx_sta->status.ack_signal = 0;
  2795. tx_sta->status.excessive_retries = 0;
  2796. tx_sta->status.queue_length = 0;
  2797. tx_sta->status.queue_number = 0;
  2798. if (in_interrupt())
  2799. ieee80211_tx_status_irqsafe(priv->hw,
  2800. tx_sta->skb[0], &(tx_sta->status));
  2801. else
  2802. ieee80211_tx_status(priv->hw,
  2803. tx_sta->skb[0], &(tx_sta->status));
  2804. tx_sta->skb[0] = NULL;
  2805. }
  2806. /**
  2807. * iwl_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2808. *
  2809. * When FW advances 'R' index, all entries between old and
  2810. * new 'R' index need to be reclaimed. As result, some free space
  2811. * forms. If there is enough free space (> low mark), wake Tx queue.
  2812. */
  2813. int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2814. {
  2815. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2816. struct iwl_queue *q = &txq->q;
  2817. int nfreed = 0;
  2818. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2819. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2820. "is out of range [0-%d] %d %d.\n", txq_id,
  2821. index, q->n_bd, q->first_empty, q->last_used);
  2822. return 0;
  2823. }
  2824. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2825. q->last_used != index;
  2826. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
  2827. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2828. iwl_txstatus_to_ieee(priv,
  2829. &(txq->txb[txq->q.last_used]));
  2830. iwl_hw_txq_free_tfd(priv, txq);
  2831. } else if (nfreed > 1) {
  2832. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2833. q->first_empty, q->last_used);
  2834. queue_work(priv->workqueue, &priv->restart);
  2835. }
  2836. nfreed++;
  2837. }
  2838. if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2839. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2840. priv->mac80211_registered)
  2841. ieee80211_wake_queue(priv->hw, txq_id);
  2842. return nfreed;
  2843. }
  2844. static int iwl_is_tx_success(u32 status)
  2845. {
  2846. return (status & 0xFF) == 0x1;
  2847. }
  2848. /******************************************************************************
  2849. *
  2850. * Generic RX handler implementations
  2851. *
  2852. ******************************************************************************/
  2853. static void iwl_rx_reply_tx(struct iwl_priv *priv,
  2854. struct iwl_rx_mem_buffer *rxb)
  2855. {
  2856. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2857. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2858. int txq_id = SEQ_TO_QUEUE(sequence);
  2859. int index = SEQ_TO_INDEX(sequence);
  2860. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2861. struct ieee80211_tx_status *tx_status;
  2862. struct iwl_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2863. u32 status = le32_to_cpu(tx_resp->status);
  2864. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2865. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2866. "is out of range [0-%d] %d %d\n", txq_id,
  2867. index, txq->q.n_bd, txq->q.first_empty,
  2868. txq->q.last_used);
  2869. return;
  2870. }
  2871. tx_status = &(txq->txb[txq->q.last_used].status);
  2872. tx_status->retry_count = tx_resp->failure_frame;
  2873. tx_status->queue_number = status;
  2874. tx_status->queue_length = tx_resp->bt_kill_count;
  2875. tx_status->queue_length |= tx_resp->failure_rts;
  2876. tx_status->flags =
  2877. iwl_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2878. tx_status->control.tx_rate = iwl_rate_index_from_plcp(tx_resp->rate);
  2879. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
  2880. txq_id, iwl_get_tx_fail_reason(status), status,
  2881. tx_resp->rate, tx_resp->failure_frame);
  2882. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2883. if (index != -1)
  2884. iwl_tx_queue_reclaim(priv, txq_id, index);
  2885. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2886. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2887. }
  2888. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  2889. struct iwl_rx_mem_buffer *rxb)
  2890. {
  2891. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2892. struct iwl_alive_resp *palive;
  2893. struct delayed_work *pwork;
  2894. palive = &pkt->u.alive_frame;
  2895. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2896. "0x%01X 0x%01X\n",
  2897. palive->is_valid, palive->ver_type,
  2898. palive->ver_subtype);
  2899. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2900. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2901. memcpy(&priv->card_alive_init,
  2902. &pkt->u.alive_frame,
  2903. sizeof(struct iwl_init_alive_resp));
  2904. pwork = &priv->init_alive_start;
  2905. } else {
  2906. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2907. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2908. sizeof(struct iwl_alive_resp));
  2909. pwork = &priv->alive_start;
  2910. iwl_disable_events(priv);
  2911. }
  2912. /* We delay the ALIVE response by 5ms to
  2913. * give the HW RF Kill time to activate... */
  2914. if (palive->is_valid == UCODE_VALID_OK)
  2915. queue_delayed_work(priv->workqueue, pwork,
  2916. msecs_to_jiffies(5));
  2917. else
  2918. IWL_WARNING("uCode did not respond OK.\n");
  2919. }
  2920. static void iwl_rx_reply_add_sta(struct iwl_priv *priv,
  2921. struct iwl_rx_mem_buffer *rxb)
  2922. {
  2923. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2924. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2925. return;
  2926. }
  2927. static void iwl_rx_reply_error(struct iwl_priv *priv,
  2928. struct iwl_rx_mem_buffer *rxb)
  2929. {
  2930. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2931. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2932. "seq 0x%04X ser 0x%08X\n",
  2933. le32_to_cpu(pkt->u.err_resp.error_type),
  2934. get_cmd_string(pkt->u.err_resp.cmd_id),
  2935. pkt->u.err_resp.cmd_id,
  2936. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2937. le32_to_cpu(pkt->u.err_resp.error_info));
  2938. }
  2939. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2940. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  2941. {
  2942. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2943. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2944. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  2945. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2946. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2947. rxon->channel = csa->channel;
  2948. priv->staging_rxon.channel = csa->channel;
  2949. }
  2950. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2951. struct iwl_rx_mem_buffer *rxb)
  2952. {
  2953. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2954. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2955. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2956. if (!report->state) {
  2957. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2958. "Spectrum Measure Notification: Start\n");
  2959. return;
  2960. }
  2961. memcpy(&priv->measure_report, report, sizeof(*report));
  2962. priv->measurement_status |= MEASUREMENT_READY;
  2963. #endif
  2964. }
  2965. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  2966. struct iwl_rx_mem_buffer *rxb)
  2967. {
  2968. #ifdef CONFIG_IWLWIFI_DEBUG
  2969. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2970. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2971. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2972. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2973. #endif
  2974. }
  2975. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2976. struct iwl_rx_mem_buffer *rxb)
  2977. {
  2978. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2979. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2980. "notification for %s:\n",
  2981. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2982. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2983. }
  2984. static void iwl_bg_beacon_update(struct work_struct *work)
  2985. {
  2986. struct iwl_priv *priv =
  2987. container_of(work, struct iwl_priv, beacon_update);
  2988. struct sk_buff *beacon;
  2989. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2990. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  2991. if (!beacon) {
  2992. IWL_ERROR("update beacon failed\n");
  2993. return;
  2994. }
  2995. mutex_lock(&priv->mutex);
  2996. /* new beacon skb is allocated every time; dispose previous.*/
  2997. if (priv->ibss_beacon)
  2998. dev_kfree_skb(priv->ibss_beacon);
  2999. priv->ibss_beacon = beacon;
  3000. mutex_unlock(&priv->mutex);
  3001. iwl_send_beacon_cmd(priv);
  3002. }
  3003. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  3004. struct iwl_rx_mem_buffer *rxb)
  3005. {
  3006. #ifdef CONFIG_IWLWIFI_DEBUG
  3007. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3008. struct iwl_beacon_notif *beacon = &(pkt->u.beacon_status);
  3009. u8 rate = beacon->beacon_notify_hdr.rate;
  3010. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3011. "tsf %d %d rate %d\n",
  3012. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3013. beacon->beacon_notify_hdr.failure_frame,
  3014. le32_to_cpu(beacon->ibss_mgr_status),
  3015. le32_to_cpu(beacon->high_tsf),
  3016. le32_to_cpu(beacon->low_tsf), rate);
  3017. #endif
  3018. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3019. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3020. queue_work(priv->workqueue, &priv->beacon_update);
  3021. }
  3022. /* Service response to REPLY_SCAN_CMD (0x80) */
  3023. static void iwl_rx_reply_scan(struct iwl_priv *priv,
  3024. struct iwl_rx_mem_buffer *rxb)
  3025. {
  3026. #ifdef CONFIG_IWLWIFI_DEBUG
  3027. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3028. struct iwl_scanreq_notification *notif =
  3029. (struct iwl_scanreq_notification *)pkt->u.raw;
  3030. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3031. #endif
  3032. }
  3033. /* Service SCAN_START_NOTIFICATION (0x82) */
  3034. static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
  3035. struct iwl_rx_mem_buffer *rxb)
  3036. {
  3037. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3038. struct iwl_scanstart_notification *notif =
  3039. (struct iwl_scanstart_notification *)pkt->u.raw;
  3040. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3041. IWL_DEBUG_SCAN("Scan start: "
  3042. "%d [802.11%s] "
  3043. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3044. notif->channel,
  3045. notif->band ? "bg" : "a",
  3046. notif->tsf_high,
  3047. notif->tsf_low, notif->status, notif->beacon_timer);
  3048. }
  3049. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3050. static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
  3051. struct iwl_rx_mem_buffer *rxb)
  3052. {
  3053. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3054. struct iwl_scanresults_notification *notif =
  3055. (struct iwl_scanresults_notification *)pkt->u.raw;
  3056. IWL_DEBUG_SCAN("Scan ch.res: "
  3057. "%d [802.11%s] "
  3058. "(TSF: 0x%08X:%08X) - %d "
  3059. "elapsed=%lu usec (%dms since last)\n",
  3060. notif->channel,
  3061. notif->band ? "bg" : "a",
  3062. le32_to_cpu(notif->tsf_high),
  3063. le32_to_cpu(notif->tsf_low),
  3064. le32_to_cpu(notif->statistics[0]),
  3065. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3066. jiffies_to_msecs(elapsed_jiffies
  3067. (priv->last_scan_jiffies, jiffies)));
  3068. priv->last_scan_jiffies = jiffies;
  3069. }
  3070. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3071. static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
  3072. struct iwl_rx_mem_buffer *rxb)
  3073. {
  3074. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3075. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3076. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3077. scan_notif->scanned_channels,
  3078. scan_notif->tsf_low,
  3079. scan_notif->tsf_high, scan_notif->status);
  3080. /* The HW is no longer scanning */
  3081. clear_bit(STATUS_SCAN_HW, &priv->status);
  3082. /* The scan completion notification came in, so kill that timer... */
  3083. cancel_delayed_work(&priv->scan_check);
  3084. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3085. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3086. jiffies_to_msecs(elapsed_jiffies
  3087. (priv->scan_pass_start, jiffies)));
  3088. /* Remove this scanned band from the list
  3089. * of pending bands to scan */
  3090. priv->scan_bands--;
  3091. /* If a request to abort was given, or the scan did not succeed
  3092. * then we reset the scan state machine and terminate,
  3093. * re-queuing another scan if one has been requested */
  3094. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3095. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3096. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3097. } else {
  3098. /* If there are more bands on this scan pass reschedule */
  3099. if (priv->scan_bands > 0)
  3100. goto reschedule;
  3101. }
  3102. priv->last_scan_jiffies = jiffies;
  3103. IWL_DEBUG_INFO("Setting scan to off\n");
  3104. clear_bit(STATUS_SCANNING, &priv->status);
  3105. IWL_DEBUG_INFO("Scan took %dms\n",
  3106. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3107. queue_work(priv->workqueue, &priv->scan_completed);
  3108. return;
  3109. reschedule:
  3110. priv->scan_pass_start = jiffies;
  3111. queue_work(priv->workqueue, &priv->request_scan);
  3112. }
  3113. /* Handle notification from uCode that card's power state is changing
  3114. * due to software, hardware, or critical temperature RFKILL */
  3115. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  3116. struct iwl_rx_mem_buffer *rxb)
  3117. {
  3118. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3119. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3120. unsigned long status = priv->status;
  3121. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3122. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3123. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3124. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3125. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3126. if (flags & HW_CARD_DISABLED)
  3127. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3128. else
  3129. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3130. if (flags & SW_CARD_DISABLED)
  3131. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3132. else
  3133. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3134. iwl_scan_cancel(priv);
  3135. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3136. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3137. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3138. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3139. queue_work(priv->workqueue, &priv->rf_kill);
  3140. else
  3141. wake_up_interruptible(&priv->wait_command_queue);
  3142. }
  3143. /**
  3144. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  3145. *
  3146. * Setup the RX handlers for each of the reply types sent from the uCode
  3147. * to the host.
  3148. *
  3149. * This function chains into the hardware specific files for them to setup
  3150. * any hardware specific handlers as well.
  3151. */
  3152. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  3153. {
  3154. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  3155. priv->rx_handlers[REPLY_ADD_STA] = iwl_rx_reply_add_sta;
  3156. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  3157. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  3158. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3159. iwl_rx_spectrum_measure_notif;
  3160. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  3161. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3162. iwl_rx_pm_debug_statistics_notif;
  3163. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  3164. /* NOTE: iwl_rx_statistics is different based on whether
  3165. * the build is for the 3945 or the 4965. See the
  3166. * corresponding implementation in iwl-XXXX.c
  3167. *
  3168. * The same handler is used for both the REPLY to a
  3169. * discrete statistics request from the host as well as
  3170. * for the periodic statistics notification from the uCode
  3171. */
  3172. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_hw_rx_statistics;
  3173. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_hw_rx_statistics;
  3174. priv->rx_handlers[REPLY_SCAN_CMD] = iwl_rx_reply_scan;
  3175. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl_rx_scan_start_notif;
  3176. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3177. iwl_rx_scan_results_notif;
  3178. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3179. iwl_rx_scan_complete_notif;
  3180. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  3181. priv->rx_handlers[REPLY_TX] = iwl_rx_reply_tx;
  3182. /* Setup hardware specific Rx handlers */
  3183. iwl_hw_rx_handler_setup(priv);
  3184. }
  3185. /**
  3186. * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3187. * @rxb: Rx buffer to reclaim
  3188. *
  3189. * If an Rx buffer has an async callback associated with it the callback
  3190. * will be executed. The attached skb (if present) will only be freed
  3191. * if the callback returns 1
  3192. */
  3193. static void iwl_tx_cmd_complete(struct iwl_priv *priv,
  3194. struct iwl_rx_mem_buffer *rxb)
  3195. {
  3196. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3197. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3198. int txq_id = SEQ_TO_QUEUE(sequence);
  3199. int index = SEQ_TO_INDEX(sequence);
  3200. int huge = sequence & SEQ_HUGE_FRAME;
  3201. int cmd_index;
  3202. struct iwl_cmd *cmd;
  3203. /* If a Tx command is being handled and it isn't in the actual
  3204. * command queue then there a command routing bug has been introduced
  3205. * in the queue management code. */
  3206. if (txq_id != IWL_CMD_QUEUE_NUM)
  3207. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3208. txq_id, pkt->hdr.cmd);
  3209. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3210. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3211. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3212. /* Input error checking is done when commands are added to queue. */
  3213. if (cmd->meta.flags & CMD_WANT_SKB) {
  3214. cmd->meta.source->u.skb = rxb->skb;
  3215. rxb->skb = NULL;
  3216. } else if (cmd->meta.u.callback &&
  3217. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3218. rxb->skb = NULL;
  3219. iwl_tx_queue_reclaim(priv, txq_id, index);
  3220. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3221. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3222. wake_up_interruptible(&priv->wait_command_queue);
  3223. }
  3224. }
  3225. /************************** RX-FUNCTIONS ****************************/
  3226. /*
  3227. * Rx theory of operation
  3228. *
  3229. * The host allocates 32 DMA target addresses and passes the host address
  3230. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3231. * 0 to 31
  3232. *
  3233. * Rx Queue Indexes
  3234. * The host/firmware share two index registers for managing the Rx buffers.
  3235. *
  3236. * The READ index maps to the first position that the firmware may be writing
  3237. * to -- the driver can read up to (but not including) this position and get
  3238. * good data.
  3239. * The READ index is managed by the firmware once the card is enabled.
  3240. *
  3241. * The WRITE index maps to the last position the driver has read from -- the
  3242. * position preceding WRITE is the last slot the firmware can place a packet.
  3243. *
  3244. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3245. * WRITE = READ.
  3246. *
  3247. * During initialization the host sets up the READ queue position to the first
  3248. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3249. *
  3250. * When the firmware places a packet in a buffer it will advance the READ index
  3251. * and fire the RX interrupt. The driver can then query the READ index and
  3252. * process as many packets as possible, moving the WRITE index forward as it
  3253. * resets the Rx queue buffers with new memory.
  3254. *
  3255. * The management in the driver is as follows:
  3256. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3257. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3258. * to replensish the iwl->rxq->rx_free.
  3259. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  3260. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3261. * 'processed' and 'read' driver indexes as well)
  3262. * + A received packet is processed and handed to the kernel network stack,
  3263. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3264. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3265. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3266. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3267. * were enough free buffers and RX_STALLED is set it is cleared.
  3268. *
  3269. *
  3270. * Driver sequence:
  3271. *
  3272. * iwl_rx_queue_alloc() Allocates rx_free
  3273. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3274. * iwl_rx_queue_restock
  3275. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  3276. * queue, updates firmware pointers, and updates
  3277. * the WRITE index. If insufficient rx_free buffers
  3278. * are available, schedules iwl_rx_replenish
  3279. *
  3280. * -- enable interrupts --
  3281. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  3282. * READ INDEX, detaching the SKB from the pool.
  3283. * Moves the packet buffer from queue to rx_used.
  3284. * Calls iwl_rx_queue_restock to refill any empty
  3285. * slots.
  3286. * ...
  3287. *
  3288. */
  3289. /**
  3290. * iwl_rx_queue_space - Return number of free slots available in queue.
  3291. */
  3292. static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  3293. {
  3294. int s = q->read - q->write;
  3295. if (s <= 0)
  3296. s += RX_QUEUE_SIZE;
  3297. /* keep some buffer to not confuse full and empty queue */
  3298. s -= 2;
  3299. if (s < 0)
  3300. s = 0;
  3301. return s;
  3302. }
  3303. /**
  3304. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3305. *
  3306. * NOTE: This function has 3945 and 4965 specific code sections
  3307. * but is declared in base due to the majority of the
  3308. * implementation being the same (only a numeric constant is
  3309. * different)
  3310. *
  3311. */
  3312. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  3313. {
  3314. u32 reg = 0;
  3315. int rc = 0;
  3316. unsigned long flags;
  3317. spin_lock_irqsave(&q->lock, flags);
  3318. if (q->need_update == 0)
  3319. goto exit_unlock;
  3320. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3321. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3322. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3323. iwl_set_bit(priv, CSR_GP_CNTRL,
  3324. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3325. goto exit_unlock;
  3326. }
  3327. rc = iwl_grab_restricted_access(priv);
  3328. if (rc)
  3329. goto exit_unlock;
  3330. iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
  3331. q->write & ~0x7);
  3332. iwl_release_restricted_access(priv);
  3333. } else
  3334. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3335. q->need_update = 0;
  3336. exit_unlock:
  3337. spin_unlock_irqrestore(&q->lock, flags);
  3338. return rc;
  3339. }
  3340. /**
  3341. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3342. *
  3343. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3344. */
  3345. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3346. dma_addr_t dma_addr)
  3347. {
  3348. return cpu_to_le32((u32)dma_addr);
  3349. }
  3350. /**
  3351. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  3352. *
  3353. * If there are slots in the RX queue that need to be restocked,
  3354. * and we have free pre-allocated buffers, fill the ranks as much
  3355. * as we can pulling from rx_free.
  3356. *
  3357. * This moves the 'write' index forward to catch up with 'processed', and
  3358. * also updates the memory address in the firmware to reference the new
  3359. * target buffer.
  3360. */
  3361. int iwl_rx_queue_restock(struct iwl_priv *priv)
  3362. {
  3363. struct iwl_rx_queue *rxq = &priv->rxq;
  3364. struct list_head *element;
  3365. struct iwl_rx_mem_buffer *rxb;
  3366. unsigned long flags;
  3367. int write, rc;
  3368. spin_lock_irqsave(&rxq->lock, flags);
  3369. write = rxq->write & ~0x7;
  3370. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3371. element = rxq->rx_free.next;
  3372. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3373. list_del(element);
  3374. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3375. rxq->queue[rxq->write] = rxb;
  3376. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3377. rxq->free_count--;
  3378. }
  3379. spin_unlock_irqrestore(&rxq->lock, flags);
  3380. /* If the pre-allocated buffer pool is dropping low, schedule to
  3381. * refill it */
  3382. if (rxq->free_count <= RX_LOW_WATERMARK)
  3383. queue_work(priv->workqueue, &priv->rx_replenish);
  3384. /* If we've added more space for the firmware to place data, tell it */
  3385. if ((write != (rxq->write & ~0x7))
  3386. || (abs(rxq->write - rxq->read) > 7)) {
  3387. spin_lock_irqsave(&rxq->lock, flags);
  3388. rxq->need_update = 1;
  3389. spin_unlock_irqrestore(&rxq->lock, flags);
  3390. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  3391. if (rc)
  3392. return rc;
  3393. }
  3394. return 0;
  3395. }
  3396. /**
  3397. * iwl_rx_replensih - Move all used packet from rx_used to rx_free
  3398. *
  3399. * When moving to rx_free an SKB is allocated for the slot.
  3400. *
  3401. * Also restock the Rx queue via iwl_rx_queue_restock.
  3402. * This is called as a scheduled work item (except for during intialization)
  3403. */
  3404. void iwl_rx_replenish(void *data)
  3405. {
  3406. struct iwl_priv *priv = data;
  3407. struct iwl_rx_queue *rxq = &priv->rxq;
  3408. struct list_head *element;
  3409. struct iwl_rx_mem_buffer *rxb;
  3410. unsigned long flags;
  3411. spin_lock_irqsave(&rxq->lock, flags);
  3412. while (!list_empty(&rxq->rx_used)) {
  3413. element = rxq->rx_used.next;
  3414. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3415. rxb->skb =
  3416. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3417. if (!rxb->skb) {
  3418. if (net_ratelimit())
  3419. printk(KERN_CRIT DRV_NAME
  3420. ": Can not allocate SKB buffers\n");
  3421. /* We don't reschedule replenish work here -- we will
  3422. * call the restock method and if it still needs
  3423. * more buffers it will schedule replenish */
  3424. break;
  3425. }
  3426. priv->alloc_rxb_skb++;
  3427. list_del(element);
  3428. rxb->dma_addr =
  3429. pci_map_single(priv->pci_dev, rxb->skb->data,
  3430. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3431. list_add_tail(&rxb->list, &rxq->rx_free);
  3432. rxq->free_count++;
  3433. }
  3434. spin_unlock_irqrestore(&rxq->lock, flags);
  3435. spin_lock_irqsave(&priv->lock, flags);
  3436. iwl_rx_queue_restock(priv);
  3437. spin_unlock_irqrestore(&priv->lock, flags);
  3438. }
  3439. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3440. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3441. * This free routine walks the list of POOL entries and if SKB is set to
  3442. * non NULL it is unmapped and freed
  3443. */
  3444. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3445. {
  3446. int i;
  3447. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3448. if (rxq->pool[i].skb != NULL) {
  3449. pci_unmap_single(priv->pci_dev,
  3450. rxq->pool[i].dma_addr,
  3451. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3452. dev_kfree_skb(rxq->pool[i].skb);
  3453. }
  3454. }
  3455. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3456. rxq->dma_addr);
  3457. rxq->bd = NULL;
  3458. }
  3459. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  3460. {
  3461. struct iwl_rx_queue *rxq = &priv->rxq;
  3462. struct pci_dev *dev = priv->pci_dev;
  3463. int i;
  3464. spin_lock_init(&rxq->lock);
  3465. INIT_LIST_HEAD(&rxq->rx_free);
  3466. INIT_LIST_HEAD(&rxq->rx_used);
  3467. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3468. if (!rxq->bd)
  3469. return -ENOMEM;
  3470. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3471. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3472. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3473. /* Set us so that we have processed and used all buffers, but have
  3474. * not restocked the Rx queue with fresh buffers */
  3475. rxq->read = rxq->write = 0;
  3476. rxq->free_count = 0;
  3477. rxq->need_update = 0;
  3478. return 0;
  3479. }
  3480. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3481. {
  3482. unsigned long flags;
  3483. int i;
  3484. spin_lock_irqsave(&rxq->lock, flags);
  3485. INIT_LIST_HEAD(&rxq->rx_free);
  3486. INIT_LIST_HEAD(&rxq->rx_used);
  3487. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3488. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3489. /* In the reset function, these buffers may have been allocated
  3490. * to an SKB, so we need to unmap and free potential storage */
  3491. if (rxq->pool[i].skb != NULL) {
  3492. pci_unmap_single(priv->pci_dev,
  3493. rxq->pool[i].dma_addr,
  3494. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3495. priv->alloc_rxb_skb--;
  3496. dev_kfree_skb(rxq->pool[i].skb);
  3497. rxq->pool[i].skb = NULL;
  3498. }
  3499. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3500. }
  3501. /* Set us so that we have processed and used all buffers, but have
  3502. * not restocked the Rx queue with fresh buffers */
  3503. rxq->read = rxq->write = 0;
  3504. rxq->free_count = 0;
  3505. spin_unlock_irqrestore(&rxq->lock, flags);
  3506. }
  3507. /* Convert linear signal-to-noise ratio into dB */
  3508. static u8 ratio2dB[100] = {
  3509. /* 0 1 2 3 4 5 6 7 8 9 */
  3510. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3511. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3512. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3513. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3514. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3515. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3516. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3517. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3518. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3519. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3520. };
  3521. /* Calculates a relative dB value from a ratio of linear
  3522. * (i.e. not dB) signal levels.
  3523. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3524. int iwl_calc_db_from_ratio(int sig_ratio)
  3525. {
  3526. /* Anything above 1000:1 just report as 60 dB */
  3527. if (sig_ratio > 1000)
  3528. return 60;
  3529. /* Above 100:1, divide by 10 and use table,
  3530. * add 20 dB to make up for divide by 10 */
  3531. if (sig_ratio > 100)
  3532. return (20 + (int)ratio2dB[sig_ratio/10]);
  3533. /* We shouldn't see this */
  3534. if (sig_ratio < 1)
  3535. return 0;
  3536. /* Use table for ratios 1:1 - 99:1 */
  3537. return (int)ratio2dB[sig_ratio];
  3538. }
  3539. #define PERFECT_RSSI (-20) /* dBm */
  3540. #define WORST_RSSI (-95) /* dBm */
  3541. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3542. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3543. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3544. * about formulas used below. */
  3545. int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3546. {
  3547. int sig_qual;
  3548. int degradation = PERFECT_RSSI - rssi_dbm;
  3549. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3550. * as indicator; formula is (signal dbm - noise dbm).
  3551. * SNR at or above 40 is a great signal (100%).
  3552. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3553. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3554. if (noise_dbm) {
  3555. if (rssi_dbm - noise_dbm >= 40)
  3556. return 100;
  3557. else if (rssi_dbm < noise_dbm)
  3558. return 0;
  3559. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3560. /* Else use just the signal level.
  3561. * This formula is a least squares fit of data points collected and
  3562. * compared with a reference system that had a percentage (%) display
  3563. * for signal quality. */
  3564. } else
  3565. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3566. (15 * RSSI_RANGE + 62 * degradation)) /
  3567. (RSSI_RANGE * RSSI_RANGE);
  3568. if (sig_qual > 100)
  3569. sig_qual = 100;
  3570. else if (sig_qual < 1)
  3571. sig_qual = 0;
  3572. return sig_qual;
  3573. }
  3574. /**
  3575. * iwl_rx_handle - Main entry function for receiving responses from the uCode
  3576. *
  3577. * Uses the priv->rx_handlers callback function array to invoke
  3578. * the appropriate handlers, including command responses,
  3579. * frame-received notifications, and other notifications.
  3580. */
  3581. static void iwl_rx_handle(struct iwl_priv *priv)
  3582. {
  3583. struct iwl_rx_mem_buffer *rxb;
  3584. struct iwl_rx_packet *pkt;
  3585. struct iwl_rx_queue *rxq = &priv->rxq;
  3586. u32 r, i;
  3587. int reclaim;
  3588. unsigned long flags;
  3589. r = iwl_hw_get_rx_read(priv);
  3590. i = rxq->read;
  3591. /* Rx interrupt, but nothing sent from uCode */
  3592. if (i == r)
  3593. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3594. while (i != r) {
  3595. rxb = rxq->queue[i];
  3596. /* If an RXB doesn't have a queue slot associated with it
  3597. * then a bug has been introduced in the queue refilling
  3598. * routines -- catch it here */
  3599. BUG_ON(rxb == NULL);
  3600. rxq->queue[i] = NULL;
  3601. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3602. IWL_RX_BUF_SIZE,
  3603. PCI_DMA_FROMDEVICE);
  3604. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3605. /* Reclaim a command buffer only if this packet is a response
  3606. * to a (driver-originated) command.
  3607. * If the packet (e.g. Rx frame) originated from uCode,
  3608. * there is no command buffer to reclaim.
  3609. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3610. * but apparently a few don't get set; catch them here. */
  3611. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3612. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3613. (pkt->hdr.cmd != REPLY_TX);
  3614. /* Based on type of command response or notification,
  3615. * handle those that need handling via function in
  3616. * rx_handlers table. See iwl_setup_rx_handlers() */
  3617. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3618. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3619. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3620. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3621. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3622. } else {
  3623. /* No handling needed */
  3624. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3625. "r %d i %d No handler needed for %s, 0x%02x\n",
  3626. r, i, get_cmd_string(pkt->hdr.cmd),
  3627. pkt->hdr.cmd);
  3628. }
  3629. if (reclaim) {
  3630. /* Invoke any callbacks, transfer the skb to caller,
  3631. * and fire off the (possibly) blocking iwl_send_cmd()
  3632. * as we reclaim the driver command queue */
  3633. if (rxb && rxb->skb)
  3634. iwl_tx_cmd_complete(priv, rxb);
  3635. else
  3636. IWL_WARNING("Claim null rxb?\n");
  3637. }
  3638. /* For now we just don't re-use anything. We can tweak this
  3639. * later to try and re-use notification packets and SKBs that
  3640. * fail to Rx correctly */
  3641. if (rxb->skb != NULL) {
  3642. priv->alloc_rxb_skb--;
  3643. dev_kfree_skb_any(rxb->skb);
  3644. rxb->skb = NULL;
  3645. }
  3646. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3647. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3648. spin_lock_irqsave(&rxq->lock, flags);
  3649. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3650. spin_unlock_irqrestore(&rxq->lock, flags);
  3651. i = (i + 1) & RX_QUEUE_MASK;
  3652. }
  3653. /* Backtrack one entry */
  3654. priv->rxq.read = i;
  3655. iwl_rx_queue_restock(priv);
  3656. }
  3657. int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3658. struct iwl_tx_queue *txq)
  3659. {
  3660. u32 reg = 0;
  3661. int rc = 0;
  3662. int txq_id = txq->q.id;
  3663. if (txq->need_update == 0)
  3664. return rc;
  3665. /* if we're trying to save power */
  3666. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3667. /* wake up nic if it's powered down ...
  3668. * uCode will wake up, and interrupt us again, so next
  3669. * time we'll skip this part. */
  3670. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3671. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3672. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3673. iwl_set_bit(priv, CSR_GP_CNTRL,
  3674. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3675. return rc;
  3676. }
  3677. /* restore this queue's parameters in nic hardware. */
  3678. rc = iwl_grab_restricted_access(priv);
  3679. if (rc)
  3680. return rc;
  3681. iwl_write_restricted(priv, HBUS_TARG_WRPTR,
  3682. txq->q.first_empty | (txq_id << 8));
  3683. iwl_release_restricted_access(priv);
  3684. /* else not in power-save mode, uCode will never sleep when we're
  3685. * trying to tx (during RFKILL, we're not trying to tx). */
  3686. } else
  3687. iwl_write32(priv, HBUS_TARG_WRPTR,
  3688. txq->q.first_empty | (txq_id << 8));
  3689. txq->need_update = 0;
  3690. return rc;
  3691. }
  3692. #ifdef CONFIG_IWLWIFI_DEBUG
  3693. static void iwl_print_rx_config_cmd(struct iwl_rxon_cmd *rxon)
  3694. {
  3695. DECLARE_MAC_BUF(mac);
  3696. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3697. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3698. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3699. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3700. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3701. le32_to_cpu(rxon->filter_flags));
  3702. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3703. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3704. rxon->ofdm_basic_rates);
  3705. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3706. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3707. print_mac(mac, rxon->node_addr));
  3708. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3709. print_mac(mac, rxon->bssid_addr));
  3710. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3711. }
  3712. #endif
  3713. static void iwl_enable_interrupts(struct iwl_priv *priv)
  3714. {
  3715. IWL_DEBUG_ISR("Enabling interrupts\n");
  3716. set_bit(STATUS_INT_ENABLED, &priv->status);
  3717. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3718. }
  3719. static inline void iwl_disable_interrupts(struct iwl_priv *priv)
  3720. {
  3721. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3722. /* disable interrupts from uCode/NIC to host */
  3723. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3724. /* acknowledge/clear/reset any interrupts still pending
  3725. * from uCode or flow handler (Rx/Tx DMA) */
  3726. iwl_write32(priv, CSR_INT, 0xffffffff);
  3727. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3728. IWL_DEBUG_ISR("Disabled interrupts\n");
  3729. }
  3730. static const char *desc_lookup(int i)
  3731. {
  3732. switch (i) {
  3733. case 1:
  3734. return "FAIL";
  3735. case 2:
  3736. return "BAD_PARAM";
  3737. case 3:
  3738. return "BAD_CHECKSUM";
  3739. case 4:
  3740. return "NMI_INTERRUPT";
  3741. case 5:
  3742. return "SYSASSERT";
  3743. case 6:
  3744. return "FATAL_ERROR";
  3745. }
  3746. return "UNKNOWN";
  3747. }
  3748. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3749. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3750. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  3751. {
  3752. u32 i;
  3753. u32 desc, time, count, base, data1;
  3754. u32 blink1, blink2, ilink1, ilink2;
  3755. int rc;
  3756. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3757. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3758. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3759. return;
  3760. }
  3761. rc = iwl_grab_restricted_access(priv);
  3762. if (rc) {
  3763. IWL_WARNING("Can not read from adapter at this time.\n");
  3764. return;
  3765. }
  3766. count = iwl_read_restricted_mem(priv, base);
  3767. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3768. IWL_ERROR("Start IWL Error Log Dump:\n");
  3769. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  3770. priv->status, priv->config, count);
  3771. }
  3772. IWL_ERROR("Desc Time asrtPC blink2 "
  3773. "ilink1 nmiPC Line\n");
  3774. for (i = ERROR_START_OFFSET;
  3775. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  3776. i += ERROR_ELEM_SIZE) {
  3777. desc = iwl_read_restricted_mem(priv, base + i);
  3778. time =
  3779. iwl_read_restricted_mem(priv, base + i + 1 * sizeof(u32));
  3780. blink1 =
  3781. iwl_read_restricted_mem(priv, base + i + 2 * sizeof(u32));
  3782. blink2 =
  3783. iwl_read_restricted_mem(priv, base + i + 3 * sizeof(u32));
  3784. ilink1 =
  3785. iwl_read_restricted_mem(priv, base + i + 4 * sizeof(u32));
  3786. ilink2 =
  3787. iwl_read_restricted_mem(priv, base + i + 5 * sizeof(u32));
  3788. data1 =
  3789. iwl_read_restricted_mem(priv, base + i + 6 * sizeof(u32));
  3790. IWL_ERROR
  3791. ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  3792. desc_lookup(desc), desc, time, blink1, blink2,
  3793. ilink1, ilink2, data1);
  3794. }
  3795. iwl_release_restricted_access(priv);
  3796. }
  3797. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3798. /**
  3799. * iwl_print_event_log - Dump error event log to syslog
  3800. *
  3801. * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
  3802. */
  3803. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3804. u32 num_events, u32 mode)
  3805. {
  3806. u32 i;
  3807. u32 base; /* SRAM byte address of event log header */
  3808. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3809. u32 ptr; /* SRAM byte address of log data */
  3810. u32 ev, time, data; /* event log data */
  3811. if (num_events == 0)
  3812. return;
  3813. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3814. if (mode == 0)
  3815. event_size = 2 * sizeof(u32);
  3816. else
  3817. event_size = 3 * sizeof(u32);
  3818. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3819. /* "time" is actually "data" for mode 0 (no timestamp).
  3820. * place event id # at far right for easier visual parsing. */
  3821. for (i = 0; i < num_events; i++) {
  3822. ev = iwl_read_restricted_mem(priv, ptr);
  3823. ptr += sizeof(u32);
  3824. time = iwl_read_restricted_mem(priv, ptr);
  3825. ptr += sizeof(u32);
  3826. if (mode == 0)
  3827. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3828. else {
  3829. data = iwl_read_restricted_mem(priv, ptr);
  3830. ptr += sizeof(u32);
  3831. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3832. }
  3833. }
  3834. }
  3835. static void iwl_dump_nic_event_log(struct iwl_priv *priv)
  3836. {
  3837. int rc;
  3838. u32 base; /* SRAM byte address of event log header */
  3839. u32 capacity; /* event log capacity in # entries */
  3840. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3841. u32 num_wraps; /* # times uCode wrapped to top of log */
  3842. u32 next_entry; /* index of next entry to be written by uCode */
  3843. u32 size; /* # entries that we'll print */
  3844. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3845. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3846. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3847. return;
  3848. }
  3849. rc = iwl_grab_restricted_access(priv);
  3850. if (rc) {
  3851. IWL_WARNING("Can not read from adapter at this time.\n");
  3852. return;
  3853. }
  3854. /* event log header */
  3855. capacity = iwl_read_restricted_mem(priv, base);
  3856. mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
  3857. num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
  3858. next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
  3859. size = num_wraps ? capacity : next_entry;
  3860. /* bail out if nothing in log */
  3861. if (size == 0) {
  3862. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3863. iwl_release_restricted_access(priv);
  3864. return;
  3865. }
  3866. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3867. size, num_wraps);
  3868. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3869. * i.e the next one that uCode would fill. */
  3870. if (num_wraps)
  3871. iwl_print_event_log(priv, next_entry,
  3872. capacity - next_entry, mode);
  3873. /* (then/else) start at top of log */
  3874. iwl_print_event_log(priv, 0, next_entry, mode);
  3875. iwl_release_restricted_access(priv);
  3876. }
  3877. /**
  3878. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  3879. */
  3880. static void iwl_irq_handle_error(struct iwl_priv *priv)
  3881. {
  3882. /* Set the FW error flag -- cleared on iwl_down */
  3883. set_bit(STATUS_FW_ERROR, &priv->status);
  3884. /* Cancel currently queued command. */
  3885. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3886. #ifdef CONFIG_IWLWIFI_DEBUG
  3887. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3888. iwl_dump_nic_error_log(priv);
  3889. iwl_dump_nic_event_log(priv);
  3890. iwl_print_rx_config_cmd(&priv->staging_rxon);
  3891. }
  3892. #endif
  3893. wake_up_interruptible(&priv->wait_command_queue);
  3894. /* Keep the restart process from trying to send host
  3895. * commands by clearing the INIT status bit */
  3896. clear_bit(STATUS_READY, &priv->status);
  3897. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3898. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3899. "Restarting adapter due to uCode error.\n");
  3900. if (iwl_is_associated(priv)) {
  3901. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3902. sizeof(priv->recovery_rxon));
  3903. priv->error_recovering = 1;
  3904. }
  3905. queue_work(priv->workqueue, &priv->restart);
  3906. }
  3907. }
  3908. static void iwl_error_recovery(struct iwl_priv *priv)
  3909. {
  3910. unsigned long flags;
  3911. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3912. sizeof(priv->staging_rxon));
  3913. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3914. iwl_commit_rxon(priv);
  3915. iwl_add_station(priv, priv->bssid, 1, 0);
  3916. spin_lock_irqsave(&priv->lock, flags);
  3917. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3918. priv->error_recovering = 0;
  3919. spin_unlock_irqrestore(&priv->lock, flags);
  3920. }
  3921. static void iwl_irq_tasklet(struct iwl_priv *priv)
  3922. {
  3923. u32 inta, handled = 0;
  3924. u32 inta_fh;
  3925. unsigned long flags;
  3926. #ifdef CONFIG_IWLWIFI_DEBUG
  3927. u32 inta_mask;
  3928. #endif
  3929. spin_lock_irqsave(&priv->lock, flags);
  3930. /* Ack/clear/reset pending uCode interrupts.
  3931. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3932. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3933. inta = iwl_read32(priv, CSR_INT);
  3934. iwl_write32(priv, CSR_INT, inta);
  3935. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3936. * Any new interrupts that happen after this, either while we're
  3937. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3938. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3939. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3940. #ifdef CONFIG_IWLWIFI_DEBUG
  3941. if (iwl_debug_level & IWL_DL_ISR) {
  3942. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3943. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3944. inta, inta_mask, inta_fh);
  3945. }
  3946. #endif
  3947. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3948. * atomic, make sure that inta covers all the interrupts that
  3949. * we've discovered, even if FH interrupt came in just after
  3950. * reading CSR_INT. */
  3951. if (inta_fh & CSR_FH_INT_RX_MASK)
  3952. inta |= CSR_INT_BIT_FH_RX;
  3953. if (inta_fh & CSR_FH_INT_TX_MASK)
  3954. inta |= CSR_INT_BIT_FH_TX;
  3955. /* Now service all interrupt bits discovered above. */
  3956. if (inta & CSR_INT_BIT_HW_ERR) {
  3957. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3958. /* Tell the device to stop sending interrupts */
  3959. iwl_disable_interrupts(priv);
  3960. iwl_irq_handle_error(priv);
  3961. handled |= CSR_INT_BIT_HW_ERR;
  3962. spin_unlock_irqrestore(&priv->lock, flags);
  3963. return;
  3964. }
  3965. #ifdef CONFIG_IWLWIFI_DEBUG
  3966. if (iwl_debug_level & (IWL_DL_ISR)) {
  3967. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3968. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  3969. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  3970. /* Alive notification via Rx interrupt will do the real work */
  3971. if (inta & CSR_INT_BIT_ALIVE)
  3972. IWL_DEBUG_ISR("Alive interrupt\n");
  3973. }
  3974. #endif
  3975. /* Safely ignore these bits for debug checks below */
  3976. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  3977. /* HW RF KILL switch toggled (4965 only) */
  3978. if (inta & CSR_INT_BIT_RF_KILL) {
  3979. int hw_rf_kill = 0;
  3980. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3981. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3982. hw_rf_kill = 1;
  3983. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3984. "RF_KILL bit toggled to %s.\n",
  3985. hw_rf_kill ? "disable radio":"enable radio");
  3986. /* Queue restart only if RF_KILL switch was set to "kill"
  3987. * when we loaded driver, and is now set to "enable".
  3988. * After we're Alive, RF_KILL gets handled by
  3989. * iwl_rx_card_state_notif() */
  3990. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3991. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3992. queue_work(priv->workqueue, &priv->restart);
  3993. }
  3994. handled |= CSR_INT_BIT_RF_KILL;
  3995. }
  3996. /* Chip got too hot and stopped itself (4965 only) */
  3997. if (inta & CSR_INT_BIT_CT_KILL) {
  3998. IWL_ERROR("Microcode CT kill error detected.\n");
  3999. handled |= CSR_INT_BIT_CT_KILL;
  4000. }
  4001. /* Error detected by uCode */
  4002. if (inta & CSR_INT_BIT_SW_ERR) {
  4003. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4004. inta);
  4005. iwl_irq_handle_error(priv);
  4006. handled |= CSR_INT_BIT_SW_ERR;
  4007. }
  4008. /* uCode wakes up after power-down sleep */
  4009. if (inta & CSR_INT_BIT_WAKEUP) {
  4010. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4011. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  4012. iwl_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4013. iwl_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4014. iwl_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4015. iwl_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4016. iwl_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4017. iwl_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4018. handled |= CSR_INT_BIT_WAKEUP;
  4019. }
  4020. /* All uCode command responses, including Tx command responses,
  4021. * Rx "responses" (frame-received notification), and other
  4022. * notifications from uCode come through here*/
  4023. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4024. iwl_rx_handle(priv);
  4025. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4026. }
  4027. if (inta & CSR_INT_BIT_FH_TX) {
  4028. IWL_DEBUG_ISR("Tx interrupt\n");
  4029. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  4030. if (!iwl_grab_restricted_access(priv)) {
  4031. iwl_write_restricted(priv,
  4032. FH_TCSR_CREDIT
  4033. (ALM_FH_SRVC_CHNL), 0x0);
  4034. iwl_release_restricted_access(priv);
  4035. }
  4036. handled |= CSR_INT_BIT_FH_TX;
  4037. }
  4038. if (inta & ~handled)
  4039. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4040. if (inta & ~CSR_INI_SET_MASK) {
  4041. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4042. inta & ~CSR_INI_SET_MASK);
  4043. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4044. }
  4045. /* Re-enable all interrupts */
  4046. iwl_enable_interrupts(priv);
  4047. #ifdef CONFIG_IWLWIFI_DEBUG
  4048. if (iwl_debug_level & (IWL_DL_ISR)) {
  4049. inta = iwl_read32(priv, CSR_INT);
  4050. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  4051. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4052. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4053. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4054. }
  4055. #endif
  4056. spin_unlock_irqrestore(&priv->lock, flags);
  4057. }
  4058. static irqreturn_t iwl_isr(int irq, void *data)
  4059. {
  4060. struct iwl_priv *priv = data;
  4061. u32 inta, inta_mask;
  4062. u32 inta_fh;
  4063. if (!priv)
  4064. return IRQ_NONE;
  4065. spin_lock(&priv->lock);
  4066. /* Disable (but don't clear!) interrupts here to avoid
  4067. * back-to-back ISRs and sporadic interrupts from our NIC.
  4068. * If we have something to service, the tasklet will re-enable ints.
  4069. * If we *don't* have something, we'll re-enable before leaving here. */
  4070. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4071. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  4072. /* Discover which interrupts are active/pending */
  4073. inta = iwl_read32(priv, CSR_INT);
  4074. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4075. /* Ignore interrupt if there's nothing in NIC to service.
  4076. * This may be due to IRQ shared with another device,
  4077. * or due to sporadic interrupts thrown from our NIC. */
  4078. if (!inta && !inta_fh) {
  4079. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4080. goto none;
  4081. }
  4082. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4083. /* Hardware disappeared */
  4084. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4085. goto unplugged;
  4086. }
  4087. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4088. inta, inta_mask, inta_fh);
  4089. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  4090. tasklet_schedule(&priv->irq_tasklet);
  4091. unplugged:
  4092. spin_unlock(&priv->lock);
  4093. return IRQ_HANDLED;
  4094. none:
  4095. /* re-enable interrupts here since we don't have anything to service. */
  4096. iwl_enable_interrupts(priv);
  4097. spin_unlock(&priv->lock);
  4098. return IRQ_NONE;
  4099. }
  4100. /************************** EEPROM BANDS ****************************
  4101. *
  4102. * The iwl_eeprom_band definitions below provide the mapping from the
  4103. * EEPROM contents to the specific channel number supported for each
  4104. * band.
  4105. *
  4106. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4107. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4108. * The specific geography and calibration information for that channel
  4109. * is contained in the eeprom map itself.
  4110. *
  4111. * During init, we copy the eeprom information and channel map
  4112. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4113. *
  4114. * channel_map_24/52 provides the index in the channel_info array for a
  4115. * given channel. We have to have two separate maps as there is channel
  4116. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4117. * band_2
  4118. *
  4119. * A value of 0xff stored in the channel_map indicates that the channel
  4120. * is not supported by the hardware at all.
  4121. *
  4122. * A value of 0xfe in the channel_map indicates that the channel is not
  4123. * valid for Tx with the current hardware. This means that
  4124. * while the system can tune and receive on a given channel, it may not
  4125. * be able to associate or transmit any frames on that
  4126. * channel. There is no corresponding channel information for that
  4127. * entry.
  4128. *
  4129. *********************************************************************/
  4130. /* 2.4 GHz */
  4131. static const u8 iwl_eeprom_band_1[14] = {
  4132. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4133. };
  4134. /* 5.2 GHz bands */
  4135. static const u8 iwl_eeprom_band_2[] = {
  4136. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4137. };
  4138. static const u8 iwl_eeprom_band_3[] = { /* 5205-5320MHz */
  4139. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4140. };
  4141. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  4142. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4143. };
  4144. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  4145. 145, 149, 153, 157, 161, 165
  4146. };
  4147. static void iwl_init_band_reference(const struct iwl_priv *priv, int band,
  4148. int *eeprom_ch_count,
  4149. const struct iwl_eeprom_channel
  4150. **eeprom_ch_info,
  4151. const u8 **eeprom_ch_index)
  4152. {
  4153. switch (band) {
  4154. case 1: /* 2.4GHz band */
  4155. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  4156. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4157. *eeprom_ch_index = iwl_eeprom_band_1;
  4158. break;
  4159. case 2: /* 5.2GHz band */
  4160. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  4161. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4162. *eeprom_ch_index = iwl_eeprom_band_2;
  4163. break;
  4164. case 3: /* 5.2GHz band */
  4165. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  4166. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4167. *eeprom_ch_index = iwl_eeprom_band_3;
  4168. break;
  4169. case 4: /* 5.2GHz band */
  4170. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  4171. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4172. *eeprom_ch_index = iwl_eeprom_band_4;
  4173. break;
  4174. case 5: /* 5.2GHz band */
  4175. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  4176. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4177. *eeprom_ch_index = iwl_eeprom_band_5;
  4178. break;
  4179. default:
  4180. BUG();
  4181. return;
  4182. }
  4183. }
  4184. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  4185. int phymode, u16 channel)
  4186. {
  4187. int i;
  4188. switch (phymode) {
  4189. case MODE_IEEE80211A:
  4190. for (i = 14; i < priv->channel_count; i++) {
  4191. if (priv->channel_info[i].channel == channel)
  4192. return &priv->channel_info[i];
  4193. }
  4194. break;
  4195. case MODE_IEEE80211B:
  4196. case MODE_IEEE80211G:
  4197. if (channel >= 1 && channel <= 14)
  4198. return &priv->channel_info[channel - 1];
  4199. break;
  4200. }
  4201. return NULL;
  4202. }
  4203. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4204. ? # x " " : "")
  4205. static int iwl_init_channel_map(struct iwl_priv *priv)
  4206. {
  4207. int eeprom_ch_count = 0;
  4208. const u8 *eeprom_ch_index = NULL;
  4209. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  4210. int band, ch;
  4211. struct iwl_channel_info *ch_info;
  4212. if (priv->channel_count) {
  4213. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4214. return 0;
  4215. }
  4216. if (priv->eeprom.version < 0x2f) {
  4217. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4218. priv->eeprom.version);
  4219. return -EINVAL;
  4220. }
  4221. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4222. priv->channel_count =
  4223. ARRAY_SIZE(iwl_eeprom_band_1) +
  4224. ARRAY_SIZE(iwl_eeprom_band_2) +
  4225. ARRAY_SIZE(iwl_eeprom_band_3) +
  4226. ARRAY_SIZE(iwl_eeprom_band_4) +
  4227. ARRAY_SIZE(iwl_eeprom_band_5);
  4228. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4229. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  4230. priv->channel_count, GFP_KERNEL);
  4231. if (!priv->channel_info) {
  4232. IWL_ERROR("Could not allocate channel_info\n");
  4233. priv->channel_count = 0;
  4234. return -ENOMEM;
  4235. }
  4236. ch_info = priv->channel_info;
  4237. /* Loop through the 5 EEPROM bands adding them in order to the
  4238. * channel map we maintain (that contains additional information than
  4239. * what just in the EEPROM) */
  4240. for (band = 1; band <= 5; band++) {
  4241. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4242. &eeprom_ch_info, &eeprom_ch_index);
  4243. /* Loop through each band adding each of the channels */
  4244. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4245. ch_info->channel = eeprom_ch_index[ch];
  4246. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4247. MODE_IEEE80211A;
  4248. /* permanently store EEPROM's channel regulatory flags
  4249. * and max power in channel info database. */
  4250. ch_info->eeprom = eeprom_ch_info[ch];
  4251. /* Copy the run-time flags so they are there even on
  4252. * invalid channels */
  4253. ch_info->flags = eeprom_ch_info[ch].flags;
  4254. if (!(is_channel_valid(ch_info))) {
  4255. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4256. "No traffic\n",
  4257. ch_info->channel,
  4258. ch_info->flags,
  4259. is_channel_a_band(ch_info) ?
  4260. "5.2" : "2.4");
  4261. ch_info++;
  4262. continue;
  4263. }
  4264. /* Initialize regulatory-based run-time data */
  4265. ch_info->max_power_avg = ch_info->curr_txpow =
  4266. eeprom_ch_info[ch].max_power_avg;
  4267. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4268. ch_info->min_power = 0;
  4269. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4270. " %ddBm): Ad-Hoc %ssupported\n",
  4271. ch_info->channel,
  4272. is_channel_a_band(ch_info) ?
  4273. "5.2" : "2.4",
  4274. CHECK_AND_PRINT(IBSS),
  4275. CHECK_AND_PRINT(ACTIVE),
  4276. CHECK_AND_PRINT(RADAR),
  4277. CHECK_AND_PRINT(WIDE),
  4278. CHECK_AND_PRINT(NARROW),
  4279. CHECK_AND_PRINT(DFS),
  4280. eeprom_ch_info[ch].flags,
  4281. eeprom_ch_info[ch].max_power_avg,
  4282. ((eeprom_ch_info[ch].
  4283. flags & EEPROM_CHANNEL_IBSS)
  4284. && !(eeprom_ch_info[ch].
  4285. flags & EEPROM_CHANNEL_RADAR))
  4286. ? "" : "not ");
  4287. /* Set the user_txpower_limit to the highest power
  4288. * supported by any channel */
  4289. if (eeprom_ch_info[ch].max_power_avg >
  4290. priv->user_txpower_limit)
  4291. priv->user_txpower_limit =
  4292. eeprom_ch_info[ch].max_power_avg;
  4293. ch_info++;
  4294. }
  4295. }
  4296. if (iwl3945_txpower_set_from_eeprom(priv))
  4297. return -EIO;
  4298. return 0;
  4299. }
  4300. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4301. * sending probe req. This should be set long enough to hear probe responses
  4302. * from more than one AP. */
  4303. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4304. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4305. /* For faster active scanning, scan will move to the next channel if fewer than
  4306. * PLCP_QUIET_THRESH packets are heard on this channel within
  4307. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4308. * time if it's a quiet channel (nothing responded to our probe, and there's
  4309. * no other traffic).
  4310. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4311. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4312. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4313. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4314. * Must be set longer than active dwell time.
  4315. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4316. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4317. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4318. #define IWL_PASSIVE_DWELL_BASE (100)
  4319. #define IWL_CHANNEL_TUNE_TIME 5
  4320. static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, int phymode)
  4321. {
  4322. if (phymode == MODE_IEEE80211A)
  4323. return IWL_ACTIVE_DWELL_TIME_52;
  4324. else
  4325. return IWL_ACTIVE_DWELL_TIME_24;
  4326. }
  4327. static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, int phymode)
  4328. {
  4329. u16 active = iwl_get_active_dwell_time(priv, phymode);
  4330. u16 passive = (phymode != MODE_IEEE80211A) ?
  4331. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4332. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4333. if (iwl_is_associated(priv)) {
  4334. /* If we're associated, we clamp the maximum passive
  4335. * dwell time to be 98% of the beacon interval (minus
  4336. * 2 * channel tune time) */
  4337. passive = priv->beacon_int;
  4338. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4339. passive = IWL_PASSIVE_DWELL_BASE;
  4340. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4341. }
  4342. if (passive <= active)
  4343. passive = active + 1;
  4344. return passive;
  4345. }
  4346. static int iwl_get_channels_for_scan(struct iwl_priv *priv, int phymode,
  4347. u8 is_active, u8 direct_mask,
  4348. struct iwl_scan_channel *scan_ch)
  4349. {
  4350. const struct ieee80211_channel *channels = NULL;
  4351. const struct ieee80211_hw_mode *hw_mode;
  4352. const struct iwl_channel_info *ch_info;
  4353. u16 passive_dwell = 0;
  4354. u16 active_dwell = 0;
  4355. int added, i;
  4356. hw_mode = iwl_get_hw_mode(priv, phymode);
  4357. if (!hw_mode)
  4358. return 0;
  4359. channels = hw_mode->channels;
  4360. active_dwell = iwl_get_active_dwell_time(priv, phymode);
  4361. passive_dwell = iwl_get_passive_dwell_time(priv, phymode);
  4362. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4363. if (channels[i].chan ==
  4364. le16_to_cpu(priv->active_rxon.channel)) {
  4365. if (iwl_is_associated(priv)) {
  4366. IWL_DEBUG_SCAN
  4367. ("Skipping current channel %d\n",
  4368. le16_to_cpu(priv->active_rxon.channel));
  4369. continue;
  4370. }
  4371. } else if (priv->only_active_channel)
  4372. continue;
  4373. scan_ch->channel = channels[i].chan;
  4374. ch_info = iwl_get_channel_info(priv, phymode, scan_ch->channel);
  4375. if (!is_channel_valid(ch_info)) {
  4376. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4377. scan_ch->channel);
  4378. continue;
  4379. }
  4380. if (!is_active || is_channel_passive(ch_info) ||
  4381. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4382. scan_ch->type = 0; /* passive */
  4383. else
  4384. scan_ch->type = 1; /* active */
  4385. if (scan_ch->type & 1)
  4386. scan_ch->type |= (direct_mask << 1);
  4387. if (is_channel_narrow(ch_info))
  4388. scan_ch->type |= (1 << 7);
  4389. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4390. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4391. /* Set power levels to defaults */
  4392. scan_ch->tpc.dsp_atten = 110;
  4393. /* scan_pwr_info->tpc.dsp_atten; */
  4394. /*scan_pwr_info->tpc.tx_gain; */
  4395. if (phymode == MODE_IEEE80211A)
  4396. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4397. else {
  4398. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4399. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4400. * power level
  4401. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4402. */
  4403. }
  4404. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4405. scan_ch->channel,
  4406. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4407. (scan_ch->type & 1) ?
  4408. active_dwell : passive_dwell);
  4409. scan_ch++;
  4410. added++;
  4411. }
  4412. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4413. return added;
  4414. }
  4415. static void iwl_reset_channel_flag(struct iwl_priv *priv)
  4416. {
  4417. int i, j;
  4418. for (i = 0; i < 3; i++) {
  4419. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4420. for (j = 0; j < hw_mode->num_channels; j++)
  4421. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4422. }
  4423. }
  4424. static void iwl_init_hw_rates(struct iwl_priv *priv,
  4425. struct ieee80211_rate *rates)
  4426. {
  4427. int i;
  4428. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4429. rates[i].rate = iwl_rates[i].ieee * 5;
  4430. rates[i].val = i; /* Rate scaling will work on indexes */
  4431. rates[i].val2 = i;
  4432. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4433. /* Only OFDM have the bits-per-symbol set */
  4434. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4435. rates[i].flags |= IEEE80211_RATE_OFDM;
  4436. else {
  4437. /*
  4438. * If CCK 1M then set rate flag to CCK else CCK_2
  4439. * which is CCK | PREAMBLE2
  4440. */
  4441. rates[i].flags |= (iwl_rates[i].plcp == 10) ?
  4442. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4443. }
  4444. /* Set up which ones are basic rates... */
  4445. if (IWL_BASIC_RATES_MASK & (1 << i))
  4446. rates[i].flags |= IEEE80211_RATE_BASIC;
  4447. }
  4448. }
  4449. /**
  4450. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4451. */
  4452. static int iwl_init_geos(struct iwl_priv *priv)
  4453. {
  4454. struct iwl_channel_info *ch;
  4455. struct ieee80211_hw_mode *modes;
  4456. struct ieee80211_channel *channels;
  4457. struct ieee80211_channel *geo_ch;
  4458. struct ieee80211_rate *rates;
  4459. int i = 0;
  4460. enum {
  4461. A = 0,
  4462. B = 1,
  4463. G = 2,
  4464. };
  4465. int mode_count = 3;
  4466. if (priv->modes) {
  4467. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4468. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4469. return 0;
  4470. }
  4471. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4472. GFP_KERNEL);
  4473. if (!modes)
  4474. return -ENOMEM;
  4475. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4476. priv->channel_count, GFP_KERNEL);
  4477. if (!channels) {
  4478. kfree(modes);
  4479. return -ENOMEM;
  4480. }
  4481. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4482. GFP_KERNEL);
  4483. if (!rates) {
  4484. kfree(modes);
  4485. kfree(channels);
  4486. return -ENOMEM;
  4487. }
  4488. /* 0 = 802.11a
  4489. * 1 = 802.11b
  4490. * 2 = 802.11g
  4491. */
  4492. /* 5.2GHz channels start after the 2.4GHz channels */
  4493. modes[A].mode = MODE_IEEE80211A;
  4494. modes[A].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4495. modes[A].rates = &rates[4];
  4496. modes[A].num_rates = 8; /* just OFDM */
  4497. modes[A].num_channels = 0;
  4498. modes[B].mode = MODE_IEEE80211B;
  4499. modes[B].channels = channels;
  4500. modes[B].rates = rates;
  4501. modes[B].num_rates = 4; /* just CCK */
  4502. modes[B].num_channels = 0;
  4503. modes[G].mode = MODE_IEEE80211G;
  4504. modes[G].channels = channels;
  4505. modes[G].rates = rates;
  4506. modes[G].num_rates = 12; /* OFDM & CCK */
  4507. modes[G].num_channels = 0;
  4508. priv->ieee_channels = channels;
  4509. priv->ieee_rates = rates;
  4510. iwl_init_hw_rates(priv, rates);
  4511. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4512. ch = &priv->channel_info[i];
  4513. if (!is_channel_valid(ch)) {
  4514. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4515. "skipping.\n",
  4516. ch->channel, is_channel_a_band(ch) ?
  4517. "5.2" : "2.4");
  4518. continue;
  4519. }
  4520. if (is_channel_a_band(ch))
  4521. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4522. else {
  4523. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4524. modes[G].num_channels++;
  4525. }
  4526. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4527. geo_ch->chan = ch->channel;
  4528. geo_ch->power_level = ch->max_power_avg;
  4529. geo_ch->antenna_max = 0xff;
  4530. if (is_channel_valid(ch)) {
  4531. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4532. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4533. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4534. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4535. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4536. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4537. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4538. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4539. priv->max_channel_txpower_limit =
  4540. ch->max_power_avg;
  4541. }
  4542. geo_ch->val = geo_ch->flag;
  4543. }
  4544. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4545. printk(KERN_INFO DRV_NAME
  4546. ": Incorrectly detected BG card as ABG. Please send "
  4547. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4548. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4549. priv->is_abg = 0;
  4550. }
  4551. printk(KERN_INFO DRV_NAME
  4552. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4553. modes[G].num_channels, modes[A].num_channels);
  4554. /*
  4555. * NOTE: We register these in preference of order -- the
  4556. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4557. * a phymode based on rates or AP capabilities but seems to
  4558. * configure it purely on if the channel being configured
  4559. * is supported by a mode -- and the first match is taken
  4560. */
  4561. if (modes[G].num_channels)
  4562. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4563. if (modes[B].num_channels)
  4564. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4565. if (modes[A].num_channels)
  4566. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4567. priv->modes = modes;
  4568. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4569. return 0;
  4570. }
  4571. /******************************************************************************
  4572. *
  4573. * uCode download functions
  4574. *
  4575. ******************************************************************************/
  4576. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  4577. {
  4578. if (priv->ucode_code.v_addr != NULL) {
  4579. pci_free_consistent(priv->pci_dev,
  4580. priv->ucode_code.len,
  4581. priv->ucode_code.v_addr,
  4582. priv->ucode_code.p_addr);
  4583. priv->ucode_code.v_addr = NULL;
  4584. }
  4585. if (priv->ucode_data.v_addr != NULL) {
  4586. pci_free_consistent(priv->pci_dev,
  4587. priv->ucode_data.len,
  4588. priv->ucode_data.v_addr,
  4589. priv->ucode_data.p_addr);
  4590. priv->ucode_data.v_addr = NULL;
  4591. }
  4592. if (priv->ucode_data_backup.v_addr != NULL) {
  4593. pci_free_consistent(priv->pci_dev,
  4594. priv->ucode_data_backup.len,
  4595. priv->ucode_data_backup.v_addr,
  4596. priv->ucode_data_backup.p_addr);
  4597. priv->ucode_data_backup.v_addr = NULL;
  4598. }
  4599. if (priv->ucode_init.v_addr != NULL) {
  4600. pci_free_consistent(priv->pci_dev,
  4601. priv->ucode_init.len,
  4602. priv->ucode_init.v_addr,
  4603. priv->ucode_init.p_addr);
  4604. priv->ucode_init.v_addr = NULL;
  4605. }
  4606. if (priv->ucode_init_data.v_addr != NULL) {
  4607. pci_free_consistent(priv->pci_dev,
  4608. priv->ucode_init_data.len,
  4609. priv->ucode_init_data.v_addr,
  4610. priv->ucode_init_data.p_addr);
  4611. priv->ucode_init_data.v_addr = NULL;
  4612. }
  4613. if (priv->ucode_boot.v_addr != NULL) {
  4614. pci_free_consistent(priv->pci_dev,
  4615. priv->ucode_boot.len,
  4616. priv->ucode_boot.v_addr,
  4617. priv->ucode_boot.p_addr);
  4618. priv->ucode_boot.v_addr = NULL;
  4619. }
  4620. }
  4621. /**
  4622. * iwl_verify_inst_full - verify runtime uCode image in card vs. host,
  4623. * looking at all data.
  4624. */
  4625. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 * image, u32 len)
  4626. {
  4627. u32 val;
  4628. u32 save_len = len;
  4629. int rc = 0;
  4630. u32 errcnt;
  4631. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4632. rc = iwl_grab_restricted_access(priv);
  4633. if (rc)
  4634. return rc;
  4635. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4636. errcnt = 0;
  4637. for (; len > 0; len -= sizeof(u32), image++) {
  4638. /* read data comes through single port, auto-incr addr */
  4639. /* NOTE: Use the debugless read so we don't flood kernel log
  4640. * if IWL_DL_IO is set */
  4641. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4642. if (val != le32_to_cpu(*image)) {
  4643. IWL_ERROR("uCode INST section is invalid at "
  4644. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4645. save_len - len, val, le32_to_cpu(*image));
  4646. rc = -EIO;
  4647. errcnt++;
  4648. if (errcnt >= 20)
  4649. break;
  4650. }
  4651. }
  4652. iwl_release_restricted_access(priv);
  4653. if (!errcnt)
  4654. IWL_DEBUG_INFO
  4655. ("ucode image in INSTRUCTION memory is good\n");
  4656. return rc;
  4657. }
  4658. /**
  4659. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4660. * using sample data 100 bytes apart. If these sample points are good,
  4661. * it's a pretty good bet that everything between them is good, too.
  4662. */
  4663. static int iwl_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4664. {
  4665. u32 val;
  4666. int rc = 0;
  4667. u32 errcnt = 0;
  4668. u32 i;
  4669. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4670. rc = iwl_grab_restricted_access(priv);
  4671. if (rc)
  4672. return rc;
  4673. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4674. /* read data comes through single port, auto-incr addr */
  4675. /* NOTE: Use the debugless read so we don't flood kernel log
  4676. * if IWL_DL_IO is set */
  4677. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
  4678. i + RTC_INST_LOWER_BOUND);
  4679. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4680. if (val != le32_to_cpu(*image)) {
  4681. #if 0 /* Enable this if you want to see details */
  4682. IWL_ERROR("uCode INST section is invalid at "
  4683. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4684. i, val, *image);
  4685. #endif
  4686. rc = -EIO;
  4687. errcnt++;
  4688. if (errcnt >= 3)
  4689. break;
  4690. }
  4691. }
  4692. iwl_release_restricted_access(priv);
  4693. return rc;
  4694. }
  4695. /**
  4696. * iwl_verify_ucode - determine which instruction image is in SRAM,
  4697. * and verify its contents
  4698. */
  4699. static int iwl_verify_ucode(struct iwl_priv *priv)
  4700. {
  4701. __le32 *image;
  4702. u32 len;
  4703. int rc = 0;
  4704. /* Try bootstrap */
  4705. image = (__le32 *)priv->ucode_boot.v_addr;
  4706. len = priv->ucode_boot.len;
  4707. rc = iwl_verify_inst_sparse(priv, image, len);
  4708. if (rc == 0) {
  4709. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4710. return 0;
  4711. }
  4712. /* Try initialize */
  4713. image = (__le32 *)priv->ucode_init.v_addr;
  4714. len = priv->ucode_init.len;
  4715. rc = iwl_verify_inst_sparse(priv, image, len);
  4716. if (rc == 0) {
  4717. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4718. return 0;
  4719. }
  4720. /* Try runtime/protocol */
  4721. image = (__le32 *)priv->ucode_code.v_addr;
  4722. len = priv->ucode_code.len;
  4723. rc = iwl_verify_inst_sparse(priv, image, len);
  4724. if (rc == 0) {
  4725. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4726. return 0;
  4727. }
  4728. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4729. /* Show first several data entries in instruction SRAM.
  4730. * Selection of bootstrap image is arbitrary. */
  4731. image = (__le32 *)priv->ucode_boot.v_addr;
  4732. len = priv->ucode_boot.len;
  4733. rc = iwl_verify_inst_full(priv, image, len);
  4734. return rc;
  4735. }
  4736. /* check contents of special bootstrap uCode SRAM */
  4737. static int iwl_verify_bsm(struct iwl_priv *priv)
  4738. {
  4739. __le32 *image = priv->ucode_boot.v_addr;
  4740. u32 len = priv->ucode_boot.len;
  4741. u32 reg;
  4742. u32 val;
  4743. IWL_DEBUG_INFO("Begin verify bsm\n");
  4744. /* verify BSM SRAM contents */
  4745. val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
  4746. for (reg = BSM_SRAM_LOWER_BOUND;
  4747. reg < BSM_SRAM_LOWER_BOUND + len;
  4748. reg += sizeof(u32), image ++) {
  4749. val = iwl_read_restricted_reg(priv, reg);
  4750. if (val != le32_to_cpu(*image)) {
  4751. IWL_ERROR("BSM uCode verification failed at "
  4752. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4753. BSM_SRAM_LOWER_BOUND,
  4754. reg - BSM_SRAM_LOWER_BOUND, len,
  4755. val, le32_to_cpu(*image));
  4756. return -EIO;
  4757. }
  4758. }
  4759. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4760. return 0;
  4761. }
  4762. /**
  4763. * iwl_load_bsm - Load bootstrap instructions
  4764. *
  4765. * BSM operation:
  4766. *
  4767. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4768. * in special SRAM that does not power down during RFKILL. When powering back
  4769. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4770. * the bootstrap program into the on-board processor, and starts it.
  4771. *
  4772. * The bootstrap program loads (via DMA) instructions and data for a new
  4773. * program from host DRAM locations indicated by the host driver in the
  4774. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4775. * automatically.
  4776. *
  4777. * When initializing the NIC, the host driver points the BSM to the
  4778. * "initialize" uCode image. This uCode sets up some internal data, then
  4779. * notifies host via "initialize alive" that it is complete.
  4780. *
  4781. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4782. * normal runtime uCode instructions and a backup uCode data cache buffer
  4783. * (filled initially with starting data values for the on-board processor),
  4784. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4785. * which begins normal operation.
  4786. *
  4787. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4788. * the backup data cache in DRAM before SRAM is powered down.
  4789. *
  4790. * When powering back up, the BSM loads the bootstrap program. This reloads
  4791. * the runtime uCode instructions and the backup data cache into SRAM,
  4792. * and re-launches the runtime uCode from where it left off.
  4793. */
  4794. static int iwl_load_bsm(struct iwl_priv *priv)
  4795. {
  4796. __le32 *image = priv->ucode_boot.v_addr;
  4797. u32 len = priv->ucode_boot.len;
  4798. dma_addr_t pinst;
  4799. dma_addr_t pdata;
  4800. u32 inst_len;
  4801. u32 data_len;
  4802. int rc;
  4803. int i;
  4804. u32 done;
  4805. u32 reg_offset;
  4806. IWL_DEBUG_INFO("Begin load bsm\n");
  4807. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4808. if (len > IWL_MAX_BSM_SIZE)
  4809. return -EINVAL;
  4810. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4811. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  4812. * NOTE: iwl_initialize_alive_start() will replace these values,
  4813. * after the "initialize" uCode has run, to point to
  4814. * runtime/protocol instructions and backup data cache. */
  4815. pinst = priv->ucode_init.p_addr;
  4816. pdata = priv->ucode_init_data.p_addr;
  4817. inst_len = priv->ucode_init.len;
  4818. data_len = priv->ucode_init_data.len;
  4819. rc = iwl_grab_restricted_access(priv);
  4820. if (rc)
  4821. return rc;
  4822. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4823. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4824. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4825. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4826. /* Fill BSM memory with bootstrap instructions */
  4827. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4828. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4829. reg_offset += sizeof(u32), image++)
  4830. _iwl_write_restricted_reg(priv, reg_offset,
  4831. le32_to_cpu(*image));
  4832. rc = iwl_verify_bsm(priv);
  4833. if (rc) {
  4834. iwl_release_restricted_access(priv);
  4835. return rc;
  4836. }
  4837. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4838. iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4839. iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
  4840. RTC_INST_LOWER_BOUND);
  4841. iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4842. /* Load bootstrap code into instruction SRAM now,
  4843. * to prepare to load "initialize" uCode */
  4844. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4845. BSM_WR_CTRL_REG_BIT_START);
  4846. /* Wait for load of bootstrap uCode to finish */
  4847. for (i = 0; i < 100; i++) {
  4848. done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
  4849. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4850. break;
  4851. udelay(10);
  4852. }
  4853. if (i < 100)
  4854. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4855. else {
  4856. IWL_ERROR("BSM write did not complete!\n");
  4857. return -EIO;
  4858. }
  4859. /* Enable future boot loads whenever power management unit triggers it
  4860. * (e.g. when powering back up after power-save shutdown) */
  4861. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4862. BSM_WR_CTRL_REG_BIT_START_EN);
  4863. iwl_release_restricted_access(priv);
  4864. return 0;
  4865. }
  4866. static void iwl_nic_start(struct iwl_priv *priv)
  4867. {
  4868. /* Remove all resets to allow NIC to operate */
  4869. iwl_write32(priv, CSR_RESET, 0);
  4870. }
  4871. /**
  4872. * iwl_read_ucode - Read uCode images from disk file.
  4873. *
  4874. * Copy into buffers for card to fetch via bus-mastering
  4875. */
  4876. static int iwl_read_ucode(struct iwl_priv *priv)
  4877. {
  4878. struct iwl_ucode *ucode;
  4879. int rc = 0;
  4880. const struct firmware *ucode_raw;
  4881. /* firmware file name contains uCode/driver compatibility version */
  4882. const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
  4883. u8 *src;
  4884. size_t len;
  4885. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4886. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4887. * request_firmware() is synchronous, file is in memory on return. */
  4888. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4889. if (rc < 0) {
  4890. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  4891. goto error;
  4892. }
  4893. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4894. name, ucode_raw->size);
  4895. /* Make sure that we got at least our header! */
  4896. if (ucode_raw->size < sizeof(*ucode)) {
  4897. IWL_ERROR("File size way too small!\n");
  4898. rc = -EINVAL;
  4899. goto err_release;
  4900. }
  4901. /* Data from ucode file: header followed by uCode images */
  4902. ucode = (void *)ucode_raw->data;
  4903. ver = le32_to_cpu(ucode->ver);
  4904. inst_size = le32_to_cpu(ucode->inst_size);
  4905. data_size = le32_to_cpu(ucode->data_size);
  4906. init_size = le32_to_cpu(ucode->init_size);
  4907. init_data_size = le32_to_cpu(ucode->init_data_size);
  4908. boot_size = le32_to_cpu(ucode->boot_size);
  4909. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4910. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4911. inst_size);
  4912. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4913. data_size);
  4914. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4915. init_size);
  4916. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4917. init_data_size);
  4918. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4919. boot_size);
  4920. /* Verify size of file vs. image size info in file's header */
  4921. if (ucode_raw->size < sizeof(*ucode) +
  4922. inst_size + data_size + init_size +
  4923. init_data_size + boot_size) {
  4924. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4925. (int)ucode_raw->size);
  4926. rc = -EINVAL;
  4927. goto err_release;
  4928. }
  4929. /* Verify that uCode images will fit in card's SRAM */
  4930. if (inst_size > IWL_MAX_INST_SIZE) {
  4931. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  4932. (int)inst_size);
  4933. rc = -EINVAL;
  4934. goto err_release;
  4935. }
  4936. if (data_size > IWL_MAX_DATA_SIZE) {
  4937. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  4938. (int)data_size);
  4939. rc = -EINVAL;
  4940. goto err_release;
  4941. }
  4942. if (init_size > IWL_MAX_INST_SIZE) {
  4943. IWL_DEBUG_INFO
  4944. ("uCode init instr len %d too large to fit in card\n",
  4945. (int)init_size);
  4946. rc = -EINVAL;
  4947. goto err_release;
  4948. }
  4949. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4950. IWL_DEBUG_INFO
  4951. ("uCode init data len %d too large to fit in card\n",
  4952. (int)init_data_size);
  4953. rc = -EINVAL;
  4954. goto err_release;
  4955. }
  4956. if (boot_size > IWL_MAX_BSM_SIZE) {
  4957. IWL_DEBUG_INFO
  4958. ("uCode boot instr len %d too large to fit in bsm\n",
  4959. (int)boot_size);
  4960. rc = -EINVAL;
  4961. goto err_release;
  4962. }
  4963. /* Allocate ucode buffers for card's bus-master loading ... */
  4964. /* Runtime instructions and 2 copies of data:
  4965. * 1) unmodified from disk
  4966. * 2) backup cache for save/restore during power-downs */
  4967. priv->ucode_code.len = inst_size;
  4968. priv->ucode_code.v_addr =
  4969. pci_alloc_consistent(priv->pci_dev,
  4970. priv->ucode_code.len,
  4971. &(priv->ucode_code.p_addr));
  4972. priv->ucode_data.len = data_size;
  4973. priv->ucode_data.v_addr =
  4974. pci_alloc_consistent(priv->pci_dev,
  4975. priv->ucode_data.len,
  4976. &(priv->ucode_data.p_addr));
  4977. priv->ucode_data_backup.len = data_size;
  4978. priv->ucode_data_backup.v_addr =
  4979. pci_alloc_consistent(priv->pci_dev,
  4980. priv->ucode_data_backup.len,
  4981. &(priv->ucode_data_backup.p_addr));
  4982. /* Initialization instructions and data */
  4983. priv->ucode_init.len = init_size;
  4984. priv->ucode_init.v_addr =
  4985. pci_alloc_consistent(priv->pci_dev,
  4986. priv->ucode_init.len,
  4987. &(priv->ucode_init.p_addr));
  4988. priv->ucode_init_data.len = init_data_size;
  4989. priv->ucode_init_data.v_addr =
  4990. pci_alloc_consistent(priv->pci_dev,
  4991. priv->ucode_init_data.len,
  4992. &(priv->ucode_init_data.p_addr));
  4993. /* Bootstrap (instructions only, no data) */
  4994. priv->ucode_boot.len = boot_size;
  4995. priv->ucode_boot.v_addr =
  4996. pci_alloc_consistent(priv->pci_dev,
  4997. priv->ucode_boot.len,
  4998. &(priv->ucode_boot.p_addr));
  4999. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  5000. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  5001. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  5002. goto err_pci_alloc;
  5003. /* Copy images into buffers for card's bus-master reads ... */
  5004. /* Runtime instructions (first block of data in file) */
  5005. src = &ucode->data[0];
  5006. len = priv->ucode_code.len;
  5007. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  5008. (int)len);
  5009. memcpy(priv->ucode_code.v_addr, src, len);
  5010. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5011. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5012. /* Runtime data (2nd block)
  5013. * NOTE: Copy into backup buffer will be done in iwl_up() */
  5014. src = &ucode->data[inst_size];
  5015. len = priv->ucode_data.len;
  5016. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5017. (int)len);
  5018. memcpy(priv->ucode_data.v_addr, src, len);
  5019. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5020. /* Initialization instructions (3rd block) */
  5021. if (init_size) {
  5022. src = &ucode->data[inst_size + data_size];
  5023. len = priv->ucode_init.len;
  5024. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5025. (int)len);
  5026. memcpy(priv->ucode_init.v_addr, src, len);
  5027. }
  5028. /* Initialization data (4th block) */
  5029. if (init_data_size) {
  5030. src = &ucode->data[inst_size + data_size + init_size];
  5031. len = priv->ucode_init_data.len;
  5032. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5033. (int)len);
  5034. memcpy(priv->ucode_init_data.v_addr, src, len);
  5035. }
  5036. /* Bootstrap instructions (5th block) */
  5037. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5038. len = priv->ucode_boot.len;
  5039. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5040. (int)len);
  5041. memcpy(priv->ucode_boot.v_addr, src, len);
  5042. /* We have our copies now, allow OS release its copies */
  5043. release_firmware(ucode_raw);
  5044. return 0;
  5045. err_pci_alloc:
  5046. IWL_ERROR("failed to allocate pci memory\n");
  5047. rc = -ENOMEM;
  5048. iwl_dealloc_ucode_pci(priv);
  5049. err_release:
  5050. release_firmware(ucode_raw);
  5051. error:
  5052. return rc;
  5053. }
  5054. /**
  5055. * iwl_set_ucode_ptrs - Set uCode address location
  5056. *
  5057. * Tell initialization uCode where to find runtime uCode.
  5058. *
  5059. * BSM registers initially contain pointers to initialization uCode.
  5060. * We need to replace them to load runtime uCode inst and data,
  5061. * and to save runtime data when powering down.
  5062. */
  5063. static int iwl_set_ucode_ptrs(struct iwl_priv *priv)
  5064. {
  5065. dma_addr_t pinst;
  5066. dma_addr_t pdata;
  5067. int rc = 0;
  5068. unsigned long flags;
  5069. /* bits 31:0 for 3945 */
  5070. pinst = priv->ucode_code.p_addr;
  5071. pdata = priv->ucode_data_backup.p_addr;
  5072. spin_lock_irqsave(&priv->lock, flags);
  5073. rc = iwl_grab_restricted_access(priv);
  5074. if (rc) {
  5075. spin_unlock_irqrestore(&priv->lock, flags);
  5076. return rc;
  5077. }
  5078. /* Tell bootstrap uCode where to find image to load */
  5079. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5080. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5081. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5082. priv->ucode_data.len);
  5083. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5084. * that all new ptr/size info is in place */
  5085. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5086. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5087. iwl_release_restricted_access(priv);
  5088. spin_unlock_irqrestore(&priv->lock, flags);
  5089. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5090. return rc;
  5091. }
  5092. /**
  5093. * iwl_init_alive_start - Called after REPLY_ALIVE notification receieved
  5094. *
  5095. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5096. *
  5097. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5098. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5099. * (3945 does not contain this data).
  5100. *
  5101. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5102. */
  5103. static void iwl_init_alive_start(struct iwl_priv *priv)
  5104. {
  5105. /* Check alive response for "valid" sign from uCode */
  5106. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5107. /* We had an error bringing up the hardware, so take it
  5108. * all the way back down so we can try again */
  5109. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5110. goto restart;
  5111. }
  5112. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5113. * This is a paranoid check, because we would not have gotten the
  5114. * "initialize" alive if code weren't properly loaded. */
  5115. if (iwl_verify_ucode(priv)) {
  5116. /* Runtime instruction load was bad;
  5117. * take it all the way back down so we can try again */
  5118. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5119. goto restart;
  5120. }
  5121. /* Send pointers to protocol/runtime uCode image ... init code will
  5122. * load and launch runtime uCode, which will send us another "Alive"
  5123. * notification. */
  5124. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5125. if (iwl_set_ucode_ptrs(priv)) {
  5126. /* Runtime instruction load won't happen;
  5127. * take it all the way back down so we can try again */
  5128. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5129. goto restart;
  5130. }
  5131. return;
  5132. restart:
  5133. queue_work(priv->workqueue, &priv->restart);
  5134. }
  5135. /**
  5136. * iwl_alive_start - called after REPLY_ALIVE notification received
  5137. * from protocol/runtime uCode (initialization uCode's
  5138. * Alive gets handled by iwl_init_alive_start()).
  5139. */
  5140. static void iwl_alive_start(struct iwl_priv *priv)
  5141. {
  5142. int rc = 0;
  5143. int thermal_spin = 0;
  5144. u32 rfkill;
  5145. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5146. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5147. /* We had an error bringing up the hardware, so take it
  5148. * all the way back down so we can try again */
  5149. IWL_DEBUG_INFO("Alive failed.\n");
  5150. goto restart;
  5151. }
  5152. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5153. * This is a paranoid check, because we would not have gotten the
  5154. * "runtime" alive if code weren't properly loaded. */
  5155. if (iwl_verify_ucode(priv)) {
  5156. /* Runtime instruction load was bad;
  5157. * take it all the way back down so we can try again */
  5158. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5159. goto restart;
  5160. }
  5161. iwl_clear_stations_table(priv);
  5162. rc = iwl_grab_restricted_access(priv);
  5163. if (rc) {
  5164. IWL_WARNING("Can not read rfkill status from adapter\n");
  5165. return;
  5166. }
  5167. rfkill = iwl_read_restricted_reg(priv, APMG_RFKILL_REG);
  5168. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  5169. iwl_release_restricted_access(priv);
  5170. if (rfkill & 0x1) {
  5171. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5172. /* if rfkill is not on, then wait for thermal
  5173. * sensor in adapter to kick in */
  5174. while (iwl_hw_get_temperature(priv) == 0) {
  5175. thermal_spin++;
  5176. udelay(10);
  5177. }
  5178. if (thermal_spin)
  5179. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  5180. thermal_spin * 10);
  5181. } else
  5182. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5183. /* After the ALIVE response, we can process host commands */
  5184. set_bit(STATUS_ALIVE, &priv->status);
  5185. /* Clear out the uCode error bit if it is set */
  5186. clear_bit(STATUS_FW_ERROR, &priv->status);
  5187. rc = iwl_init_channel_map(priv);
  5188. if (rc) {
  5189. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5190. return;
  5191. }
  5192. iwl_init_geos(priv);
  5193. if (iwl_is_rfkill(priv))
  5194. return;
  5195. if (!priv->mac80211_registered) {
  5196. /* Unlock so any user space entry points can call back into
  5197. * the driver without a deadlock... */
  5198. mutex_unlock(&priv->mutex);
  5199. iwl_rate_control_register(priv->hw);
  5200. rc = ieee80211_register_hw(priv->hw);
  5201. priv->hw->conf.beacon_int = 100;
  5202. mutex_lock(&priv->mutex);
  5203. if (rc) {
  5204. iwl_rate_control_unregister(priv->hw);
  5205. IWL_ERROR("Failed to register network "
  5206. "device (error %d)\n", rc);
  5207. return;
  5208. }
  5209. priv->mac80211_registered = 1;
  5210. iwl_reset_channel_flag(priv);
  5211. } else
  5212. ieee80211_start_queues(priv->hw);
  5213. priv->active_rate = priv->rates_mask;
  5214. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5215. iwl_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5216. if (iwl_is_associated(priv)) {
  5217. struct iwl_rxon_cmd *active_rxon =
  5218. (struct iwl_rxon_cmd *)(&priv->active_rxon);
  5219. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5220. sizeof(priv->staging_rxon));
  5221. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5222. } else {
  5223. /* Initialize our rx_config data */
  5224. iwl_connection_init_rx_config(priv);
  5225. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5226. }
  5227. /* Configure BT coexistence */
  5228. iwl_send_bt_config(priv);
  5229. /* Configure the adapter for unassociated operation */
  5230. iwl_commit_rxon(priv);
  5231. /* At this point, the NIC is initialized and operational */
  5232. priv->notif_missed_beacons = 0;
  5233. set_bit(STATUS_READY, &priv->status);
  5234. iwl3945_reg_txpower_periodic(priv);
  5235. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5236. if (priv->error_recovering)
  5237. iwl_error_recovery(priv);
  5238. return;
  5239. restart:
  5240. queue_work(priv->workqueue, &priv->restart);
  5241. }
  5242. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  5243. static void __iwl_down(struct iwl_priv *priv)
  5244. {
  5245. unsigned long flags;
  5246. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5247. struct ieee80211_conf *conf = NULL;
  5248. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5249. conf = ieee80211_get_hw_conf(priv->hw);
  5250. if (!exit_pending)
  5251. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5252. iwl_clear_stations_table(priv);
  5253. /* Unblock any waiting calls */
  5254. wake_up_interruptible_all(&priv->wait_command_queue);
  5255. iwl_cancel_deferred_work(priv);
  5256. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5257. * exiting the module */
  5258. if (!exit_pending)
  5259. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5260. /* stop and reset the on-board processor */
  5261. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5262. /* tell the device to stop sending interrupts */
  5263. iwl_disable_interrupts(priv);
  5264. if (priv->mac80211_registered)
  5265. ieee80211_stop_queues(priv->hw);
  5266. /* If we have not previously called iwl_init() then
  5267. * clear all bits but the RF Kill and SUSPEND bits and return */
  5268. if (!iwl_is_init(priv)) {
  5269. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5270. STATUS_RF_KILL_HW |
  5271. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5272. STATUS_RF_KILL_SW |
  5273. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5274. STATUS_IN_SUSPEND;
  5275. goto exit;
  5276. }
  5277. /* ...otherwise clear out all the status bits but the RF Kill and
  5278. * SUSPEND bits and continue taking the NIC down. */
  5279. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5280. STATUS_RF_KILL_HW |
  5281. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5282. STATUS_RF_KILL_SW |
  5283. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5284. STATUS_IN_SUSPEND |
  5285. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5286. STATUS_FW_ERROR;
  5287. spin_lock_irqsave(&priv->lock, flags);
  5288. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5289. spin_unlock_irqrestore(&priv->lock, flags);
  5290. iwl_hw_txq_ctx_stop(priv);
  5291. iwl_hw_rxq_stop(priv);
  5292. spin_lock_irqsave(&priv->lock, flags);
  5293. if (!iwl_grab_restricted_access(priv)) {
  5294. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  5295. APMG_CLK_VAL_DMA_CLK_RQT);
  5296. iwl_release_restricted_access(priv);
  5297. }
  5298. spin_unlock_irqrestore(&priv->lock, flags);
  5299. udelay(5);
  5300. iwl_hw_nic_stop_master(priv);
  5301. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5302. iwl_hw_nic_reset(priv);
  5303. exit:
  5304. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  5305. if (priv->ibss_beacon)
  5306. dev_kfree_skb(priv->ibss_beacon);
  5307. priv->ibss_beacon = NULL;
  5308. /* clear out any free frames */
  5309. iwl_clear_free_frames(priv);
  5310. }
  5311. static void iwl_down(struct iwl_priv *priv)
  5312. {
  5313. mutex_lock(&priv->mutex);
  5314. __iwl_down(priv);
  5315. mutex_unlock(&priv->mutex);
  5316. }
  5317. #define MAX_HW_RESTARTS 5
  5318. static int __iwl_up(struct iwl_priv *priv)
  5319. {
  5320. DECLARE_MAC_BUF(mac);
  5321. int rc, i;
  5322. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5323. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5324. return -EIO;
  5325. }
  5326. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5327. IWL_WARNING("Radio disabled by SW RF kill (module "
  5328. "parameter)\n");
  5329. return 0;
  5330. }
  5331. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5332. rc = iwl_hw_nic_init(priv);
  5333. if (rc) {
  5334. IWL_ERROR("Unable to int nic\n");
  5335. return rc;
  5336. }
  5337. /* make sure rfkill handshake bits are cleared */
  5338. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5339. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5340. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5341. /* clear (again), then enable host interrupts */
  5342. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5343. iwl_enable_interrupts(priv);
  5344. /* really make sure rfkill handshake bits are cleared */
  5345. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5346. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5347. /* Copy original ucode data image from disk into backup cache.
  5348. * This will be used to initialize the on-board processor's
  5349. * data SRAM for a clean start when the runtime program first loads. */
  5350. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5351. priv->ucode_data.len);
  5352. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5353. iwl_clear_stations_table(priv);
  5354. /* load bootstrap state machine,
  5355. * load bootstrap program into processor's memory,
  5356. * prepare to load the "initialize" uCode */
  5357. rc = iwl_load_bsm(priv);
  5358. if (rc) {
  5359. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5360. continue;
  5361. }
  5362. /* start card; "initialize" will load runtime ucode */
  5363. iwl_nic_start(priv);
  5364. /* MAC Address location in EEPROM same for 3945/4965 */
  5365. get_eeprom_mac(priv, priv->mac_addr);
  5366. IWL_DEBUG_INFO("MAC address: %s\n",
  5367. print_mac(mac, priv->mac_addr));
  5368. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5369. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5370. return 0;
  5371. }
  5372. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5373. __iwl_down(priv);
  5374. /* tried to restart and config the device for as long as our
  5375. * patience could withstand */
  5376. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5377. return -EIO;
  5378. }
  5379. /*****************************************************************************
  5380. *
  5381. * Workqueue callbacks
  5382. *
  5383. *****************************************************************************/
  5384. static void iwl_bg_init_alive_start(struct work_struct *data)
  5385. {
  5386. struct iwl_priv *priv =
  5387. container_of(data, struct iwl_priv, init_alive_start.work);
  5388. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5389. return;
  5390. mutex_lock(&priv->mutex);
  5391. iwl_init_alive_start(priv);
  5392. mutex_unlock(&priv->mutex);
  5393. }
  5394. static void iwl_bg_alive_start(struct work_struct *data)
  5395. {
  5396. struct iwl_priv *priv =
  5397. container_of(data, struct iwl_priv, alive_start.work);
  5398. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5399. return;
  5400. mutex_lock(&priv->mutex);
  5401. iwl_alive_start(priv);
  5402. mutex_unlock(&priv->mutex);
  5403. }
  5404. static void iwl_bg_rf_kill(struct work_struct *work)
  5405. {
  5406. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5407. wake_up_interruptible(&priv->wait_command_queue);
  5408. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5409. return;
  5410. mutex_lock(&priv->mutex);
  5411. if (!iwl_is_rfkill(priv)) {
  5412. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5413. "HW and/or SW RF Kill no longer active, restarting "
  5414. "device\n");
  5415. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5416. queue_work(priv->workqueue, &priv->restart);
  5417. } else {
  5418. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5419. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5420. "disabled by SW switch\n");
  5421. else
  5422. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5423. "Kill switch must be turned off for "
  5424. "wireless networking to work.\n");
  5425. }
  5426. mutex_unlock(&priv->mutex);
  5427. }
  5428. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5429. static void iwl_bg_scan_check(struct work_struct *data)
  5430. {
  5431. struct iwl_priv *priv =
  5432. container_of(data, struct iwl_priv, scan_check.work);
  5433. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5434. return;
  5435. mutex_lock(&priv->mutex);
  5436. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5437. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5438. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5439. "Scan completion watchdog resetting adapter (%dms)\n",
  5440. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5441. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5442. iwl_send_scan_abort(priv);
  5443. }
  5444. mutex_unlock(&priv->mutex);
  5445. }
  5446. static void iwl_bg_request_scan(struct work_struct *data)
  5447. {
  5448. struct iwl_priv *priv =
  5449. container_of(data, struct iwl_priv, request_scan);
  5450. struct iwl_host_cmd cmd = {
  5451. .id = REPLY_SCAN_CMD,
  5452. .len = sizeof(struct iwl_scan_cmd),
  5453. .meta.flags = CMD_SIZE_HUGE,
  5454. };
  5455. int rc = 0;
  5456. struct iwl_scan_cmd *scan;
  5457. struct ieee80211_conf *conf = NULL;
  5458. u8 direct_mask;
  5459. int phymode;
  5460. conf = ieee80211_get_hw_conf(priv->hw);
  5461. mutex_lock(&priv->mutex);
  5462. if (!iwl_is_ready(priv)) {
  5463. IWL_WARNING("request scan called when driver not ready.\n");
  5464. goto done;
  5465. }
  5466. /* Make sure the scan wasn't cancelled before this queued work
  5467. * was given the chance to run... */
  5468. if (!test_bit(STATUS_SCANNING, &priv->status))
  5469. goto done;
  5470. /* This should never be called or scheduled if there is currently
  5471. * a scan active in the hardware. */
  5472. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5473. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5474. "Ignoring second request.\n");
  5475. rc = -EIO;
  5476. goto done;
  5477. }
  5478. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5479. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5480. goto done;
  5481. }
  5482. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5483. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5484. goto done;
  5485. }
  5486. if (iwl_is_rfkill(priv)) {
  5487. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5488. goto done;
  5489. }
  5490. if (!test_bit(STATUS_READY, &priv->status)) {
  5491. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5492. goto done;
  5493. }
  5494. if (!priv->scan_bands) {
  5495. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5496. goto done;
  5497. }
  5498. if (!priv->scan) {
  5499. priv->scan = kmalloc(sizeof(struct iwl_scan_cmd) +
  5500. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5501. if (!priv->scan) {
  5502. rc = -ENOMEM;
  5503. goto done;
  5504. }
  5505. }
  5506. scan = priv->scan;
  5507. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5508. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5509. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5510. if (iwl_is_associated(priv)) {
  5511. u16 interval = 0;
  5512. u32 extra;
  5513. u32 suspend_time = 100;
  5514. u32 scan_suspend_time = 100;
  5515. unsigned long flags;
  5516. IWL_DEBUG_INFO("Scanning while associated...\n");
  5517. spin_lock_irqsave(&priv->lock, flags);
  5518. interval = priv->beacon_int;
  5519. spin_unlock_irqrestore(&priv->lock, flags);
  5520. scan->suspend_time = 0;
  5521. scan->max_out_time = cpu_to_le32(200 * 1024);
  5522. if (!interval)
  5523. interval = suspend_time;
  5524. /*
  5525. * suspend time format:
  5526. * 0-19: beacon interval in usec (time before exec.)
  5527. * 20-23: 0
  5528. * 24-31: number of beacons (suspend between channels)
  5529. */
  5530. extra = (suspend_time / interval) << 24;
  5531. scan_suspend_time = 0xFF0FFFFF &
  5532. (extra | ((suspend_time % interval) * 1024));
  5533. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5534. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5535. scan_suspend_time, interval);
  5536. }
  5537. /* We should add the ability for user to lock to PASSIVE ONLY */
  5538. if (priv->one_direct_scan) {
  5539. IWL_DEBUG_SCAN
  5540. ("Kicking off one direct scan for '%s'\n",
  5541. iwl_escape_essid(priv->direct_ssid,
  5542. priv->direct_ssid_len));
  5543. scan->direct_scan[0].id = WLAN_EID_SSID;
  5544. scan->direct_scan[0].len = priv->direct_ssid_len;
  5545. memcpy(scan->direct_scan[0].ssid,
  5546. priv->direct_ssid, priv->direct_ssid_len);
  5547. direct_mask = 1;
  5548. } else if (!iwl_is_associated(priv) && priv->essid_len) {
  5549. scan->direct_scan[0].id = WLAN_EID_SSID;
  5550. scan->direct_scan[0].len = priv->essid_len;
  5551. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5552. direct_mask = 1;
  5553. } else
  5554. direct_mask = 0;
  5555. /* We don't build a direct scan probe request; the uCode will do
  5556. * that based on the direct_mask added to each channel entry */
  5557. scan->tx_cmd.len = cpu_to_le16(
  5558. iwl_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5559. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5560. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5561. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5562. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5563. /* flags + rate selection */
  5564. switch (priv->scan_bands) {
  5565. case 2:
  5566. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5567. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  5568. scan->good_CRC_th = 0;
  5569. phymode = MODE_IEEE80211G;
  5570. break;
  5571. case 1:
  5572. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  5573. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5574. phymode = MODE_IEEE80211A;
  5575. break;
  5576. default:
  5577. IWL_WARNING("Invalid scan band count\n");
  5578. goto done;
  5579. }
  5580. /* select Rx antennas */
  5581. scan->flags |= iwl3945_get_antenna_flags(priv);
  5582. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5583. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5584. if (direct_mask)
  5585. IWL_DEBUG_SCAN
  5586. ("Initiating direct scan for %s.\n",
  5587. iwl_escape_essid(priv->essid, priv->essid_len));
  5588. else
  5589. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5590. scan->channel_count =
  5591. iwl_get_channels_for_scan(
  5592. priv, phymode, 1, /* active */
  5593. direct_mask,
  5594. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5595. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5596. scan->channel_count * sizeof(struct iwl_scan_channel);
  5597. cmd.data = scan;
  5598. scan->len = cpu_to_le16(cmd.len);
  5599. set_bit(STATUS_SCAN_HW, &priv->status);
  5600. rc = iwl_send_cmd_sync(priv, &cmd);
  5601. if (rc)
  5602. goto done;
  5603. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5604. IWL_SCAN_CHECK_WATCHDOG);
  5605. mutex_unlock(&priv->mutex);
  5606. return;
  5607. done:
  5608. /* inform mac80211 sacn aborted */
  5609. queue_work(priv->workqueue, &priv->scan_completed);
  5610. mutex_unlock(&priv->mutex);
  5611. }
  5612. static void iwl_bg_up(struct work_struct *data)
  5613. {
  5614. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5615. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5616. return;
  5617. mutex_lock(&priv->mutex);
  5618. __iwl_up(priv);
  5619. mutex_unlock(&priv->mutex);
  5620. }
  5621. static void iwl_bg_restart(struct work_struct *data)
  5622. {
  5623. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5624. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5625. return;
  5626. iwl_down(priv);
  5627. queue_work(priv->workqueue, &priv->up);
  5628. }
  5629. static void iwl_bg_rx_replenish(struct work_struct *data)
  5630. {
  5631. struct iwl_priv *priv =
  5632. container_of(data, struct iwl_priv, rx_replenish);
  5633. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5634. return;
  5635. mutex_lock(&priv->mutex);
  5636. iwl_rx_replenish(priv);
  5637. mutex_unlock(&priv->mutex);
  5638. }
  5639. static void iwl_bg_post_associate(struct work_struct *data)
  5640. {
  5641. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5642. post_associate.work);
  5643. int rc = 0;
  5644. struct ieee80211_conf *conf = NULL;
  5645. DECLARE_MAC_BUF(mac);
  5646. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5647. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5648. return;
  5649. }
  5650. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5651. priv->assoc_id,
  5652. print_mac(mac, priv->active_rxon.bssid_addr));
  5653. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5654. return;
  5655. mutex_lock(&priv->mutex);
  5656. if (!priv->interface_id || !priv->is_open) {
  5657. mutex_unlock(&priv->mutex);
  5658. return;
  5659. }
  5660. iwl_scan_cancel_timeout(priv, 200);
  5661. conf = ieee80211_get_hw_conf(priv->hw);
  5662. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5663. iwl_commit_rxon(priv);
  5664. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5665. iwl_setup_rxon_timing(priv);
  5666. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5667. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5668. if (rc)
  5669. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5670. "Attempting to continue.\n");
  5671. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5672. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5673. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5674. priv->assoc_id, priv->beacon_int);
  5675. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5676. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5677. else
  5678. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5679. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5680. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5681. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5682. else
  5683. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5684. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5685. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5686. }
  5687. iwl_commit_rxon(priv);
  5688. switch (priv->iw_mode) {
  5689. case IEEE80211_IF_TYPE_STA:
  5690. iwl_rate_scale_init(priv->hw, IWL_AP_ID);
  5691. break;
  5692. case IEEE80211_IF_TYPE_IBSS:
  5693. /* clear out the station table */
  5694. iwl_clear_stations_table(priv);
  5695. iwl_add_station(priv, BROADCAST_ADDR, 0, 0);
  5696. iwl_add_station(priv, priv->bssid, 0, 0);
  5697. iwl3945_sync_sta(priv, IWL_STA_ID,
  5698. (priv->phymode == MODE_IEEE80211A)?
  5699. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  5700. CMD_ASYNC);
  5701. iwl_rate_scale_init(priv->hw, IWL_STA_ID);
  5702. iwl_send_beacon_cmd(priv);
  5703. break;
  5704. default:
  5705. IWL_ERROR("%s Should not be called in %d mode\n",
  5706. __FUNCTION__, priv->iw_mode);
  5707. break;
  5708. }
  5709. iwl_sequence_reset(priv);
  5710. #ifdef CONFIG_IWLWIFI_QOS
  5711. iwl_activate_qos(priv, 0);
  5712. #endif /* CONFIG_IWLWIFI_QOS */
  5713. mutex_unlock(&priv->mutex);
  5714. }
  5715. static void iwl_bg_abort_scan(struct work_struct *work)
  5716. {
  5717. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  5718. abort_scan);
  5719. if (!iwl_is_ready(priv))
  5720. return;
  5721. mutex_lock(&priv->mutex);
  5722. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5723. iwl_send_scan_abort(priv);
  5724. mutex_unlock(&priv->mutex);
  5725. }
  5726. static void iwl_bg_scan_completed(struct work_struct *work)
  5727. {
  5728. struct iwl_priv *priv =
  5729. container_of(work, struct iwl_priv, scan_completed);
  5730. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5731. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5732. return;
  5733. ieee80211_scan_completed(priv->hw);
  5734. /* Since setting the TXPOWER may have been deferred while
  5735. * performing the scan, fire one off */
  5736. mutex_lock(&priv->mutex);
  5737. iwl_hw_reg_send_txpower(priv);
  5738. mutex_unlock(&priv->mutex);
  5739. }
  5740. /*****************************************************************************
  5741. *
  5742. * mac80211 entry point functions
  5743. *
  5744. *****************************************************************************/
  5745. static int iwl_mac_start(struct ieee80211_hw *hw)
  5746. {
  5747. struct iwl_priv *priv = hw->priv;
  5748. IWL_DEBUG_MAC80211("enter\n");
  5749. /* we should be verifying the device is ready to be opened */
  5750. mutex_lock(&priv->mutex);
  5751. priv->is_open = 1;
  5752. if (!iwl_is_rfkill(priv))
  5753. ieee80211_start_queues(priv->hw);
  5754. mutex_unlock(&priv->mutex);
  5755. IWL_DEBUG_MAC80211("leave\n");
  5756. return 0;
  5757. }
  5758. static void iwl_mac_stop(struct ieee80211_hw *hw)
  5759. {
  5760. struct iwl_priv *priv = hw->priv;
  5761. IWL_DEBUG_MAC80211("enter\n");
  5762. mutex_lock(&priv->mutex);
  5763. /* stop mac, cancel any scan request and clear
  5764. * RXON_FILTER_ASSOC_MSK BIT
  5765. */
  5766. priv->is_open = 0;
  5767. iwl_scan_cancel_timeout(priv, 100);
  5768. cancel_delayed_work(&priv->post_associate);
  5769. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5770. iwl_commit_rxon(priv);
  5771. mutex_unlock(&priv->mutex);
  5772. IWL_DEBUG_MAC80211("leave\n");
  5773. }
  5774. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5775. struct ieee80211_tx_control *ctl)
  5776. {
  5777. struct iwl_priv *priv = hw->priv;
  5778. IWL_DEBUG_MAC80211("enter\n");
  5779. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5780. IWL_DEBUG_MAC80211("leave - monitor\n");
  5781. return -1;
  5782. }
  5783. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5784. ctl->tx_rate);
  5785. if (iwl_tx_skb(priv, skb, ctl))
  5786. dev_kfree_skb_any(skb);
  5787. IWL_DEBUG_MAC80211("leave\n");
  5788. return 0;
  5789. }
  5790. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  5791. struct ieee80211_if_init_conf *conf)
  5792. {
  5793. struct iwl_priv *priv = hw->priv;
  5794. unsigned long flags;
  5795. DECLARE_MAC_BUF(mac);
  5796. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  5797. if (priv->interface_id) {
  5798. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  5799. return -EOPNOTSUPP;
  5800. }
  5801. spin_lock_irqsave(&priv->lock, flags);
  5802. priv->interface_id = conf->if_id;
  5803. spin_unlock_irqrestore(&priv->lock, flags);
  5804. mutex_lock(&priv->mutex);
  5805. if (conf->mac_addr) {
  5806. IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
  5807. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5808. }
  5809. iwl_set_mode(priv, conf->type);
  5810. IWL_DEBUG_MAC80211("leave\n");
  5811. mutex_unlock(&priv->mutex);
  5812. return 0;
  5813. }
  5814. /**
  5815. * iwl_mac_config - mac80211 config callback
  5816. *
  5817. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5818. * be set inappropriately and the driver currently sets the hardware up to
  5819. * use it whenever needed.
  5820. */
  5821. static int iwl_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5822. {
  5823. struct iwl_priv *priv = hw->priv;
  5824. const struct iwl_channel_info *ch_info;
  5825. unsigned long flags;
  5826. mutex_lock(&priv->mutex);
  5827. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  5828. if (!iwl_is_ready(priv)) {
  5829. IWL_DEBUG_MAC80211("leave - not ready\n");
  5830. mutex_unlock(&priv->mutex);
  5831. return -EIO;
  5832. }
  5833. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  5834. * what is exposed through include/ declrations */
  5835. if (unlikely(!iwl_param_disable_hw_scan &&
  5836. test_bit(STATUS_SCANNING, &priv->status))) {
  5837. IWL_DEBUG_MAC80211("leave - scanning\n");
  5838. mutex_unlock(&priv->mutex);
  5839. return 0;
  5840. }
  5841. spin_lock_irqsave(&priv->lock, flags);
  5842. ch_info = iwl_get_channel_info(priv, conf->phymode, conf->channel);
  5843. if (!is_channel_valid(ch_info)) {
  5844. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  5845. conf->channel, conf->phymode);
  5846. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5847. spin_unlock_irqrestore(&priv->lock, flags);
  5848. mutex_unlock(&priv->mutex);
  5849. return -EINVAL;
  5850. }
  5851. iwl_set_rxon_channel(priv, conf->phymode, conf->channel);
  5852. iwl_set_flags_for_phymode(priv, conf->phymode);
  5853. /* The list of supported rates and rate mask can be different
  5854. * for each phymode; since the phymode may have changed, reset
  5855. * the rate mask to what mac80211 lists */
  5856. iwl_set_rate(priv);
  5857. spin_unlock_irqrestore(&priv->lock, flags);
  5858. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5859. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5860. iwl_hw_channel_switch(priv, conf->channel);
  5861. mutex_unlock(&priv->mutex);
  5862. return 0;
  5863. }
  5864. #endif
  5865. iwl_radio_kill_sw(priv, !conf->radio_enabled);
  5866. if (!conf->radio_enabled) {
  5867. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5868. mutex_unlock(&priv->mutex);
  5869. return 0;
  5870. }
  5871. if (iwl_is_rfkill(priv)) {
  5872. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5873. mutex_unlock(&priv->mutex);
  5874. return -EIO;
  5875. }
  5876. iwl_set_rate(priv);
  5877. if (memcmp(&priv->active_rxon,
  5878. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5879. iwl_commit_rxon(priv);
  5880. else
  5881. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5882. IWL_DEBUG_MAC80211("leave\n");
  5883. mutex_unlock(&priv->mutex);
  5884. return 0;
  5885. }
  5886. static void iwl_config_ap(struct iwl_priv *priv)
  5887. {
  5888. int rc = 0;
  5889. if (priv->status & STATUS_EXIT_PENDING)
  5890. return;
  5891. /* The following should be done only at AP bring up */
  5892. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5893. /* RXON - unassoc (to set timing command) */
  5894. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5895. iwl_commit_rxon(priv);
  5896. /* RXON Timing */
  5897. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5898. iwl_setup_rxon_timing(priv);
  5899. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5900. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5901. if (rc)
  5902. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5903. "Attempting to continue.\n");
  5904. /* FIXME: what should be the assoc_id for AP? */
  5905. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5906. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5907. priv->staging_rxon.flags |=
  5908. RXON_FLG_SHORT_PREAMBLE_MSK;
  5909. else
  5910. priv->staging_rxon.flags &=
  5911. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5912. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5913. if (priv->assoc_capability &
  5914. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5915. priv->staging_rxon.flags |=
  5916. RXON_FLG_SHORT_SLOT_MSK;
  5917. else
  5918. priv->staging_rxon.flags &=
  5919. ~RXON_FLG_SHORT_SLOT_MSK;
  5920. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5921. priv->staging_rxon.flags &=
  5922. ~RXON_FLG_SHORT_SLOT_MSK;
  5923. }
  5924. /* restore RXON assoc */
  5925. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5926. iwl_commit_rxon(priv);
  5927. iwl_add_station(priv, BROADCAST_ADDR, 0, 0);
  5928. }
  5929. iwl_send_beacon_cmd(priv);
  5930. /* FIXME - we need to add code here to detect a totally new
  5931. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5932. * clear sta table, add BCAST sta... */
  5933. }
  5934. static int iwl_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  5935. struct ieee80211_if_conf *conf)
  5936. {
  5937. struct iwl_priv *priv = hw->priv;
  5938. DECLARE_MAC_BUF(mac);
  5939. unsigned long flags;
  5940. int rc;
  5941. if (conf == NULL)
  5942. return -EIO;
  5943. /* XXX: this MUST use conf->mac_addr */
  5944. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5945. (!conf->beacon || !conf->ssid_len)) {
  5946. IWL_DEBUG_MAC80211
  5947. ("Leaving in AP mode because HostAPD is not ready.\n");
  5948. return 0;
  5949. }
  5950. mutex_lock(&priv->mutex);
  5951. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  5952. if (conf->bssid)
  5953. IWL_DEBUG_MAC80211("bssid: %s\n",
  5954. print_mac(mac, conf->bssid));
  5955. /*
  5956. * very dubious code was here; the probe filtering flag is never set:
  5957. *
  5958. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5959. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5960. */
  5961. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  5962. IWL_DEBUG_MAC80211("leave - scanning\n");
  5963. mutex_unlock(&priv->mutex);
  5964. return 0;
  5965. }
  5966. if (priv->interface_id != if_id) {
  5967. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  5968. mutex_unlock(&priv->mutex);
  5969. return 0;
  5970. }
  5971. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5972. if (!conf->bssid) {
  5973. conf->bssid = priv->mac_addr;
  5974. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5975. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5976. print_mac(mac, conf->bssid));
  5977. }
  5978. if (priv->ibss_beacon)
  5979. dev_kfree_skb(priv->ibss_beacon);
  5980. priv->ibss_beacon = conf->beacon;
  5981. }
  5982. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5983. !is_multicast_ether_addr(conf->bssid)) {
  5984. /* If there is currently a HW scan going on in the background
  5985. * then we need to cancel it else the RXON below will fail. */
  5986. if (iwl_scan_cancel_timeout(priv, 100)) {
  5987. IWL_WARNING("Aborted scan still in progress "
  5988. "after 100ms\n");
  5989. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5990. mutex_unlock(&priv->mutex);
  5991. return -EAGAIN;
  5992. }
  5993. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5994. /* TODO: Audit driver for usage of these members and see
  5995. * if mac80211 deprecates them (priv->bssid looks like it
  5996. * shouldn't be there, but I haven't scanned the IBSS code
  5997. * to verify) - jpk */
  5998. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5999. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6000. iwl_config_ap(priv);
  6001. else {
  6002. rc = iwl_commit_rxon(priv);
  6003. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6004. iwl_add_station(priv,
  6005. priv->active_rxon.bssid_addr, 1, 0);
  6006. }
  6007. } else {
  6008. iwl_scan_cancel_timeout(priv, 100);
  6009. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6010. iwl_commit_rxon(priv);
  6011. }
  6012. spin_lock_irqsave(&priv->lock, flags);
  6013. if (!conf->ssid_len)
  6014. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6015. else
  6016. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6017. priv->essid_len = conf->ssid_len;
  6018. spin_unlock_irqrestore(&priv->lock, flags);
  6019. IWL_DEBUG_MAC80211("leave\n");
  6020. mutex_unlock(&priv->mutex);
  6021. return 0;
  6022. }
  6023. static void iwl_configure_filter(struct ieee80211_hw *hw,
  6024. unsigned int changed_flags,
  6025. unsigned int *total_flags,
  6026. int mc_count, struct dev_addr_list *mc_list)
  6027. {
  6028. /*
  6029. * XXX: dummy
  6030. * see also iwl_connection_init_rx_config
  6031. */
  6032. *total_flags = 0;
  6033. }
  6034. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  6035. struct ieee80211_if_init_conf *conf)
  6036. {
  6037. struct iwl_priv *priv = hw->priv;
  6038. IWL_DEBUG_MAC80211("enter\n");
  6039. mutex_lock(&priv->mutex);
  6040. iwl_scan_cancel_timeout(priv, 100);
  6041. cancel_delayed_work(&priv->post_associate);
  6042. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6043. iwl_commit_rxon(priv);
  6044. if (priv->interface_id == conf->if_id) {
  6045. priv->interface_id = 0;
  6046. memset(priv->bssid, 0, ETH_ALEN);
  6047. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6048. priv->essid_len = 0;
  6049. }
  6050. mutex_unlock(&priv->mutex);
  6051. IWL_DEBUG_MAC80211("leave\n");
  6052. }
  6053. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6054. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6055. {
  6056. int rc = 0;
  6057. unsigned long flags;
  6058. struct iwl_priv *priv = hw->priv;
  6059. IWL_DEBUG_MAC80211("enter\n");
  6060. mutex_lock(&priv->mutex);
  6061. spin_lock_irqsave(&priv->lock, flags);
  6062. if (!iwl_is_ready_rf(priv)) {
  6063. rc = -EIO;
  6064. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6065. goto out_unlock;
  6066. }
  6067. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6068. rc = -EIO;
  6069. IWL_ERROR("ERROR: APs don't scan\n");
  6070. goto out_unlock;
  6071. }
  6072. /* if we just finished scan ask for delay */
  6073. if (priv->last_scan_jiffies &&
  6074. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6075. jiffies)) {
  6076. rc = -EAGAIN;
  6077. goto out_unlock;
  6078. }
  6079. if (len) {
  6080. IWL_DEBUG_SCAN("direct scan for "
  6081. "%s [%d]\n ",
  6082. iwl_escape_essid(ssid, len), (int)len);
  6083. priv->one_direct_scan = 1;
  6084. priv->direct_ssid_len = (u8)
  6085. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6086. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6087. } else
  6088. priv->one_direct_scan = 0;
  6089. rc = iwl_scan_initiate(priv);
  6090. IWL_DEBUG_MAC80211("leave\n");
  6091. out_unlock:
  6092. spin_unlock_irqrestore(&priv->lock, flags);
  6093. mutex_unlock(&priv->mutex);
  6094. return rc;
  6095. }
  6096. static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6097. const u8 *local_addr, const u8 *addr,
  6098. struct ieee80211_key_conf *key)
  6099. {
  6100. struct iwl_priv *priv = hw->priv;
  6101. int rc = 0;
  6102. u8 sta_id;
  6103. IWL_DEBUG_MAC80211("enter\n");
  6104. if (!iwl_param_hwcrypto) {
  6105. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6106. return -EOPNOTSUPP;
  6107. }
  6108. if (is_zero_ether_addr(addr))
  6109. /* only support pairwise keys */
  6110. return -EOPNOTSUPP;
  6111. sta_id = iwl_hw_find_station(priv, addr);
  6112. if (sta_id == IWL_INVALID_STATION) {
  6113. DECLARE_MAC_BUF(mac);
  6114. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6115. print_mac(mac, addr));
  6116. return -EINVAL;
  6117. }
  6118. mutex_lock(&priv->mutex);
  6119. iwl_scan_cancel_timeout(priv, 100);
  6120. switch (cmd) {
  6121. case SET_KEY:
  6122. rc = iwl_update_sta_key_info(priv, key, sta_id);
  6123. if (!rc) {
  6124. iwl_set_rxon_hwcrypto(priv, 1);
  6125. iwl_commit_rxon(priv);
  6126. key->hw_key_idx = sta_id;
  6127. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6128. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6129. }
  6130. break;
  6131. case DISABLE_KEY:
  6132. rc = iwl_clear_sta_key_info(priv, sta_id);
  6133. if (!rc) {
  6134. iwl_set_rxon_hwcrypto(priv, 0);
  6135. iwl_commit_rxon(priv);
  6136. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6137. }
  6138. break;
  6139. default:
  6140. rc = -EINVAL;
  6141. }
  6142. IWL_DEBUG_MAC80211("leave\n");
  6143. mutex_unlock(&priv->mutex);
  6144. return rc;
  6145. }
  6146. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6147. const struct ieee80211_tx_queue_params *params)
  6148. {
  6149. struct iwl_priv *priv = hw->priv;
  6150. #ifdef CONFIG_IWLWIFI_QOS
  6151. unsigned long flags;
  6152. int q;
  6153. #endif /* CONFIG_IWL_QOS */
  6154. IWL_DEBUG_MAC80211("enter\n");
  6155. if (!iwl_is_ready_rf(priv)) {
  6156. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6157. return -EIO;
  6158. }
  6159. if (queue >= AC_NUM) {
  6160. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6161. return 0;
  6162. }
  6163. #ifdef CONFIG_IWLWIFI_QOS
  6164. if (!priv->qos_data.qos_enable) {
  6165. priv->qos_data.qos_active = 0;
  6166. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6167. return 0;
  6168. }
  6169. q = AC_NUM - 1 - queue;
  6170. spin_lock_irqsave(&priv->lock, flags);
  6171. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6172. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6173. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6174. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6175. cpu_to_le16((params->burst_time * 100));
  6176. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6177. priv->qos_data.qos_active = 1;
  6178. spin_unlock_irqrestore(&priv->lock, flags);
  6179. mutex_lock(&priv->mutex);
  6180. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6181. iwl_activate_qos(priv, 1);
  6182. else if (priv->assoc_id && iwl_is_associated(priv))
  6183. iwl_activate_qos(priv, 0);
  6184. mutex_unlock(&priv->mutex);
  6185. #endif /*CONFIG_IWLWIFI_QOS */
  6186. IWL_DEBUG_MAC80211("leave\n");
  6187. return 0;
  6188. }
  6189. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  6190. struct ieee80211_tx_queue_stats *stats)
  6191. {
  6192. struct iwl_priv *priv = hw->priv;
  6193. int i, avail;
  6194. struct iwl_tx_queue *txq;
  6195. struct iwl_queue *q;
  6196. unsigned long flags;
  6197. IWL_DEBUG_MAC80211("enter\n");
  6198. if (!iwl_is_ready_rf(priv)) {
  6199. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6200. return -EIO;
  6201. }
  6202. spin_lock_irqsave(&priv->lock, flags);
  6203. for (i = 0; i < AC_NUM; i++) {
  6204. txq = &priv->txq[i];
  6205. q = &txq->q;
  6206. avail = iwl_queue_space(q);
  6207. stats->data[i].len = q->n_window - avail;
  6208. stats->data[i].limit = q->n_window - q->high_mark;
  6209. stats->data[i].count = q->n_window;
  6210. }
  6211. spin_unlock_irqrestore(&priv->lock, flags);
  6212. IWL_DEBUG_MAC80211("leave\n");
  6213. return 0;
  6214. }
  6215. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  6216. struct ieee80211_low_level_stats *stats)
  6217. {
  6218. IWL_DEBUG_MAC80211("enter\n");
  6219. IWL_DEBUG_MAC80211("leave\n");
  6220. return 0;
  6221. }
  6222. static u64 iwl_mac_get_tsf(struct ieee80211_hw *hw)
  6223. {
  6224. IWL_DEBUG_MAC80211("enter\n");
  6225. IWL_DEBUG_MAC80211("leave\n");
  6226. return 0;
  6227. }
  6228. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  6229. {
  6230. struct iwl_priv *priv = hw->priv;
  6231. unsigned long flags;
  6232. mutex_lock(&priv->mutex);
  6233. IWL_DEBUG_MAC80211("enter\n");
  6234. #ifdef CONFIG_IWLWIFI_QOS
  6235. iwl_reset_qos(priv);
  6236. #endif
  6237. cancel_delayed_work(&priv->post_associate);
  6238. spin_lock_irqsave(&priv->lock, flags);
  6239. priv->assoc_id = 0;
  6240. priv->assoc_capability = 0;
  6241. priv->call_post_assoc_from_beacon = 0;
  6242. /* new association get rid of ibss beacon skb */
  6243. if (priv->ibss_beacon)
  6244. dev_kfree_skb(priv->ibss_beacon);
  6245. priv->ibss_beacon = NULL;
  6246. priv->beacon_int = priv->hw->conf.beacon_int;
  6247. priv->timestamp1 = 0;
  6248. priv->timestamp0 = 0;
  6249. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6250. priv->beacon_int = 0;
  6251. spin_unlock_irqrestore(&priv->lock, flags);
  6252. /* we are restarting association process
  6253. * clear RXON_FILTER_ASSOC_MSK bit
  6254. */
  6255. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6256. iwl_scan_cancel_timeout(priv, 100);
  6257. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6258. iwl_commit_rxon(priv);
  6259. }
  6260. /* Per mac80211.h: This is only used in IBSS mode... */
  6261. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6262. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6263. mutex_unlock(&priv->mutex);
  6264. return;
  6265. }
  6266. if (!iwl_is_ready_rf(priv)) {
  6267. IWL_DEBUG_MAC80211("leave - not ready\n");
  6268. mutex_unlock(&priv->mutex);
  6269. return;
  6270. }
  6271. priv->only_active_channel = 0;
  6272. iwl_set_rate(priv);
  6273. mutex_unlock(&priv->mutex);
  6274. IWL_DEBUG_MAC80211("leave\n");
  6275. }
  6276. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6277. struct ieee80211_tx_control *control)
  6278. {
  6279. struct iwl_priv *priv = hw->priv;
  6280. unsigned long flags;
  6281. mutex_lock(&priv->mutex);
  6282. IWL_DEBUG_MAC80211("enter\n");
  6283. if (!iwl_is_ready_rf(priv)) {
  6284. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6285. mutex_unlock(&priv->mutex);
  6286. return -EIO;
  6287. }
  6288. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6289. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6290. mutex_unlock(&priv->mutex);
  6291. return -EIO;
  6292. }
  6293. spin_lock_irqsave(&priv->lock, flags);
  6294. if (priv->ibss_beacon)
  6295. dev_kfree_skb(priv->ibss_beacon);
  6296. priv->ibss_beacon = skb;
  6297. priv->assoc_id = 0;
  6298. IWL_DEBUG_MAC80211("leave\n");
  6299. spin_unlock_irqrestore(&priv->lock, flags);
  6300. #ifdef CONFIG_IWLWIFI_QOS
  6301. iwl_reset_qos(priv);
  6302. #endif
  6303. queue_work(priv->workqueue, &priv->post_associate.work);
  6304. mutex_unlock(&priv->mutex);
  6305. return 0;
  6306. }
  6307. /*****************************************************************************
  6308. *
  6309. * sysfs attributes
  6310. *
  6311. *****************************************************************************/
  6312. #ifdef CONFIG_IWLWIFI_DEBUG
  6313. /*
  6314. * The following adds a new attribute to the sysfs representation
  6315. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6316. * used for controlling the debug level.
  6317. *
  6318. * See the level definitions in iwl for details.
  6319. */
  6320. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6321. {
  6322. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6323. }
  6324. static ssize_t store_debug_level(struct device_driver *d,
  6325. const char *buf, size_t count)
  6326. {
  6327. char *p = (char *)buf;
  6328. u32 val;
  6329. val = simple_strtoul(p, &p, 0);
  6330. if (p == buf)
  6331. printk(KERN_INFO DRV_NAME
  6332. ": %s is not in hex or decimal form.\n", buf);
  6333. else
  6334. iwl_debug_level = val;
  6335. return strnlen(buf, count);
  6336. }
  6337. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6338. show_debug_level, store_debug_level);
  6339. #endif /* CONFIG_IWLWIFI_DEBUG */
  6340. static ssize_t show_rf_kill(struct device *d,
  6341. struct device_attribute *attr, char *buf)
  6342. {
  6343. /*
  6344. * 0 - RF kill not enabled
  6345. * 1 - SW based RF kill active (sysfs)
  6346. * 2 - HW based RF kill active
  6347. * 3 - Both HW and SW based RF kill active
  6348. */
  6349. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6350. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6351. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6352. return sprintf(buf, "%i\n", val);
  6353. }
  6354. static ssize_t store_rf_kill(struct device *d,
  6355. struct device_attribute *attr,
  6356. const char *buf, size_t count)
  6357. {
  6358. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6359. mutex_lock(&priv->mutex);
  6360. iwl_radio_kill_sw(priv, buf[0] == '1');
  6361. mutex_unlock(&priv->mutex);
  6362. return count;
  6363. }
  6364. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6365. static ssize_t show_temperature(struct device *d,
  6366. struct device_attribute *attr, char *buf)
  6367. {
  6368. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6369. if (!iwl_is_alive(priv))
  6370. return -EAGAIN;
  6371. return sprintf(buf, "%d\n", iwl_hw_get_temperature(priv));
  6372. }
  6373. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6374. static ssize_t show_rs_window(struct device *d,
  6375. struct device_attribute *attr,
  6376. char *buf)
  6377. {
  6378. struct iwl_priv *priv = d->driver_data;
  6379. return iwl_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6380. }
  6381. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6382. static ssize_t show_tx_power(struct device *d,
  6383. struct device_attribute *attr, char *buf)
  6384. {
  6385. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6386. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6387. }
  6388. static ssize_t store_tx_power(struct device *d,
  6389. struct device_attribute *attr,
  6390. const char *buf, size_t count)
  6391. {
  6392. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6393. char *p = (char *)buf;
  6394. u32 val;
  6395. val = simple_strtoul(p, &p, 10);
  6396. if (p == buf)
  6397. printk(KERN_INFO DRV_NAME
  6398. ": %s is not in decimal form.\n", buf);
  6399. else
  6400. iwl_hw_reg_set_txpower(priv, val);
  6401. return count;
  6402. }
  6403. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6404. static ssize_t show_flags(struct device *d,
  6405. struct device_attribute *attr, char *buf)
  6406. {
  6407. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6408. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6409. }
  6410. static ssize_t store_flags(struct device *d,
  6411. struct device_attribute *attr,
  6412. const char *buf, size_t count)
  6413. {
  6414. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6415. u32 flags = simple_strtoul(buf, NULL, 0);
  6416. mutex_lock(&priv->mutex);
  6417. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6418. /* Cancel any currently running scans... */
  6419. if (iwl_scan_cancel_timeout(priv, 100))
  6420. IWL_WARNING("Could not cancel scan.\n");
  6421. else {
  6422. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6423. flags);
  6424. priv->staging_rxon.flags = cpu_to_le32(flags);
  6425. iwl_commit_rxon(priv);
  6426. }
  6427. }
  6428. mutex_unlock(&priv->mutex);
  6429. return count;
  6430. }
  6431. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6432. static ssize_t show_filter_flags(struct device *d,
  6433. struct device_attribute *attr, char *buf)
  6434. {
  6435. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6436. return sprintf(buf, "0x%04X\n",
  6437. le32_to_cpu(priv->active_rxon.filter_flags));
  6438. }
  6439. static ssize_t store_filter_flags(struct device *d,
  6440. struct device_attribute *attr,
  6441. const char *buf, size_t count)
  6442. {
  6443. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6444. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6445. mutex_lock(&priv->mutex);
  6446. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6447. /* Cancel any currently running scans... */
  6448. if (iwl_scan_cancel_timeout(priv, 100))
  6449. IWL_WARNING("Could not cancel scan.\n");
  6450. else {
  6451. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6452. "0x%04X\n", filter_flags);
  6453. priv->staging_rxon.filter_flags =
  6454. cpu_to_le32(filter_flags);
  6455. iwl_commit_rxon(priv);
  6456. }
  6457. }
  6458. mutex_unlock(&priv->mutex);
  6459. return count;
  6460. }
  6461. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6462. store_filter_flags);
  6463. static ssize_t show_tune(struct device *d,
  6464. struct device_attribute *attr, char *buf)
  6465. {
  6466. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6467. return sprintf(buf, "0x%04X\n",
  6468. (priv->phymode << 8) |
  6469. le16_to_cpu(priv->active_rxon.channel));
  6470. }
  6471. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode);
  6472. static ssize_t store_tune(struct device *d,
  6473. struct device_attribute *attr,
  6474. const char *buf, size_t count)
  6475. {
  6476. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6477. char *p = (char *)buf;
  6478. u16 tune = simple_strtoul(p, &p, 0);
  6479. u8 phymode = (tune >> 8) & 0xff;
  6480. u16 channel = tune & 0xff;
  6481. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  6482. mutex_lock(&priv->mutex);
  6483. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  6484. (priv->phymode != phymode)) {
  6485. const struct iwl_channel_info *ch_info;
  6486. ch_info = iwl_get_channel_info(priv, phymode, channel);
  6487. if (!ch_info) {
  6488. IWL_WARNING("Requested invalid phymode/channel "
  6489. "combination: %d %d\n", phymode, channel);
  6490. mutex_unlock(&priv->mutex);
  6491. return -EINVAL;
  6492. }
  6493. /* Cancel any currently running scans... */
  6494. if (iwl_scan_cancel_timeout(priv, 100))
  6495. IWL_WARNING("Could not cancel scan.\n");
  6496. else {
  6497. IWL_DEBUG_INFO("Committing phymode and "
  6498. "rxon.channel = %d %d\n",
  6499. phymode, channel);
  6500. iwl_set_rxon_channel(priv, phymode, channel);
  6501. iwl_set_flags_for_phymode(priv, phymode);
  6502. iwl_set_rate(priv);
  6503. iwl_commit_rxon(priv);
  6504. }
  6505. }
  6506. mutex_unlock(&priv->mutex);
  6507. return count;
  6508. }
  6509. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  6510. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6511. static ssize_t show_measurement(struct device *d,
  6512. struct device_attribute *attr, char *buf)
  6513. {
  6514. struct iwl_priv *priv = dev_get_drvdata(d);
  6515. struct iwl_spectrum_notification measure_report;
  6516. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6517. u8 *data = (u8 *) & measure_report;
  6518. unsigned long flags;
  6519. spin_lock_irqsave(&priv->lock, flags);
  6520. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6521. spin_unlock_irqrestore(&priv->lock, flags);
  6522. return 0;
  6523. }
  6524. memcpy(&measure_report, &priv->measure_report, size);
  6525. priv->measurement_status = 0;
  6526. spin_unlock_irqrestore(&priv->lock, flags);
  6527. while (size && (PAGE_SIZE - len)) {
  6528. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6529. PAGE_SIZE - len, 1);
  6530. len = strlen(buf);
  6531. if (PAGE_SIZE - len)
  6532. buf[len++] = '\n';
  6533. ofs += 16;
  6534. size -= min(size, 16U);
  6535. }
  6536. return len;
  6537. }
  6538. static ssize_t store_measurement(struct device *d,
  6539. struct device_attribute *attr,
  6540. const char *buf, size_t count)
  6541. {
  6542. struct iwl_priv *priv = dev_get_drvdata(d);
  6543. struct ieee80211_measurement_params params = {
  6544. .channel = le16_to_cpu(priv->active_rxon.channel),
  6545. .start_time = cpu_to_le64(priv->last_tsf),
  6546. .duration = cpu_to_le16(1),
  6547. };
  6548. u8 type = IWL_MEASURE_BASIC;
  6549. u8 buffer[32];
  6550. u8 channel;
  6551. if (count) {
  6552. char *p = buffer;
  6553. strncpy(buffer, buf, min(sizeof(buffer), count));
  6554. channel = simple_strtoul(p, NULL, 0);
  6555. if (channel)
  6556. params.channel = channel;
  6557. p = buffer;
  6558. while (*p && *p != ' ')
  6559. p++;
  6560. if (*p)
  6561. type = simple_strtoul(p + 1, NULL, 0);
  6562. }
  6563. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6564. "channel %d (for '%s')\n", type, params.channel, buf);
  6565. iwl_get_measurement(priv, &params, type);
  6566. return count;
  6567. }
  6568. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6569. show_measurement, store_measurement);
  6570. #endif /* CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT */
  6571. static ssize_t show_rate(struct device *d,
  6572. struct device_attribute *attr, char *buf)
  6573. {
  6574. struct iwl_priv *priv = dev_get_drvdata(d);
  6575. unsigned long flags;
  6576. int i;
  6577. spin_lock_irqsave(&priv->sta_lock, flags);
  6578. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  6579. i = priv->stations[IWL_AP_ID].current_rate.s.rate;
  6580. else
  6581. i = priv->stations[IWL_STA_ID].current_rate.s.rate;
  6582. spin_unlock_irqrestore(&priv->sta_lock, flags);
  6583. i = iwl_rate_index_from_plcp(i);
  6584. if (i == -1)
  6585. return sprintf(buf, "0\n");
  6586. return sprintf(buf, "%d%s\n",
  6587. (iwl_rates[i].ieee >> 1),
  6588. (iwl_rates[i].ieee & 0x1) ? ".5" : "");
  6589. }
  6590. static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
  6591. static ssize_t store_retry_rate(struct device *d,
  6592. struct device_attribute *attr,
  6593. const char *buf, size_t count)
  6594. {
  6595. struct iwl_priv *priv = dev_get_drvdata(d);
  6596. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6597. if (priv->retry_rate <= 0)
  6598. priv->retry_rate = 1;
  6599. return count;
  6600. }
  6601. static ssize_t show_retry_rate(struct device *d,
  6602. struct device_attribute *attr, char *buf)
  6603. {
  6604. struct iwl_priv *priv = dev_get_drvdata(d);
  6605. return sprintf(buf, "%d", priv->retry_rate);
  6606. }
  6607. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6608. store_retry_rate);
  6609. static ssize_t store_power_level(struct device *d,
  6610. struct device_attribute *attr,
  6611. const char *buf, size_t count)
  6612. {
  6613. struct iwl_priv *priv = dev_get_drvdata(d);
  6614. int rc;
  6615. int mode;
  6616. mode = simple_strtoul(buf, NULL, 0);
  6617. mutex_lock(&priv->mutex);
  6618. if (!iwl_is_ready(priv)) {
  6619. rc = -EAGAIN;
  6620. goto out;
  6621. }
  6622. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6623. mode = IWL_POWER_AC;
  6624. else
  6625. mode |= IWL_POWER_ENABLED;
  6626. if (mode != priv->power_mode) {
  6627. rc = iwl_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6628. if (rc) {
  6629. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6630. goto out;
  6631. }
  6632. priv->power_mode = mode;
  6633. }
  6634. rc = count;
  6635. out:
  6636. mutex_unlock(&priv->mutex);
  6637. return rc;
  6638. }
  6639. #define MAX_WX_STRING 80
  6640. /* Values are in microsecond */
  6641. static const s32 timeout_duration[] = {
  6642. 350000,
  6643. 250000,
  6644. 75000,
  6645. 37000,
  6646. 25000,
  6647. };
  6648. static const s32 period_duration[] = {
  6649. 400000,
  6650. 700000,
  6651. 1000000,
  6652. 1000000,
  6653. 1000000
  6654. };
  6655. static ssize_t show_power_level(struct device *d,
  6656. struct device_attribute *attr, char *buf)
  6657. {
  6658. struct iwl_priv *priv = dev_get_drvdata(d);
  6659. int level = IWL_POWER_LEVEL(priv->power_mode);
  6660. char *p = buf;
  6661. p += sprintf(p, "%d ", level);
  6662. switch (level) {
  6663. case IWL_POWER_MODE_CAM:
  6664. case IWL_POWER_AC:
  6665. p += sprintf(p, "(AC)");
  6666. break;
  6667. case IWL_POWER_BATTERY:
  6668. p += sprintf(p, "(BATTERY)");
  6669. break;
  6670. default:
  6671. p += sprintf(p,
  6672. "(Timeout %dms, Period %dms)",
  6673. timeout_duration[level - 1] / 1000,
  6674. period_duration[level - 1] / 1000);
  6675. }
  6676. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6677. p += sprintf(p, " OFF\n");
  6678. else
  6679. p += sprintf(p, " \n");
  6680. return (p - buf + 1);
  6681. }
  6682. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6683. store_power_level);
  6684. static ssize_t show_channels(struct device *d,
  6685. struct device_attribute *attr, char *buf)
  6686. {
  6687. struct iwl_priv *priv = dev_get_drvdata(d);
  6688. int len = 0, i;
  6689. struct ieee80211_channel *channels = NULL;
  6690. const struct ieee80211_hw_mode *hw_mode = NULL;
  6691. int count = 0;
  6692. if (!iwl_is_ready(priv))
  6693. return -EAGAIN;
  6694. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211G);
  6695. if (!hw_mode)
  6696. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211B);
  6697. if (hw_mode) {
  6698. channels = hw_mode->channels;
  6699. count = hw_mode->num_channels;
  6700. }
  6701. len +=
  6702. sprintf(&buf[len],
  6703. "Displaying %d channels in 2.4GHz band "
  6704. "(802.11bg):\n", count);
  6705. for (i = 0; i < count; i++)
  6706. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6707. channels[i].chan,
  6708. channels[i].power_level,
  6709. channels[i].
  6710. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6711. " (IEEE 802.11h required)" : "",
  6712. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6713. || (channels[i].
  6714. flag &
  6715. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6716. ", IBSS",
  6717. channels[i].
  6718. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6719. "active/passive" : "passive only");
  6720. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211A);
  6721. if (hw_mode) {
  6722. channels = hw_mode->channels;
  6723. count = hw_mode->num_channels;
  6724. } else {
  6725. channels = NULL;
  6726. count = 0;
  6727. }
  6728. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  6729. "(802.11a):\n", count);
  6730. for (i = 0; i < count; i++)
  6731. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6732. channels[i].chan,
  6733. channels[i].power_level,
  6734. channels[i].
  6735. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6736. " (IEEE 802.11h required)" : "",
  6737. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6738. || (channels[i].
  6739. flag &
  6740. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6741. ", IBSS",
  6742. channels[i].
  6743. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6744. "active/passive" : "passive only");
  6745. return len;
  6746. }
  6747. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6748. static ssize_t show_statistics(struct device *d,
  6749. struct device_attribute *attr, char *buf)
  6750. {
  6751. struct iwl_priv *priv = dev_get_drvdata(d);
  6752. u32 size = sizeof(struct iwl_notif_statistics);
  6753. u32 len = 0, ofs = 0;
  6754. u8 *data = (u8 *) & priv->statistics;
  6755. int rc = 0;
  6756. if (!iwl_is_alive(priv))
  6757. return -EAGAIN;
  6758. mutex_lock(&priv->mutex);
  6759. rc = iwl_send_statistics_request(priv);
  6760. mutex_unlock(&priv->mutex);
  6761. if (rc) {
  6762. len = sprintf(buf,
  6763. "Error sending statistics request: 0x%08X\n", rc);
  6764. return len;
  6765. }
  6766. while (size && (PAGE_SIZE - len)) {
  6767. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6768. PAGE_SIZE - len, 1);
  6769. len = strlen(buf);
  6770. if (PAGE_SIZE - len)
  6771. buf[len++] = '\n';
  6772. ofs += 16;
  6773. size -= min(size, 16U);
  6774. }
  6775. return len;
  6776. }
  6777. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6778. static ssize_t show_antenna(struct device *d,
  6779. struct device_attribute *attr, char *buf)
  6780. {
  6781. struct iwl_priv *priv = dev_get_drvdata(d);
  6782. if (!iwl_is_alive(priv))
  6783. return -EAGAIN;
  6784. return sprintf(buf, "%d\n", priv->antenna);
  6785. }
  6786. static ssize_t store_antenna(struct device *d,
  6787. struct device_attribute *attr,
  6788. const char *buf, size_t count)
  6789. {
  6790. int ant;
  6791. struct iwl_priv *priv = dev_get_drvdata(d);
  6792. if (count == 0)
  6793. return 0;
  6794. if (sscanf(buf, "%1i", &ant) != 1) {
  6795. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6796. return count;
  6797. }
  6798. if ((ant >= 0) && (ant <= 2)) {
  6799. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6800. priv->antenna = (enum iwl_antenna)ant;
  6801. } else
  6802. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6803. return count;
  6804. }
  6805. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6806. static ssize_t show_status(struct device *d,
  6807. struct device_attribute *attr, char *buf)
  6808. {
  6809. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6810. if (!iwl_is_alive(priv))
  6811. return -EAGAIN;
  6812. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6813. }
  6814. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6815. static ssize_t dump_error_log(struct device *d,
  6816. struct device_attribute *attr,
  6817. const char *buf, size_t count)
  6818. {
  6819. char *p = (char *)buf;
  6820. if (p[0] == '1')
  6821. iwl_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6822. return strnlen(buf, count);
  6823. }
  6824. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6825. static ssize_t dump_event_log(struct device *d,
  6826. struct device_attribute *attr,
  6827. const char *buf, size_t count)
  6828. {
  6829. char *p = (char *)buf;
  6830. if (p[0] == '1')
  6831. iwl_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6832. return strnlen(buf, count);
  6833. }
  6834. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6835. /*****************************************************************************
  6836. *
  6837. * driver setup and teardown
  6838. *
  6839. *****************************************************************************/
  6840. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  6841. {
  6842. priv->workqueue = create_workqueue(DRV_NAME);
  6843. init_waitqueue_head(&priv->wait_command_queue);
  6844. INIT_WORK(&priv->up, iwl_bg_up);
  6845. INIT_WORK(&priv->restart, iwl_bg_restart);
  6846. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  6847. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  6848. INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
  6849. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  6850. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  6851. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  6852. INIT_DELAYED_WORK(&priv->post_associate, iwl_bg_post_associate);
  6853. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  6854. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  6855. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  6856. iwl_hw_setup_deferred_work(priv);
  6857. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6858. iwl_irq_tasklet, (unsigned long)priv);
  6859. }
  6860. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  6861. {
  6862. iwl_hw_cancel_deferred_work(priv);
  6863. cancel_delayed_work_sync(&priv->init_alive_start);
  6864. cancel_delayed_work(&priv->scan_check);
  6865. cancel_delayed_work(&priv->alive_start);
  6866. cancel_delayed_work(&priv->post_associate);
  6867. cancel_work_sync(&priv->beacon_update);
  6868. }
  6869. static struct attribute *iwl_sysfs_entries[] = {
  6870. &dev_attr_antenna.attr,
  6871. &dev_attr_channels.attr,
  6872. &dev_attr_dump_errors.attr,
  6873. &dev_attr_dump_events.attr,
  6874. &dev_attr_flags.attr,
  6875. &dev_attr_filter_flags.attr,
  6876. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6877. &dev_attr_measurement.attr,
  6878. #endif
  6879. &dev_attr_power_level.attr,
  6880. &dev_attr_rate.attr,
  6881. &dev_attr_retry_rate.attr,
  6882. &dev_attr_rf_kill.attr,
  6883. &dev_attr_rs_window.attr,
  6884. &dev_attr_statistics.attr,
  6885. &dev_attr_status.attr,
  6886. &dev_attr_temperature.attr,
  6887. &dev_attr_tune.attr,
  6888. &dev_attr_tx_power.attr,
  6889. NULL
  6890. };
  6891. static struct attribute_group iwl_attribute_group = {
  6892. .name = NULL, /* put in device directory */
  6893. .attrs = iwl_sysfs_entries,
  6894. };
  6895. static struct ieee80211_ops iwl_hw_ops = {
  6896. .tx = iwl_mac_tx,
  6897. .start = iwl_mac_start,
  6898. .stop = iwl_mac_stop,
  6899. .add_interface = iwl_mac_add_interface,
  6900. .remove_interface = iwl_mac_remove_interface,
  6901. .config = iwl_mac_config,
  6902. .config_interface = iwl_mac_config_interface,
  6903. .configure_filter = iwl_configure_filter,
  6904. .set_key = iwl_mac_set_key,
  6905. .get_stats = iwl_mac_get_stats,
  6906. .get_tx_stats = iwl_mac_get_tx_stats,
  6907. .conf_tx = iwl_mac_conf_tx,
  6908. .get_tsf = iwl_mac_get_tsf,
  6909. .reset_tsf = iwl_mac_reset_tsf,
  6910. .beacon_update = iwl_mac_beacon_update,
  6911. .hw_scan = iwl_mac_hw_scan
  6912. };
  6913. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6914. {
  6915. int err = 0;
  6916. u32 pci_id;
  6917. struct iwl_priv *priv;
  6918. struct ieee80211_hw *hw;
  6919. int i;
  6920. if (iwl_param_disable_hw_scan) {
  6921. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6922. iwl_hw_ops.hw_scan = NULL;
  6923. }
  6924. if ((iwl_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  6925. (iwl_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  6926. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  6927. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  6928. err = -EINVAL;
  6929. goto out;
  6930. }
  6931. /* mac80211 allocates memory for this device instance, including
  6932. * space for this driver's private structure */
  6933. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl_hw_ops);
  6934. if (hw == NULL) {
  6935. IWL_ERROR("Can not allocate network device\n");
  6936. err = -ENOMEM;
  6937. goto out;
  6938. }
  6939. SET_IEEE80211_DEV(hw, &pdev->dev);
  6940. hw->rate_control_algorithm = "iwl-3945-rs";
  6941. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6942. priv = hw->priv;
  6943. priv->hw = hw;
  6944. priv->pci_dev = pdev;
  6945. priv->antenna = (enum iwl_antenna)iwl_param_antenna;
  6946. #ifdef CONFIG_IWLWIFI_DEBUG
  6947. iwl_debug_level = iwl_param_debug;
  6948. atomic_set(&priv->restrict_refcnt, 0);
  6949. #endif
  6950. priv->retry_rate = 1;
  6951. priv->ibss_beacon = NULL;
  6952. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  6953. * the range of signal quality values that we'll provide.
  6954. * Negative values for level/noise indicate that we'll provide dBm.
  6955. * For WE, at least, non-0 values here *enable* display of values
  6956. * in app (iwconfig). */
  6957. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  6958. hw->max_noise = -20; /* noise level, negative indicates dBm */
  6959. hw->max_signal = 100; /* link quality indication (%) */
  6960. /* Tell mac80211 our Tx characteristics */
  6961. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  6962. hw->queues = 4;
  6963. spin_lock_init(&priv->lock);
  6964. spin_lock_init(&priv->power_data.lock);
  6965. spin_lock_init(&priv->sta_lock);
  6966. spin_lock_init(&priv->hcmd_lock);
  6967. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  6968. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  6969. INIT_LIST_HEAD(&priv->free_frames);
  6970. mutex_init(&priv->mutex);
  6971. if (pci_enable_device(pdev)) {
  6972. err = -ENODEV;
  6973. goto out_ieee80211_free_hw;
  6974. }
  6975. pci_set_master(pdev);
  6976. iwl_clear_stations_table(priv);
  6977. priv->data_retry_limit = -1;
  6978. priv->ieee_channels = NULL;
  6979. priv->ieee_rates = NULL;
  6980. priv->phymode = -1;
  6981. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6982. if (!err)
  6983. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6984. if (err) {
  6985. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  6986. goto out_pci_disable_device;
  6987. }
  6988. pci_set_drvdata(pdev, priv);
  6989. err = pci_request_regions(pdev, DRV_NAME);
  6990. if (err)
  6991. goto out_pci_disable_device;
  6992. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6993. * PCI Tx retries from interfering with C3 CPU state */
  6994. pci_write_config_byte(pdev, 0x41, 0x00);
  6995. priv->hw_base = pci_iomap(pdev, 0, 0);
  6996. if (!priv->hw_base) {
  6997. err = -ENODEV;
  6998. goto out_pci_release_regions;
  6999. }
  7000. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7001. (unsigned long long) pci_resource_len(pdev, 0));
  7002. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7003. /* Initialize module parameter values here */
  7004. if (iwl_param_disable) {
  7005. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7006. IWL_DEBUG_INFO("Radio disabled.\n");
  7007. }
  7008. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7009. pci_id =
  7010. (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
  7011. switch (pci_id) {
  7012. case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
  7013. case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
  7014. case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
  7015. case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
  7016. priv->is_abg = 0;
  7017. break;
  7018. /*
  7019. * Rest are assumed ABG SKU -- if this is not the
  7020. * case then the card will get the wrong 'Detected'
  7021. * line in the kernel log however the code that
  7022. * initializes the GEO table will detect no A-band
  7023. * channels and remove the is_abg mask.
  7024. */
  7025. default:
  7026. priv->is_abg = 1;
  7027. break;
  7028. }
  7029. printk(KERN_INFO DRV_NAME
  7030. ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
  7031. priv->is_abg ? "A" : "");
  7032. /* Device-specific setup */
  7033. if (iwl_hw_set_hw_setting(priv)) {
  7034. IWL_ERROR("failed to set hw settings\n");
  7035. mutex_unlock(&priv->mutex);
  7036. goto out_iounmap;
  7037. }
  7038. #ifdef CONFIG_IWLWIFI_QOS
  7039. if (iwl_param_qos_enable)
  7040. priv->qos_data.qos_enable = 1;
  7041. iwl_reset_qos(priv);
  7042. priv->qos_data.qos_active = 0;
  7043. priv->qos_data.qos_cap.val = 0;
  7044. #endif /* CONFIG_IWLWIFI_QOS */
  7045. iwl_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7046. iwl_setup_deferred_work(priv);
  7047. iwl_setup_rx_handlers(priv);
  7048. priv->rates_mask = IWL_RATES_MASK;
  7049. /* If power management is turned on, default to AC mode */
  7050. priv->power_mode = IWL_POWER_AC;
  7051. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7052. pci_enable_msi(pdev);
  7053. err = request_irq(pdev->irq, iwl_isr, IRQF_SHARED, DRV_NAME, priv);
  7054. if (err) {
  7055. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7056. goto out_disable_msi;
  7057. }
  7058. mutex_lock(&priv->mutex);
  7059. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  7060. if (err) {
  7061. IWL_ERROR("failed to create sysfs device attributes\n");
  7062. mutex_unlock(&priv->mutex);
  7063. goto out_release_irq;
  7064. }
  7065. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7066. * ucode filename and max sizes are card-specific. */
  7067. err = iwl_read_ucode(priv);
  7068. if (err) {
  7069. IWL_ERROR("Could not read microcode: %d\n", err);
  7070. mutex_unlock(&priv->mutex);
  7071. goto out_pci_alloc;
  7072. }
  7073. mutex_unlock(&priv->mutex);
  7074. IWL_DEBUG_INFO("Queing UP work.\n");
  7075. queue_work(priv->workqueue, &priv->up);
  7076. return 0;
  7077. out_pci_alloc:
  7078. iwl_dealloc_ucode_pci(priv);
  7079. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7080. out_release_irq:
  7081. free_irq(pdev->irq, priv);
  7082. out_disable_msi:
  7083. pci_disable_msi(pdev);
  7084. destroy_workqueue(priv->workqueue);
  7085. priv->workqueue = NULL;
  7086. iwl_unset_hw_setting(priv);
  7087. out_iounmap:
  7088. pci_iounmap(pdev, priv->hw_base);
  7089. out_pci_release_regions:
  7090. pci_release_regions(pdev);
  7091. out_pci_disable_device:
  7092. pci_disable_device(pdev);
  7093. pci_set_drvdata(pdev, NULL);
  7094. out_ieee80211_free_hw:
  7095. ieee80211_free_hw(priv->hw);
  7096. out:
  7097. return err;
  7098. }
  7099. static void iwl_pci_remove(struct pci_dev *pdev)
  7100. {
  7101. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7102. struct list_head *p, *q;
  7103. int i;
  7104. if (!priv)
  7105. return;
  7106. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7107. mutex_lock(&priv->mutex);
  7108. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7109. __iwl_down(priv);
  7110. mutex_unlock(&priv->mutex);
  7111. /* Free MAC hash list for ADHOC */
  7112. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7113. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7114. list_del(p);
  7115. kfree(list_entry(p, struct iwl_ibss_seq, list));
  7116. }
  7117. }
  7118. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7119. iwl_dealloc_ucode_pci(priv);
  7120. if (priv->rxq.bd)
  7121. iwl_rx_queue_free(priv, &priv->rxq);
  7122. iwl_hw_txq_ctx_free(priv);
  7123. iwl_unset_hw_setting(priv);
  7124. iwl_clear_stations_table(priv);
  7125. if (priv->mac80211_registered) {
  7126. ieee80211_unregister_hw(priv->hw);
  7127. iwl_rate_control_unregister(priv->hw);
  7128. }
  7129. /*netif_stop_queue(dev); */
  7130. flush_workqueue(priv->workqueue);
  7131. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  7132. * priv->workqueue... so we can't take down the workqueue
  7133. * until now... */
  7134. destroy_workqueue(priv->workqueue);
  7135. priv->workqueue = NULL;
  7136. free_irq(pdev->irq, priv);
  7137. pci_disable_msi(pdev);
  7138. pci_iounmap(pdev, priv->hw_base);
  7139. pci_release_regions(pdev);
  7140. pci_disable_device(pdev);
  7141. pci_set_drvdata(pdev, NULL);
  7142. kfree(priv->channel_info);
  7143. kfree(priv->ieee_channels);
  7144. kfree(priv->ieee_rates);
  7145. if (priv->ibss_beacon)
  7146. dev_kfree_skb(priv->ibss_beacon);
  7147. ieee80211_free_hw(priv->hw);
  7148. }
  7149. #ifdef CONFIG_PM
  7150. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7151. {
  7152. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7153. mutex_lock(&priv->mutex);
  7154. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7155. /* Take down the device; powers it off, etc. */
  7156. __iwl_down(priv);
  7157. if (priv->mac80211_registered)
  7158. ieee80211_stop_queues(priv->hw);
  7159. pci_save_state(pdev);
  7160. pci_disable_device(pdev);
  7161. pci_set_power_state(pdev, PCI_D3hot);
  7162. mutex_unlock(&priv->mutex);
  7163. return 0;
  7164. }
  7165. static void iwl_resume(struct iwl_priv *priv)
  7166. {
  7167. unsigned long flags;
  7168. /* The following it a temporary work around due to the
  7169. * suspend / resume not fully initializing the NIC correctly.
  7170. * Without all of the following, resume will not attempt to take
  7171. * down the NIC (it shouldn't really need to) and will just try
  7172. * and bring the NIC back up. However that fails during the
  7173. * ucode verification process. This then causes iwl_down to be
  7174. * called *after* iwl_hw_nic_init() has succeeded -- which
  7175. * then lets the next init sequence succeed. So, we've
  7176. * replicated all of that NIC init code here... */
  7177. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7178. iwl_hw_nic_init(priv);
  7179. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7180. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7181. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7182. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7183. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7184. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7185. /* tell the device to stop sending interrupts */
  7186. iwl_disable_interrupts(priv);
  7187. spin_lock_irqsave(&priv->lock, flags);
  7188. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7189. if (!iwl_grab_restricted_access(priv)) {
  7190. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  7191. APMG_CLK_VAL_DMA_CLK_RQT);
  7192. iwl_release_restricted_access(priv);
  7193. }
  7194. spin_unlock_irqrestore(&priv->lock, flags);
  7195. udelay(5);
  7196. iwl_hw_nic_reset(priv);
  7197. /* Bring the device back up */
  7198. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7199. queue_work(priv->workqueue, &priv->up);
  7200. }
  7201. static int iwl_pci_resume(struct pci_dev *pdev)
  7202. {
  7203. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7204. int err;
  7205. printk(KERN_INFO "Coming out of suspend...\n");
  7206. mutex_lock(&priv->mutex);
  7207. pci_set_power_state(pdev, PCI_D0);
  7208. err = pci_enable_device(pdev);
  7209. pci_restore_state(pdev);
  7210. /*
  7211. * Suspend/Resume resets the PCI configuration space, so we have to
  7212. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7213. * from interfering with C3 CPU state. pci_restore_state won't help
  7214. * here since it only restores the first 64 bytes pci config header.
  7215. */
  7216. pci_write_config_byte(pdev, 0x41, 0x00);
  7217. iwl_resume(priv);
  7218. mutex_unlock(&priv->mutex);
  7219. return 0;
  7220. }
  7221. #endif /* CONFIG_PM */
  7222. /*****************************************************************************
  7223. *
  7224. * driver and module entry point
  7225. *
  7226. *****************************************************************************/
  7227. static struct pci_driver iwl_driver = {
  7228. .name = DRV_NAME,
  7229. .id_table = iwl_hw_card_ids,
  7230. .probe = iwl_pci_probe,
  7231. .remove = __devexit_p(iwl_pci_remove),
  7232. #ifdef CONFIG_PM
  7233. .suspend = iwl_pci_suspend,
  7234. .resume = iwl_pci_resume,
  7235. #endif
  7236. };
  7237. static int __init iwl_init(void)
  7238. {
  7239. int ret;
  7240. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7241. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7242. ret = pci_register_driver(&iwl_driver);
  7243. if (ret) {
  7244. IWL_ERROR("Unable to initialize PCI module\n");
  7245. return ret;
  7246. }
  7247. #ifdef CONFIG_IWLWIFI_DEBUG
  7248. ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
  7249. if (ret) {
  7250. IWL_ERROR("Unable to create driver sysfs file\n");
  7251. pci_unregister_driver(&iwl_driver);
  7252. return ret;
  7253. }
  7254. #endif
  7255. return ret;
  7256. }
  7257. static void __exit iwl_exit(void)
  7258. {
  7259. #ifdef CONFIG_IWLWIFI_DEBUG
  7260. driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
  7261. #endif
  7262. pci_unregister_driver(&iwl_driver);
  7263. }
  7264. module_param_named(antenna, iwl_param_antenna, int, 0444);
  7265. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7266. module_param_named(disable, iwl_param_disable, int, 0444);
  7267. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7268. module_param_named(hwcrypto, iwl_param_hwcrypto, int, 0444);
  7269. MODULE_PARM_DESC(hwcrypto,
  7270. "using hardware crypto engine (default 0 [software])\n");
  7271. module_param_named(debug, iwl_param_debug, int, 0444);
  7272. MODULE_PARM_DESC(debug, "debug output mask");
  7273. module_param_named(disable_hw_scan, iwl_param_disable_hw_scan, int, 0444);
  7274. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7275. module_param_named(queues_num, iwl_param_queues_num, int, 0444);
  7276. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7277. /* QoS */
  7278. module_param_named(qos_enable, iwl_param_qos_enable, int, 0444);
  7279. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7280. module_exit(iwl_exit);
  7281. module_init(iwl_init);