coretemp.c 22 KB

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  1. /*
  2. * coretemp.c - Linux kernel module for hardware monitoring
  3. *
  4. * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
  5. *
  6. * Inspired from many hwmon drivers
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20. * 02110-1301 USA.
  21. */
  22. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/slab.h>
  26. #include <linux/jiffies.h>
  27. #include <linux/hwmon.h>
  28. #include <linux/sysfs.h>
  29. #include <linux/hwmon-sysfs.h>
  30. #include <linux/err.h>
  31. #include <linux/mutex.h>
  32. #include <linux/list.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/cpu.h>
  35. #include <linux/smp.h>
  36. #include <linux/moduleparam.h>
  37. #include <asm/msr.h>
  38. #include <asm/processor.h>
  39. #include <asm/cpu_device_id.h>
  40. #define DRVNAME "coretemp"
  41. /*
  42. * force_tjmax only matters when TjMax can't be read from the CPU itself.
  43. * When set, it replaces the driver's suboptimal heuristic.
  44. */
  45. static int force_tjmax;
  46. module_param_named(tjmax, force_tjmax, int, 0444);
  47. MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
  48. #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
  49. #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
  50. #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
  51. #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
  52. #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
  53. #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
  54. #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
  55. #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
  56. #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
  57. #ifdef CONFIG_SMP
  58. #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
  59. #else
  60. #define for_each_sibling(i, cpu) for (i = 0; false; )
  61. #endif
  62. /*
  63. * Per-Core Temperature Data
  64. * @last_updated: The time when the current temperature value was updated
  65. * earlier (in jiffies).
  66. * @cpu_core_id: The CPU Core from which temperature values should be read
  67. * This value is passed as "id" field to rdmsr/wrmsr functions.
  68. * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
  69. * from where the temperature values should be read.
  70. * @attr_size: Total number of pre-core attrs displayed in the sysfs.
  71. * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
  72. * Otherwise, temp_data holds coretemp data.
  73. * @valid: If this is 1, the current temperature is valid.
  74. */
  75. struct temp_data {
  76. int temp;
  77. int ttarget;
  78. int tjmax;
  79. unsigned long last_updated;
  80. unsigned int cpu;
  81. u32 cpu_core_id;
  82. u32 status_reg;
  83. int attr_size;
  84. bool is_pkg_data;
  85. bool valid;
  86. struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
  87. char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
  88. struct mutex update_lock;
  89. };
  90. /* Platform Data per Physical CPU */
  91. struct platform_data {
  92. struct device *hwmon_dev;
  93. u16 phys_proc_id;
  94. struct temp_data *core_data[MAX_CORE_DATA];
  95. struct device_attribute name_attr;
  96. };
  97. struct pdev_entry {
  98. struct list_head list;
  99. struct platform_device *pdev;
  100. u16 phys_proc_id;
  101. };
  102. static LIST_HEAD(pdev_list);
  103. static DEFINE_MUTEX(pdev_list_mutex);
  104. static ssize_t show_name(struct device *dev,
  105. struct device_attribute *devattr, char *buf)
  106. {
  107. return sprintf(buf, "%s\n", DRVNAME);
  108. }
  109. static ssize_t show_label(struct device *dev,
  110. struct device_attribute *devattr, char *buf)
  111. {
  112. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  113. struct platform_data *pdata = dev_get_drvdata(dev);
  114. struct temp_data *tdata = pdata->core_data[attr->index];
  115. if (tdata->is_pkg_data)
  116. return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
  117. return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
  118. }
  119. static ssize_t show_crit_alarm(struct device *dev,
  120. struct device_attribute *devattr, char *buf)
  121. {
  122. u32 eax, edx;
  123. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  124. struct platform_data *pdata = dev_get_drvdata(dev);
  125. struct temp_data *tdata = pdata->core_data[attr->index];
  126. rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
  127. return sprintf(buf, "%d\n", (eax >> 5) & 1);
  128. }
  129. static ssize_t show_tjmax(struct device *dev,
  130. struct device_attribute *devattr, char *buf)
  131. {
  132. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  133. struct platform_data *pdata = dev_get_drvdata(dev);
  134. return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
  135. }
  136. static ssize_t show_ttarget(struct device *dev,
  137. struct device_attribute *devattr, char *buf)
  138. {
  139. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  140. struct platform_data *pdata = dev_get_drvdata(dev);
  141. return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
  142. }
  143. static ssize_t show_temp(struct device *dev,
  144. struct device_attribute *devattr, char *buf)
  145. {
  146. u32 eax, edx;
  147. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  148. struct platform_data *pdata = dev_get_drvdata(dev);
  149. struct temp_data *tdata = pdata->core_data[attr->index];
  150. mutex_lock(&tdata->update_lock);
  151. /* Check whether the time interval has elapsed */
  152. if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
  153. rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
  154. tdata->valid = 0;
  155. /* Check whether the data is valid */
  156. if (eax & 0x80000000) {
  157. tdata->temp = tdata->tjmax -
  158. ((eax >> 16) & 0x7f) * 1000;
  159. tdata->valid = 1;
  160. }
  161. tdata->last_updated = jiffies;
  162. }
  163. mutex_unlock(&tdata->update_lock);
  164. return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
  165. }
  166. struct tjmax {
  167. char const *id;
  168. int tjmax;
  169. };
  170. static const struct tjmax __cpuinitconst tjmax_table[] = {
  171. { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
  172. { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
  173. { "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 Sodaville */
  174. { "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */
  175. { "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */
  176. };
  177. struct tjmax_model {
  178. u8 model;
  179. u8 mask;
  180. int tjmax;
  181. };
  182. #define ANY 0xff
  183. static const struct tjmax_model __cpuinitconst tjmax_model_table[] = {
  184. { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
  185. { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
  186. * Note: Also matches 230 and 330,
  187. * which are covered by tjmax_table
  188. */
  189. { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
  190. * Note: TjMax for E6xxT is 110C, but CPU type
  191. * is undetectable by software
  192. */
  193. { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
  194. { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z2760) */
  195. { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */
  196. };
  197. static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
  198. struct device *dev)
  199. {
  200. /* The 100C is default for both mobile and non mobile CPUs */
  201. int tjmax = 100000;
  202. int tjmax_ee = 85000;
  203. int usemsr_ee = 1;
  204. int err;
  205. u32 eax, edx;
  206. int i;
  207. /* explicit tjmax table entries override heuristics */
  208. for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
  209. if (strstr(c->x86_model_id, tjmax_table[i].id))
  210. return tjmax_table[i].tjmax;
  211. }
  212. for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
  213. const struct tjmax_model *tm = &tjmax_model_table[i];
  214. if (c->x86_model == tm->model &&
  215. (tm->mask == ANY || c->x86_mask == tm->mask))
  216. return tm->tjmax;
  217. }
  218. /* Early chips have no MSR for TjMax */
  219. if (c->x86_model == 0xf && c->x86_mask < 4)
  220. usemsr_ee = 0;
  221. if (c->x86_model > 0xe && usemsr_ee) {
  222. u8 platform_id;
  223. /*
  224. * Now we can detect the mobile CPU using Intel provided table
  225. * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
  226. * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
  227. */
  228. err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
  229. if (err) {
  230. dev_warn(dev,
  231. "Unable to access MSR 0x17, assuming desktop"
  232. " CPU\n");
  233. usemsr_ee = 0;
  234. } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
  235. /*
  236. * Trust bit 28 up to Penryn, I could not find any
  237. * documentation on that; if you happen to know
  238. * someone at Intel please ask
  239. */
  240. usemsr_ee = 0;
  241. } else {
  242. /* Platform ID bits 52:50 (EDX starts at bit 32) */
  243. platform_id = (edx >> 18) & 0x7;
  244. /*
  245. * Mobile Penryn CPU seems to be platform ID 7 or 5
  246. * (guesswork)
  247. */
  248. if (c->x86_model == 0x17 &&
  249. (platform_id == 5 || platform_id == 7)) {
  250. /*
  251. * If MSR EE bit is set, set it to 90 degrees C,
  252. * otherwise 105 degrees C
  253. */
  254. tjmax_ee = 90000;
  255. tjmax = 105000;
  256. }
  257. }
  258. }
  259. if (usemsr_ee) {
  260. err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
  261. if (err) {
  262. dev_warn(dev,
  263. "Unable to access MSR 0xEE, for Tjmax, left"
  264. " at default\n");
  265. } else if (eax & 0x40000000) {
  266. tjmax = tjmax_ee;
  267. }
  268. } else if (tjmax == 100000) {
  269. /*
  270. * If we don't use msr EE it means we are desktop CPU
  271. * (with exeception of Atom)
  272. */
  273. dev_warn(dev, "Using relative temperature scale!\n");
  274. }
  275. return tjmax;
  276. }
  277. static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
  278. struct device *dev)
  279. {
  280. int err;
  281. u32 eax, edx;
  282. u32 val;
  283. /*
  284. * A new feature of current Intel(R) processors, the
  285. * IA32_TEMPERATURE_TARGET contains the TjMax value
  286. */
  287. err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
  288. if (err) {
  289. if (c->x86_model > 0xe && c->x86_model != 0x1c)
  290. dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
  291. } else {
  292. val = (eax >> 16) & 0xff;
  293. /*
  294. * If the TjMax is not plausible, an assumption
  295. * will be used
  296. */
  297. if (val) {
  298. dev_dbg(dev, "TjMax is %d degrees C\n", val);
  299. return val * 1000;
  300. }
  301. }
  302. if (force_tjmax) {
  303. dev_notice(dev, "TjMax forced to %d degrees C by user\n",
  304. force_tjmax);
  305. return force_tjmax * 1000;
  306. }
  307. /*
  308. * An assumption is made for early CPUs and unreadable MSR.
  309. * NOTE: the calculated value may not be correct.
  310. */
  311. return adjust_tjmax(c, id, dev);
  312. }
  313. static int create_name_attr(struct platform_data *pdata,
  314. struct device *dev)
  315. {
  316. sysfs_attr_init(&pdata->name_attr.attr);
  317. pdata->name_attr.attr.name = "name";
  318. pdata->name_attr.attr.mode = S_IRUGO;
  319. pdata->name_attr.show = show_name;
  320. return device_create_file(dev, &pdata->name_attr);
  321. }
  322. static int __cpuinit create_core_attrs(struct temp_data *tdata,
  323. struct device *dev, int attr_no)
  324. {
  325. int err, i;
  326. static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
  327. struct device_attribute *devattr, char *buf) = {
  328. show_label, show_crit_alarm, show_temp, show_tjmax,
  329. show_ttarget };
  330. static const char *const names[TOTAL_ATTRS] = {
  331. "temp%d_label", "temp%d_crit_alarm",
  332. "temp%d_input", "temp%d_crit",
  333. "temp%d_max" };
  334. for (i = 0; i < tdata->attr_size; i++) {
  335. snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
  336. attr_no);
  337. sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
  338. tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
  339. tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
  340. tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
  341. tdata->sd_attrs[i].index = attr_no;
  342. err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
  343. if (err)
  344. goto exit_free;
  345. }
  346. return 0;
  347. exit_free:
  348. while (--i >= 0)
  349. device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
  350. return err;
  351. }
  352. static int __cpuinit chk_ucode_version(unsigned int cpu)
  353. {
  354. struct cpuinfo_x86 *c = &cpu_data(cpu);
  355. /*
  356. * Check if we have problem with errata AE18 of Core processors:
  357. * Readings might stop update when processor visited too deep sleep,
  358. * fixed for stepping D0 (6EC).
  359. */
  360. if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
  361. pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
  362. return -ENODEV;
  363. }
  364. return 0;
  365. }
  366. static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
  367. {
  368. u16 phys_proc_id = TO_PHYS_ID(cpu);
  369. struct pdev_entry *p;
  370. mutex_lock(&pdev_list_mutex);
  371. list_for_each_entry(p, &pdev_list, list)
  372. if (p->phys_proc_id == phys_proc_id) {
  373. mutex_unlock(&pdev_list_mutex);
  374. return p->pdev;
  375. }
  376. mutex_unlock(&pdev_list_mutex);
  377. return NULL;
  378. }
  379. static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
  380. int pkg_flag)
  381. {
  382. struct temp_data *tdata;
  383. tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
  384. if (!tdata)
  385. return NULL;
  386. tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
  387. MSR_IA32_THERM_STATUS;
  388. tdata->is_pkg_data = pkg_flag;
  389. tdata->cpu = cpu;
  390. tdata->cpu_core_id = TO_CORE_ID(cpu);
  391. tdata->attr_size = MAX_CORE_ATTRS;
  392. mutex_init(&tdata->update_lock);
  393. return tdata;
  394. }
  395. static int __cpuinit create_core_data(struct platform_device *pdev,
  396. unsigned int cpu, int pkg_flag)
  397. {
  398. struct temp_data *tdata;
  399. struct platform_data *pdata = platform_get_drvdata(pdev);
  400. struct cpuinfo_x86 *c = &cpu_data(cpu);
  401. u32 eax, edx;
  402. int err, attr_no;
  403. /*
  404. * Find attr number for sysfs:
  405. * We map the attr number to core id of the CPU
  406. * The attr number is always core id + 2
  407. * The Pkgtemp will always show up as temp1_*, if available
  408. */
  409. attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
  410. if (attr_no > MAX_CORE_DATA - 1)
  411. return -ERANGE;
  412. /*
  413. * Provide a single set of attributes for all HT siblings of a core
  414. * to avoid duplicate sensors (the processor ID and core ID of all
  415. * HT siblings of a core are the same).
  416. * Skip if a HT sibling of this core is already registered.
  417. * This is not an error.
  418. */
  419. if (pdata->core_data[attr_no] != NULL)
  420. return 0;
  421. tdata = init_temp_data(cpu, pkg_flag);
  422. if (!tdata)
  423. return -ENOMEM;
  424. /* Test if we can access the status register */
  425. err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
  426. if (err)
  427. goto exit_free;
  428. /* We can access status register. Get Critical Temperature */
  429. tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
  430. /*
  431. * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
  432. * The target temperature is available on older CPUs but not in this
  433. * register. Atoms don't have the register at all.
  434. */
  435. if (c->x86_model > 0xe && c->x86_model != 0x1c) {
  436. err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
  437. &eax, &edx);
  438. if (!err) {
  439. tdata->ttarget
  440. = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
  441. tdata->attr_size++;
  442. }
  443. }
  444. pdata->core_data[attr_no] = tdata;
  445. /* Create sysfs interfaces */
  446. err = create_core_attrs(tdata, &pdev->dev, attr_no);
  447. if (err)
  448. goto exit_free;
  449. return 0;
  450. exit_free:
  451. pdata->core_data[attr_no] = NULL;
  452. kfree(tdata);
  453. return err;
  454. }
  455. static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
  456. {
  457. struct platform_device *pdev = coretemp_get_pdev(cpu);
  458. int err;
  459. if (!pdev)
  460. return;
  461. err = create_core_data(pdev, cpu, pkg_flag);
  462. if (err)
  463. dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
  464. }
  465. static void coretemp_remove_core(struct platform_data *pdata,
  466. struct device *dev, int indx)
  467. {
  468. int i;
  469. struct temp_data *tdata = pdata->core_data[indx];
  470. /* Remove the sysfs attributes */
  471. for (i = 0; i < tdata->attr_size; i++)
  472. device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
  473. kfree(pdata->core_data[indx]);
  474. pdata->core_data[indx] = NULL;
  475. }
  476. static int coretemp_probe(struct platform_device *pdev)
  477. {
  478. struct platform_data *pdata;
  479. int err;
  480. /* Initialize the per-package data structures */
  481. pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
  482. if (!pdata)
  483. return -ENOMEM;
  484. err = create_name_attr(pdata, &pdev->dev);
  485. if (err)
  486. goto exit_free;
  487. pdata->phys_proc_id = pdev->id;
  488. platform_set_drvdata(pdev, pdata);
  489. pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
  490. if (IS_ERR(pdata->hwmon_dev)) {
  491. err = PTR_ERR(pdata->hwmon_dev);
  492. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  493. goto exit_name;
  494. }
  495. return 0;
  496. exit_name:
  497. device_remove_file(&pdev->dev, &pdata->name_attr);
  498. exit_free:
  499. kfree(pdata);
  500. return err;
  501. }
  502. static int coretemp_remove(struct platform_device *pdev)
  503. {
  504. struct platform_data *pdata = platform_get_drvdata(pdev);
  505. int i;
  506. for (i = MAX_CORE_DATA - 1; i >= 0; --i)
  507. if (pdata->core_data[i])
  508. coretemp_remove_core(pdata, &pdev->dev, i);
  509. device_remove_file(&pdev->dev, &pdata->name_attr);
  510. hwmon_device_unregister(pdata->hwmon_dev);
  511. kfree(pdata);
  512. return 0;
  513. }
  514. static struct platform_driver coretemp_driver = {
  515. .driver = {
  516. .owner = THIS_MODULE,
  517. .name = DRVNAME,
  518. },
  519. .probe = coretemp_probe,
  520. .remove = coretemp_remove,
  521. };
  522. static int __cpuinit coretemp_device_add(unsigned int cpu)
  523. {
  524. int err;
  525. struct platform_device *pdev;
  526. struct pdev_entry *pdev_entry;
  527. mutex_lock(&pdev_list_mutex);
  528. pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
  529. if (!pdev) {
  530. err = -ENOMEM;
  531. pr_err("Device allocation failed\n");
  532. goto exit;
  533. }
  534. pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
  535. if (!pdev_entry) {
  536. err = -ENOMEM;
  537. goto exit_device_put;
  538. }
  539. err = platform_device_add(pdev);
  540. if (err) {
  541. pr_err("Device addition failed (%d)\n", err);
  542. goto exit_device_free;
  543. }
  544. pdev_entry->pdev = pdev;
  545. pdev_entry->phys_proc_id = pdev->id;
  546. list_add_tail(&pdev_entry->list, &pdev_list);
  547. mutex_unlock(&pdev_list_mutex);
  548. return 0;
  549. exit_device_free:
  550. kfree(pdev_entry);
  551. exit_device_put:
  552. platform_device_put(pdev);
  553. exit:
  554. mutex_unlock(&pdev_list_mutex);
  555. return err;
  556. }
  557. static void __cpuinit coretemp_device_remove(unsigned int cpu)
  558. {
  559. struct pdev_entry *p, *n;
  560. u16 phys_proc_id = TO_PHYS_ID(cpu);
  561. mutex_lock(&pdev_list_mutex);
  562. list_for_each_entry_safe(p, n, &pdev_list, list) {
  563. if (p->phys_proc_id != phys_proc_id)
  564. continue;
  565. platform_device_unregister(p->pdev);
  566. list_del(&p->list);
  567. kfree(p);
  568. }
  569. mutex_unlock(&pdev_list_mutex);
  570. }
  571. static bool __cpuinit is_any_core_online(struct platform_data *pdata)
  572. {
  573. int i;
  574. /* Find online cores, except pkgtemp data */
  575. for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
  576. if (pdata->core_data[i] &&
  577. !pdata->core_data[i]->is_pkg_data) {
  578. return true;
  579. }
  580. }
  581. return false;
  582. }
  583. static void __cpuinit get_core_online(unsigned int cpu)
  584. {
  585. struct cpuinfo_x86 *c = &cpu_data(cpu);
  586. struct platform_device *pdev = coretemp_get_pdev(cpu);
  587. int err;
  588. /*
  589. * CPUID.06H.EAX[0] indicates whether the CPU has thermal
  590. * sensors. We check this bit only, all the early CPUs
  591. * without thermal sensors will be filtered out.
  592. */
  593. if (!cpu_has(c, X86_FEATURE_DTHERM))
  594. return;
  595. if (!pdev) {
  596. /* Check the microcode version of the CPU */
  597. if (chk_ucode_version(cpu))
  598. return;
  599. /*
  600. * Alright, we have DTS support.
  601. * We are bringing the _first_ core in this pkg
  602. * online. So, initialize per-pkg data structures and
  603. * then bring this core online.
  604. */
  605. err = coretemp_device_add(cpu);
  606. if (err)
  607. return;
  608. /*
  609. * Check whether pkgtemp support is available.
  610. * If so, add interfaces for pkgtemp.
  611. */
  612. if (cpu_has(c, X86_FEATURE_PTS))
  613. coretemp_add_core(cpu, 1);
  614. }
  615. /*
  616. * Physical CPU device already exists.
  617. * So, just add interfaces for this core.
  618. */
  619. coretemp_add_core(cpu, 0);
  620. }
  621. static void __cpuinit put_core_offline(unsigned int cpu)
  622. {
  623. int i, indx;
  624. struct platform_data *pdata;
  625. struct platform_device *pdev = coretemp_get_pdev(cpu);
  626. /* If the physical CPU device does not exist, just return */
  627. if (!pdev)
  628. return;
  629. pdata = platform_get_drvdata(pdev);
  630. indx = TO_ATTR_NO(cpu);
  631. /* The core id is too big, just return */
  632. if (indx > MAX_CORE_DATA - 1)
  633. return;
  634. if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
  635. coretemp_remove_core(pdata, &pdev->dev, indx);
  636. /*
  637. * If a HT sibling of a core is taken offline, but another HT sibling
  638. * of the same core is still online, register the alternate sibling.
  639. * This ensures that exactly one set of attributes is provided as long
  640. * as at least one HT sibling of a core is online.
  641. */
  642. for_each_sibling(i, cpu) {
  643. if (i != cpu) {
  644. get_core_online(i);
  645. /*
  646. * Display temperature sensor data for one HT sibling
  647. * per core only, so abort the loop after one such
  648. * sibling has been found.
  649. */
  650. break;
  651. }
  652. }
  653. /*
  654. * If all cores in this pkg are offline, remove the device.
  655. * coretemp_device_remove calls unregister_platform_device,
  656. * which in turn calls coretemp_remove. This removes the
  657. * pkgtemp entry and does other clean ups.
  658. */
  659. if (!is_any_core_online(pdata))
  660. coretemp_device_remove(cpu);
  661. }
  662. static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
  663. unsigned long action, void *hcpu)
  664. {
  665. unsigned int cpu = (unsigned long) hcpu;
  666. switch (action) {
  667. case CPU_ONLINE:
  668. case CPU_DOWN_FAILED:
  669. get_core_online(cpu);
  670. break;
  671. case CPU_DOWN_PREPARE:
  672. put_core_offline(cpu);
  673. break;
  674. }
  675. return NOTIFY_OK;
  676. }
  677. static struct notifier_block coretemp_cpu_notifier __refdata = {
  678. .notifier_call = coretemp_cpu_callback,
  679. };
  680. static const struct x86_cpu_id __initconst coretemp_ids[] = {
  681. { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
  682. {}
  683. };
  684. MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
  685. static int __init coretemp_init(void)
  686. {
  687. int i, err;
  688. /*
  689. * CPUID.06H.EAX[0] indicates whether the CPU has thermal
  690. * sensors. We check this bit only, all the early CPUs
  691. * without thermal sensors will be filtered out.
  692. */
  693. if (!x86_match_cpu(coretemp_ids))
  694. return -ENODEV;
  695. err = platform_driver_register(&coretemp_driver);
  696. if (err)
  697. goto exit;
  698. get_online_cpus();
  699. for_each_online_cpu(i)
  700. get_core_online(i);
  701. #ifndef CONFIG_HOTPLUG_CPU
  702. if (list_empty(&pdev_list)) {
  703. put_online_cpus();
  704. err = -ENODEV;
  705. goto exit_driver_unreg;
  706. }
  707. #endif
  708. register_hotcpu_notifier(&coretemp_cpu_notifier);
  709. put_online_cpus();
  710. return 0;
  711. #ifndef CONFIG_HOTPLUG_CPU
  712. exit_driver_unreg:
  713. platform_driver_unregister(&coretemp_driver);
  714. #endif
  715. exit:
  716. return err;
  717. }
  718. static void __exit coretemp_exit(void)
  719. {
  720. struct pdev_entry *p, *n;
  721. get_online_cpus();
  722. unregister_hotcpu_notifier(&coretemp_cpu_notifier);
  723. mutex_lock(&pdev_list_mutex);
  724. list_for_each_entry_safe(p, n, &pdev_list, list) {
  725. platform_device_unregister(p->pdev);
  726. list_del(&p->list);
  727. kfree(p);
  728. }
  729. mutex_unlock(&pdev_list_mutex);
  730. put_online_cpus();
  731. platform_driver_unregister(&coretemp_driver);
  732. }
  733. MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
  734. MODULE_DESCRIPTION("Intel Core temperature monitor");
  735. MODULE_LICENSE("GPL");
  736. module_init(coretemp_init)
  737. module_exit(coretemp_exit)