w83795.c 58 KB

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  1. /*
  2. * w83795.c - Linux kernel driver for hardware monitoring
  3. * Copyright (C) 2008 Nuvoton Technology Corp.
  4. * Wei Song
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation - version 2.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  18. * 02110-1301 USA.
  19. *
  20. * Supports following chips:
  21. *
  22. * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
  23. * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
  24. * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/i2c.h>
  31. #include <linux/hwmon.h>
  32. #include <linux/hwmon-sysfs.h>
  33. #include <linux/err.h>
  34. #include <linux/mutex.h>
  35. #include <linux/delay.h>
  36. /* Addresses to scan */
  37. static const unsigned short normal_i2c[] = {
  38. 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
  39. };
  40. static int reset;
  41. module_param(reset, bool, 0);
  42. MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
  43. #define W83795_REG_BANKSEL 0x00
  44. #define W83795_REG_VENDORID 0xfd
  45. #define W83795_REG_CHIPID 0xfe
  46. #define W83795_REG_DEVICEID 0xfb
  47. #define W83795_REG_DEVICEID_A 0xff
  48. #define W83795_REG_I2C_ADDR 0xfc
  49. #define W83795_REG_CONFIG 0x01
  50. #define W83795_REG_CONFIG_CONFIG48 0x04
  51. #define W83795_REG_CONFIG_START 0x01
  52. /* Multi-Function Pin Ctrl Registers */
  53. #define W83795_REG_VOLT_CTRL1 0x02
  54. #define W83795_REG_VOLT_CTRL2 0x03
  55. #define W83795_REG_TEMP_CTRL1 0x04
  56. #define W83795_REG_TEMP_CTRL2 0x05
  57. #define W83795_REG_FANIN_CTRL1 0x06
  58. #define W83795_REG_FANIN_CTRL2 0x07
  59. #define W83795_REG_VMIGB_CTRL 0x08
  60. #define TEMP_CTRL_DISABLE 0
  61. #define TEMP_CTRL_TD 1
  62. #define TEMP_CTRL_VSEN 2
  63. #define TEMP_CTRL_TR 3
  64. #define TEMP_CTRL_SHIFT 4
  65. #define TEMP_CTRL_HASIN_SHIFT 5
  66. /* temp mode may effect VSEN17-12 (in20-15) */
  67. static const u16 W83795_REG_TEMP_CTRL[][6] = {
  68. /* Disable, TD, VSEN, TR, register shift value, has_in shift num */
  69. {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */
  70. {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */
  71. {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */
  72. {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */
  73. {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */
  74. {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */
  75. };
  76. #define TEMP_READ 0
  77. #define TEMP_CRIT 1
  78. #define TEMP_CRIT_HYST 2
  79. #define TEMP_WARN 3
  80. #define TEMP_WARN_HYST 4
  81. /* only crit and crit_hyst affect real-time alarm status
  82. * current crit crit_hyst warn warn_hyst */
  83. static const u16 W83795_REG_TEMP[][5] = {
  84. {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
  85. {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
  86. {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
  87. {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
  88. {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
  89. {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
  90. };
  91. #define IN_READ 0
  92. #define IN_MAX 1
  93. #define IN_LOW 2
  94. static const u16 W83795_REG_IN[][3] = {
  95. /* Current, HL, LL */
  96. {0x10, 0x70, 0x71}, /* VSEN1 */
  97. {0x11, 0x72, 0x73}, /* VSEN2 */
  98. {0x12, 0x74, 0x75}, /* VSEN3 */
  99. {0x13, 0x76, 0x77}, /* VSEN4 */
  100. {0x14, 0x78, 0x79}, /* VSEN5 */
  101. {0x15, 0x7a, 0x7b}, /* VSEN6 */
  102. {0x16, 0x7c, 0x7d}, /* VSEN7 */
  103. {0x17, 0x7e, 0x7f}, /* VSEN8 */
  104. {0x18, 0x80, 0x81}, /* VSEN9 */
  105. {0x19, 0x82, 0x83}, /* VSEN10 */
  106. {0x1A, 0x84, 0x85}, /* VSEN11 */
  107. {0x1B, 0x86, 0x87}, /* VTT */
  108. {0x1C, 0x88, 0x89}, /* 3VDD */
  109. {0x1D, 0x8a, 0x8b}, /* 3VSB */
  110. {0x1E, 0x8c, 0x8d}, /* VBAT */
  111. {0x1F, 0xa6, 0xa7}, /* VSEN12 */
  112. {0x20, 0xaa, 0xab}, /* VSEN13 */
  113. {0x21, 0x96, 0x97}, /* VSEN14 */
  114. {0x22, 0x9a, 0x9b}, /* VSEN15 */
  115. {0x23, 0x9e, 0x9f}, /* VSEN16 */
  116. {0x24, 0xa2, 0xa3}, /* VSEN17 */
  117. };
  118. #define W83795_REG_VRLSB 0x3C
  119. #define VRLSB_SHIFT 6
  120. static const u8 W83795_REG_IN_HL_LSB[] = {
  121. 0x8e, /* VSEN1-4 */
  122. 0x90, /* VSEN5-8 */
  123. 0x92, /* VSEN9-11 */
  124. 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
  125. 0xa8, /* VSEN12 */
  126. 0xac, /* VSEN13 */
  127. 0x98, /* VSEN14 */
  128. 0x9c, /* VSEN15 */
  129. 0xa0, /* VSEN16 */
  130. 0xa4, /* VSEN17 */
  131. };
  132. #define IN_LSB_REG(index, type) \
  133. (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
  134. : (W83795_REG_IN_HL_LSB[(index)] + 1))
  135. #define IN_LSB_REG_NUM 10
  136. #define IN_LSB_SHIFT 0
  137. #define IN_LSB_IDX 1
  138. static const u8 IN_LSB_SHIFT_IDX[][2] = {
  139. /* High/Low LSB shift, LSB No. */
  140. {0x00, 0x00}, /* VSEN1 */
  141. {0x02, 0x00}, /* VSEN2 */
  142. {0x04, 0x00}, /* VSEN3 */
  143. {0x06, 0x00}, /* VSEN4 */
  144. {0x00, 0x01}, /* VSEN5 */
  145. {0x02, 0x01}, /* VSEN6 */
  146. {0x04, 0x01}, /* VSEN7 */
  147. {0x06, 0x01}, /* VSEN8 */
  148. {0x00, 0x02}, /* VSEN9 */
  149. {0x02, 0x02}, /* VSEN10 */
  150. {0x04, 0x02}, /* VSEN11 */
  151. {0x00, 0x03}, /* VTT */
  152. {0x02, 0x03}, /* 3VDD */
  153. {0x04, 0x03}, /* 3VSB */
  154. {0x06, 0x03}, /* VBAT */
  155. {0x06, 0x04}, /* VSEN12 */
  156. {0x06, 0x05}, /* VSEN13 */
  157. {0x06, 0x06}, /* VSEN14 */
  158. {0x06, 0x07}, /* VSEN15 */
  159. {0x06, 0x08}, /* VSEN16 */
  160. {0x06, 0x09}, /* VSEN17 */
  161. };
  162. /* 3VDD, 3VSB, VBAT * 0.006 */
  163. #define REST_VLT_BEGIN 12 /* the 13th volt to 15th */
  164. #define REST_VLT_END 14 /* the 13th volt to 15th */
  165. #define W83795_REG_FAN(index) (0x2E + (index))
  166. #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
  167. #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
  168. #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
  169. (((index) % 1) ? 4 : 0)
  170. #define W83795_REG_VID_CTRL 0x6A
  171. #define ALARM_BEEP_REG_NUM 6
  172. #define W83795_REG_ALARM(index) (0x41 + (index))
  173. #define W83795_REG_BEEP(index) (0x50 + (index))
  174. #define W83795_REG_CLR_CHASSIS 0x4D
  175. #define W83795_REG_TEMP_NUM 6
  176. #define W83795_REG_FCMS1 0x201
  177. #define W83795_REG_FCMS2 0x208
  178. #define W83795_REG_TFMR(index) (0x202 + (index))
  179. #define W83795_REG_FOMC 0x20F
  180. #define W83795_REG_FOPFP(index) (0x218 + (index))
  181. #define W83795_REG_TSS(index) (0x209 + (index))
  182. #define PWM_OUTPUT 0
  183. #define PWM_START 1
  184. #define PWM_NONSTOP 2
  185. #define PWM_STOP_TIME 3
  186. #define PWM_DIV 4
  187. #define W83795_REG_PWM(index, nr) \
  188. (((nr) == 0 ? 0x210 : \
  189. (nr) == 1 ? 0x220 : \
  190. (nr) == 2 ? 0x228 : \
  191. (nr) == 3 ? 0x230 : 0x218) + (index))
  192. #define W83795_REG_FOPFP_DIV(index) \
  193. (((index) < 8) ? ((index) + 1) : \
  194. ((index) == 8) ? 12 : \
  195. (16 << ((index) - 9)))
  196. #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
  197. #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
  198. #define W83795_REG_TFTS 0x250
  199. #define TEMP_PWM_TTTI 0
  200. #define TEMP_PWM_CTFS 1
  201. #define TEMP_PWM_HCT 2
  202. #define TEMP_PWM_HOT 3
  203. #define W83795_REG_TTTI(index) (0x260 + (index))
  204. #define W83795_REG_CTFS(index) (0x268 + (index))
  205. #define W83795_REG_HT(index) (0x270 + (index))
  206. #define SF4_TEMP 0
  207. #define SF4_PWM 1
  208. #define W83795_REG_SF4_TEMP(temp_num, index) \
  209. (0x280 + 0x10 * (temp_num) + (index))
  210. #define W83795_REG_SF4_PWM(temp_num, index) \
  211. (0x288 + 0x10 * (temp_num) + (index))
  212. #define W83795_REG_DTSC 0x301
  213. #define W83795_REG_DTSE 0x302
  214. #define W83795_REG_DTS(index) (0x26 + (index))
  215. #define DTS_CRIT 0
  216. #define DTS_CRIT_HYST 1
  217. #define DTS_WARN 2
  218. #define DTS_WARN_HYST 3
  219. #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
  220. #define SETUP_PWM_DEFAULT 0
  221. #define SETUP_PWM_UPTIME 1
  222. #define SETUP_PWM_DOWNTIME 2
  223. #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
  224. static inline u16 in_from_reg(u8 index, u16 val)
  225. {
  226. if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
  227. return val * 6;
  228. else
  229. return val * 2;
  230. }
  231. static inline u16 in_to_reg(u8 index, u16 val)
  232. {
  233. if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
  234. return val / 6;
  235. else
  236. return val / 2;
  237. }
  238. static inline unsigned long fan_from_reg(u16 val)
  239. {
  240. if ((val >= 0xff0) || (val == 0))
  241. return 0;
  242. return 1350000UL / val;
  243. }
  244. static inline u16 fan_to_reg(long rpm)
  245. {
  246. if (rpm <= 0)
  247. return 0x0fff;
  248. return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
  249. }
  250. static inline unsigned long time_from_reg(u8 reg)
  251. {
  252. return reg * 100;
  253. }
  254. static inline u8 time_to_reg(unsigned long val)
  255. {
  256. return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
  257. }
  258. static inline long temp_from_reg(s8 reg)
  259. {
  260. return reg * 1000;
  261. }
  262. static inline s8 temp_to_reg(long val, s8 min, s8 max)
  263. {
  264. return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max);
  265. }
  266. enum chip_types {w83795g, w83795adg};
  267. struct w83795_data {
  268. struct device *hwmon_dev;
  269. struct mutex update_lock;
  270. unsigned long last_updated; /* In jiffies */
  271. enum chip_types chip_type;
  272. u8 bank;
  273. u32 has_in; /* Enable monitor VIN or not */
  274. u16 in[21][3]; /* Register value, read/high/low */
  275. u8 in_lsb[10][3]; /* LSB Register value, high/low */
  276. u8 has_gain; /* has gain: in17-20 * 8 */
  277. u16 has_fan; /* Enable fan14-1 or not */
  278. u16 fan[14]; /* Register value combine */
  279. u16 fan_min[14]; /* Register value combine */
  280. u8 has_temp; /* Enable monitor temp6-1 or not */
  281. u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
  282. u8 temp_read_vrlsb[6];
  283. u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */
  284. u8 temp_src[3]; /* Register value */
  285. u8 enable_dts; /* Enable PECI and SB-TSI,
  286. * bit 0: =1 enable, =0 disable,
  287. * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
  288. u8 has_dts; /* Enable monitor DTS temp */
  289. u8 dts[8]; /* Register value */
  290. u8 dts_read_vrlsb[8]; /* Register value */
  291. u8 dts_ext[4]; /* Register value */
  292. u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
  293. * no config register, only affected by chip
  294. * type */
  295. u8 pwm[8][5]; /* Register value, output, start, non stop, stop
  296. * time, div */
  297. u8 pwm_fcms[2]; /* Register value */
  298. u8 pwm_tfmr[6]; /* Register value */
  299. u8 pwm_fomc; /* Register value */
  300. u16 target_speed[8]; /* Register value, target speed for speed
  301. * cruise */
  302. u8 tol_speed; /* tolerance of target speed */
  303. u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
  304. u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
  305. u8 setup_pwm[3]; /* Register value */
  306. u8 alarms[6]; /* Register value */
  307. u8 beeps[6]; /* Register value */
  308. u8 beep_enable;
  309. char valid;
  310. };
  311. /*
  312. * Hardware access
  313. * We assume that nobdody can change the bank outside the driver.
  314. */
  315. /* Must be called with data->update_lock held, except during initialization */
  316. static int w83795_set_bank(struct i2c_client *client, u8 bank)
  317. {
  318. struct w83795_data *data = i2c_get_clientdata(client);
  319. int err;
  320. /* If the same bank is already set, nothing to do */
  321. if ((data->bank & 0x07) == bank)
  322. return 0;
  323. /* Change to new bank, preserve all other bits */
  324. bank |= data->bank & ~0x07;
  325. err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
  326. if (err < 0) {
  327. dev_err(&client->dev,
  328. "Failed to set bank to %d, err %d\n",
  329. (int)bank, err);
  330. return err;
  331. }
  332. data->bank = bank;
  333. return 0;
  334. }
  335. /* Must be called with data->update_lock held, except during initialization */
  336. static u8 w83795_read(struct i2c_client *client, u16 reg)
  337. {
  338. int err;
  339. err = w83795_set_bank(client, reg >> 8);
  340. if (err < 0)
  341. return 0x00; /* Arbitrary */
  342. err = i2c_smbus_read_byte_data(client, reg & 0xff);
  343. if (err < 0) {
  344. dev_err(&client->dev,
  345. "Failed to read from register 0x%03x, err %d\n",
  346. (int)reg, err);
  347. return 0x00; /* Arbitrary */
  348. }
  349. return err;
  350. }
  351. /* Must be called with data->update_lock held, except during initialization */
  352. static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
  353. {
  354. int err;
  355. err = w83795_set_bank(client, reg >> 8);
  356. if (err < 0)
  357. return err;
  358. err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
  359. if (err < 0)
  360. dev_err(&client->dev,
  361. "Failed to write to register 0x%03x, err %d\n",
  362. (int)reg, err);
  363. return err;
  364. }
  365. static struct w83795_data *w83795_update_device(struct device *dev)
  366. {
  367. struct i2c_client *client = to_i2c_client(dev);
  368. struct w83795_data *data = i2c_get_clientdata(client);
  369. u16 tmp;
  370. int i;
  371. mutex_lock(&data->update_lock);
  372. if (!(time_after(jiffies, data->last_updated + HZ * 2)
  373. || !data->valid))
  374. goto END;
  375. /* Update the voltages value */
  376. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  377. if (!(data->has_in & (1 << i)))
  378. continue;
  379. tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
  380. tmp |= (w83795_read(client, W83795_REG_VRLSB)
  381. >> VRLSB_SHIFT) & 0x03;
  382. data->in[i][IN_READ] = tmp;
  383. }
  384. /* Update fan */
  385. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  386. if (!(data->has_fan & (1 << i)))
  387. continue;
  388. data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
  389. data->fan[i] |=
  390. (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
  391. }
  392. /* Update temperature */
  393. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  394. /* even stop monitor, register still keep value, just read out
  395. * it */
  396. if (!(data->has_temp & (1 << i))) {
  397. data->temp[i][TEMP_READ] = 0;
  398. data->temp_read_vrlsb[i] = 0;
  399. continue;
  400. }
  401. data->temp[i][TEMP_READ] =
  402. w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
  403. data->temp_read_vrlsb[i] =
  404. w83795_read(client, W83795_REG_VRLSB);
  405. }
  406. /* Update dts temperature */
  407. if (data->enable_dts != 0) {
  408. for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
  409. if (!(data->has_dts & (1 << i)))
  410. continue;
  411. data->dts[i] =
  412. w83795_read(client, W83795_REG_DTS(i));
  413. data->dts_read_vrlsb[i] =
  414. w83795_read(client, W83795_REG_VRLSB);
  415. }
  416. }
  417. /* Update pwm output */
  418. for (i = 0; i < data->has_pwm; i++) {
  419. data->pwm[i][PWM_OUTPUT] =
  420. w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
  421. }
  422. /* update alarm */
  423. for (i = 0; i < ALARM_BEEP_REG_NUM; i++)
  424. data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
  425. data->last_updated = jiffies;
  426. data->valid = 1;
  427. END:
  428. mutex_unlock(&data->update_lock);
  429. return data;
  430. }
  431. /*
  432. * Sysfs attributes
  433. */
  434. #define ALARM_STATUS 0
  435. #define BEEP_ENABLE 1
  436. static ssize_t
  437. show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
  438. {
  439. struct w83795_data *data = w83795_update_device(dev);
  440. struct sensor_device_attribute_2 *sensor_attr =
  441. to_sensor_dev_attr_2(attr);
  442. int nr = sensor_attr->nr;
  443. int index = sensor_attr->index >> 3;
  444. int bit = sensor_attr->index & 0x07;
  445. u8 val;
  446. if (ALARM_STATUS == nr) {
  447. val = (data->alarms[index] >> (bit)) & 1;
  448. } else { /* BEEP_ENABLE */
  449. val = (data->beeps[index] >> (bit)) & 1;
  450. }
  451. return sprintf(buf, "%u\n", val);
  452. }
  453. static ssize_t
  454. store_beep(struct device *dev, struct device_attribute *attr,
  455. const char *buf, size_t count)
  456. {
  457. struct i2c_client *client = to_i2c_client(dev);
  458. struct w83795_data *data = i2c_get_clientdata(client);
  459. struct sensor_device_attribute_2 *sensor_attr =
  460. to_sensor_dev_attr_2(attr);
  461. int index = sensor_attr->index >> 3;
  462. int shift = sensor_attr->index & 0x07;
  463. u8 beep_bit = 1 << shift;
  464. unsigned long val;
  465. if (strict_strtoul(buf, 10, &val) < 0)
  466. return -EINVAL;
  467. if (val != 0 && val != 1)
  468. return -EINVAL;
  469. mutex_lock(&data->update_lock);
  470. data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
  471. data->beeps[index] &= ~beep_bit;
  472. data->beeps[index] |= val << shift;
  473. w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
  474. mutex_unlock(&data->update_lock);
  475. return count;
  476. }
  477. static ssize_t
  478. show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
  479. {
  480. struct i2c_client *client = to_i2c_client(dev);
  481. struct w83795_data *data = i2c_get_clientdata(client);
  482. return sprintf(buf, "%u\n", data->beep_enable);
  483. }
  484. static ssize_t
  485. store_beep_enable(struct device *dev, struct device_attribute *attr,
  486. const char *buf, size_t count)
  487. {
  488. struct i2c_client *client = to_i2c_client(dev);
  489. struct w83795_data *data = i2c_get_clientdata(client);
  490. unsigned long val;
  491. u8 tmp;
  492. if (strict_strtoul(buf, 10, &val) < 0)
  493. return -EINVAL;
  494. if (val != 0 && val != 1)
  495. return -EINVAL;
  496. mutex_lock(&data->update_lock);
  497. data->beep_enable = val;
  498. tmp = w83795_read(client, W83795_REG_BEEP(5));
  499. tmp &= 0x7f;
  500. tmp |= val << 7;
  501. w83795_write(client, W83795_REG_BEEP(5), tmp);
  502. mutex_unlock(&data->update_lock);
  503. return count;
  504. }
  505. /* Write any value to clear chassis alarm */
  506. static ssize_t
  507. store_chassis_clear(struct device *dev,
  508. struct device_attribute *attr, const char *buf,
  509. size_t count)
  510. {
  511. struct i2c_client *client = to_i2c_client(dev);
  512. struct w83795_data *data = i2c_get_clientdata(client);
  513. u8 val;
  514. mutex_lock(&data->update_lock);
  515. val = w83795_read(client, W83795_REG_CLR_CHASSIS);
  516. val |= 0x80;
  517. w83795_write(client, W83795_REG_CLR_CHASSIS, val);
  518. mutex_unlock(&data->update_lock);
  519. return count;
  520. }
  521. #define FAN_INPUT 0
  522. #define FAN_MIN 1
  523. static ssize_t
  524. show_fan(struct device *dev, struct device_attribute *attr, char *buf)
  525. {
  526. struct sensor_device_attribute_2 *sensor_attr =
  527. to_sensor_dev_attr_2(attr);
  528. int nr = sensor_attr->nr;
  529. int index = sensor_attr->index;
  530. struct w83795_data *data = w83795_update_device(dev);
  531. u16 val;
  532. if (FAN_INPUT == nr)
  533. val = data->fan[index] & 0x0fff;
  534. else
  535. val = data->fan_min[index] & 0x0fff;
  536. return sprintf(buf, "%lu\n", fan_from_reg(val));
  537. }
  538. static ssize_t
  539. store_fan_min(struct device *dev, struct device_attribute *attr,
  540. const char *buf, size_t count)
  541. {
  542. struct sensor_device_attribute_2 *sensor_attr =
  543. to_sensor_dev_attr_2(attr);
  544. int index = sensor_attr->index;
  545. struct i2c_client *client = to_i2c_client(dev);
  546. struct w83795_data *data = i2c_get_clientdata(client);
  547. unsigned long val;
  548. if (strict_strtoul(buf, 10, &val))
  549. return -EINVAL;
  550. val = fan_to_reg(val);
  551. mutex_lock(&data->update_lock);
  552. data->fan_min[index] = val;
  553. w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
  554. val &= 0x0f;
  555. if (index % 1) {
  556. val <<= 4;
  557. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  558. & 0x0f;
  559. } else {
  560. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  561. & 0xf0;
  562. }
  563. w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
  564. mutex_unlock(&data->update_lock);
  565. return count;
  566. }
  567. static ssize_t
  568. show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  569. {
  570. struct w83795_data *data = w83795_update_device(dev);
  571. struct sensor_device_attribute_2 *sensor_attr =
  572. to_sensor_dev_attr_2(attr);
  573. int nr = sensor_attr->nr;
  574. int index = sensor_attr->index;
  575. u16 val;
  576. switch (nr) {
  577. case PWM_STOP_TIME:
  578. val = time_from_reg(data->pwm[index][nr]);
  579. break;
  580. case PWM_DIV:
  581. val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f);
  582. break;
  583. default:
  584. val = data->pwm[index][nr];
  585. break;
  586. }
  587. return sprintf(buf, "%u\n", val);
  588. }
  589. static ssize_t
  590. store_pwm(struct device *dev, struct device_attribute *attr,
  591. const char *buf, size_t count)
  592. {
  593. struct i2c_client *client = to_i2c_client(dev);
  594. struct w83795_data *data = i2c_get_clientdata(client);
  595. struct sensor_device_attribute_2 *sensor_attr =
  596. to_sensor_dev_attr_2(attr);
  597. int nr = sensor_attr->nr;
  598. int index = sensor_attr->index;
  599. unsigned long val;
  600. int i;
  601. if (strict_strtoul(buf, 10, &val) < 0)
  602. return -EINVAL;
  603. mutex_lock(&data->update_lock);
  604. switch (nr) {
  605. case PWM_STOP_TIME:
  606. val = time_to_reg(val);
  607. break;
  608. case PWM_DIV:
  609. for (i = 0; i < 16; i++) {
  610. if (W83795_REG_FOPFP_DIV(i) == val) {
  611. val = i;
  612. break;
  613. }
  614. }
  615. if (i >= 16)
  616. goto err_end;
  617. val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80;
  618. break;
  619. default:
  620. val = SENSORS_LIMIT(val, 0, 0xff);
  621. break;
  622. }
  623. w83795_write(client, W83795_REG_PWM(index, nr), val);
  624. data->pwm[index][nr] = val & 0xff;
  625. mutex_unlock(&data->update_lock);
  626. return count;
  627. err_end:
  628. mutex_unlock(&data->update_lock);
  629. return -EINVAL;
  630. }
  631. static ssize_t
  632. show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
  633. {
  634. struct sensor_device_attribute_2 *sensor_attr =
  635. to_sensor_dev_attr_2(attr);
  636. struct i2c_client *client = to_i2c_client(dev);
  637. struct w83795_data *data = i2c_get_clientdata(client);
  638. int index = sensor_attr->index;
  639. u8 tmp;
  640. if (1 == (data->pwm_fcms[0] & (1 << index))) {
  641. tmp = 2;
  642. goto out;
  643. }
  644. for (tmp = 0; tmp < 6; tmp++) {
  645. if (data->pwm_tfmr[tmp] & (1 << index)) {
  646. tmp = 3;
  647. goto out;
  648. }
  649. }
  650. if (data->pwm_fomc & (1 << index))
  651. tmp = 0;
  652. else
  653. tmp = 1;
  654. out:
  655. return sprintf(buf, "%u\n", tmp);
  656. }
  657. static ssize_t
  658. store_pwm_enable(struct device *dev, struct device_attribute *attr,
  659. const char *buf, size_t count)
  660. {
  661. struct i2c_client *client = to_i2c_client(dev);
  662. struct w83795_data *data = i2c_get_clientdata(client);
  663. struct sensor_device_attribute_2 *sensor_attr =
  664. to_sensor_dev_attr_2(attr);
  665. int index = sensor_attr->index;
  666. unsigned long val;
  667. int i;
  668. if (strict_strtoul(buf, 10, &val) < 0)
  669. return -EINVAL;
  670. if (val > 2)
  671. return -EINVAL;
  672. mutex_lock(&data->update_lock);
  673. switch (val) {
  674. case 0:
  675. case 1:
  676. data->pwm_fcms[0] &= ~(1 << index);
  677. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  678. for (i = 0; i < 6; i++) {
  679. data->pwm_tfmr[i] &= ~(1 << index);
  680. w83795_write(client, W83795_REG_TFMR(i),
  681. data->pwm_tfmr[i]);
  682. }
  683. data->pwm_fomc |= 1 << index;
  684. data->pwm_fomc ^= val << index;
  685. w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
  686. break;
  687. case 2:
  688. data->pwm_fcms[0] |= (1 << index);
  689. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  690. break;
  691. }
  692. mutex_unlock(&data->update_lock);
  693. return count;
  694. }
  695. static ssize_t
  696. show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
  697. {
  698. struct sensor_device_attribute_2 *sensor_attr =
  699. to_sensor_dev_attr_2(attr);
  700. struct i2c_client *client = to_i2c_client(dev);
  701. struct w83795_data *data = i2c_get_clientdata(client);
  702. int index = sensor_attr->index;
  703. u8 val = index / 2;
  704. u8 tmp = data->temp_src[val];
  705. if (index % 1)
  706. val = 4;
  707. else
  708. val = 0;
  709. tmp >>= val;
  710. tmp &= 0x0f;
  711. return sprintf(buf, "%u\n", tmp);
  712. }
  713. static ssize_t
  714. store_temp_src(struct device *dev, struct device_attribute *attr,
  715. const char *buf, size_t count)
  716. {
  717. struct i2c_client *client = to_i2c_client(dev);
  718. struct w83795_data *data = i2c_get_clientdata(client);
  719. struct sensor_device_attribute_2 *sensor_attr =
  720. to_sensor_dev_attr_2(attr);
  721. int index = sensor_attr->index;
  722. unsigned long tmp;
  723. u8 val = index / 2;
  724. if (strict_strtoul(buf, 10, &tmp) < 0)
  725. return -EINVAL;
  726. tmp = SENSORS_LIMIT(tmp, 0, 15);
  727. mutex_lock(&data->update_lock);
  728. if (index % 1) {
  729. tmp <<= 4;
  730. data->temp_src[val] &= 0x0f;
  731. } else {
  732. data->temp_src[val] &= 0xf0;
  733. }
  734. data->temp_src[val] |= tmp;
  735. w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
  736. mutex_unlock(&data->update_lock);
  737. return count;
  738. }
  739. #define TEMP_PWM_ENABLE 0
  740. #define TEMP_PWM_FAN_MAP 1
  741. static ssize_t
  742. show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  743. char *buf)
  744. {
  745. struct i2c_client *client = to_i2c_client(dev);
  746. struct w83795_data *data = i2c_get_clientdata(client);
  747. struct sensor_device_attribute_2 *sensor_attr =
  748. to_sensor_dev_attr_2(attr);
  749. int nr = sensor_attr->nr;
  750. int index = sensor_attr->index;
  751. u8 tmp = 0xff;
  752. switch (nr) {
  753. case TEMP_PWM_ENABLE:
  754. tmp = (data->pwm_fcms[1] >> index) & 1;
  755. if (tmp)
  756. tmp = 4;
  757. else
  758. tmp = 3;
  759. break;
  760. case TEMP_PWM_FAN_MAP:
  761. tmp = data->pwm_tfmr[index];
  762. break;
  763. }
  764. return sprintf(buf, "%u\n", tmp);
  765. }
  766. static ssize_t
  767. store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  768. const char *buf, size_t count)
  769. {
  770. struct i2c_client *client = to_i2c_client(dev);
  771. struct w83795_data *data = i2c_get_clientdata(client);
  772. struct sensor_device_attribute_2 *sensor_attr =
  773. to_sensor_dev_attr_2(attr);
  774. int nr = sensor_attr->nr;
  775. int index = sensor_attr->index;
  776. unsigned long tmp;
  777. if (strict_strtoul(buf, 10, &tmp) < 0)
  778. return -EINVAL;
  779. switch (nr) {
  780. case TEMP_PWM_ENABLE:
  781. if ((tmp != 3) && (tmp != 4))
  782. return -EINVAL;
  783. tmp -= 3;
  784. mutex_lock(&data->update_lock);
  785. data->pwm_fcms[1] &= ~(1 << index);
  786. data->pwm_fcms[1] |= tmp << index;
  787. w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
  788. mutex_unlock(&data->update_lock);
  789. break;
  790. case TEMP_PWM_FAN_MAP:
  791. mutex_lock(&data->update_lock);
  792. tmp = SENSORS_LIMIT(tmp, 0, 0xff);
  793. w83795_write(client, W83795_REG_TFMR(index), tmp);
  794. data->pwm_tfmr[index] = tmp;
  795. mutex_unlock(&data->update_lock);
  796. break;
  797. }
  798. return count;
  799. }
  800. #define FANIN_TARGET 0
  801. #define FANIN_TOL 1
  802. static ssize_t
  803. show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
  804. {
  805. struct i2c_client *client = to_i2c_client(dev);
  806. struct w83795_data *data = i2c_get_clientdata(client);
  807. struct sensor_device_attribute_2 *sensor_attr =
  808. to_sensor_dev_attr_2(attr);
  809. int nr = sensor_attr->nr;
  810. int index = sensor_attr->index;
  811. u16 tmp = 0;
  812. switch (nr) {
  813. case FANIN_TARGET:
  814. tmp = fan_from_reg(data->target_speed[index]);
  815. break;
  816. case FANIN_TOL:
  817. tmp = data->tol_speed;
  818. break;
  819. }
  820. return sprintf(buf, "%u\n", tmp);
  821. }
  822. static ssize_t
  823. store_fanin(struct device *dev, struct device_attribute *attr,
  824. const char *buf, size_t count)
  825. {
  826. struct i2c_client *client = to_i2c_client(dev);
  827. struct w83795_data *data = i2c_get_clientdata(client);
  828. struct sensor_device_attribute_2 *sensor_attr =
  829. to_sensor_dev_attr_2(attr);
  830. int nr = sensor_attr->nr;
  831. int index = sensor_attr->index;
  832. unsigned long val;
  833. if (strict_strtoul(buf, 10, &val) < 0)
  834. return -EINVAL;
  835. mutex_lock(&data->update_lock);
  836. switch (nr) {
  837. case FANIN_TARGET:
  838. val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
  839. w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
  840. w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
  841. data->target_speed[index] = val;
  842. break;
  843. case FANIN_TOL:
  844. val = SENSORS_LIMIT(val, 0, 0x3f);
  845. w83795_write(client, W83795_REG_TFTS, val);
  846. data->tol_speed = val;
  847. break;
  848. }
  849. mutex_unlock(&data->update_lock);
  850. return count;
  851. }
  852. static ssize_t
  853. show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  854. {
  855. struct i2c_client *client = to_i2c_client(dev);
  856. struct w83795_data *data = i2c_get_clientdata(client);
  857. struct sensor_device_attribute_2 *sensor_attr =
  858. to_sensor_dev_attr_2(attr);
  859. int nr = sensor_attr->nr;
  860. int index = sensor_attr->index;
  861. long tmp = temp_from_reg(data->pwm_temp[index][nr]);
  862. return sprintf(buf, "%ld\n", tmp);
  863. }
  864. static ssize_t
  865. store_temp_pwm(struct device *dev, struct device_attribute *attr,
  866. const char *buf, size_t count)
  867. {
  868. struct i2c_client *client = to_i2c_client(dev);
  869. struct w83795_data *data = i2c_get_clientdata(client);
  870. struct sensor_device_attribute_2 *sensor_attr =
  871. to_sensor_dev_attr_2(attr);
  872. int nr = sensor_attr->nr;
  873. int index = sensor_attr->index;
  874. unsigned long val;
  875. u8 tmp;
  876. if (strict_strtoul(buf, 10, &val) < 0)
  877. return -EINVAL;
  878. val /= 1000;
  879. mutex_lock(&data->update_lock);
  880. switch (nr) {
  881. case TEMP_PWM_TTTI:
  882. val = SENSORS_LIMIT(val, 0, 0x7f);
  883. w83795_write(client, W83795_REG_TTTI(index), val);
  884. break;
  885. case TEMP_PWM_CTFS:
  886. val = SENSORS_LIMIT(val, 0, 0x7f);
  887. w83795_write(client, W83795_REG_CTFS(index), val);
  888. break;
  889. case TEMP_PWM_HCT:
  890. val = SENSORS_LIMIT(val, 0, 0x0f);
  891. tmp = w83795_read(client, W83795_REG_HT(index));
  892. tmp &= 0x0f;
  893. tmp |= (val << 4) & 0xf0;
  894. w83795_write(client, W83795_REG_HT(index), tmp);
  895. break;
  896. case TEMP_PWM_HOT:
  897. val = SENSORS_LIMIT(val, 0, 0x0f);
  898. tmp = w83795_read(client, W83795_REG_HT(index));
  899. tmp &= 0xf0;
  900. tmp |= val & 0x0f;
  901. w83795_write(client, W83795_REG_HT(index), tmp);
  902. break;
  903. }
  904. data->pwm_temp[index][nr] = val;
  905. mutex_unlock(&data->update_lock);
  906. return count;
  907. }
  908. static ssize_t
  909. show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  910. {
  911. struct i2c_client *client = to_i2c_client(dev);
  912. struct w83795_data *data = i2c_get_clientdata(client);
  913. struct sensor_device_attribute_2 *sensor_attr =
  914. to_sensor_dev_attr_2(attr);
  915. int nr = sensor_attr->nr;
  916. int index = sensor_attr->index;
  917. return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
  918. }
  919. static ssize_t
  920. store_sf4_pwm(struct device *dev, struct device_attribute *attr,
  921. const char *buf, size_t count)
  922. {
  923. struct i2c_client *client = to_i2c_client(dev);
  924. struct w83795_data *data = i2c_get_clientdata(client);
  925. struct sensor_device_attribute_2 *sensor_attr =
  926. to_sensor_dev_attr_2(attr);
  927. int nr = sensor_attr->nr;
  928. int index = sensor_attr->index;
  929. unsigned long val;
  930. if (strict_strtoul(buf, 10, &val) < 0)
  931. return -EINVAL;
  932. mutex_lock(&data->update_lock);
  933. w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
  934. data->sf4_reg[index][SF4_PWM][nr] = val;
  935. mutex_unlock(&data->update_lock);
  936. return count;
  937. }
  938. static ssize_t
  939. show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
  940. {
  941. struct i2c_client *client = to_i2c_client(dev);
  942. struct w83795_data *data = i2c_get_clientdata(client);
  943. struct sensor_device_attribute_2 *sensor_attr =
  944. to_sensor_dev_attr_2(attr);
  945. int nr = sensor_attr->nr;
  946. int index = sensor_attr->index;
  947. return sprintf(buf, "%u\n",
  948. (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
  949. }
  950. static ssize_t
  951. store_sf4_temp(struct device *dev, struct device_attribute *attr,
  952. const char *buf, size_t count)
  953. {
  954. struct i2c_client *client = to_i2c_client(dev);
  955. struct w83795_data *data = i2c_get_clientdata(client);
  956. struct sensor_device_attribute_2 *sensor_attr =
  957. to_sensor_dev_attr_2(attr);
  958. int nr = sensor_attr->nr;
  959. int index = sensor_attr->index;
  960. unsigned long val;
  961. if (strict_strtoul(buf, 10, &val) < 0)
  962. return -EINVAL;
  963. val /= 1000;
  964. mutex_lock(&data->update_lock);
  965. w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
  966. data->sf4_reg[index][SF4_TEMP][nr] = val;
  967. mutex_unlock(&data->update_lock);
  968. return count;
  969. }
  970. static ssize_t
  971. show_temp(struct device *dev, struct device_attribute *attr, char *buf)
  972. {
  973. struct sensor_device_attribute_2 *sensor_attr =
  974. to_sensor_dev_attr_2(attr);
  975. int nr = sensor_attr->nr;
  976. int index = sensor_attr->index;
  977. struct w83795_data *data = w83795_update_device(dev);
  978. long temp = temp_from_reg(data->temp[index][nr] & 0x7f);
  979. if (TEMP_READ == nr)
  980. temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03)
  981. * 250;
  982. if (data->temp[index][nr] & 0x80)
  983. temp = -temp;
  984. return sprintf(buf, "%ld\n", temp);
  985. }
  986. static ssize_t
  987. store_temp(struct device *dev, struct device_attribute *attr,
  988. const char *buf, size_t count)
  989. {
  990. struct sensor_device_attribute_2 *sensor_attr =
  991. to_sensor_dev_attr_2(attr);
  992. int nr = sensor_attr->nr;
  993. int index = sensor_attr->index;
  994. struct i2c_client *client = to_i2c_client(dev);
  995. struct w83795_data *data = i2c_get_clientdata(client);
  996. long tmp;
  997. if (strict_strtol(buf, 10, &tmp) < 0)
  998. return -EINVAL;
  999. mutex_lock(&data->update_lock);
  1000. data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
  1001. w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
  1002. mutex_unlock(&data->update_lock);
  1003. return count;
  1004. }
  1005. static ssize_t
  1006. show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1007. {
  1008. struct i2c_client *client = to_i2c_client(dev);
  1009. struct w83795_data *data = i2c_get_clientdata(client);
  1010. struct sensor_device_attribute_2 *sensor_attr =
  1011. to_sensor_dev_attr_2(attr);
  1012. int index = sensor_attr->index;
  1013. u8 tmp;
  1014. if (data->enable_dts == 0)
  1015. return sprintf(buf, "%d\n", 0);
  1016. if ((data->has_dts >> index) & 0x01) {
  1017. if (data->enable_dts & 2)
  1018. tmp = 5;
  1019. else
  1020. tmp = 6;
  1021. } else {
  1022. tmp = 0;
  1023. }
  1024. return sprintf(buf, "%d\n", tmp);
  1025. }
  1026. static ssize_t
  1027. show_dts(struct device *dev, struct device_attribute *attr, char *buf)
  1028. {
  1029. struct sensor_device_attribute_2 *sensor_attr =
  1030. to_sensor_dev_attr_2(attr);
  1031. int index = sensor_attr->index;
  1032. struct w83795_data *data = w83795_update_device(dev);
  1033. long temp = temp_from_reg(data->dts[index] & 0x7f);
  1034. temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250;
  1035. if (data->dts[index] & 0x80)
  1036. temp = -temp;
  1037. return sprintf(buf, "%ld\n", temp);
  1038. }
  1039. static ssize_t
  1040. show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
  1041. {
  1042. struct sensor_device_attribute_2 *sensor_attr =
  1043. to_sensor_dev_attr_2(attr);
  1044. int nr = sensor_attr->nr;
  1045. struct i2c_client *client = to_i2c_client(dev);
  1046. struct w83795_data *data = i2c_get_clientdata(client);
  1047. long temp = temp_from_reg(data->dts_ext[nr] & 0x7f);
  1048. if (data->dts_ext[nr] & 0x80)
  1049. temp = -temp;
  1050. return sprintf(buf, "%ld\n", temp);
  1051. }
  1052. static ssize_t
  1053. store_dts_ext(struct device *dev, struct device_attribute *attr,
  1054. const char *buf, size_t count)
  1055. {
  1056. struct sensor_device_attribute_2 *sensor_attr =
  1057. to_sensor_dev_attr_2(attr);
  1058. int nr = sensor_attr->nr;
  1059. struct i2c_client *client = to_i2c_client(dev);
  1060. struct w83795_data *data = i2c_get_clientdata(client);
  1061. long tmp;
  1062. if (strict_strtol(buf, 10, &tmp) < 0)
  1063. return -EINVAL;
  1064. mutex_lock(&data->update_lock);
  1065. data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
  1066. w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
  1067. mutex_unlock(&data->update_lock);
  1068. return count;
  1069. }
  1070. /*
  1071. Type 3: Thermal diode
  1072. Type 4: Thermistor
  1073. Temp5-6, default TR
  1074. Temp1-4, default TD
  1075. */
  1076. static ssize_t
  1077. show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1078. {
  1079. struct i2c_client *client = to_i2c_client(dev);
  1080. struct w83795_data *data = i2c_get_clientdata(client);
  1081. struct sensor_device_attribute_2 *sensor_attr =
  1082. to_sensor_dev_attr_2(attr);
  1083. int index = sensor_attr->index;
  1084. u8 tmp;
  1085. if (data->has_temp >> index & 0x01) {
  1086. if (data->temp_mode >> index & 0x01)
  1087. tmp = 3;
  1088. else
  1089. tmp = 4;
  1090. } else {
  1091. tmp = 0;
  1092. }
  1093. return sprintf(buf, "%d\n", tmp);
  1094. }
  1095. static ssize_t
  1096. store_temp_mode(struct device *dev, struct device_attribute *attr,
  1097. const char *buf, size_t count)
  1098. {
  1099. struct i2c_client *client = to_i2c_client(dev);
  1100. struct w83795_data *data = i2c_get_clientdata(client);
  1101. struct sensor_device_attribute_2 *sensor_attr =
  1102. to_sensor_dev_attr_2(attr);
  1103. int index = sensor_attr->index;
  1104. unsigned long val;
  1105. u8 tmp;
  1106. u32 mask;
  1107. if (strict_strtoul(buf, 10, &val) < 0)
  1108. return -EINVAL;
  1109. if ((val != 4) && (val != 3))
  1110. return -EINVAL;
  1111. if ((index > 3) && (val == 3))
  1112. return -EINVAL;
  1113. mutex_lock(&data->update_lock);
  1114. if (val == 3) {
  1115. val = TEMP_CTRL_TD;
  1116. data->has_temp |= 1 << index;
  1117. data->temp_mode |= 1 << index;
  1118. } else if (val == 4) {
  1119. val = TEMP_CTRL_TR;
  1120. data->has_temp |= 1 << index;
  1121. tmp = 1 << index;
  1122. data->temp_mode &= ~tmp;
  1123. }
  1124. if (index > 3)
  1125. tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
  1126. else
  1127. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1128. mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT];
  1129. tmp &= ~mask;
  1130. tmp |= W83795_REG_TEMP_CTRL[index][val];
  1131. mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT];
  1132. data->has_in &= ~mask;
  1133. if (index > 3)
  1134. w83795_write(client, W83795_REG_TEMP_CTRL1, tmp);
  1135. else
  1136. w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
  1137. mutex_unlock(&data->update_lock);
  1138. return count;
  1139. }
  1140. /* show/store VIN */
  1141. static ssize_t
  1142. show_in(struct device *dev, struct device_attribute *attr, char *buf)
  1143. {
  1144. struct sensor_device_attribute_2 *sensor_attr =
  1145. to_sensor_dev_attr_2(attr);
  1146. int nr = sensor_attr->nr;
  1147. int index = sensor_attr->index;
  1148. struct w83795_data *data = w83795_update_device(dev);
  1149. u16 val = data->in[index][nr];
  1150. u8 lsb_idx;
  1151. switch (nr) {
  1152. case IN_READ:
  1153. /* calculate this value again by sensors as sensors3.conf */
  1154. if ((index >= 17) &&
  1155. ((data->has_gain >> (index - 17)) & 1))
  1156. val *= 8;
  1157. break;
  1158. case IN_MAX:
  1159. case IN_LOW:
  1160. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1161. val <<= 2;
  1162. val |= (data->in_lsb[lsb_idx][nr] >>
  1163. IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
  1164. if ((index >= 17) &&
  1165. ((data->has_gain >> (index - 17)) & 1))
  1166. val *= 8;
  1167. break;
  1168. }
  1169. val = in_from_reg(index, val);
  1170. return sprintf(buf, "%d\n", val);
  1171. }
  1172. static ssize_t
  1173. store_in(struct device *dev, struct device_attribute *attr,
  1174. const char *buf, size_t count)
  1175. {
  1176. struct sensor_device_attribute_2 *sensor_attr =
  1177. to_sensor_dev_attr_2(attr);
  1178. int nr = sensor_attr->nr;
  1179. int index = sensor_attr->index;
  1180. struct i2c_client *client = to_i2c_client(dev);
  1181. struct w83795_data *data = i2c_get_clientdata(client);
  1182. unsigned long val;
  1183. u8 tmp;
  1184. u8 lsb_idx;
  1185. if (strict_strtoul(buf, 10, &val) < 0)
  1186. return -EINVAL;
  1187. val = in_to_reg(index, val);
  1188. if ((index >= 17) &&
  1189. ((data->has_gain >> (index - 17)) & 1))
  1190. val /= 8;
  1191. val = SENSORS_LIMIT(val, 0, 0x3FF);
  1192. mutex_lock(&data->update_lock);
  1193. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1194. tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
  1195. tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
  1196. tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
  1197. w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
  1198. data->in_lsb[lsb_idx][nr] = tmp;
  1199. tmp = (val >> 2) & 0xff;
  1200. w83795_write(client, W83795_REG_IN[index][nr], tmp);
  1201. data->in[index][nr] = tmp;
  1202. mutex_unlock(&data->update_lock);
  1203. return count;
  1204. }
  1205. static ssize_t
  1206. show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
  1207. {
  1208. struct sensor_device_attribute_2 *sensor_attr =
  1209. to_sensor_dev_attr_2(attr);
  1210. int nr = sensor_attr->nr;
  1211. struct i2c_client *client = to_i2c_client(dev);
  1212. struct w83795_data *data = i2c_get_clientdata(client);
  1213. u16 val = data->setup_pwm[nr];
  1214. switch (nr) {
  1215. case SETUP_PWM_UPTIME:
  1216. case SETUP_PWM_DOWNTIME:
  1217. val = time_from_reg(val);
  1218. break;
  1219. }
  1220. return sprintf(buf, "%d\n", val);
  1221. }
  1222. static ssize_t
  1223. store_sf_setup(struct device *dev, struct device_attribute *attr,
  1224. const char *buf, size_t count)
  1225. {
  1226. struct sensor_device_attribute_2 *sensor_attr =
  1227. to_sensor_dev_attr_2(attr);
  1228. int nr = sensor_attr->nr;
  1229. struct i2c_client *client = to_i2c_client(dev);
  1230. struct w83795_data *data = i2c_get_clientdata(client);
  1231. unsigned long val;
  1232. if (strict_strtoul(buf, 10, &val) < 0)
  1233. return -EINVAL;
  1234. switch (nr) {
  1235. case SETUP_PWM_DEFAULT:
  1236. val = SENSORS_LIMIT(val, 0, 0xff);
  1237. break;
  1238. case SETUP_PWM_UPTIME:
  1239. case SETUP_PWM_DOWNTIME:
  1240. val = time_to_reg(val);
  1241. if (val == 0)
  1242. return -EINVAL;
  1243. break;
  1244. }
  1245. mutex_lock(&data->update_lock);
  1246. data->setup_pwm[nr] = val;
  1247. w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
  1248. mutex_unlock(&data->update_lock);
  1249. return count;
  1250. }
  1251. #define NOT_USED -1
  1252. #define SENSOR_ATTR_IN(index) { \
  1253. SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
  1254. IN_READ, index), \
  1255. SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
  1256. store_in, IN_MAX, index), \
  1257. SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
  1258. store_in, IN_LOW, index), \
  1259. SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
  1260. NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
  1261. SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
  1262. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1263. index + ((index > 14) ? 1 : 0)) }
  1264. #define SENSOR_ATTR_FAN(index) { \
  1265. SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
  1266. NULL, FAN_INPUT, index - 1), \
  1267. SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
  1268. show_fan, store_fan_min, FAN_MIN, index - 1), \
  1269. SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
  1270. NULL, ALARM_STATUS, index + 31), \
  1271. SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
  1272. show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
  1273. #define SENSOR_ATTR_PWM(index) { \
  1274. SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
  1275. store_pwm, PWM_OUTPUT, index - 1), \
  1276. SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
  1277. show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
  1278. SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
  1279. show_pwm, store_pwm, PWM_START, index - 1), \
  1280. SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
  1281. show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
  1282. SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \
  1283. show_pwm, store_pwm, PWM_DIV, index - 1), \
  1284. SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
  1285. show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
  1286. SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
  1287. show_fanin, store_fanin, FANIN_TARGET, index - 1) }
  1288. #define SENSOR_ATTR_DTS(index) { \
  1289. SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
  1290. show_dts_mode, NULL, NOT_USED, index - 7), \
  1291. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
  1292. NULL, NOT_USED, index - 7), \
  1293. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
  1294. store_dts_ext, DTS_CRIT, NOT_USED), \
  1295. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1296. show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
  1297. SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_dts_ext, \
  1298. store_dts_ext, DTS_WARN, NOT_USED), \
  1299. SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
  1300. show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
  1301. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1302. show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
  1303. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1304. show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
  1305. #define SENSOR_ATTR_TEMP(index) { \
  1306. SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
  1307. show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
  1308. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
  1309. NULL, TEMP_READ, index - 1), \
  1310. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
  1311. store_temp, TEMP_CRIT, index - 1), \
  1312. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1313. show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
  1314. SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
  1315. store_temp, TEMP_WARN, index - 1), \
  1316. SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
  1317. show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
  1318. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1319. show_alarm_beep, NULL, ALARM_STATUS, \
  1320. index + (index > 4 ? 11 : 17)), \
  1321. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1322. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1323. index + (index > 4 ? 11 : 17)), \
  1324. SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
  1325. show_temp_src, store_temp_src, NOT_USED, index - 1), \
  1326. SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
  1327. show_temp_pwm_enable, store_temp_pwm_enable, \
  1328. TEMP_PWM_ENABLE, index - 1), \
  1329. SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
  1330. show_temp_pwm_enable, store_temp_pwm_enable, \
  1331. TEMP_PWM_FAN_MAP, index - 1), \
  1332. SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
  1333. show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
  1334. SENSOR_ATTR_2(temp##index##_crit, S_IWUSR | S_IRUGO, \
  1335. show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
  1336. SENSOR_ATTR_2(temp##index##_crit_hyst, S_IWUSR | S_IRUGO, \
  1337. show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
  1338. SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
  1339. show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
  1340. SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
  1341. show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
  1342. SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
  1343. show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
  1344. SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
  1345. show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
  1346. SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
  1347. show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
  1348. SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
  1349. show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
  1350. SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
  1351. show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
  1352. SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
  1353. show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
  1354. SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
  1355. show_sf4_temp, store_sf4_temp, 0, index - 1), \
  1356. SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
  1357. show_sf4_temp, store_sf4_temp, 1, index - 1), \
  1358. SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
  1359. show_sf4_temp, store_sf4_temp, 2, index - 1), \
  1360. SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
  1361. show_sf4_temp, store_sf4_temp, 3, index - 1), \
  1362. SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
  1363. show_sf4_temp, store_sf4_temp, 4, index - 1), \
  1364. SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
  1365. show_sf4_temp, store_sf4_temp, 5, index - 1), \
  1366. SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
  1367. show_sf4_temp, store_sf4_temp, 6, index - 1) }
  1368. static struct sensor_device_attribute_2 w83795_in[][5] = {
  1369. SENSOR_ATTR_IN(0),
  1370. SENSOR_ATTR_IN(1),
  1371. SENSOR_ATTR_IN(2),
  1372. SENSOR_ATTR_IN(3),
  1373. SENSOR_ATTR_IN(4),
  1374. SENSOR_ATTR_IN(5),
  1375. SENSOR_ATTR_IN(6),
  1376. SENSOR_ATTR_IN(7),
  1377. SENSOR_ATTR_IN(8),
  1378. SENSOR_ATTR_IN(9),
  1379. SENSOR_ATTR_IN(10),
  1380. SENSOR_ATTR_IN(11),
  1381. SENSOR_ATTR_IN(12),
  1382. SENSOR_ATTR_IN(13),
  1383. SENSOR_ATTR_IN(14),
  1384. SENSOR_ATTR_IN(15),
  1385. SENSOR_ATTR_IN(16),
  1386. SENSOR_ATTR_IN(17),
  1387. SENSOR_ATTR_IN(18),
  1388. SENSOR_ATTR_IN(19),
  1389. SENSOR_ATTR_IN(20),
  1390. };
  1391. static const struct sensor_device_attribute_2 w83795_fan[][4] = {
  1392. SENSOR_ATTR_FAN(1),
  1393. SENSOR_ATTR_FAN(2),
  1394. SENSOR_ATTR_FAN(3),
  1395. SENSOR_ATTR_FAN(4),
  1396. SENSOR_ATTR_FAN(5),
  1397. SENSOR_ATTR_FAN(6),
  1398. SENSOR_ATTR_FAN(7),
  1399. SENSOR_ATTR_FAN(8),
  1400. SENSOR_ATTR_FAN(9),
  1401. SENSOR_ATTR_FAN(10),
  1402. SENSOR_ATTR_FAN(11),
  1403. SENSOR_ATTR_FAN(12),
  1404. SENSOR_ATTR_FAN(13),
  1405. SENSOR_ATTR_FAN(14),
  1406. };
  1407. static const struct sensor_device_attribute_2 w83795_temp[][29] = {
  1408. SENSOR_ATTR_TEMP(1),
  1409. SENSOR_ATTR_TEMP(2),
  1410. SENSOR_ATTR_TEMP(3),
  1411. SENSOR_ATTR_TEMP(4),
  1412. SENSOR_ATTR_TEMP(5),
  1413. SENSOR_ATTR_TEMP(6),
  1414. };
  1415. static const struct sensor_device_attribute_2 w83795_dts[][8] = {
  1416. SENSOR_ATTR_DTS(7),
  1417. SENSOR_ATTR_DTS(8),
  1418. SENSOR_ATTR_DTS(9),
  1419. SENSOR_ATTR_DTS(10),
  1420. SENSOR_ATTR_DTS(11),
  1421. SENSOR_ATTR_DTS(12),
  1422. SENSOR_ATTR_DTS(13),
  1423. SENSOR_ATTR_DTS(14),
  1424. };
  1425. static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
  1426. SENSOR_ATTR_PWM(1),
  1427. SENSOR_ATTR_PWM(2),
  1428. SENSOR_ATTR_PWM(3),
  1429. SENSOR_ATTR_PWM(4),
  1430. SENSOR_ATTR_PWM(5),
  1431. SENSOR_ATTR_PWM(6),
  1432. SENSOR_ATTR_PWM(7),
  1433. SENSOR_ATTR_PWM(8),
  1434. };
  1435. static const struct sensor_device_attribute_2 sda_single_files[] = {
  1436. SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
  1437. store_chassis_clear, ALARM_STATUS, 46),
  1438. SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
  1439. store_beep_enable, NOT_USED, NOT_USED),
  1440. SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
  1441. store_fanin, FANIN_TOL, NOT_USED),
  1442. SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
  1443. store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
  1444. SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
  1445. store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
  1446. SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
  1447. store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
  1448. };
  1449. /*
  1450. * Driver interface
  1451. */
  1452. static void w83795_init_client(struct i2c_client *client)
  1453. {
  1454. u8 config;
  1455. if (reset)
  1456. w83795_write(client, W83795_REG_CONFIG, 0x80);
  1457. /* Start monitoring if needed */
  1458. config = w83795_read(client, W83795_REG_CONFIG);
  1459. if (!(config & W83795_REG_CONFIG_START)) {
  1460. dev_info(&client->dev, "Enabling monitoring operations\n");
  1461. w83795_write(client, W83795_REG_CONFIG,
  1462. config | W83795_REG_CONFIG_START);
  1463. }
  1464. }
  1465. static int w83795_get_device_id(struct i2c_client *client)
  1466. {
  1467. int device_id;
  1468. device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
  1469. /* Special case for rev. A chips; can't be checked first because later
  1470. revisions emulate this for compatibility */
  1471. if (device_id < 0 || (device_id & 0xf0) != 0x50) {
  1472. int alt_id;
  1473. alt_id = i2c_smbus_read_byte_data(client,
  1474. W83795_REG_DEVICEID_A);
  1475. if (alt_id == 0x50)
  1476. device_id = alt_id;
  1477. }
  1478. return device_id;
  1479. }
  1480. /* Return 0 if detection is successful, -ENODEV otherwise */
  1481. static int w83795_detect(struct i2c_client *client,
  1482. struct i2c_board_info *info)
  1483. {
  1484. int bank, vendor_id, device_id, expected, i2c_addr, config;
  1485. struct i2c_adapter *adapter = client->adapter;
  1486. unsigned short address = client->addr;
  1487. const char *chip_name;
  1488. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  1489. return -ENODEV;
  1490. bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1491. if (bank < 0 || (bank & 0x7c)) {
  1492. dev_dbg(&adapter->dev,
  1493. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1494. address, "bank");
  1495. return -ENODEV;
  1496. }
  1497. /* Check Nuvoton vendor ID */
  1498. vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
  1499. expected = bank & 0x80 ? 0x5c : 0xa3;
  1500. if (vendor_id != expected) {
  1501. dev_dbg(&adapter->dev,
  1502. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1503. address, "vendor id");
  1504. return -ENODEV;
  1505. }
  1506. /* Check device ID */
  1507. device_id = w83795_get_device_id(client) |
  1508. (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
  1509. if ((device_id >> 4) != 0x795) {
  1510. dev_dbg(&adapter->dev,
  1511. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1512. address, "device id\n");
  1513. return -ENODEV;
  1514. }
  1515. /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
  1516. should match */
  1517. if ((bank & 0x07) == 0) {
  1518. i2c_addr = i2c_smbus_read_byte_data(client,
  1519. W83795_REG_I2C_ADDR);
  1520. if ((i2c_addr & 0x7f) != address) {
  1521. dev_dbg(&adapter->dev,
  1522. "w83795: Detection failed at addr 0x%02hx, "
  1523. "check %s\n", address, "i2c addr");
  1524. return -ENODEV;
  1525. }
  1526. }
  1527. /* Check 795 chip type: 795G or 795ADG
  1528. Usually we don't write to chips during detection, but here we don't
  1529. quite have the choice; hopefully it's OK, we are about to return
  1530. success anyway */
  1531. if ((bank & 0x07) != 0)
  1532. i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
  1533. bank & ~0x07);
  1534. config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
  1535. if (config & W83795_REG_CONFIG_CONFIG48)
  1536. chip_name = "w83795adg";
  1537. else
  1538. chip_name = "w83795g";
  1539. strlcpy(info->type, chip_name, I2C_NAME_SIZE);
  1540. dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
  1541. 'A' + (device_id & 0xf), address);
  1542. return 0;
  1543. }
  1544. static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
  1545. const struct device_attribute *))
  1546. {
  1547. struct w83795_data *data = dev_get_drvdata(dev);
  1548. int err, i, j;
  1549. for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
  1550. if (!(data->has_in & (1 << i)))
  1551. continue;
  1552. for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
  1553. err = fn(dev, &w83795_in[i][j].dev_attr);
  1554. if (err)
  1555. return err;
  1556. }
  1557. }
  1558. for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
  1559. if (!(data->has_fan & (1 << i)))
  1560. continue;
  1561. for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
  1562. err = fn(dev, &w83795_fan[i][j].dev_attr);
  1563. if (err)
  1564. return err;
  1565. }
  1566. }
  1567. for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
  1568. err = fn(dev, &sda_single_files[i].dev_attr);
  1569. if (err)
  1570. return err;
  1571. }
  1572. for (i = 0; i < data->has_pwm; i++) {
  1573. for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
  1574. err = fn(dev, &w83795_pwm[i][j].dev_attr);
  1575. if (err)
  1576. return err;
  1577. }
  1578. }
  1579. for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
  1580. if (!(data->has_temp & (1 << i)))
  1581. continue;
  1582. for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
  1583. err = fn(dev, &w83795_temp[i][j].dev_attr);
  1584. if (err)
  1585. return err;
  1586. }
  1587. }
  1588. if (data->enable_dts != 0) {
  1589. for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
  1590. if (!(data->has_dts & (1 << i)))
  1591. continue;
  1592. for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
  1593. err = fn(dev, &w83795_dts[i][j].dev_attr);
  1594. if (err)
  1595. return err;
  1596. }
  1597. }
  1598. }
  1599. return 0;
  1600. }
  1601. /* We need a wrapper that fits in w83795_handle_files */
  1602. static int device_remove_file_wrapper(struct device *dev,
  1603. const struct device_attribute *attr)
  1604. {
  1605. device_remove_file(dev, attr);
  1606. return 0;
  1607. }
  1608. static int w83795_probe(struct i2c_client *client,
  1609. const struct i2c_device_id *id)
  1610. {
  1611. int i;
  1612. u8 tmp;
  1613. struct device *dev = &client->dev;
  1614. struct w83795_data *data;
  1615. int err = 0;
  1616. data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
  1617. if (!data) {
  1618. err = -ENOMEM;
  1619. goto exit;
  1620. }
  1621. i2c_set_clientdata(client, data);
  1622. data->chip_type = id->driver_data;
  1623. data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1624. mutex_init(&data->update_lock);
  1625. /* Initialize the chip */
  1626. w83795_init_client(client);
  1627. data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1);
  1628. data->has_in |= w83795_read(client, W83795_REG_VOLT_CTRL2) << 8;
  1629. /* VSEN11-9 not for 795adg */
  1630. if (data->chip_type == w83795adg)
  1631. data->has_in &= 0xf8ff;
  1632. data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1);
  1633. data->has_fan |= w83795_read(client, W83795_REG_FANIN_CTRL2) << 8;
  1634. /* VDSEN12-17 and TR1-6, TD1-4 use same register */
  1635. tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
  1636. if (tmp & 0x20)
  1637. data->enable_dts = 1;
  1638. else
  1639. data->enable_dts = 0;
  1640. data->has_temp = 0;
  1641. data->temp_mode = 0;
  1642. if (tmp & 0x08) {
  1643. if (tmp & 0x04)
  1644. data->has_temp |= 0x20;
  1645. else
  1646. data->has_in |= 0x10000;
  1647. }
  1648. if (tmp & 0x02) {
  1649. if (tmp & 0x01)
  1650. data->has_temp |= 0x10;
  1651. else
  1652. data->has_in |= 0x8000;
  1653. }
  1654. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1655. if (tmp & 0x40) {
  1656. data->has_temp |= 0x08;
  1657. if (!(tmp & 0x80))
  1658. data->temp_mode |= 0x08;
  1659. } else if (tmp & 0x80) {
  1660. data->has_in |= 0x100000;
  1661. }
  1662. if (tmp & 0x10) {
  1663. data->has_temp |= 0x04;
  1664. if (!(tmp & 0x20))
  1665. data->temp_mode |= 0x04;
  1666. } else if (tmp & 0x20) {
  1667. data->has_in |= 0x80000;
  1668. }
  1669. if (tmp & 0x04) {
  1670. data->has_temp |= 0x02;
  1671. if (!(tmp & 0x08))
  1672. data->temp_mode |= 0x02;
  1673. } else if (tmp & 0x08) {
  1674. data->has_in |= 0x40000;
  1675. }
  1676. if (tmp & 0x01) {
  1677. data->has_temp |= 0x01;
  1678. if (!(tmp & 0x02))
  1679. data->temp_mode |= 0x01;
  1680. } else if (tmp & 0x02) {
  1681. data->has_in |= 0x20000;
  1682. }
  1683. /* Check DTS enable status */
  1684. if (data->enable_dts == 0) {
  1685. data->has_dts = 0;
  1686. } else {
  1687. if (1 & w83795_read(client, W83795_REG_DTSC))
  1688. data->enable_dts |= 2;
  1689. data->has_dts = w83795_read(client, W83795_REG_DTSE);
  1690. }
  1691. /* First update the voltages measured value and limits */
  1692. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  1693. if (!(data->has_in & (1 << i)))
  1694. continue;
  1695. data->in[i][IN_MAX] =
  1696. w83795_read(client, W83795_REG_IN[i][IN_MAX]);
  1697. data->in[i][IN_LOW] =
  1698. w83795_read(client, W83795_REG_IN[i][IN_LOW]);
  1699. tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
  1700. tmp |= (w83795_read(client, W83795_REG_VRLSB)
  1701. >> VRLSB_SHIFT) & 0x03;
  1702. data->in[i][IN_READ] = tmp;
  1703. }
  1704. for (i = 0; i < IN_LSB_REG_NUM; i++) {
  1705. data->in_lsb[i][IN_MAX] =
  1706. w83795_read(client, IN_LSB_REG(i, IN_MAX));
  1707. data->in_lsb[i][IN_LOW] =
  1708. w83795_read(client, IN_LSB_REG(i, IN_LOW));
  1709. }
  1710. data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
  1711. /* First update fan and limits */
  1712. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  1713. if (!(data->has_fan & (1 << i)))
  1714. continue;
  1715. data->fan_min[i] =
  1716. w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
  1717. data->fan_min[i] |=
  1718. (w83795_read(client, W83795_REG_FAN_MIN_LSB(i) >>
  1719. W83795_REG_FAN_MIN_LSB_SHIFT(i))) & 0x0F;
  1720. data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
  1721. data->fan[i] |=
  1722. (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
  1723. }
  1724. /* temperature and limits */
  1725. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  1726. if (!(data->has_temp & (1 << i)))
  1727. continue;
  1728. data->temp[i][TEMP_CRIT] =
  1729. w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
  1730. data->temp[i][TEMP_CRIT_HYST] =
  1731. w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
  1732. data->temp[i][TEMP_WARN] =
  1733. w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
  1734. data->temp[i][TEMP_WARN_HYST] =
  1735. w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
  1736. data->temp[i][TEMP_READ] =
  1737. w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
  1738. data->temp_read_vrlsb[i] =
  1739. w83795_read(client, W83795_REG_VRLSB);
  1740. }
  1741. /* dts temperature and limits */
  1742. if (data->enable_dts != 0) {
  1743. data->dts_ext[DTS_CRIT] =
  1744. w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
  1745. data->dts_ext[DTS_CRIT_HYST] =
  1746. w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
  1747. data->dts_ext[DTS_WARN] =
  1748. w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
  1749. data->dts_ext[DTS_WARN_HYST] =
  1750. w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
  1751. for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
  1752. if (!(data->has_dts & (1 << i)))
  1753. continue;
  1754. data->dts[i] = w83795_read(client, W83795_REG_DTS(i));
  1755. data->dts_read_vrlsb[i] =
  1756. w83795_read(client, W83795_REG_VRLSB);
  1757. }
  1758. }
  1759. /* First update temp source selction */
  1760. for (i = 0; i < 3; i++)
  1761. data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
  1762. /* pwm and smart fan */
  1763. if (data->chip_type == w83795g)
  1764. data->has_pwm = 8;
  1765. else
  1766. data->has_pwm = 2;
  1767. data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
  1768. data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
  1769. /* w83795adg only support pwm2-0 */
  1770. for (i = 0; i < W83795_REG_TEMP_NUM; i++)
  1771. data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
  1772. data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
  1773. for (i = 0; i < data->has_pwm; i++) {
  1774. for (tmp = 0; tmp < 5; tmp++) {
  1775. data->pwm[i][tmp] =
  1776. w83795_read(client, W83795_REG_PWM(i, tmp));
  1777. }
  1778. }
  1779. for (i = 0; i < 8; i++) {
  1780. data->target_speed[i] =
  1781. w83795_read(client, W83795_REG_FTSH(i)) << 4;
  1782. data->target_speed[i] |=
  1783. w83795_read(client, W83795_REG_FTSL(i)) >> 4;
  1784. }
  1785. data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
  1786. for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
  1787. data->pwm_temp[i][TEMP_PWM_TTTI] =
  1788. w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
  1789. data->pwm_temp[i][TEMP_PWM_CTFS] =
  1790. w83795_read(client, W83795_REG_CTFS(i));
  1791. tmp = w83795_read(client, W83795_REG_HT(i));
  1792. data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
  1793. data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
  1794. }
  1795. for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
  1796. for (tmp = 0; tmp < 7; tmp++) {
  1797. data->sf4_reg[i][SF4_TEMP][tmp] =
  1798. w83795_read(client,
  1799. W83795_REG_SF4_TEMP(i, tmp));
  1800. data->sf4_reg[i][SF4_PWM][tmp] =
  1801. w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
  1802. }
  1803. }
  1804. /* Setup PWM Register */
  1805. for (i = 0; i < 3; i++) {
  1806. data->setup_pwm[i] =
  1807. w83795_read(client, W83795_REG_SETUP_PWM(i));
  1808. }
  1809. /* alarm and beep */
  1810. for (i = 0; i < ALARM_BEEP_REG_NUM; i++) {
  1811. data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
  1812. data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
  1813. }
  1814. data->beep_enable =
  1815. (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01;
  1816. err = w83795_handle_files(dev, device_create_file);
  1817. if (err)
  1818. goto exit_remove;
  1819. data->hwmon_dev = hwmon_device_register(dev);
  1820. if (IS_ERR(data->hwmon_dev)) {
  1821. err = PTR_ERR(data->hwmon_dev);
  1822. goto exit_remove;
  1823. }
  1824. return 0;
  1825. exit_remove:
  1826. w83795_handle_files(dev, device_remove_file_wrapper);
  1827. kfree(data);
  1828. exit:
  1829. return err;
  1830. }
  1831. static int w83795_remove(struct i2c_client *client)
  1832. {
  1833. struct w83795_data *data = i2c_get_clientdata(client);
  1834. hwmon_device_unregister(data->hwmon_dev);
  1835. w83795_handle_files(&client->dev, device_remove_file_wrapper);
  1836. kfree(data);
  1837. return 0;
  1838. }
  1839. static const struct i2c_device_id w83795_id[] = {
  1840. { "w83795g", w83795g },
  1841. { "w83795adg", w83795adg },
  1842. { }
  1843. };
  1844. MODULE_DEVICE_TABLE(i2c, w83795_id);
  1845. static struct i2c_driver w83795_driver = {
  1846. .driver = {
  1847. .name = "w83795",
  1848. },
  1849. .probe = w83795_probe,
  1850. .remove = w83795_remove,
  1851. .id_table = w83795_id,
  1852. .class = I2C_CLASS_HWMON,
  1853. .detect = w83795_detect,
  1854. .address_list = normal_i2c,
  1855. };
  1856. static int __init sensors_w83795_init(void)
  1857. {
  1858. return i2c_add_driver(&w83795_driver);
  1859. }
  1860. static void __exit sensors_w83795_exit(void)
  1861. {
  1862. i2c_del_driver(&w83795_driver);
  1863. }
  1864. MODULE_AUTHOR("Wei Song");
  1865. MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
  1866. MODULE_LICENSE("GPL");
  1867. module_init(sensors_w83795_init);
  1868. module_exit(sensors_w83795_exit);