iwl3945-base.c 208 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWL3945_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  79. .sw_crypto = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  83. * DMA services
  84. *
  85. * Theory of operation
  86. *
  87. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  88. * of buffer descriptors, each of which points to one or more data buffers for
  89. * the device to read from or fill. Driver and device exchange status of each
  90. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  91. * entries in each circular buffer, to protect against confusing empty and full
  92. * queue states.
  93. *
  94. * The device reads or writes the data in the queues via the device's several
  95. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  96. *
  97. * For Tx queue, there are low mark and high mark limits. If, after queuing
  98. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  99. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  100. * Tx queue resumed.
  101. *
  102. * The 3945 operates with six queues: One receive queue, one transmit queue
  103. * (#4) for sending commands to the device firmware, and four transmit queues
  104. * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
  105. ***************************************************/
  106. /**
  107. * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
  108. */
  109. static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  110. int count, int slots_num, u32 id)
  111. {
  112. q->n_bd = count;
  113. q->n_window = slots_num;
  114. q->id = id;
  115. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  116. * and iwl_queue_dec_wrap are broken. */
  117. BUG_ON(!is_power_of_2(count));
  118. /* slots_num must be power-of-two size, otherwise
  119. * get_cmd_index is broken. */
  120. BUG_ON(!is_power_of_2(slots_num));
  121. q->low_mark = q->n_window / 4;
  122. if (q->low_mark < 4)
  123. q->low_mark = 4;
  124. q->high_mark = q->n_window / 8;
  125. if (q->high_mark < 2)
  126. q->high_mark = 2;
  127. q->write_ptr = q->read_ptr = 0;
  128. return 0;
  129. }
  130. /**
  131. * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  132. */
  133. static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
  134. struct iwl_tx_queue *txq, u32 id)
  135. {
  136. struct pci_dev *dev = priv->pci_dev;
  137. /* Driver private data, only for Tx (not command) queues,
  138. * not shared with device. */
  139. if (id != IWL_CMD_QUEUE_NUM) {
  140. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  141. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  142. if (!txq->txb) {
  143. IWL_ERR(priv, "kmalloc for auxiliary BD "
  144. "structures failed\n");
  145. goto error;
  146. }
  147. } else
  148. txq->txb = NULL;
  149. /* Circular buffer of transmit frame descriptors (TFDs),
  150. * shared with device */
  151. txq->tfds39 = pci_alloc_consistent(dev,
  152. sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX,
  153. &txq->q.dma_addr);
  154. if (!txq->tfds39) {
  155. IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
  156. sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX);
  157. goto error;
  158. }
  159. txq->q.id = id;
  160. return 0;
  161. error:
  162. kfree(txq->txb);
  163. txq->txb = NULL;
  164. return -ENOMEM;
  165. }
  166. /**
  167. * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
  168. */
  169. int iwl3945_tx_queue_init(struct iwl_priv *priv,
  170. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  171. {
  172. int len, i;
  173. int rc = 0;
  174. /*
  175. * Alloc buffer array for commands (Tx or other types of commands).
  176. * For the command queue (#4), allocate command space + one big
  177. * command for scan, since scan command is very huge; the system will
  178. * not have two scans at the same time, so only one is needed.
  179. * For data Tx queues (all other queues), no super-size command
  180. * space is needed.
  181. */
  182. len = sizeof(struct iwl_cmd);
  183. for (i = 0; i <= slots_num; i++) {
  184. if (i == slots_num) {
  185. if (txq_id == IWL_CMD_QUEUE_NUM)
  186. len += IWL_MAX_SCAN_SIZE;
  187. else
  188. continue;
  189. }
  190. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  191. if (!txq->cmd[i])
  192. goto err;
  193. }
  194. /* Alloc driver data array and TFD circular buffer */
  195. rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
  196. if (rc)
  197. goto err;
  198. txq->need_update = 0;
  199. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  200. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  201. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  202. /* Initialize queue high/low-water, head/tail indexes */
  203. iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  204. /* Tell device where to find queue, enable DMA channel. */
  205. iwl3945_hw_tx_queue_init(priv, txq);
  206. return 0;
  207. err:
  208. for (i = 0; i < slots_num; i++) {
  209. kfree(txq->cmd[i]);
  210. txq->cmd[i] = NULL;
  211. }
  212. if (txq_id == IWL_CMD_QUEUE_NUM) {
  213. kfree(txq->cmd[slots_num]);
  214. txq->cmd[slots_num] = NULL;
  215. }
  216. return -ENOMEM;
  217. }
  218. /**
  219. * iwl3945_tx_queue_free - Deallocate DMA queue.
  220. * @txq: Transmit queue to deallocate.
  221. *
  222. * Empty queue by removing and destroying all BD's.
  223. * Free all buffers.
  224. * 0-fill, but do not free "txq" descriptor structure.
  225. */
  226. void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  227. {
  228. struct iwl_queue *q = &txq->q;
  229. struct pci_dev *dev = priv->pci_dev;
  230. int len, i;
  231. if (q->n_bd == 0)
  232. return;
  233. /* first, empty all BD's */
  234. for (; q->write_ptr != q->read_ptr;
  235. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  236. priv->cfg->ops->lib->txq_free_tfd(priv, txq);
  237. len = sizeof(struct iwl_cmd) * q->n_window;
  238. if (q->id == IWL_CMD_QUEUE_NUM)
  239. len += IWL_MAX_SCAN_SIZE;
  240. /* De-alloc array of command/tx buffers */
  241. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  242. kfree(txq->cmd[i]);
  243. /* De-alloc circular buffer of TFDs */
  244. if (txq->q.n_bd)
  245. pci_free_consistent(dev, sizeof(struct iwl3945_tfd) *
  246. txq->q.n_bd, txq->tfds39, txq->q.dma_addr);
  247. /* De-alloc array of per-TFD driver data */
  248. kfree(txq->txb);
  249. txq->txb = NULL;
  250. /* 0-fill queue descriptor structure */
  251. memset(txq, 0, sizeof(*txq));
  252. }
  253. /*************** STATION TABLE MANAGEMENT ****
  254. * mac80211 should be examined to determine if sta_info is duplicating
  255. * the functionality provided here
  256. */
  257. /**************************************************************/
  258. #if 0 /* temporary disable till we add real remove station */
  259. /**
  260. * iwl3945_remove_station - Remove driver's knowledge of station.
  261. *
  262. * NOTE: This does not remove station from device's station table.
  263. */
  264. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  265. {
  266. int index = IWL_INVALID_STATION;
  267. int i;
  268. unsigned long flags;
  269. spin_lock_irqsave(&priv->sta_lock, flags);
  270. if (is_ap)
  271. index = IWL_AP_ID;
  272. else if (is_broadcast_ether_addr(addr))
  273. index = priv->hw_params.bcast_sta_id;
  274. else
  275. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  276. if (priv->stations_39[i].used &&
  277. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  278. addr)) {
  279. index = i;
  280. break;
  281. }
  282. if (unlikely(index == IWL_INVALID_STATION))
  283. goto out;
  284. if (priv->stations_39[index].used) {
  285. priv->stations_39[index].used = 0;
  286. priv->num_stations--;
  287. }
  288. BUG_ON(priv->num_stations < 0);
  289. out:
  290. spin_unlock_irqrestore(&priv->sta_lock, flags);
  291. return 0;
  292. }
  293. #endif
  294. /**
  295. * iwl3945_clear_stations_table - Clear the driver's station table
  296. *
  297. * NOTE: This does not clear or otherwise alter the device's station table.
  298. */
  299. static void iwl3945_clear_stations_table(struct iwl_priv *priv)
  300. {
  301. unsigned long flags;
  302. spin_lock_irqsave(&priv->sta_lock, flags);
  303. priv->num_stations = 0;
  304. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  305. spin_unlock_irqrestore(&priv->sta_lock, flags);
  306. }
  307. /**
  308. * iwl3945_add_station - Add station to station tables in driver and device
  309. */
  310. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  311. {
  312. int i;
  313. int index = IWL_INVALID_STATION;
  314. struct iwl3945_station_entry *station;
  315. unsigned long flags_spin;
  316. u8 rate;
  317. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  318. if (is_ap)
  319. index = IWL_AP_ID;
  320. else if (is_broadcast_ether_addr(addr))
  321. index = priv->hw_params.bcast_sta_id;
  322. else
  323. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  324. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  325. addr)) {
  326. index = i;
  327. break;
  328. }
  329. if (!priv->stations_39[i].used &&
  330. index == IWL_INVALID_STATION)
  331. index = i;
  332. }
  333. /* These two conditions has the same outcome but keep them separate
  334. since they have different meaning */
  335. if (unlikely(index == IWL_INVALID_STATION)) {
  336. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  337. return index;
  338. }
  339. if (priv->stations_39[index].used &&
  340. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  341. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  342. return index;
  343. }
  344. IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
  345. station = &priv->stations_39[index];
  346. station->used = 1;
  347. priv->num_stations++;
  348. /* Set up the REPLY_ADD_STA command to send to device */
  349. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  350. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  351. station->sta.mode = 0;
  352. station->sta.sta.sta_id = index;
  353. station->sta.station_flags = 0;
  354. if (priv->band == IEEE80211_BAND_5GHZ)
  355. rate = IWL_RATE_6M_PLCP;
  356. else
  357. rate = IWL_RATE_1M_PLCP;
  358. /* Turn on both antennas for the station... */
  359. station->sta.rate_n_flags =
  360. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  361. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  362. /* Add station to device's station table */
  363. iwl3945_send_add_station(priv, &station->sta, flags);
  364. return index;
  365. }
  366. int iwl3945_send_statistics_request(struct iwl_priv *priv)
  367. {
  368. u32 val = 0;
  369. struct iwl_host_cmd cmd = {
  370. .id = REPLY_STATISTICS_CMD,
  371. .len = sizeof(val),
  372. .data = &val,
  373. };
  374. return iwl_send_cmd_sync(priv, &cmd);
  375. }
  376. /**
  377. * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
  378. * @band: 2.4 or 5 GHz band
  379. * @channel: Any channel valid for the requested band
  380. * In addition to setting the staging RXON, priv->band is also set.
  381. *
  382. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  383. * in the staging RXON flag structure based on the band
  384. */
  385. static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
  386. enum ieee80211_band band,
  387. u16 channel)
  388. {
  389. if (!iwl3945_get_channel_info(priv, band, channel)) {
  390. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  391. channel, band);
  392. return -EINVAL;
  393. }
  394. if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
  395. (priv->band == band))
  396. return 0;
  397. priv->staging39_rxon.channel = cpu_to_le16(channel);
  398. if (band == IEEE80211_BAND_5GHZ)
  399. priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  400. else
  401. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  402. priv->band = band;
  403. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  404. return 0;
  405. }
  406. /**
  407. * iwl3945_check_rxon_cmd - validate RXON structure is valid
  408. *
  409. * NOTE: This is really only useful during development and can eventually
  410. * be #ifdef'd out once the driver is stable and folks aren't actively
  411. * making changes
  412. */
  413. static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
  414. {
  415. int error = 0;
  416. int counter = 1;
  417. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  418. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  419. error |= le32_to_cpu(rxon->flags &
  420. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  421. RXON_FLG_RADAR_DETECT_MSK));
  422. if (error)
  423. IWL_WARN(priv, "check 24G fields %d | %d\n",
  424. counter++, error);
  425. } else {
  426. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  427. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  428. if (error)
  429. IWL_WARN(priv, "check 52 fields %d | %d\n",
  430. counter++, error);
  431. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  432. if (error)
  433. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  434. counter++, error);
  435. }
  436. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  437. if (error)
  438. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  439. /* make sure basic rates 6Mbps and 1Mbps are supported */
  440. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  441. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  442. if (error)
  443. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  444. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  445. if (error)
  446. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  447. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  448. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  449. if (error)
  450. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  451. counter++, error);
  452. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  453. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  454. if (error)
  455. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  456. counter++, error);
  457. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  458. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  459. if (error)
  460. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  461. counter++, error);
  462. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  463. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  464. RXON_FLG_ANT_A_MSK)) == 0);
  465. if (error)
  466. IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
  467. if (error)
  468. IWL_WARN(priv, "Tuning to channel %d\n",
  469. le16_to_cpu(rxon->channel));
  470. if (error) {
  471. IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
  472. return -1;
  473. }
  474. return 0;
  475. }
  476. /**
  477. * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  478. * @priv: staging_rxon is compared to active_rxon
  479. *
  480. * If the RXON structure is changing enough to require a new tune,
  481. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  482. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  483. */
  484. static int iwl3945_full_rxon_required(struct iwl_priv *priv)
  485. {
  486. /* These items are only settable from the full RXON command */
  487. if (!(iwl3945_is_associated(priv)) ||
  488. compare_ether_addr(priv->staging39_rxon.bssid_addr,
  489. priv->active39_rxon.bssid_addr) ||
  490. compare_ether_addr(priv->staging39_rxon.node_addr,
  491. priv->active39_rxon.node_addr) ||
  492. compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
  493. priv->active39_rxon.wlap_bssid_addr) ||
  494. (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
  495. (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
  496. (priv->staging39_rxon.air_propagation !=
  497. priv->active39_rxon.air_propagation) ||
  498. (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
  499. return 1;
  500. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  501. * be updated with the RXON_ASSOC command -- however only some
  502. * flag transitions are allowed using RXON_ASSOC */
  503. /* Check if we are not switching bands */
  504. if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  505. (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
  506. return 1;
  507. /* Check if we are switching association toggle */
  508. if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  509. (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  510. return 1;
  511. return 0;
  512. }
  513. static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
  514. {
  515. int rc = 0;
  516. struct iwl_rx_packet *res = NULL;
  517. struct iwl3945_rxon_assoc_cmd rxon_assoc;
  518. struct iwl_host_cmd cmd = {
  519. .id = REPLY_RXON_ASSOC,
  520. .len = sizeof(rxon_assoc),
  521. .meta.flags = CMD_WANT_SKB,
  522. .data = &rxon_assoc,
  523. };
  524. const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
  525. const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
  526. if ((rxon1->flags == rxon2->flags) &&
  527. (rxon1->filter_flags == rxon2->filter_flags) &&
  528. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  529. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  530. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  531. return 0;
  532. }
  533. rxon_assoc.flags = priv->staging39_rxon.flags;
  534. rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
  535. rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
  536. rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
  537. rxon_assoc.reserved = 0;
  538. rc = iwl_send_cmd_sync(priv, &cmd);
  539. if (rc)
  540. return rc;
  541. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  542. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  543. IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
  544. rc = -EIO;
  545. }
  546. priv->alloc_rxb_skb--;
  547. dev_kfree_skb_any(cmd.meta.u.skb);
  548. return rc;
  549. }
  550. /**
  551. * iwl3945_commit_rxon - commit staging_rxon to hardware
  552. *
  553. * The RXON command in staging_rxon is committed to the hardware and
  554. * the active_rxon structure is updated with the new data. This
  555. * function correctly transitions out of the RXON_ASSOC_MSK state if
  556. * a HW tune is required based on the RXON structure changes.
  557. */
  558. static int iwl3945_commit_rxon(struct iwl_priv *priv)
  559. {
  560. /* cast away the const for active_rxon in this function */
  561. struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
  562. int rc = 0;
  563. if (!iwl_is_alive(priv))
  564. return -1;
  565. /* always get timestamp with Rx frame */
  566. priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  567. /* select antenna */
  568. priv->staging39_rxon.flags &=
  569. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  570. priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
  571. rc = iwl3945_check_rxon_cmd(priv);
  572. if (rc) {
  573. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  574. return -EINVAL;
  575. }
  576. /* If we don't need to send a full RXON, we can use
  577. * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
  578. * and other flags for the current radio configuration. */
  579. if (!iwl3945_full_rxon_required(priv)) {
  580. rc = iwl3945_send_rxon_assoc(priv);
  581. if (rc) {
  582. IWL_ERR(priv, "Error setting RXON_ASSOC "
  583. "configuration (%d).\n", rc);
  584. return rc;
  585. }
  586. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  587. return 0;
  588. }
  589. /* If we are currently associated and the new config requires
  590. * an RXON_ASSOC and the new config wants the associated mask enabled,
  591. * we must clear the associated from the active configuration
  592. * before we apply the new config */
  593. if (iwl3945_is_associated(priv) &&
  594. (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  595. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  596. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  597. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  598. sizeof(struct iwl3945_rxon_cmd),
  599. &priv->active39_rxon);
  600. /* If the mask clearing failed then we set
  601. * active_rxon back to what it was previously */
  602. if (rc) {
  603. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  604. IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
  605. "configuration (%d).\n", rc);
  606. return rc;
  607. }
  608. }
  609. IWL_DEBUG_INFO("Sending RXON\n"
  610. "* with%s RXON_FILTER_ASSOC_MSK\n"
  611. "* channel = %d\n"
  612. "* bssid = %pM\n",
  613. ((priv->staging39_rxon.filter_flags &
  614. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  615. le16_to_cpu(priv->staging39_rxon.channel),
  616. priv->staging_rxon.bssid_addr);
  617. /* Apply the new configuration */
  618. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  619. sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
  620. if (rc) {
  621. IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
  622. return rc;
  623. }
  624. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  625. iwl3945_clear_stations_table(priv);
  626. /* If we issue a new RXON command which required a tune then we must
  627. * send a new TXPOWER command or we won't be able to Tx any frames */
  628. rc = iwl3945_hw_reg_send_txpower(priv);
  629. if (rc) {
  630. IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
  631. return rc;
  632. }
  633. /* Add the broadcast address so we can send broadcast frames */
  634. if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
  635. IWL_INVALID_STATION) {
  636. IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
  637. return -EIO;
  638. }
  639. /* If we have set the ASSOC_MSK and we are in BSS mode then
  640. * add the IWL_AP_ID to the station rate table */
  641. if (iwl3945_is_associated(priv) &&
  642. (priv->iw_mode == NL80211_IFTYPE_STATION))
  643. if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
  644. == IWL_INVALID_STATION) {
  645. IWL_ERR(priv, "Error adding AP address for transmit\n");
  646. return -EIO;
  647. }
  648. /* Init the hardware's rate fallback order based on the band */
  649. rc = iwl3945_init_hw_rate_table(priv);
  650. if (rc) {
  651. IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
  652. return -EIO;
  653. }
  654. return 0;
  655. }
  656. static int iwl3945_send_bt_config(struct iwl_priv *priv)
  657. {
  658. struct iwl_bt_cmd bt_cmd = {
  659. .flags = 3,
  660. .lead_time = 0xAA,
  661. .max_kill = 1,
  662. .kill_ack_mask = 0,
  663. .kill_cts_mask = 0,
  664. };
  665. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  666. sizeof(bt_cmd), &bt_cmd);
  667. }
  668. static int iwl3945_send_scan_abort(struct iwl_priv *priv)
  669. {
  670. int rc = 0;
  671. struct iwl_rx_packet *res;
  672. struct iwl_host_cmd cmd = {
  673. .id = REPLY_SCAN_ABORT_CMD,
  674. .meta.flags = CMD_WANT_SKB,
  675. };
  676. /* If there isn't a scan actively going on in the hardware
  677. * then we are in between scan bands and not actually
  678. * actively scanning, so don't send the abort command */
  679. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  680. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  681. return 0;
  682. }
  683. rc = iwl_send_cmd_sync(priv, &cmd);
  684. if (rc) {
  685. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  686. return rc;
  687. }
  688. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  689. if (res->u.status != CAN_ABORT_STATUS) {
  690. /* The scan abort will return 1 for success or
  691. * 2 for "failure". A failure condition can be
  692. * due to simply not being in an active scan which
  693. * can occur if we send the scan abort before we
  694. * the microcode has notified us that a scan is
  695. * completed. */
  696. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  697. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  698. clear_bit(STATUS_SCAN_HW, &priv->status);
  699. }
  700. dev_kfree_skb_any(cmd.meta.u.skb);
  701. return rc;
  702. }
  703. static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
  704. struct iwl_cmd *cmd, struct sk_buff *skb)
  705. {
  706. struct iwl_rx_packet *res = NULL;
  707. if (!skb) {
  708. IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
  709. return 1;
  710. }
  711. res = (struct iwl_rx_packet *)skb->data;
  712. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  713. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  714. res->hdr.flags);
  715. return 1;
  716. }
  717. switch (res->u.add_sta.status) {
  718. case ADD_STA_SUCCESS_MSK:
  719. break;
  720. default:
  721. break;
  722. }
  723. /* We didn't cache the SKB; let the caller free it */
  724. return 1;
  725. }
  726. int iwl3945_send_add_station(struct iwl_priv *priv,
  727. struct iwl3945_addsta_cmd *sta, u8 flags)
  728. {
  729. struct iwl_rx_packet *res = NULL;
  730. int rc = 0;
  731. struct iwl_host_cmd cmd = {
  732. .id = REPLY_ADD_STA,
  733. .len = sizeof(struct iwl3945_addsta_cmd),
  734. .meta.flags = flags,
  735. .data = sta,
  736. };
  737. if (flags & CMD_ASYNC)
  738. cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
  739. else
  740. cmd.meta.flags |= CMD_WANT_SKB;
  741. rc = iwl_send_cmd(priv, &cmd);
  742. if (rc || (flags & CMD_ASYNC))
  743. return rc;
  744. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  745. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  746. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  747. res->hdr.flags);
  748. rc = -EIO;
  749. }
  750. if (rc == 0) {
  751. switch (res->u.add_sta.status) {
  752. case ADD_STA_SUCCESS_MSK:
  753. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  754. break;
  755. default:
  756. rc = -EIO;
  757. IWL_WARN(priv, "REPLY_ADD_STA failed\n");
  758. break;
  759. }
  760. }
  761. priv->alloc_rxb_skb--;
  762. dev_kfree_skb_any(cmd.meta.u.skb);
  763. return rc;
  764. }
  765. static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
  766. struct ieee80211_key_conf *keyconf,
  767. u8 sta_id)
  768. {
  769. unsigned long flags;
  770. __le16 key_flags = 0;
  771. switch (keyconf->alg) {
  772. case ALG_CCMP:
  773. key_flags |= STA_KEY_FLG_CCMP;
  774. key_flags |= cpu_to_le16(
  775. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  776. key_flags &= ~STA_KEY_FLG_INVALID;
  777. break;
  778. case ALG_TKIP:
  779. case ALG_WEP:
  780. default:
  781. return -EINVAL;
  782. }
  783. spin_lock_irqsave(&priv->sta_lock, flags);
  784. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  785. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  786. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  787. keyconf->keylen);
  788. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  789. keyconf->keylen);
  790. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  791. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  792. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  793. spin_unlock_irqrestore(&priv->sta_lock, flags);
  794. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  795. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  796. return 0;
  797. }
  798. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  799. {
  800. unsigned long flags;
  801. spin_lock_irqsave(&priv->sta_lock, flags);
  802. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  803. memset(&priv->stations_39[sta_id].sta.key, 0,
  804. sizeof(struct iwl4965_keyinfo));
  805. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  806. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  807. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  808. spin_unlock_irqrestore(&priv->sta_lock, flags);
  809. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  810. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  811. return 0;
  812. }
  813. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  814. {
  815. struct list_head *element;
  816. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  817. priv->frames_count);
  818. while (!list_empty(&priv->free_frames)) {
  819. element = priv->free_frames.next;
  820. list_del(element);
  821. kfree(list_entry(element, struct iwl3945_frame, list));
  822. priv->frames_count--;
  823. }
  824. if (priv->frames_count) {
  825. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  826. priv->frames_count);
  827. priv->frames_count = 0;
  828. }
  829. }
  830. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  831. {
  832. struct iwl3945_frame *frame;
  833. struct list_head *element;
  834. if (list_empty(&priv->free_frames)) {
  835. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  836. if (!frame) {
  837. IWL_ERR(priv, "Could not allocate frame!\n");
  838. return NULL;
  839. }
  840. priv->frames_count++;
  841. return frame;
  842. }
  843. element = priv->free_frames.next;
  844. list_del(element);
  845. return list_entry(element, struct iwl3945_frame, list);
  846. }
  847. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  848. {
  849. memset(frame, 0, sizeof(*frame));
  850. list_add(&frame->list, &priv->free_frames);
  851. }
  852. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  853. struct ieee80211_hdr *hdr,
  854. int left)
  855. {
  856. if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
  857. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  858. (priv->iw_mode != NL80211_IFTYPE_AP)))
  859. return 0;
  860. if (priv->ibss_beacon->len > left)
  861. return 0;
  862. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  863. return priv->ibss_beacon->len;
  864. }
  865. static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
  866. {
  867. u8 i;
  868. int rate_mask;
  869. /* Set rate mask*/
  870. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  871. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  872. else
  873. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  874. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  875. i = iwl3945_rates[i].next_ieee) {
  876. if (rate_mask & (1 << i))
  877. return iwl3945_rates[i].plcp;
  878. }
  879. /* No valid rate was found. Assign the lowest one */
  880. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  881. return IWL_RATE_1M_PLCP;
  882. else
  883. return IWL_RATE_6M_PLCP;
  884. }
  885. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  886. {
  887. struct iwl3945_frame *frame;
  888. unsigned int frame_size;
  889. int rc;
  890. u8 rate;
  891. frame = iwl3945_get_free_frame(priv);
  892. if (!frame) {
  893. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  894. "command.\n");
  895. return -ENOMEM;
  896. }
  897. rate = iwl3945_rate_get_lowest_plcp(priv);
  898. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  899. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  900. &frame->u.cmd[0]);
  901. iwl3945_free_frame(priv, frame);
  902. return rc;
  903. }
  904. /******************************************************************************
  905. *
  906. * EEPROM related functions
  907. *
  908. ******************************************************************************/
  909. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  910. {
  911. memcpy(mac, priv->eeprom39.mac_address, 6);
  912. }
  913. /*
  914. * Clear the OWNER_MSK, to establish driver (instead of uCode running on
  915. * embedded controller) as EEPROM reader; each read is a series of pulses
  916. * to/from the EEPROM chip, not a single event, so even reads could conflict
  917. * if they weren't arbitrated by some ownership mechanism. Here, the driver
  918. * simply claims ownership, which should be safe when this function is called
  919. * (i.e. before loading uCode!).
  920. */
  921. static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
  922. {
  923. _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
  924. return 0;
  925. }
  926. /**
  927. * iwl3945_eeprom_init - read EEPROM contents
  928. *
  929. * Load the EEPROM contents from adapter into priv->eeprom39
  930. *
  931. * NOTE: This routine uses the non-debug IO access functions.
  932. */
  933. int iwl3945_eeprom_init(struct iwl_priv *priv)
  934. {
  935. u16 *e = (u16 *)&priv->eeprom39;
  936. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  937. int sz = sizeof(priv->eeprom39);
  938. int ret;
  939. u16 addr;
  940. /* The EEPROM structure has several padding buffers within it
  941. * and when adding new EEPROM maps is subject to programmer errors
  942. * which may be very difficult to identify without explicitly
  943. * checking the resulting size of the eeprom map. */
  944. BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
  945. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  946. IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  947. return -ENOENT;
  948. }
  949. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  950. ret = iwl3945_eeprom_acquire_semaphore(priv);
  951. if (ret < 0) {
  952. IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
  953. return -ENOENT;
  954. }
  955. /* eeprom is an array of 16bit values */
  956. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  957. u32 r;
  958. _iwl_write32(priv, CSR_EEPROM_REG,
  959. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  960. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  961. ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
  962. CSR_EEPROM_REG_READ_VALID_MSK,
  963. IWL_EEPROM_ACCESS_TIMEOUT);
  964. if (ret < 0) {
  965. IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
  966. return ret;
  967. }
  968. r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
  969. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  970. }
  971. return 0;
  972. }
  973. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  974. {
  975. if (priv->shared_virt)
  976. pci_free_consistent(priv->pci_dev,
  977. sizeof(struct iwl3945_shared),
  978. priv->shared_virt,
  979. priv->shared_phys);
  980. }
  981. /**
  982. * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
  983. *
  984. * return : set the bit for each supported rate insert in ie
  985. */
  986. static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  987. u16 basic_rate, int *left)
  988. {
  989. u16 ret_rates = 0, bit;
  990. int i;
  991. u8 *cnt = ie;
  992. u8 *rates = ie + 1;
  993. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  994. if (bit & supported_rate) {
  995. ret_rates |= bit;
  996. rates[*cnt] = iwl3945_rates[i].ieee |
  997. ((bit & basic_rate) ? 0x80 : 0x00);
  998. (*cnt)++;
  999. (*left)--;
  1000. if ((*left <= 0) ||
  1001. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1002. break;
  1003. }
  1004. }
  1005. return ret_rates;
  1006. }
  1007. /**
  1008. * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
  1009. */
  1010. static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
  1011. struct ieee80211_mgmt *frame,
  1012. int left)
  1013. {
  1014. int len = 0;
  1015. u8 *pos = NULL;
  1016. u16 active_rates, ret_rates, cck_rates;
  1017. /* Make sure there is enough space for the probe request,
  1018. * two mandatory IEs and the data */
  1019. left -= 24;
  1020. if (left < 0)
  1021. return 0;
  1022. len += 24;
  1023. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1024. memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
  1025. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1026. memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
  1027. frame->seq_ctrl = 0;
  1028. /* fill in our indirect SSID IE */
  1029. /* ...next IE... */
  1030. left -= 2;
  1031. if (left < 0)
  1032. return 0;
  1033. len += 2;
  1034. pos = &(frame->u.probe_req.variable[0]);
  1035. *pos++ = WLAN_EID_SSID;
  1036. *pos++ = 0;
  1037. /* fill in supported rate */
  1038. /* ...next IE... */
  1039. left -= 2;
  1040. if (left < 0)
  1041. return 0;
  1042. /* ... fill it in... */
  1043. *pos++ = WLAN_EID_SUPP_RATES;
  1044. *pos = 0;
  1045. priv->active_rate = priv->rates_mask;
  1046. active_rates = priv->active_rate;
  1047. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1048. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1049. ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
  1050. priv->active_rate_basic, &left);
  1051. active_rates &= ~ret_rates;
  1052. ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
  1053. priv->active_rate_basic, &left);
  1054. active_rates &= ~ret_rates;
  1055. len += 2 + *pos;
  1056. pos += (*pos) + 1;
  1057. if (active_rates == 0)
  1058. goto fill_end;
  1059. /* fill in supported extended rate */
  1060. /* ...next IE... */
  1061. left -= 2;
  1062. if (left < 0)
  1063. return 0;
  1064. /* ... fill it in... */
  1065. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1066. *pos = 0;
  1067. iwl3945_supported_rate_to_ie(pos, active_rates,
  1068. priv->active_rate_basic, &left);
  1069. if (*pos > 0)
  1070. len += 2 + *pos;
  1071. fill_end:
  1072. return (u16)len;
  1073. }
  1074. /*
  1075. * QoS support
  1076. */
  1077. static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
  1078. struct iwl_qosparam_cmd *qos)
  1079. {
  1080. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1081. sizeof(struct iwl_qosparam_cmd), qos);
  1082. }
  1083. static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
  1084. {
  1085. unsigned long flags;
  1086. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1087. return;
  1088. spin_lock_irqsave(&priv->lock, flags);
  1089. priv->qos_data.def_qos_parm.qos_flags = 0;
  1090. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1091. !priv->qos_data.qos_cap.q_AP.txop_request)
  1092. priv->qos_data.def_qos_parm.qos_flags |=
  1093. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1094. if (priv->qos_data.qos_active)
  1095. priv->qos_data.def_qos_parm.qos_flags |=
  1096. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1097. spin_unlock_irqrestore(&priv->lock, flags);
  1098. if (force || iwl3945_is_associated(priv)) {
  1099. IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
  1100. priv->qos_data.qos_active);
  1101. iwl3945_send_qos_params_command(priv,
  1102. &(priv->qos_data.def_qos_parm));
  1103. }
  1104. }
  1105. /*
  1106. * Power management (not Tx power!) functions
  1107. */
  1108. #define MSEC_TO_USEC 1024
  1109. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1110. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1111. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1112. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1113. __constant_cpu_to_le32(X1), \
  1114. __constant_cpu_to_le32(X2), \
  1115. __constant_cpu_to_le32(X3), \
  1116. __constant_cpu_to_le32(X4)}
  1117. /* default power management (not Tx power) table values */
  1118. /* for TIM 0-10 */
  1119. static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
  1120. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1121. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1122. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1123. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1124. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1125. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1126. };
  1127. /* for TIM > 10 */
  1128. static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
  1129. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1130. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1131. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1132. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1133. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1134. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1135. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1136. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1137. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1138. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1139. };
  1140. int iwl3945_power_init_handle(struct iwl_priv *priv)
  1141. {
  1142. int rc = 0, i;
  1143. struct iwl3945_power_mgr *pow_data;
  1144. int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
  1145. u16 pci_pm;
  1146. IWL_DEBUG_POWER("Initialize power \n");
  1147. pow_data = &(priv->power_data_39);
  1148. memset(pow_data, 0, sizeof(*pow_data));
  1149. pow_data->active_index = IWL_POWER_RANGE_0;
  1150. pow_data->dtim_val = 0xffff;
  1151. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1152. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1153. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1154. if (rc != 0)
  1155. return 0;
  1156. else {
  1157. struct iwl_powertable_cmd *cmd;
  1158. IWL_DEBUG_POWER("adjust power command flags\n");
  1159. for (i = 0; i < IWL39_POWER_AC; i++) {
  1160. cmd = &pow_data->pwr_range_0[i].cmd;
  1161. if (pci_pm & 0x1)
  1162. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1163. else
  1164. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1165. }
  1166. }
  1167. return rc;
  1168. }
  1169. static int iwl3945_update_power_cmd(struct iwl_priv *priv,
  1170. struct iwl_powertable_cmd *cmd, u32 mode)
  1171. {
  1172. int rc = 0, i;
  1173. u8 skip;
  1174. u32 max_sleep = 0;
  1175. struct iwl_power_vec_entry *range;
  1176. u8 period = 0;
  1177. struct iwl3945_power_mgr *pow_data;
  1178. if (mode > IWL_POWER_INDEX_5) {
  1179. IWL_DEBUG_POWER("Error invalid power mode \n");
  1180. return -1;
  1181. }
  1182. pow_data = &(priv->power_data_39);
  1183. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1184. range = &pow_data->pwr_range_0[0];
  1185. else
  1186. range = &pow_data->pwr_range_1[1];
  1187. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
  1188. #ifdef IWL_MAC80211_DISABLE
  1189. if (priv->assoc_network != NULL) {
  1190. unsigned long flags;
  1191. period = priv->assoc_network->tim.tim_period;
  1192. }
  1193. #endif /*IWL_MAC80211_DISABLE */
  1194. skip = range[mode].no_dtim;
  1195. if (period == 0) {
  1196. period = 1;
  1197. skip = 0;
  1198. }
  1199. if (skip == 0) {
  1200. max_sleep = period;
  1201. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1202. } else {
  1203. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1204. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1205. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1206. }
  1207. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1208. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1209. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1210. }
  1211. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1212. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1213. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1214. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1215. le32_to_cpu(cmd->sleep_interval[0]),
  1216. le32_to_cpu(cmd->sleep_interval[1]),
  1217. le32_to_cpu(cmd->sleep_interval[2]),
  1218. le32_to_cpu(cmd->sleep_interval[3]),
  1219. le32_to_cpu(cmd->sleep_interval[4]));
  1220. return rc;
  1221. }
  1222. static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
  1223. {
  1224. u32 uninitialized_var(final_mode);
  1225. int rc;
  1226. struct iwl_powertable_cmd cmd;
  1227. /* If on battery, set to 3,
  1228. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1229. * else user level */
  1230. switch (mode) {
  1231. case IWL39_POWER_BATTERY:
  1232. final_mode = IWL_POWER_INDEX_3;
  1233. break;
  1234. case IWL39_POWER_AC:
  1235. final_mode = IWL_POWER_MODE_CAM;
  1236. break;
  1237. default:
  1238. final_mode = mode;
  1239. break;
  1240. }
  1241. iwl3945_update_power_cmd(priv, &cmd, final_mode);
  1242. /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
  1243. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
  1244. sizeof(struct iwl3945_powertable_cmd), &cmd);
  1245. if (final_mode == IWL_POWER_MODE_CAM)
  1246. clear_bit(STATUS_POWER_PMI, &priv->status);
  1247. else
  1248. set_bit(STATUS_POWER_PMI, &priv->status);
  1249. return rc;
  1250. }
  1251. #define MAX_UCODE_BEACON_INTERVAL 1024
  1252. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1253. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  1254. {
  1255. u16 new_val = 0;
  1256. u16 beacon_factor = 0;
  1257. beacon_factor =
  1258. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1259. / MAX_UCODE_BEACON_INTERVAL;
  1260. new_val = beacon_val / beacon_factor;
  1261. return cpu_to_le16(new_val);
  1262. }
  1263. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  1264. {
  1265. u64 interval_tm_unit;
  1266. u64 tsf, result;
  1267. unsigned long flags;
  1268. struct ieee80211_conf *conf = NULL;
  1269. u16 beacon_int = 0;
  1270. conf = ieee80211_get_hw_conf(priv->hw);
  1271. spin_lock_irqsave(&priv->lock, flags);
  1272. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  1273. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1274. tsf = priv->timestamp;
  1275. beacon_int = priv->beacon_int;
  1276. spin_unlock_irqrestore(&priv->lock, flags);
  1277. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  1278. if (beacon_int == 0) {
  1279. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1280. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1281. } else {
  1282. priv->rxon_timing.beacon_interval =
  1283. cpu_to_le16(beacon_int);
  1284. priv->rxon_timing.beacon_interval =
  1285. iwl3945_adjust_beacon_interval(
  1286. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1287. }
  1288. priv->rxon_timing.atim_window = 0;
  1289. } else {
  1290. priv->rxon_timing.beacon_interval =
  1291. iwl3945_adjust_beacon_interval(conf->beacon_int);
  1292. /* TODO: we need to get atim_window from upper stack
  1293. * for now we set to 0 */
  1294. priv->rxon_timing.atim_window = 0;
  1295. }
  1296. interval_tm_unit =
  1297. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1298. result = do_div(tsf, interval_tm_unit);
  1299. priv->rxon_timing.beacon_init_val =
  1300. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1301. IWL_DEBUG_ASSOC
  1302. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1303. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1304. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1305. le16_to_cpu(priv->rxon_timing.atim_window));
  1306. }
  1307. static int iwl3945_scan_initiate(struct iwl_priv *priv)
  1308. {
  1309. if (!iwl_is_ready_rf(priv)) {
  1310. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1311. return -EIO;
  1312. }
  1313. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1314. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1315. return -EAGAIN;
  1316. }
  1317. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1318. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1319. "Queuing.\n");
  1320. return -EAGAIN;
  1321. }
  1322. IWL_DEBUG_INFO("Starting scan...\n");
  1323. if (priv->cfg->sku & IWL_SKU_G)
  1324. priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
  1325. if (priv->cfg->sku & IWL_SKU_A)
  1326. priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
  1327. set_bit(STATUS_SCANNING, &priv->status);
  1328. priv->scan_start = jiffies;
  1329. priv->scan_pass_start = priv->scan_start;
  1330. queue_work(priv->workqueue, &priv->request_scan);
  1331. return 0;
  1332. }
  1333. static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  1334. {
  1335. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  1336. if (hw_decrypt)
  1337. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1338. else
  1339. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1340. return 0;
  1341. }
  1342. static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
  1343. enum ieee80211_band band)
  1344. {
  1345. if (band == IEEE80211_BAND_5GHZ) {
  1346. priv->staging39_rxon.flags &=
  1347. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1348. | RXON_FLG_CCK_MSK);
  1349. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1350. } else {
  1351. /* Copied from iwl3945_bg_post_associate() */
  1352. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1353. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1354. else
  1355. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1356. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1357. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1358. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1359. priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1360. priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1361. }
  1362. }
  1363. /*
  1364. * initialize rxon structure with default values from eeprom
  1365. */
  1366. static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
  1367. int mode)
  1368. {
  1369. const struct iwl_channel_info *ch_info;
  1370. memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
  1371. switch (mode) {
  1372. case NL80211_IFTYPE_AP:
  1373. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
  1374. break;
  1375. case NL80211_IFTYPE_STATION:
  1376. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1377. priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1378. break;
  1379. case NL80211_IFTYPE_ADHOC:
  1380. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1381. priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1382. priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1383. RXON_FILTER_ACCEPT_GRP_MSK;
  1384. break;
  1385. case NL80211_IFTYPE_MONITOR:
  1386. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1387. priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1388. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1389. break;
  1390. default:
  1391. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  1392. break;
  1393. }
  1394. #if 0
  1395. /* TODO: Figure out when short_preamble would be set and cache from
  1396. * that */
  1397. if (!hw_to_local(priv->hw)->short_preamble)
  1398. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1399. else
  1400. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1401. #endif
  1402. ch_info = iwl3945_get_channel_info(priv, priv->band,
  1403. le16_to_cpu(priv->active39_rxon.channel));
  1404. if (!ch_info)
  1405. ch_info = &priv->channel_info[0];
  1406. /*
  1407. * in some case A channels are all non IBSS
  1408. * in this case force B/G channel
  1409. */
  1410. if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
  1411. ch_info = &priv->channel_info[0];
  1412. priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
  1413. if (is_channel_a_band(ch_info))
  1414. priv->band = IEEE80211_BAND_5GHZ;
  1415. else
  1416. priv->band = IEEE80211_BAND_2GHZ;
  1417. iwl3945_set_flags_for_phymode(priv, priv->band);
  1418. priv->staging39_rxon.ofdm_basic_rates =
  1419. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1420. priv->staging39_rxon.cck_basic_rates =
  1421. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1422. }
  1423. static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
  1424. {
  1425. if (mode == NL80211_IFTYPE_ADHOC) {
  1426. const struct iwl_channel_info *ch_info;
  1427. ch_info = iwl3945_get_channel_info(priv,
  1428. priv->band,
  1429. le16_to_cpu(priv->staging39_rxon.channel));
  1430. if (!ch_info || !is_channel_ibss(ch_info)) {
  1431. IWL_ERR(priv, "channel %d not IBSS channel\n",
  1432. le16_to_cpu(priv->staging39_rxon.channel));
  1433. return -EINVAL;
  1434. }
  1435. }
  1436. iwl3945_connection_init_rx_config(priv, mode);
  1437. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1438. iwl3945_clear_stations_table(priv);
  1439. /* don't commit rxon if rf-kill is on*/
  1440. if (!iwl_is_ready_rf(priv))
  1441. return -EAGAIN;
  1442. cancel_delayed_work(&priv->scan_check);
  1443. if (iwl_scan_cancel_timeout(priv, 100)) {
  1444. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1445. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1446. return -EAGAIN;
  1447. }
  1448. iwl3945_commit_rxon(priv);
  1449. return 0;
  1450. }
  1451. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1452. struct ieee80211_tx_info *info,
  1453. struct iwl_cmd *cmd,
  1454. struct sk_buff *skb_frag,
  1455. int last_frag)
  1456. {
  1457. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1458. struct iwl3945_hw_key *keyinfo =
  1459. &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
  1460. switch (keyinfo->alg) {
  1461. case ALG_CCMP:
  1462. tx->sec_ctl = TX_CMD_SEC_CCM;
  1463. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  1464. IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
  1465. break;
  1466. case ALG_TKIP:
  1467. #if 0
  1468. tx->sec_ctl = TX_CMD_SEC_TKIP;
  1469. if (last_frag)
  1470. memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
  1471. 8);
  1472. else
  1473. memset(tx->tkip_mic.byte, 0, 8);
  1474. #endif
  1475. break;
  1476. case ALG_WEP:
  1477. tx->sec_ctl = TX_CMD_SEC_WEP |
  1478. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1479. if (keyinfo->keylen == 13)
  1480. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  1481. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  1482. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1483. "with key %d\n", info->control.hw_key->hw_key_idx);
  1484. break;
  1485. default:
  1486. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  1487. break;
  1488. }
  1489. }
  1490. /*
  1491. * handle build REPLY_TX command notification.
  1492. */
  1493. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  1494. struct iwl_cmd *cmd,
  1495. struct ieee80211_tx_info *info,
  1496. struct ieee80211_hdr *hdr, u8 std_id)
  1497. {
  1498. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1499. __le32 tx_flags = tx->tx_flags;
  1500. __le16 fc = hdr->frame_control;
  1501. u8 rc_flags = info->control.rates[0].flags;
  1502. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1503. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  1504. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1505. if (ieee80211_is_mgmt(fc))
  1506. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1507. if (ieee80211_is_probe_resp(fc) &&
  1508. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1509. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1510. } else {
  1511. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1512. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1513. }
  1514. tx->sta_id = std_id;
  1515. if (ieee80211_has_morefrags(fc))
  1516. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1517. if (ieee80211_is_data_qos(fc)) {
  1518. u8 *qc = ieee80211_get_qos_ctl(hdr);
  1519. tx->tid_tspec = qc[0] & 0xf;
  1520. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1521. } else {
  1522. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1523. }
  1524. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  1525. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1526. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1527. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  1528. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1529. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1530. }
  1531. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1532. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1533. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1534. if (ieee80211_is_mgmt(fc)) {
  1535. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  1536. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  1537. else
  1538. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  1539. } else {
  1540. tx->timeout.pm_frame_timeout = 0;
  1541. #ifdef CONFIG_IWL3945_LEDS
  1542. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  1543. #endif
  1544. }
  1545. tx->driver_txop = 0;
  1546. tx->tx_flags = tx_flags;
  1547. tx->next_frame_len = 0;
  1548. }
  1549. /**
  1550. * iwl3945_get_sta_id - Find station's index within station table
  1551. */
  1552. static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  1553. {
  1554. int sta_id;
  1555. u16 fc = le16_to_cpu(hdr->frame_control);
  1556. /* If this frame is broadcast or management, use broadcast station id */
  1557. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1558. is_multicast_ether_addr(hdr->addr1))
  1559. return priv->hw_params.bcast_sta_id;
  1560. switch (priv->iw_mode) {
  1561. /* If we are a client station in a BSS network, use the special
  1562. * AP station entry (that's the only station we communicate with) */
  1563. case NL80211_IFTYPE_STATION:
  1564. return IWL_AP_ID;
  1565. /* If we are an AP, then find the station, or use BCAST */
  1566. case NL80211_IFTYPE_AP:
  1567. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1568. if (sta_id != IWL_INVALID_STATION)
  1569. return sta_id;
  1570. return priv->hw_params.bcast_sta_id;
  1571. /* If this frame is going out to an IBSS network, find the station,
  1572. * or create a new station table entry */
  1573. case NL80211_IFTYPE_ADHOC: {
  1574. /* Create new station table entry */
  1575. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1576. if (sta_id != IWL_INVALID_STATION)
  1577. return sta_id;
  1578. sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  1579. if (sta_id != IWL_INVALID_STATION)
  1580. return sta_id;
  1581. IWL_DEBUG_DROP("Station %pM not in station map. "
  1582. "Defaulting to broadcast...\n",
  1583. hdr->addr1);
  1584. iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1585. return priv->hw_params.bcast_sta_id;
  1586. }
  1587. /* If we are in monitor mode, use BCAST. This is required for
  1588. * packet injection. */
  1589. case NL80211_IFTYPE_MONITOR:
  1590. return priv->hw_params.bcast_sta_id;
  1591. default:
  1592. IWL_WARN(priv, "Unknown mode of operation: %d\n",
  1593. priv->iw_mode);
  1594. return priv->hw_params.bcast_sta_id;
  1595. }
  1596. }
  1597. /*
  1598. * start REPLY_TX command process
  1599. */
  1600. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  1601. {
  1602. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1603. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1604. struct iwl3945_tx_cmd *tx;
  1605. struct iwl_tx_queue *txq = NULL;
  1606. struct iwl_queue *q = NULL;
  1607. struct iwl_cmd *out_cmd = NULL;
  1608. dma_addr_t phys_addr;
  1609. dma_addr_t txcmd_phys;
  1610. int txq_id = skb_get_queue_mapping(skb);
  1611. u16 len, idx, len_org, hdr_len;
  1612. u8 id;
  1613. u8 unicast;
  1614. u8 sta_id;
  1615. u8 tid = 0;
  1616. u16 seq_number = 0;
  1617. __le16 fc;
  1618. u8 wait_write_ptr = 0;
  1619. u8 *qc = NULL;
  1620. unsigned long flags;
  1621. int rc;
  1622. spin_lock_irqsave(&priv->lock, flags);
  1623. if (iwl_is_rfkill(priv)) {
  1624. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1625. goto drop_unlock;
  1626. }
  1627. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1628. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  1629. goto drop_unlock;
  1630. }
  1631. unicast = !is_multicast_ether_addr(hdr->addr1);
  1632. id = 0;
  1633. fc = hdr->frame_control;
  1634. #ifdef CONFIG_IWL3945_DEBUG
  1635. if (ieee80211_is_auth(fc))
  1636. IWL_DEBUG_TX("Sending AUTH frame\n");
  1637. else if (ieee80211_is_assoc_req(fc))
  1638. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1639. else if (ieee80211_is_reassoc_req(fc))
  1640. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1641. #endif
  1642. /* drop all data frame if we are not associated */
  1643. if (ieee80211_is_data(fc) &&
  1644. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  1645. (!iwl3945_is_associated(priv) ||
  1646. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  1647. IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
  1648. goto drop_unlock;
  1649. }
  1650. spin_unlock_irqrestore(&priv->lock, flags);
  1651. hdr_len = ieee80211_hdrlen(fc);
  1652. /* Find (or create) index into station table for destination station */
  1653. sta_id = iwl3945_get_sta_id(priv, hdr);
  1654. if (sta_id == IWL_INVALID_STATION) {
  1655. IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
  1656. hdr->addr1);
  1657. goto drop;
  1658. }
  1659. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1660. if (ieee80211_is_data_qos(fc)) {
  1661. qc = ieee80211_get_qos_ctl(hdr);
  1662. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  1663. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  1664. IEEE80211_SCTL_SEQ;
  1665. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1666. (hdr->seq_ctrl &
  1667. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1668. seq_number += 0x10;
  1669. }
  1670. /* Descriptor for chosen Tx queue */
  1671. txq = &priv->txq[txq_id];
  1672. q = &txq->q;
  1673. spin_lock_irqsave(&priv->lock, flags);
  1674. idx = get_cmd_index(q, q->write_ptr, 0);
  1675. /* Set up driver data for this TFD */
  1676. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  1677. txq->txb[q->write_ptr].skb[0] = skb;
  1678. /* Init first empty entry in queue's array of Tx/cmd buffers */
  1679. out_cmd = txq->cmd[idx];
  1680. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  1681. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1682. memset(tx, 0, sizeof(*tx));
  1683. /*
  1684. * Set up the Tx-command (not MAC!) header.
  1685. * Store the chosen Tx queue and TFD index within the sequence field;
  1686. * after Tx, uCode's Tx response will return this value so driver can
  1687. * locate the frame within the tx queue and do post-tx processing.
  1688. */
  1689. out_cmd->hdr.cmd = REPLY_TX;
  1690. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  1691. INDEX_TO_SEQ(q->write_ptr)));
  1692. /* Copy MAC header from skb into command buffer */
  1693. memcpy(tx->hdr, hdr, hdr_len);
  1694. /*
  1695. * Use the first empty entry in this queue's command buffer array
  1696. * to contain the Tx command and MAC header concatenated together
  1697. * (payload data will be in another buffer).
  1698. * Size of this varies, due to varying MAC header length.
  1699. * If end is not dword aligned, we'll have 2 extra bytes at the end
  1700. * of the MAC header (device reads on dword boundaries).
  1701. * We'll tell device about this padding later.
  1702. */
  1703. len = sizeof(struct iwl3945_tx_cmd) +
  1704. sizeof(struct iwl_cmd_header) + hdr_len;
  1705. len_org = len;
  1706. len = (len + 3) & ~3;
  1707. if (len_org != len)
  1708. len_org = 1;
  1709. else
  1710. len_org = 0;
  1711. /* Physical address of this Tx command's header (not MAC header!),
  1712. * within command buffer array. */
  1713. txcmd_phys = pci_map_single(priv->pci_dev,
  1714. out_cmd, sizeof(struct iwl_cmd),
  1715. PCI_DMA_TODEVICE);
  1716. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  1717. pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
  1718. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1719. * first entry */
  1720. txcmd_phys += offsetof(struct iwl_cmd, hdr);
  1721. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1722. * first entry */
  1723. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1724. txcmd_phys, len, 1, 0);
  1725. if (info->control.hw_key)
  1726. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
  1727. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  1728. * if any (802.11 null frames have no payload). */
  1729. len = skb->len - hdr_len;
  1730. if (len) {
  1731. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  1732. len, PCI_DMA_TODEVICE);
  1733. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1734. phys_addr, len,
  1735. 0, U32_PAD(len));
  1736. }
  1737. /* Total # bytes to be transmitted */
  1738. len = (u16)skb->len;
  1739. tx->len = cpu_to_le16(len);
  1740. /* TODO need this for burst mode later on */
  1741. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  1742. /* set is_hcca to 0; it probably will never be implemented */
  1743. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  1744. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  1745. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  1746. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  1747. txq->need_update = 1;
  1748. if (qc)
  1749. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  1750. } else {
  1751. wait_write_ptr = 1;
  1752. txq->need_update = 0;
  1753. }
  1754. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  1755. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  1756. ieee80211_hdrlen(fc));
  1757. /* Tell device the write index *just past* this latest filled TFD */
  1758. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  1759. rc = iwl_txq_update_write_ptr(priv, txq);
  1760. spin_unlock_irqrestore(&priv->lock, flags);
  1761. if (rc)
  1762. return rc;
  1763. if ((iwl_queue_space(q) < q->high_mark)
  1764. && priv->mac80211_registered) {
  1765. if (wait_write_ptr) {
  1766. spin_lock_irqsave(&priv->lock, flags);
  1767. txq->need_update = 1;
  1768. iwl_txq_update_write_ptr(priv, txq);
  1769. spin_unlock_irqrestore(&priv->lock, flags);
  1770. }
  1771. ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
  1772. }
  1773. return 0;
  1774. drop_unlock:
  1775. spin_unlock_irqrestore(&priv->lock, flags);
  1776. drop:
  1777. return -1;
  1778. }
  1779. static void iwl3945_set_rate(struct iwl_priv *priv)
  1780. {
  1781. const struct ieee80211_supported_band *sband = NULL;
  1782. struct ieee80211_rate *rate;
  1783. int i;
  1784. sband = iwl_get_hw_mode(priv, priv->band);
  1785. if (!sband) {
  1786. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1787. return;
  1788. }
  1789. priv->active_rate = 0;
  1790. priv->active_rate_basic = 0;
  1791. IWL_DEBUG_RATE("Setting rates for %s GHz\n",
  1792. sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
  1793. for (i = 0; i < sband->n_bitrates; i++) {
  1794. rate = &sband->bitrates[i];
  1795. if ((rate->hw_value < IWL_RATE_COUNT) &&
  1796. !(rate->flags & IEEE80211_CHAN_DISABLED)) {
  1797. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
  1798. rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
  1799. priv->active_rate |= (1 << rate->hw_value);
  1800. }
  1801. }
  1802. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  1803. priv->active_rate, priv->active_rate_basic);
  1804. /*
  1805. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1806. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1807. * OFDM
  1808. */
  1809. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1810. priv->staging39_rxon.cck_basic_rates =
  1811. ((priv->active_rate_basic &
  1812. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1813. else
  1814. priv->staging39_rxon.cck_basic_rates =
  1815. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1816. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1817. priv->staging39_rxon.ofdm_basic_rates =
  1818. ((priv->active_rate_basic &
  1819. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1820. IWL_FIRST_OFDM_RATE) & 0xFF;
  1821. else
  1822. priv->staging39_rxon.ofdm_basic_rates =
  1823. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1824. }
  1825. static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  1826. {
  1827. unsigned long flags;
  1828. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  1829. return;
  1830. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  1831. disable_radio ? "OFF" : "ON");
  1832. if (disable_radio) {
  1833. iwl_scan_cancel(priv);
  1834. /* FIXME: This is a workaround for AP */
  1835. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  1836. spin_lock_irqsave(&priv->lock, flags);
  1837. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1838. CSR_UCODE_SW_BIT_RFKILL);
  1839. spin_unlock_irqrestore(&priv->lock, flags);
  1840. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  1841. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1842. }
  1843. return;
  1844. }
  1845. spin_lock_irqsave(&priv->lock, flags);
  1846. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1847. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1848. spin_unlock_irqrestore(&priv->lock, flags);
  1849. /* wake up ucode */
  1850. msleep(10);
  1851. spin_lock_irqsave(&priv->lock, flags);
  1852. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  1853. if (!iwl_grab_nic_access(priv))
  1854. iwl_release_nic_access(priv);
  1855. spin_unlock_irqrestore(&priv->lock, flags);
  1856. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  1857. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  1858. "disabled by HW switch\n");
  1859. return;
  1860. }
  1861. if (priv->is_open)
  1862. queue_work(priv->workqueue, &priv->restart);
  1863. return;
  1864. }
  1865. void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  1866. u32 decrypt_res, struct ieee80211_rx_status *stats)
  1867. {
  1868. u16 fc =
  1869. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  1870. if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  1871. return;
  1872. if (!(fc & IEEE80211_FCTL_PROTECTED))
  1873. return;
  1874. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  1875. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  1876. case RX_RES_STATUS_SEC_TYPE_TKIP:
  1877. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1878. RX_RES_STATUS_BAD_ICV_MIC)
  1879. stats->flag |= RX_FLAG_MMIC_ERROR;
  1880. case RX_RES_STATUS_SEC_TYPE_WEP:
  1881. case RX_RES_STATUS_SEC_TYPE_CCMP:
  1882. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1883. RX_RES_STATUS_DECRYPT_OK) {
  1884. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  1885. stats->flag |= RX_FLAG_DECRYPTED;
  1886. }
  1887. break;
  1888. default:
  1889. break;
  1890. }
  1891. }
  1892. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  1893. #include "iwl-spectrum.h"
  1894. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  1895. #define BEACON_TIME_MASK_HIGH 0xFF000000
  1896. #define TIME_UNIT 1024
  1897. /*
  1898. * extended beacon time format
  1899. * time in usec will be changed into a 32-bit value in 8:24 format
  1900. * the high 1 byte is the beacon counts
  1901. * the lower 3 bytes is the time in usec within one beacon interval
  1902. */
  1903. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  1904. {
  1905. u32 quot;
  1906. u32 rem;
  1907. u32 interval = beacon_interval * 1024;
  1908. if (!interval || !usec)
  1909. return 0;
  1910. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  1911. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  1912. return (quot << 24) + rem;
  1913. }
  1914. /* base is usually what we get from ucode with each received frame,
  1915. * the same as HW timer counter counting down
  1916. */
  1917. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  1918. {
  1919. u32 base_low = base & BEACON_TIME_MASK_LOW;
  1920. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  1921. u32 interval = beacon_interval * TIME_UNIT;
  1922. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  1923. (addon & BEACON_TIME_MASK_HIGH);
  1924. if (base_low > addon_low)
  1925. res += base_low - addon_low;
  1926. else if (base_low < addon_low) {
  1927. res += interval + base_low - addon_low;
  1928. res += (1 << 24);
  1929. } else
  1930. res += (1 << 24);
  1931. return cpu_to_le32(res);
  1932. }
  1933. static int iwl3945_get_measurement(struct iwl_priv *priv,
  1934. struct ieee80211_measurement_params *params,
  1935. u8 type)
  1936. {
  1937. struct iwl_spectrum_cmd spectrum;
  1938. struct iwl_rx_packet *res;
  1939. struct iwl_host_cmd cmd = {
  1940. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  1941. .data = (void *)&spectrum,
  1942. .meta.flags = CMD_WANT_SKB,
  1943. };
  1944. u32 add_time = le64_to_cpu(params->start_time);
  1945. int rc;
  1946. int spectrum_resp_status;
  1947. int duration = le16_to_cpu(params->duration);
  1948. if (iwl3945_is_associated(priv))
  1949. add_time =
  1950. iwl3945_usecs_to_beacons(
  1951. le64_to_cpu(params->start_time) - priv->last_tsf,
  1952. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1953. memset(&spectrum, 0, sizeof(spectrum));
  1954. spectrum.channel_count = cpu_to_le16(1);
  1955. spectrum.flags =
  1956. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  1957. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  1958. cmd.len = sizeof(spectrum);
  1959. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  1960. if (iwl3945_is_associated(priv))
  1961. spectrum.start_time =
  1962. iwl3945_add_beacon_time(priv->last_beacon_time,
  1963. add_time,
  1964. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1965. else
  1966. spectrum.start_time = 0;
  1967. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  1968. spectrum.channels[0].channel = params->channel;
  1969. spectrum.channels[0].type = type;
  1970. if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1971. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  1972. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  1973. rc = iwl_send_cmd_sync(priv, &cmd);
  1974. if (rc)
  1975. return rc;
  1976. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1977. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1978. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  1979. rc = -EIO;
  1980. }
  1981. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  1982. switch (spectrum_resp_status) {
  1983. case 0: /* Command will be handled */
  1984. if (res->u.spectrum.id != 0xff) {
  1985. IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
  1986. res->u.spectrum.id);
  1987. priv->measurement_status &= ~MEASUREMENT_READY;
  1988. }
  1989. priv->measurement_status |= MEASUREMENT_ACTIVE;
  1990. rc = 0;
  1991. break;
  1992. case 1: /* Command will not be handled */
  1993. rc = -EAGAIN;
  1994. break;
  1995. }
  1996. dev_kfree_skb_any(cmd.meta.u.skb);
  1997. return rc;
  1998. }
  1999. #endif
  2000. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  2001. struct iwl_rx_mem_buffer *rxb)
  2002. {
  2003. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2004. struct iwl_alive_resp *palive;
  2005. struct delayed_work *pwork;
  2006. palive = &pkt->u.alive_frame;
  2007. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2008. "0x%01X 0x%01X\n",
  2009. palive->is_valid, palive->ver_type,
  2010. palive->ver_subtype);
  2011. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2012. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2013. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  2014. sizeof(struct iwl_alive_resp));
  2015. pwork = &priv->init_alive_start;
  2016. } else {
  2017. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2018. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2019. sizeof(struct iwl_alive_resp));
  2020. pwork = &priv->alive_start;
  2021. iwl3945_disable_events(priv);
  2022. }
  2023. /* We delay the ALIVE response by 5ms to
  2024. * give the HW RF Kill time to activate... */
  2025. if (palive->is_valid == UCODE_VALID_OK)
  2026. queue_delayed_work(priv->workqueue, pwork,
  2027. msecs_to_jiffies(5));
  2028. else
  2029. IWL_WARN(priv, "uCode did not respond OK.\n");
  2030. }
  2031. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  2032. struct iwl_rx_mem_buffer *rxb)
  2033. {
  2034. #ifdef CONFIG_IWLWIFI_DEBUG
  2035. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2036. #endif
  2037. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2038. return;
  2039. }
  2040. static void iwl3945_rx_reply_error(struct iwl_priv *priv,
  2041. struct iwl_rx_mem_buffer *rxb)
  2042. {
  2043. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2044. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  2045. "seq 0x%04X ser 0x%08X\n",
  2046. le32_to_cpu(pkt->u.err_resp.error_type),
  2047. get_cmd_string(pkt->u.err_resp.cmd_id),
  2048. pkt->u.err_resp.cmd_id,
  2049. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2050. le32_to_cpu(pkt->u.err_resp.error_info));
  2051. }
  2052. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2053. static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  2054. {
  2055. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2056. struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
  2057. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  2058. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2059. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2060. rxon->channel = csa->channel;
  2061. priv->staging39_rxon.channel = csa->channel;
  2062. }
  2063. static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2064. struct iwl_rx_mem_buffer *rxb)
  2065. {
  2066. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2067. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2068. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2069. if (!report->state) {
  2070. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2071. "Spectrum Measure Notification: Start\n");
  2072. return;
  2073. }
  2074. memcpy(&priv->measure_report, report, sizeof(*report));
  2075. priv->measurement_status |= MEASUREMENT_READY;
  2076. #endif
  2077. }
  2078. static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
  2079. struct iwl_rx_mem_buffer *rxb)
  2080. {
  2081. #ifdef CONFIG_IWL3945_DEBUG
  2082. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2083. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2084. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2085. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2086. #endif
  2087. }
  2088. static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2089. struct iwl_rx_mem_buffer *rxb)
  2090. {
  2091. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2092. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2093. "notification for %s:\n",
  2094. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2095. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
  2096. le32_to_cpu(pkt->len));
  2097. }
  2098. static void iwl3945_bg_beacon_update(struct work_struct *work)
  2099. {
  2100. struct iwl_priv *priv =
  2101. container_of(work, struct iwl_priv, beacon_update);
  2102. struct sk_buff *beacon;
  2103. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2104. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  2105. if (!beacon) {
  2106. IWL_ERR(priv, "update beacon failed\n");
  2107. return;
  2108. }
  2109. mutex_lock(&priv->mutex);
  2110. /* new beacon skb is allocated every time; dispose previous.*/
  2111. if (priv->ibss_beacon)
  2112. dev_kfree_skb(priv->ibss_beacon);
  2113. priv->ibss_beacon = beacon;
  2114. mutex_unlock(&priv->mutex);
  2115. iwl3945_send_beacon_cmd(priv);
  2116. }
  2117. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  2118. struct iwl_rx_mem_buffer *rxb)
  2119. {
  2120. #ifdef CONFIG_IWL3945_DEBUG
  2121. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2122. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  2123. u8 rate = beacon->beacon_notify_hdr.rate;
  2124. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2125. "tsf %d %d rate %d\n",
  2126. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2127. beacon->beacon_notify_hdr.failure_frame,
  2128. le32_to_cpu(beacon->ibss_mgr_status),
  2129. le32_to_cpu(beacon->high_tsf),
  2130. le32_to_cpu(beacon->low_tsf), rate);
  2131. #endif
  2132. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  2133. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2134. queue_work(priv->workqueue, &priv->beacon_update);
  2135. }
  2136. /* Service response to REPLY_SCAN_CMD (0x80) */
  2137. static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
  2138. struct iwl_rx_mem_buffer *rxb)
  2139. {
  2140. #ifdef CONFIG_IWL3945_DEBUG
  2141. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2142. struct iwl_scanreq_notification *notif =
  2143. (struct iwl_scanreq_notification *)pkt->u.raw;
  2144. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2145. #endif
  2146. }
  2147. /* Service SCAN_START_NOTIFICATION (0x82) */
  2148. static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
  2149. struct iwl_rx_mem_buffer *rxb)
  2150. {
  2151. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2152. struct iwl_scanstart_notification *notif =
  2153. (struct iwl_scanstart_notification *)pkt->u.raw;
  2154. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2155. IWL_DEBUG_SCAN("Scan start: "
  2156. "%d [802.11%s] "
  2157. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2158. notif->channel,
  2159. notif->band ? "bg" : "a",
  2160. notif->tsf_high,
  2161. notif->tsf_low, notif->status, notif->beacon_timer);
  2162. }
  2163. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2164. static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
  2165. struct iwl_rx_mem_buffer *rxb)
  2166. {
  2167. #ifdef CONFIG_IWLWIFI_DEBUG
  2168. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2169. struct iwl_scanresults_notification *notif =
  2170. (struct iwl_scanresults_notification *)pkt->u.raw;
  2171. #endif
  2172. IWL_DEBUG_SCAN("Scan ch.res: "
  2173. "%d [802.11%s] "
  2174. "(TSF: 0x%08X:%08X) - %d "
  2175. "elapsed=%lu usec (%dms since last)\n",
  2176. notif->channel,
  2177. notif->band ? "bg" : "a",
  2178. le32_to_cpu(notif->tsf_high),
  2179. le32_to_cpu(notif->tsf_low),
  2180. le32_to_cpu(notif->statistics[0]),
  2181. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2182. jiffies_to_msecs(elapsed_jiffies
  2183. (priv->last_scan_jiffies, jiffies)));
  2184. priv->last_scan_jiffies = jiffies;
  2185. priv->next_scan_jiffies = 0;
  2186. }
  2187. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2188. static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
  2189. struct iwl_rx_mem_buffer *rxb)
  2190. {
  2191. #ifdef CONFIG_IWLWIFI_DEBUG
  2192. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2193. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2194. #endif
  2195. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2196. scan_notif->scanned_channels,
  2197. scan_notif->tsf_low,
  2198. scan_notif->tsf_high, scan_notif->status);
  2199. /* The HW is no longer scanning */
  2200. clear_bit(STATUS_SCAN_HW, &priv->status);
  2201. /* The scan completion notification came in, so kill that timer... */
  2202. cancel_delayed_work(&priv->scan_check);
  2203. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2204. (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
  2205. "2.4" : "5.2",
  2206. jiffies_to_msecs(elapsed_jiffies
  2207. (priv->scan_pass_start, jiffies)));
  2208. /* Remove this scanned band from the list of pending
  2209. * bands to scan, band G precedes A in order of scanning
  2210. * as seen in iwl3945_bg_request_scan */
  2211. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
  2212. priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
  2213. else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
  2214. priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
  2215. /* If a request to abort was given, or the scan did not succeed
  2216. * then we reset the scan state machine and terminate,
  2217. * re-queuing another scan if one has been requested */
  2218. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2219. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2220. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2221. } else {
  2222. /* If there are more bands on this scan pass reschedule */
  2223. if (priv->scan_bands > 0)
  2224. goto reschedule;
  2225. }
  2226. priv->last_scan_jiffies = jiffies;
  2227. priv->next_scan_jiffies = 0;
  2228. IWL_DEBUG_INFO("Setting scan to off\n");
  2229. clear_bit(STATUS_SCANNING, &priv->status);
  2230. IWL_DEBUG_INFO("Scan took %dms\n",
  2231. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2232. queue_work(priv->workqueue, &priv->scan_completed);
  2233. return;
  2234. reschedule:
  2235. priv->scan_pass_start = jiffies;
  2236. queue_work(priv->workqueue, &priv->request_scan);
  2237. }
  2238. /* Handle notification from uCode that card's power state is changing
  2239. * due to software, hardware, or critical temperature RFKILL */
  2240. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  2241. struct iwl_rx_mem_buffer *rxb)
  2242. {
  2243. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2244. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2245. unsigned long status = priv->status;
  2246. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2247. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2248. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2249. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2250. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2251. if (flags & HW_CARD_DISABLED)
  2252. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2253. else
  2254. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2255. if (flags & SW_CARD_DISABLED)
  2256. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2257. else
  2258. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2259. iwl_scan_cancel(priv);
  2260. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2261. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2262. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2263. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2264. queue_work(priv->workqueue, &priv->rf_kill);
  2265. else
  2266. wake_up_interruptible(&priv->wait_command_queue);
  2267. }
  2268. /**
  2269. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  2270. *
  2271. * Setup the RX handlers for each of the reply types sent from the uCode
  2272. * to the host.
  2273. *
  2274. * This function chains into the hardware specific files for them to setup
  2275. * any hardware specific handlers as well.
  2276. */
  2277. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  2278. {
  2279. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  2280. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  2281. priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
  2282. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
  2283. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2284. iwl3945_rx_spectrum_measure_notif;
  2285. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
  2286. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2287. iwl3945_rx_pm_debug_statistics_notif;
  2288. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  2289. /*
  2290. * The same handler is used for both the REPLY to a discrete
  2291. * statistics request from the host as well as for the periodic
  2292. * statistics notifications (after received beacons) from the uCode.
  2293. */
  2294. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  2295. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  2296. priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
  2297. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
  2298. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2299. iwl3945_rx_scan_results_notif;
  2300. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2301. iwl3945_rx_scan_complete_notif;
  2302. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  2303. /* Set up hardware specific Rx handlers */
  2304. iwl3945_hw_rx_handler_setup(priv);
  2305. }
  2306. /**
  2307. * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
  2308. * When FW advances 'R' index, all entries between old and new 'R' index
  2309. * need to be reclaimed.
  2310. */
  2311. static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
  2312. int txq_id, int index)
  2313. {
  2314. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2315. struct iwl_queue *q = &txq->q;
  2316. int nfreed = 0;
  2317. if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
  2318. IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
  2319. "is out of range [0-%d] %d %d.\n", txq_id,
  2320. index, q->n_bd, q->write_ptr, q->read_ptr);
  2321. return;
  2322. }
  2323. for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
  2324. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2325. if (nfreed > 1) {
  2326. IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
  2327. q->write_ptr, q->read_ptr);
  2328. queue_work(priv->workqueue, &priv->restart);
  2329. break;
  2330. }
  2331. nfreed++;
  2332. }
  2333. }
  2334. /**
  2335. * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2336. * @rxb: Rx buffer to reclaim
  2337. *
  2338. * If an Rx buffer has an async callback associated with it the callback
  2339. * will be executed. The attached skb (if present) will only be freed
  2340. * if the callback returns 1
  2341. */
  2342. static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
  2343. struct iwl_rx_mem_buffer *rxb)
  2344. {
  2345. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2346. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2347. int txq_id = SEQ_TO_QUEUE(sequence);
  2348. int index = SEQ_TO_INDEX(sequence);
  2349. int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2350. int cmd_index;
  2351. struct iwl_cmd *cmd;
  2352. if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
  2353. "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
  2354. txq_id, sequence,
  2355. priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
  2356. priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
  2357. iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
  2358. return;
  2359. }
  2360. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  2361. cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  2362. /* Input error checking is done when commands are added to queue. */
  2363. if (cmd->meta.flags & CMD_WANT_SKB) {
  2364. cmd->meta.source->u.skb = rxb->skb;
  2365. rxb->skb = NULL;
  2366. } else if (cmd->meta.u.callback &&
  2367. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  2368. rxb->skb = NULL;
  2369. iwl3945_cmd_queue_reclaim(priv, txq_id, index);
  2370. if (!(cmd->meta.flags & CMD_ASYNC)) {
  2371. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2372. wake_up_interruptible(&priv->wait_command_queue);
  2373. }
  2374. }
  2375. /************************** RX-FUNCTIONS ****************************/
  2376. /*
  2377. * Rx theory of operation
  2378. *
  2379. * The host allocates 32 DMA target addresses and passes the host address
  2380. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  2381. * 0 to 31
  2382. *
  2383. * Rx Queue Indexes
  2384. * The host/firmware share two index registers for managing the Rx buffers.
  2385. *
  2386. * The READ index maps to the first position that the firmware may be writing
  2387. * to -- the driver can read up to (but not including) this position and get
  2388. * good data.
  2389. * The READ index is managed by the firmware once the card is enabled.
  2390. *
  2391. * The WRITE index maps to the last position the driver has read from -- the
  2392. * position preceding WRITE is the last slot the firmware can place a packet.
  2393. *
  2394. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2395. * WRITE = READ.
  2396. *
  2397. * During initialization, the host sets up the READ queue position to the first
  2398. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  2399. *
  2400. * When the firmware places a packet in a buffer, it will advance the READ index
  2401. * and fire the RX interrupt. The driver can then query the READ index and
  2402. * process as many packets as possible, moving the WRITE index forward as it
  2403. * resets the Rx queue buffers with new memory.
  2404. *
  2405. * The management in the driver is as follows:
  2406. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2407. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2408. * to replenish the iwl->rxq->rx_free.
  2409. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  2410. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  2411. * 'processed' and 'read' driver indexes as well)
  2412. * + A received packet is processed and handed to the kernel network stack,
  2413. * detached from the iwl->rxq. The driver 'processed' index is updated.
  2414. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2415. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2416. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  2417. * were enough free buffers and RX_STALLED is set it is cleared.
  2418. *
  2419. *
  2420. * Driver sequence:
  2421. *
  2422. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2423. * iwl3945_rx_queue_restock
  2424. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  2425. * queue, updates firmware pointers, and updates
  2426. * the WRITE index. If insufficient rx_free buffers
  2427. * are available, schedules iwl3945_rx_replenish
  2428. *
  2429. * -- enable interrupts --
  2430. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  2431. * READ INDEX, detaching the SKB from the pool.
  2432. * Moves the packet buffer from queue to rx_used.
  2433. * Calls iwl3945_rx_queue_restock to refill any empty
  2434. * slots.
  2435. * ...
  2436. *
  2437. */
  2438. /**
  2439. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  2440. */
  2441. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  2442. dma_addr_t dma_addr)
  2443. {
  2444. return cpu_to_le32((u32)dma_addr);
  2445. }
  2446. /**
  2447. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  2448. *
  2449. * If there are slots in the RX queue that need to be restocked,
  2450. * and we have free pre-allocated buffers, fill the ranks as much
  2451. * as we can, pulling from rx_free.
  2452. *
  2453. * This moves the 'write' index forward to catch up with 'processed', and
  2454. * also updates the memory address in the firmware to reference the new
  2455. * target buffer.
  2456. */
  2457. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  2458. {
  2459. struct iwl_rx_queue *rxq = &priv->rxq;
  2460. struct list_head *element;
  2461. struct iwl_rx_mem_buffer *rxb;
  2462. unsigned long flags;
  2463. int write, rc;
  2464. spin_lock_irqsave(&rxq->lock, flags);
  2465. write = rxq->write & ~0x7;
  2466. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  2467. /* Get next free Rx buffer, remove from free list */
  2468. element = rxq->rx_free.next;
  2469. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2470. list_del(element);
  2471. /* Point to Rx buffer via next RBD in circular buffer */
  2472. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  2473. rxq->queue[rxq->write] = rxb;
  2474. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  2475. rxq->free_count--;
  2476. }
  2477. spin_unlock_irqrestore(&rxq->lock, flags);
  2478. /* If the pre-allocated buffer pool is dropping low, schedule to
  2479. * refill it */
  2480. if (rxq->free_count <= RX_LOW_WATERMARK)
  2481. queue_work(priv->workqueue, &priv->rx_replenish);
  2482. /* If we've added more space for the firmware to place data, tell it.
  2483. * Increment device's write pointer in multiples of 8. */
  2484. if ((write != (rxq->write & ~0x7))
  2485. || (abs(rxq->write - rxq->read) > 7)) {
  2486. spin_lock_irqsave(&rxq->lock, flags);
  2487. rxq->need_update = 1;
  2488. spin_unlock_irqrestore(&rxq->lock, flags);
  2489. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  2490. if (rc)
  2491. return rc;
  2492. }
  2493. return 0;
  2494. }
  2495. /**
  2496. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  2497. *
  2498. * When moving to rx_free an SKB is allocated for the slot.
  2499. *
  2500. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  2501. * This is called as a scheduled work item (except for during initialization)
  2502. */
  2503. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  2504. {
  2505. struct iwl_rx_queue *rxq = &priv->rxq;
  2506. struct list_head *element;
  2507. struct iwl_rx_mem_buffer *rxb;
  2508. unsigned long flags;
  2509. spin_lock_irqsave(&rxq->lock, flags);
  2510. while (!list_empty(&rxq->rx_used)) {
  2511. element = rxq->rx_used.next;
  2512. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2513. /* Alloc a new receive buffer */
  2514. rxb->skb =
  2515. alloc_skb(priv->hw_params.rx_buf_size,
  2516. __GFP_NOWARN | GFP_ATOMIC);
  2517. if (!rxb->skb) {
  2518. if (net_ratelimit())
  2519. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  2520. /* We don't reschedule replenish work here -- we will
  2521. * call the restock method and if it still needs
  2522. * more buffers it will schedule replenish */
  2523. break;
  2524. }
  2525. /* If radiotap head is required, reserve some headroom here.
  2526. * The physical head count is a variable rx_stats->phy_count.
  2527. * We reserve 4 bytes here. Plus these extra bytes, the
  2528. * headroom of the physical head should be enough for the
  2529. * radiotap head that iwl3945 supported. See iwl3945_rt.
  2530. */
  2531. skb_reserve(rxb->skb, 4);
  2532. priv->alloc_rxb_skb++;
  2533. list_del(element);
  2534. /* Get physical address of RB/SKB */
  2535. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  2536. rxb->skb->data,
  2537. priv->hw_params.rx_buf_size,
  2538. PCI_DMA_FROMDEVICE);
  2539. list_add_tail(&rxb->list, &rxq->rx_free);
  2540. rxq->free_count++;
  2541. }
  2542. spin_unlock_irqrestore(&rxq->lock, flags);
  2543. }
  2544. /*
  2545. * this should be called while priv->lock is locked
  2546. */
  2547. static void __iwl3945_rx_replenish(void *data)
  2548. {
  2549. struct iwl_priv *priv = data;
  2550. iwl3945_rx_allocate(priv);
  2551. iwl3945_rx_queue_restock(priv);
  2552. }
  2553. void iwl3945_rx_replenish(void *data)
  2554. {
  2555. struct iwl_priv *priv = data;
  2556. unsigned long flags;
  2557. iwl3945_rx_allocate(priv);
  2558. spin_lock_irqsave(&priv->lock, flags);
  2559. iwl3945_rx_queue_restock(priv);
  2560. spin_unlock_irqrestore(&priv->lock, flags);
  2561. }
  2562. /* Convert linear signal-to-noise ratio into dB */
  2563. static u8 ratio2dB[100] = {
  2564. /* 0 1 2 3 4 5 6 7 8 9 */
  2565. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  2566. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  2567. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  2568. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  2569. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  2570. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  2571. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  2572. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  2573. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  2574. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  2575. };
  2576. /* Calculates a relative dB value from a ratio of linear
  2577. * (i.e. not dB) signal levels.
  2578. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  2579. int iwl3945_calc_db_from_ratio(int sig_ratio)
  2580. {
  2581. /* 1000:1 or higher just report as 60 dB */
  2582. if (sig_ratio >= 1000)
  2583. return 60;
  2584. /* 100:1 or higher, divide by 10 and use table,
  2585. * add 20 dB to make up for divide by 10 */
  2586. if (sig_ratio >= 100)
  2587. return 20 + (int)ratio2dB[sig_ratio/10];
  2588. /* We shouldn't see this */
  2589. if (sig_ratio < 1)
  2590. return 0;
  2591. /* Use table for ratios 1:1 - 99:1 */
  2592. return (int)ratio2dB[sig_ratio];
  2593. }
  2594. #define PERFECT_RSSI (-20) /* dBm */
  2595. #define WORST_RSSI (-95) /* dBm */
  2596. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  2597. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  2598. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  2599. * about formulas used below. */
  2600. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  2601. {
  2602. int sig_qual;
  2603. int degradation = PERFECT_RSSI - rssi_dbm;
  2604. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  2605. * as indicator; formula is (signal dbm - noise dbm).
  2606. * SNR at or above 40 is a great signal (100%).
  2607. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  2608. * Weakest usable signal is usually 10 - 15 dB SNR. */
  2609. if (noise_dbm) {
  2610. if (rssi_dbm - noise_dbm >= 40)
  2611. return 100;
  2612. else if (rssi_dbm < noise_dbm)
  2613. return 0;
  2614. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  2615. /* Else use just the signal level.
  2616. * This formula is a least squares fit of data points collected and
  2617. * compared with a reference system that had a percentage (%) display
  2618. * for signal quality. */
  2619. } else
  2620. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  2621. (15 * RSSI_RANGE + 62 * degradation)) /
  2622. (RSSI_RANGE * RSSI_RANGE);
  2623. if (sig_qual > 100)
  2624. sig_qual = 100;
  2625. else if (sig_qual < 1)
  2626. sig_qual = 0;
  2627. return sig_qual;
  2628. }
  2629. /**
  2630. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  2631. *
  2632. * Uses the priv->rx_handlers callback function array to invoke
  2633. * the appropriate handlers, including command responses,
  2634. * frame-received notifications, and other notifications.
  2635. */
  2636. static void iwl3945_rx_handle(struct iwl_priv *priv)
  2637. {
  2638. struct iwl_rx_mem_buffer *rxb;
  2639. struct iwl_rx_packet *pkt;
  2640. struct iwl_rx_queue *rxq = &priv->rxq;
  2641. u32 r, i;
  2642. int reclaim;
  2643. unsigned long flags;
  2644. u8 fill_rx = 0;
  2645. u32 count = 8;
  2646. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  2647. * buffer that the driver may process (last buffer filled by ucode). */
  2648. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  2649. i = rxq->read;
  2650. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  2651. fill_rx = 1;
  2652. /* Rx interrupt, but nothing sent from uCode */
  2653. if (i == r)
  2654. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  2655. while (i != r) {
  2656. rxb = rxq->queue[i];
  2657. /* If an RXB doesn't have a Rx queue slot associated with it,
  2658. * then a bug has been introduced in the queue refilling
  2659. * routines -- catch it here */
  2660. BUG_ON(rxb == NULL);
  2661. rxq->queue[i] = NULL;
  2662. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
  2663. priv->hw_params.rx_buf_size,
  2664. PCI_DMA_FROMDEVICE);
  2665. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2666. /* Reclaim a command buffer only if this packet is a response
  2667. * to a (driver-originated) command.
  2668. * If the packet (e.g. Rx frame) originated from uCode,
  2669. * there is no command buffer to reclaim.
  2670. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  2671. * but apparently a few don't get set; catch them here. */
  2672. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  2673. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  2674. (pkt->hdr.cmd != REPLY_TX);
  2675. /* Based on type of command response or notification,
  2676. * handle those that need handling via function in
  2677. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  2678. if (priv->rx_handlers[pkt->hdr.cmd]) {
  2679. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2680. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  2681. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  2682. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  2683. } else {
  2684. /* No handling needed */
  2685. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2686. "r %d i %d No handler needed for %s, 0x%02x\n",
  2687. r, i, get_cmd_string(pkt->hdr.cmd),
  2688. pkt->hdr.cmd);
  2689. }
  2690. if (reclaim) {
  2691. /* Invoke any callbacks, transfer the skb to caller, and
  2692. * fire off the (possibly) blocking iwl_send_cmd()
  2693. * as we reclaim the driver command queue */
  2694. if (rxb && rxb->skb)
  2695. iwl3945_tx_cmd_complete(priv, rxb);
  2696. else
  2697. IWL_WARN(priv, "Claim null rxb?\n");
  2698. }
  2699. /* For now we just don't re-use anything. We can tweak this
  2700. * later to try and re-use notification packets and SKBs that
  2701. * fail to Rx correctly */
  2702. if (rxb->skb != NULL) {
  2703. priv->alloc_rxb_skb--;
  2704. dev_kfree_skb_any(rxb->skb);
  2705. rxb->skb = NULL;
  2706. }
  2707. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  2708. priv->hw_params.rx_buf_size,
  2709. PCI_DMA_FROMDEVICE);
  2710. spin_lock_irqsave(&rxq->lock, flags);
  2711. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  2712. spin_unlock_irqrestore(&rxq->lock, flags);
  2713. i = (i + 1) & RX_QUEUE_MASK;
  2714. /* If there are a lot of unused frames,
  2715. * restock the Rx queue so ucode won't assert. */
  2716. if (fill_rx) {
  2717. count++;
  2718. if (count >= 8) {
  2719. priv->rxq.read = i;
  2720. __iwl3945_rx_replenish(priv);
  2721. count = 0;
  2722. }
  2723. }
  2724. }
  2725. /* Backtrack one entry */
  2726. priv->rxq.read = i;
  2727. iwl3945_rx_queue_restock(priv);
  2728. }
  2729. #ifdef CONFIG_IWL3945_DEBUG
  2730. static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
  2731. struct iwl3945_rxon_cmd *rxon)
  2732. {
  2733. IWL_DEBUG_RADIO("RX CONFIG:\n");
  2734. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  2735. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  2736. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  2737. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  2738. le32_to_cpu(rxon->filter_flags));
  2739. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  2740. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  2741. rxon->ofdm_basic_rates);
  2742. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  2743. IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  2744. IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  2745. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  2746. }
  2747. #endif
  2748. static void iwl3945_enable_interrupts(struct iwl_priv *priv)
  2749. {
  2750. IWL_DEBUG_ISR("Enabling interrupts\n");
  2751. set_bit(STATUS_INT_ENABLED, &priv->status);
  2752. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  2753. }
  2754. /* call this function to flush any scheduled tasklet */
  2755. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  2756. {
  2757. /* wait to make sure we flush pending tasklet*/
  2758. synchronize_irq(priv->pci_dev->irq);
  2759. tasklet_kill(&priv->irq_tasklet);
  2760. }
  2761. static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
  2762. {
  2763. clear_bit(STATUS_INT_ENABLED, &priv->status);
  2764. /* disable interrupts from uCode/NIC to host */
  2765. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2766. /* acknowledge/clear/reset any interrupts still pending
  2767. * from uCode or flow handler (Rx/Tx DMA) */
  2768. iwl_write32(priv, CSR_INT, 0xffffffff);
  2769. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  2770. IWL_DEBUG_ISR("Disabled interrupts\n");
  2771. }
  2772. static const char *desc_lookup(int i)
  2773. {
  2774. switch (i) {
  2775. case 1:
  2776. return "FAIL";
  2777. case 2:
  2778. return "BAD_PARAM";
  2779. case 3:
  2780. return "BAD_CHECKSUM";
  2781. case 4:
  2782. return "NMI_INTERRUPT";
  2783. case 5:
  2784. return "SYSASSERT";
  2785. case 6:
  2786. return "FATAL_ERROR";
  2787. }
  2788. return "UNKNOWN";
  2789. }
  2790. #define ERROR_START_OFFSET (1 * sizeof(u32))
  2791. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  2792. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  2793. {
  2794. u32 i;
  2795. u32 desc, time, count, base, data1;
  2796. u32 blink1, blink2, ilink1, ilink2;
  2797. int rc;
  2798. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  2799. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2800. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  2801. return;
  2802. }
  2803. rc = iwl_grab_nic_access(priv);
  2804. if (rc) {
  2805. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2806. return;
  2807. }
  2808. count = iwl_read_targ_mem(priv, base);
  2809. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  2810. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  2811. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  2812. priv->status, count);
  2813. }
  2814. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  2815. "ilink1 nmiPC Line\n");
  2816. for (i = ERROR_START_OFFSET;
  2817. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  2818. i += ERROR_ELEM_SIZE) {
  2819. desc = iwl_read_targ_mem(priv, base + i);
  2820. time =
  2821. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  2822. blink1 =
  2823. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  2824. blink2 =
  2825. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  2826. ilink1 =
  2827. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  2828. ilink2 =
  2829. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  2830. data1 =
  2831. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  2832. IWL_ERR(priv,
  2833. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  2834. desc_lookup(desc), desc, time, blink1, blink2,
  2835. ilink1, ilink2, data1);
  2836. }
  2837. iwl_release_nic_access(priv);
  2838. }
  2839. #define EVENT_START_OFFSET (6 * sizeof(u32))
  2840. /**
  2841. * iwl3945_print_event_log - Dump error event log to syslog
  2842. *
  2843. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  2844. */
  2845. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  2846. u32 num_events, u32 mode)
  2847. {
  2848. u32 i;
  2849. u32 base; /* SRAM byte address of event log header */
  2850. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  2851. u32 ptr; /* SRAM byte address of log data */
  2852. u32 ev, time, data; /* event log data */
  2853. if (num_events == 0)
  2854. return;
  2855. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2856. if (mode == 0)
  2857. event_size = 2 * sizeof(u32);
  2858. else
  2859. event_size = 3 * sizeof(u32);
  2860. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  2861. /* "time" is actually "data" for mode 0 (no timestamp).
  2862. * place event id # at far right for easier visual parsing. */
  2863. for (i = 0; i < num_events; i++) {
  2864. ev = iwl_read_targ_mem(priv, ptr);
  2865. ptr += sizeof(u32);
  2866. time = iwl_read_targ_mem(priv, ptr);
  2867. ptr += sizeof(u32);
  2868. if (mode == 0) {
  2869. /* data, ev */
  2870. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  2871. } else {
  2872. data = iwl_read_targ_mem(priv, ptr);
  2873. ptr += sizeof(u32);
  2874. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  2875. }
  2876. }
  2877. }
  2878. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  2879. {
  2880. int rc;
  2881. u32 base; /* SRAM byte address of event log header */
  2882. u32 capacity; /* event log capacity in # entries */
  2883. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  2884. u32 num_wraps; /* # times uCode wrapped to top of log */
  2885. u32 next_entry; /* index of next entry to be written by uCode */
  2886. u32 size; /* # entries that we'll print */
  2887. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2888. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2889. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  2890. return;
  2891. }
  2892. rc = iwl_grab_nic_access(priv);
  2893. if (rc) {
  2894. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2895. return;
  2896. }
  2897. /* event log header */
  2898. capacity = iwl_read_targ_mem(priv, base);
  2899. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  2900. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  2901. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  2902. size = num_wraps ? capacity : next_entry;
  2903. /* bail out if nothing in log */
  2904. if (size == 0) {
  2905. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  2906. iwl_release_nic_access(priv);
  2907. return;
  2908. }
  2909. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  2910. size, num_wraps);
  2911. /* if uCode has wrapped back to top of log, start at the oldest entry,
  2912. * i.e the next one that uCode would fill. */
  2913. if (num_wraps)
  2914. iwl3945_print_event_log(priv, next_entry,
  2915. capacity - next_entry, mode);
  2916. /* (then/else) start at top of log */
  2917. iwl3945_print_event_log(priv, 0, next_entry, mode);
  2918. iwl_release_nic_access(priv);
  2919. }
  2920. /**
  2921. * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
  2922. */
  2923. static void iwl3945_irq_handle_error(struct iwl_priv *priv)
  2924. {
  2925. /* Set the FW error flag -- cleared on iwl3945_down */
  2926. set_bit(STATUS_FW_ERROR, &priv->status);
  2927. /* Cancel currently queued command. */
  2928. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2929. #ifdef CONFIG_IWL3945_DEBUG
  2930. if (priv->debug_level & IWL_DL_FW_ERRORS) {
  2931. iwl3945_dump_nic_error_log(priv);
  2932. iwl3945_dump_nic_event_log(priv);
  2933. iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
  2934. }
  2935. #endif
  2936. wake_up_interruptible(&priv->wait_command_queue);
  2937. /* Keep the restart process from trying to send host
  2938. * commands by clearing the INIT status bit */
  2939. clear_bit(STATUS_READY, &priv->status);
  2940. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2941. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  2942. "Restarting adapter due to uCode error.\n");
  2943. if (iwl3945_is_associated(priv)) {
  2944. memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
  2945. sizeof(priv->recovery39_rxon));
  2946. priv->error_recovering = 1;
  2947. }
  2948. queue_work(priv->workqueue, &priv->restart);
  2949. }
  2950. }
  2951. static void iwl3945_error_recovery(struct iwl_priv *priv)
  2952. {
  2953. unsigned long flags;
  2954. memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
  2955. sizeof(priv->staging39_rxon));
  2956. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2957. iwl3945_commit_rxon(priv);
  2958. iwl3945_add_station(priv, priv->bssid, 1, 0);
  2959. spin_lock_irqsave(&priv->lock, flags);
  2960. priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
  2961. priv->error_recovering = 0;
  2962. spin_unlock_irqrestore(&priv->lock, flags);
  2963. }
  2964. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  2965. {
  2966. u32 inta, handled = 0;
  2967. u32 inta_fh;
  2968. unsigned long flags;
  2969. #ifdef CONFIG_IWL3945_DEBUG
  2970. u32 inta_mask;
  2971. #endif
  2972. spin_lock_irqsave(&priv->lock, flags);
  2973. /* Ack/clear/reset pending uCode interrupts.
  2974. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  2975. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  2976. inta = iwl_read32(priv, CSR_INT);
  2977. iwl_write32(priv, CSR_INT, inta);
  2978. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  2979. * Any new interrupts that happen after this, either while we're
  2980. * in this tasklet, or later, will show up in next ISR/tasklet. */
  2981. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2982. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  2983. #ifdef CONFIG_IWL3945_DEBUG
  2984. if (priv->debug_level & IWL_DL_ISR) {
  2985. /* just for debug */
  2986. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  2987. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2988. inta, inta_mask, inta_fh);
  2989. }
  2990. #endif
  2991. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  2992. * atomic, make sure that inta covers all the interrupts that
  2993. * we've discovered, even if FH interrupt came in just after
  2994. * reading CSR_INT. */
  2995. if (inta_fh & CSR39_FH_INT_RX_MASK)
  2996. inta |= CSR_INT_BIT_FH_RX;
  2997. if (inta_fh & CSR39_FH_INT_TX_MASK)
  2998. inta |= CSR_INT_BIT_FH_TX;
  2999. /* Now service all interrupt bits discovered above. */
  3000. if (inta & CSR_INT_BIT_HW_ERR) {
  3001. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  3002. /* Tell the device to stop sending interrupts */
  3003. iwl3945_disable_interrupts(priv);
  3004. iwl3945_irq_handle_error(priv);
  3005. handled |= CSR_INT_BIT_HW_ERR;
  3006. spin_unlock_irqrestore(&priv->lock, flags);
  3007. return;
  3008. }
  3009. #ifdef CONFIG_IWL3945_DEBUG
  3010. if (priv->debug_level & (IWL_DL_ISR)) {
  3011. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3012. if (inta & CSR_INT_BIT_SCD)
  3013. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3014. "the frame/frames.\n");
  3015. /* Alive notification via Rx interrupt will do the real work */
  3016. if (inta & CSR_INT_BIT_ALIVE)
  3017. IWL_DEBUG_ISR("Alive interrupt\n");
  3018. }
  3019. #endif
  3020. /* Safely ignore these bits for debug checks below */
  3021. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3022. /* Error detected by uCode */
  3023. if (inta & CSR_INT_BIT_SW_ERR) {
  3024. IWL_ERR(priv, "Microcode SW error detected. "
  3025. "Restarting 0x%X.\n", inta);
  3026. iwl3945_irq_handle_error(priv);
  3027. handled |= CSR_INT_BIT_SW_ERR;
  3028. }
  3029. /* uCode wakes up after power-down sleep */
  3030. if (inta & CSR_INT_BIT_WAKEUP) {
  3031. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3032. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  3033. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  3034. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  3035. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  3036. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  3037. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  3038. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  3039. handled |= CSR_INT_BIT_WAKEUP;
  3040. }
  3041. /* All uCode command responses, including Tx command responses,
  3042. * Rx "responses" (frame-received notification), and other
  3043. * notifications from uCode come through here*/
  3044. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3045. iwl3945_rx_handle(priv);
  3046. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3047. }
  3048. if (inta & CSR_INT_BIT_FH_TX) {
  3049. IWL_DEBUG_ISR("Tx interrupt\n");
  3050. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  3051. if (!iwl_grab_nic_access(priv)) {
  3052. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  3053. (FH39_SRVC_CHNL), 0x0);
  3054. iwl_release_nic_access(priv);
  3055. }
  3056. handled |= CSR_INT_BIT_FH_TX;
  3057. }
  3058. if (inta & ~handled)
  3059. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3060. if (inta & ~CSR_INI_SET_MASK) {
  3061. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  3062. inta & ~CSR_INI_SET_MASK);
  3063. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  3064. }
  3065. /* Re-enable all interrupts */
  3066. /* only Re-enable if disabled by irq */
  3067. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3068. iwl3945_enable_interrupts(priv);
  3069. #ifdef CONFIG_IWL3945_DEBUG
  3070. if (priv->debug_level & (IWL_DL_ISR)) {
  3071. inta = iwl_read32(priv, CSR_INT);
  3072. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3073. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3074. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3075. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3076. }
  3077. #endif
  3078. spin_unlock_irqrestore(&priv->lock, flags);
  3079. }
  3080. static irqreturn_t iwl3945_isr(int irq, void *data)
  3081. {
  3082. struct iwl_priv *priv = data;
  3083. u32 inta, inta_mask;
  3084. u32 inta_fh;
  3085. if (!priv)
  3086. return IRQ_NONE;
  3087. spin_lock(&priv->lock);
  3088. /* Disable (but don't clear!) interrupts here to avoid
  3089. * back-to-back ISRs and sporadic interrupts from our NIC.
  3090. * If we have something to service, the tasklet will re-enable ints.
  3091. * If we *don't* have something, we'll re-enable before leaving here. */
  3092. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3093. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3094. /* Discover which interrupts are active/pending */
  3095. inta = iwl_read32(priv, CSR_INT);
  3096. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3097. /* Ignore interrupt if there's nothing in NIC to service.
  3098. * This may be due to IRQ shared with another device,
  3099. * or due to sporadic interrupts thrown from our NIC. */
  3100. if (!inta && !inta_fh) {
  3101. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3102. goto none;
  3103. }
  3104. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3105. /* Hardware disappeared */
  3106. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  3107. goto unplugged;
  3108. }
  3109. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3110. inta, inta_mask, inta_fh);
  3111. inta &= ~CSR_INT_BIT_SCD;
  3112. /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
  3113. if (likely(inta || inta_fh))
  3114. tasklet_schedule(&priv->irq_tasklet);
  3115. unplugged:
  3116. spin_unlock(&priv->lock);
  3117. return IRQ_HANDLED;
  3118. none:
  3119. /* re-enable interrupts here since we don't have anything to service. */
  3120. /* only Re-enable if disabled by irq */
  3121. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3122. iwl3945_enable_interrupts(priv);
  3123. spin_unlock(&priv->lock);
  3124. return IRQ_NONE;
  3125. }
  3126. /************************** EEPROM BANDS ****************************
  3127. *
  3128. * The iwl3945_eeprom_band definitions below provide the mapping from the
  3129. * EEPROM contents to the specific channel number supported for each
  3130. * band.
  3131. *
  3132. * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
  3133. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  3134. * The specific geography and calibration information for that channel
  3135. * is contained in the eeprom map itself.
  3136. *
  3137. * During init, we copy the eeprom information and channel map
  3138. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  3139. *
  3140. * channel_map_24/52 provides the index in the channel_info array for a
  3141. * given channel. We have to have two separate maps as there is channel
  3142. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  3143. * band_2
  3144. *
  3145. * A value of 0xff stored in the channel_map indicates that the channel
  3146. * is not supported by the hardware at all.
  3147. *
  3148. * A value of 0xfe in the channel_map indicates that the channel is not
  3149. * valid for Tx with the current hardware. This means that
  3150. * while the system can tune and receive on a given channel, it may not
  3151. * be able to associate or transmit any frames on that
  3152. * channel. There is no corresponding channel information for that
  3153. * entry.
  3154. *
  3155. *********************************************************************/
  3156. /* 2.4 GHz */
  3157. static const u8 iwl3945_eeprom_band_1[14] = {
  3158. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  3159. };
  3160. /* 5.2 GHz bands */
  3161. static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
  3162. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  3163. };
  3164. static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
  3165. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  3166. };
  3167. static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
  3168. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  3169. };
  3170. static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
  3171. 145, 149, 153, 157, 161, 165
  3172. };
  3173. static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
  3174. int *eeprom_ch_count,
  3175. const struct iwl_eeprom_channel
  3176. **eeprom_ch_info,
  3177. const u8 **eeprom_ch_index)
  3178. {
  3179. switch (band) {
  3180. case 1: /* 2.4GHz band */
  3181. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
  3182. *eeprom_ch_info = priv->eeprom39.band_1_channels;
  3183. *eeprom_ch_index = iwl3945_eeprom_band_1;
  3184. break;
  3185. case 2: /* 4.9GHz band */
  3186. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
  3187. *eeprom_ch_info = priv->eeprom39.band_2_channels;
  3188. *eeprom_ch_index = iwl3945_eeprom_band_2;
  3189. break;
  3190. case 3: /* 5.2GHz band */
  3191. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
  3192. *eeprom_ch_info = priv->eeprom39.band_3_channels;
  3193. *eeprom_ch_index = iwl3945_eeprom_band_3;
  3194. break;
  3195. case 4: /* 5.5GHz band */
  3196. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
  3197. *eeprom_ch_info = priv->eeprom39.band_4_channels;
  3198. *eeprom_ch_index = iwl3945_eeprom_band_4;
  3199. break;
  3200. case 5: /* 5.7GHz band */
  3201. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
  3202. *eeprom_ch_info = priv->eeprom39.band_5_channels;
  3203. *eeprom_ch_index = iwl3945_eeprom_band_5;
  3204. break;
  3205. default:
  3206. BUG();
  3207. return;
  3208. }
  3209. }
  3210. /**
  3211. * iwl3945_get_channel_info - Find driver's private channel info
  3212. *
  3213. * Based on band and channel number.
  3214. */
  3215. const struct iwl_channel_info *
  3216. iwl3945_get_channel_info(const struct iwl_priv *priv,
  3217. enum ieee80211_band band, u16 channel)
  3218. {
  3219. int i;
  3220. switch (band) {
  3221. case IEEE80211_BAND_5GHZ:
  3222. for (i = 14; i < priv->channel_count; i++) {
  3223. if (priv->channel_info[i].channel == channel)
  3224. return &priv->channel_info[i];
  3225. }
  3226. break;
  3227. case IEEE80211_BAND_2GHZ:
  3228. if (channel >= 1 && channel <= 14)
  3229. return &priv->channel_info[channel - 1];
  3230. break;
  3231. case IEEE80211_NUM_BANDS:
  3232. WARN_ON(1);
  3233. }
  3234. return NULL;
  3235. }
  3236. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  3237. ? # x " " : "")
  3238. /**
  3239. * iwl3945_init_channel_map - Set up driver's info for all possible channels
  3240. */
  3241. static int iwl3945_init_channel_map(struct iwl_priv *priv)
  3242. {
  3243. int eeprom_ch_count = 0;
  3244. const u8 *eeprom_ch_index = NULL;
  3245. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  3246. int band, ch;
  3247. struct iwl_channel_info *ch_info;
  3248. if (priv->channel_count) {
  3249. IWL_DEBUG_INFO("Channel map already initialized.\n");
  3250. return 0;
  3251. }
  3252. if (priv->eeprom39.version < 0x2f) {
  3253. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3254. priv->eeprom39.version);
  3255. return -EINVAL;
  3256. }
  3257. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  3258. priv->channel_count =
  3259. ARRAY_SIZE(iwl3945_eeprom_band_1) +
  3260. ARRAY_SIZE(iwl3945_eeprom_band_2) +
  3261. ARRAY_SIZE(iwl3945_eeprom_band_3) +
  3262. ARRAY_SIZE(iwl3945_eeprom_band_4) +
  3263. ARRAY_SIZE(iwl3945_eeprom_band_5);
  3264. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  3265. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  3266. priv->channel_count, GFP_KERNEL);
  3267. if (!priv->channel_info) {
  3268. IWL_ERR(priv, "Could not allocate channel_info\n");
  3269. priv->channel_count = 0;
  3270. return -ENOMEM;
  3271. }
  3272. ch_info = priv->channel_info;
  3273. /* Loop through the 5 EEPROM bands adding them in order to the
  3274. * channel map we maintain (that contains additional information than
  3275. * what just in the EEPROM) */
  3276. for (band = 1; band <= 5; band++) {
  3277. iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
  3278. &eeprom_ch_info, &eeprom_ch_index);
  3279. /* Loop through each band adding each of the channels */
  3280. for (ch = 0; ch < eeprom_ch_count; ch++) {
  3281. ch_info->channel = eeprom_ch_index[ch];
  3282. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  3283. IEEE80211_BAND_5GHZ;
  3284. /* permanently store EEPROM's channel regulatory flags
  3285. * and max power in channel info database. */
  3286. ch_info->eeprom = eeprom_ch_info[ch];
  3287. /* Copy the run-time flags so they are there even on
  3288. * invalid channels */
  3289. ch_info->flags = eeprom_ch_info[ch].flags;
  3290. if (!(is_channel_valid(ch_info))) {
  3291. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  3292. "No traffic\n",
  3293. ch_info->channel,
  3294. ch_info->flags,
  3295. is_channel_a_band(ch_info) ?
  3296. "5.2" : "2.4");
  3297. ch_info++;
  3298. continue;
  3299. }
  3300. /* Initialize regulatory-based run-time data */
  3301. ch_info->max_power_avg = ch_info->curr_txpow =
  3302. eeprom_ch_info[ch].max_power_avg;
  3303. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  3304. ch_info->min_power = 0;
  3305. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  3306. " %ddBm): Ad-Hoc %ssupported\n",
  3307. ch_info->channel,
  3308. is_channel_a_band(ch_info) ?
  3309. "5.2" : "2.4",
  3310. CHECK_AND_PRINT(VALID),
  3311. CHECK_AND_PRINT(IBSS),
  3312. CHECK_AND_PRINT(ACTIVE),
  3313. CHECK_AND_PRINT(RADAR),
  3314. CHECK_AND_PRINT(WIDE),
  3315. CHECK_AND_PRINT(DFS),
  3316. eeprom_ch_info[ch].flags,
  3317. eeprom_ch_info[ch].max_power_avg,
  3318. ((eeprom_ch_info[ch].
  3319. flags & EEPROM_CHANNEL_IBSS)
  3320. && !(eeprom_ch_info[ch].
  3321. flags & EEPROM_CHANNEL_RADAR))
  3322. ? "" : "not ");
  3323. /* Set the user_txpower_limit to the highest power
  3324. * supported by any channel */
  3325. if (eeprom_ch_info[ch].max_power_avg >
  3326. priv->user_txpower_limit)
  3327. priv->user_txpower_limit =
  3328. eeprom_ch_info[ch].max_power_avg;
  3329. ch_info++;
  3330. }
  3331. }
  3332. /* Set up txpower settings in driver for all channels */
  3333. if (iwl3945_txpower_set_from_eeprom(priv))
  3334. return -EIO;
  3335. return 0;
  3336. }
  3337. /*
  3338. * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
  3339. */
  3340. static void iwl3945_free_channel_map(struct iwl_priv *priv)
  3341. {
  3342. kfree(priv->channel_info);
  3343. priv->channel_count = 0;
  3344. }
  3345. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3346. * sending probe req. This should be set long enough to hear probe responses
  3347. * from more than one AP. */
  3348. #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  3349. #define IWL_ACTIVE_DWELL_TIME_52 (20)
  3350. #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  3351. #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  3352. /* For faster active scanning, scan will move to the next channel if fewer than
  3353. * PLCP_QUIET_THRESH packets are heard on this channel within
  3354. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3355. * time if it's a quiet channel (nothing responded to our probe, and there's
  3356. * no other traffic).
  3357. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3358. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3359. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
  3360. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3361. * Must be set longer than active dwell time.
  3362. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3363. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3364. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3365. #define IWL_PASSIVE_DWELL_BASE (100)
  3366. #define IWL_CHANNEL_TUNE_TIME 5
  3367. #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
  3368. static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
  3369. enum ieee80211_band band,
  3370. u8 n_probes)
  3371. {
  3372. if (band == IEEE80211_BAND_5GHZ)
  3373. return IWL_ACTIVE_DWELL_TIME_52 +
  3374. IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  3375. else
  3376. return IWL_ACTIVE_DWELL_TIME_24 +
  3377. IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  3378. }
  3379. static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
  3380. enum ieee80211_band band)
  3381. {
  3382. u16 passive = (band == IEEE80211_BAND_2GHZ) ?
  3383. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3384. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3385. if (iwl3945_is_associated(priv)) {
  3386. /* If we're associated, we clamp the maximum passive
  3387. * dwell time to be 98% of the beacon interval (minus
  3388. * 2 * channel tune time) */
  3389. passive = priv->beacon_int;
  3390. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3391. passive = IWL_PASSIVE_DWELL_BASE;
  3392. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  3393. }
  3394. return passive;
  3395. }
  3396. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  3397. enum ieee80211_band band,
  3398. u8 is_active, u8 n_probes,
  3399. struct iwl3945_scan_channel *scan_ch)
  3400. {
  3401. const struct ieee80211_channel *channels = NULL;
  3402. const struct ieee80211_supported_band *sband;
  3403. const struct iwl_channel_info *ch_info;
  3404. u16 passive_dwell = 0;
  3405. u16 active_dwell = 0;
  3406. int added, i;
  3407. sband = iwl_get_hw_mode(priv, band);
  3408. if (!sband)
  3409. return 0;
  3410. channels = sband->channels;
  3411. active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
  3412. passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
  3413. if (passive_dwell <= active_dwell)
  3414. passive_dwell = active_dwell + 1;
  3415. for (i = 0, added = 0; i < sband->n_channels; i++) {
  3416. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  3417. continue;
  3418. scan_ch->channel = channels[i].hw_value;
  3419. ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
  3420. if (!is_channel_valid(ch_info)) {
  3421. IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
  3422. scan_ch->channel);
  3423. continue;
  3424. }
  3425. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  3426. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  3427. /* If passive , set up for auto-switch
  3428. * and use long active_dwell time.
  3429. */
  3430. if (!is_active || is_channel_passive(ch_info) ||
  3431. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  3432. scan_ch->type = 0; /* passive */
  3433. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  3434. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  3435. } else {
  3436. scan_ch->type = 1; /* active */
  3437. }
  3438. /* Set direct probe bits. These may be used both for active
  3439. * scan channels (probes gets sent right away),
  3440. * or for passive channels (probes get se sent only after
  3441. * hearing clear Rx packet).*/
  3442. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  3443. if (n_probes)
  3444. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3445. } else {
  3446. /* uCode v1 does not allow setting direct probe bits on
  3447. * passive channel. */
  3448. if ((scan_ch->type & 1) && n_probes)
  3449. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3450. }
  3451. /* Set txpower levels to defaults */
  3452. scan_ch->tpc.dsp_atten = 110;
  3453. /* scan_pwr_info->tpc.dsp_atten; */
  3454. /*scan_pwr_info->tpc.tx_gain; */
  3455. if (band == IEEE80211_BAND_5GHZ)
  3456. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  3457. else {
  3458. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  3459. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  3460. * power level:
  3461. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  3462. */
  3463. }
  3464. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  3465. scan_ch->channel,
  3466. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  3467. (scan_ch->type & 1) ?
  3468. active_dwell : passive_dwell);
  3469. scan_ch++;
  3470. added++;
  3471. }
  3472. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  3473. return added;
  3474. }
  3475. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  3476. struct ieee80211_rate *rates)
  3477. {
  3478. int i;
  3479. for (i = 0; i < IWL_RATE_COUNT; i++) {
  3480. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  3481. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  3482. rates[i].hw_value_short = i;
  3483. rates[i].flags = 0;
  3484. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  3485. /*
  3486. * If CCK != 1M then set short preamble rate flag.
  3487. */
  3488. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  3489. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  3490. }
  3491. }
  3492. }
  3493. /**
  3494. * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
  3495. */
  3496. static int iwl3945_init_geos(struct iwl_priv *priv)
  3497. {
  3498. struct iwl_channel_info *ch;
  3499. struct ieee80211_supported_band *sband;
  3500. struct ieee80211_channel *channels;
  3501. struct ieee80211_channel *geo_ch;
  3502. struct ieee80211_rate *rates;
  3503. int i = 0;
  3504. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  3505. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  3506. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  3507. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3508. return 0;
  3509. }
  3510. channels = kzalloc(sizeof(struct ieee80211_channel) *
  3511. priv->channel_count, GFP_KERNEL);
  3512. if (!channels)
  3513. return -ENOMEM;
  3514. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  3515. GFP_KERNEL);
  3516. if (!rates) {
  3517. kfree(channels);
  3518. return -ENOMEM;
  3519. }
  3520. /* 5.2GHz channels start after the 2.4GHz channels */
  3521. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3522. sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
  3523. /* just OFDM */
  3524. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  3525. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  3526. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3527. sband->channels = channels;
  3528. /* OFDM & CCK */
  3529. sband->bitrates = rates;
  3530. sband->n_bitrates = IWL_RATE_COUNT;
  3531. priv->ieee_channels = channels;
  3532. priv->ieee_rates = rates;
  3533. iwl3945_init_hw_rates(priv, rates);
  3534. for (i = 0; i < priv->channel_count; i++) {
  3535. ch = &priv->channel_info[i];
  3536. /* FIXME: might be removed if scan is OK*/
  3537. if (!is_channel_valid(ch))
  3538. continue;
  3539. if (is_channel_a_band(ch))
  3540. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3541. else
  3542. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3543. geo_ch = &sband->channels[sband->n_channels++];
  3544. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  3545. geo_ch->max_power = ch->max_power_avg;
  3546. geo_ch->max_antenna_gain = 0xff;
  3547. geo_ch->hw_value = ch->channel;
  3548. if (is_channel_valid(ch)) {
  3549. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  3550. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  3551. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  3552. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  3553. if (ch->flags & EEPROM_CHANNEL_RADAR)
  3554. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  3555. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  3556. priv->max_channel_txpower_limit =
  3557. ch->max_power_avg;
  3558. } else {
  3559. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  3560. }
  3561. /* Save flags for reg domain usage */
  3562. geo_ch->orig_flags = geo_ch->flags;
  3563. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  3564. ch->channel, geo_ch->center_freq,
  3565. is_channel_a_band(ch) ? "5.2" : "2.4",
  3566. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  3567. "restricted" : "valid",
  3568. geo_ch->flags);
  3569. }
  3570. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  3571. priv->cfg->sku & IWL_SKU_A) {
  3572. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  3573. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  3574. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  3575. priv->cfg->sku &= ~IWL_SKU_A;
  3576. }
  3577. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  3578. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  3579. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  3580. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3581. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3582. &priv->bands[IEEE80211_BAND_2GHZ];
  3583. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3584. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3585. &priv->bands[IEEE80211_BAND_5GHZ];
  3586. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3587. return 0;
  3588. }
  3589. /*
  3590. * iwl3945_free_geos - undo allocations in iwl3945_init_geos
  3591. */
  3592. static void iwl3945_free_geos(struct iwl_priv *priv)
  3593. {
  3594. kfree(priv->ieee_channels);
  3595. kfree(priv->ieee_rates);
  3596. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3597. }
  3598. /******************************************************************************
  3599. *
  3600. * uCode download functions
  3601. *
  3602. ******************************************************************************/
  3603. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  3604. {
  3605. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  3606. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  3607. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3608. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  3609. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3610. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3611. }
  3612. /**
  3613. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  3614. * looking at all data.
  3615. */
  3616. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  3617. {
  3618. u32 val;
  3619. u32 save_len = len;
  3620. int rc = 0;
  3621. u32 errcnt;
  3622. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3623. rc = iwl_grab_nic_access(priv);
  3624. if (rc)
  3625. return rc;
  3626. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3627. IWL39_RTC_INST_LOWER_BOUND);
  3628. errcnt = 0;
  3629. for (; len > 0; len -= sizeof(u32), image++) {
  3630. /* read data comes through single port, auto-incr addr */
  3631. /* NOTE: Use the debugless read so we don't flood kernel log
  3632. * if IWL_DL_IO is set */
  3633. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3634. if (val != le32_to_cpu(*image)) {
  3635. IWL_ERR(priv, "uCode INST section is invalid at "
  3636. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3637. save_len - len, val, le32_to_cpu(*image));
  3638. rc = -EIO;
  3639. errcnt++;
  3640. if (errcnt >= 20)
  3641. break;
  3642. }
  3643. }
  3644. iwl_release_nic_access(priv);
  3645. if (!errcnt)
  3646. IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
  3647. return rc;
  3648. }
  3649. /**
  3650. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  3651. * using sample data 100 bytes apart. If these sample points are good,
  3652. * it's a pretty good bet that everything between them is good, too.
  3653. */
  3654. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  3655. {
  3656. u32 val;
  3657. int rc = 0;
  3658. u32 errcnt = 0;
  3659. u32 i;
  3660. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3661. rc = iwl_grab_nic_access(priv);
  3662. if (rc)
  3663. return rc;
  3664. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  3665. /* read data comes through single port, auto-incr addr */
  3666. /* NOTE: Use the debugless read so we don't flood kernel log
  3667. * if IWL_DL_IO is set */
  3668. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3669. i + IWL39_RTC_INST_LOWER_BOUND);
  3670. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3671. if (val != le32_to_cpu(*image)) {
  3672. #if 0 /* Enable this if you want to see details */
  3673. IWL_ERR(priv, "uCode INST section is invalid at "
  3674. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3675. i, val, *image);
  3676. #endif
  3677. rc = -EIO;
  3678. errcnt++;
  3679. if (errcnt >= 3)
  3680. break;
  3681. }
  3682. }
  3683. iwl_release_nic_access(priv);
  3684. return rc;
  3685. }
  3686. /**
  3687. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  3688. * and verify its contents
  3689. */
  3690. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  3691. {
  3692. __le32 *image;
  3693. u32 len;
  3694. int rc = 0;
  3695. /* Try bootstrap */
  3696. image = (__le32 *)priv->ucode_boot.v_addr;
  3697. len = priv->ucode_boot.len;
  3698. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3699. if (rc == 0) {
  3700. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  3701. return 0;
  3702. }
  3703. /* Try initialize */
  3704. image = (__le32 *)priv->ucode_init.v_addr;
  3705. len = priv->ucode_init.len;
  3706. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3707. if (rc == 0) {
  3708. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  3709. return 0;
  3710. }
  3711. /* Try runtime/protocol */
  3712. image = (__le32 *)priv->ucode_code.v_addr;
  3713. len = priv->ucode_code.len;
  3714. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3715. if (rc == 0) {
  3716. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  3717. return 0;
  3718. }
  3719. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  3720. /* Since nothing seems to match, show first several data entries in
  3721. * instruction SRAM, so maybe visual inspection will give a clue.
  3722. * Selection of bootstrap image (vs. other images) is arbitrary. */
  3723. image = (__le32 *)priv->ucode_boot.v_addr;
  3724. len = priv->ucode_boot.len;
  3725. rc = iwl3945_verify_inst_full(priv, image, len);
  3726. return rc;
  3727. }
  3728. static void iwl3945_nic_start(struct iwl_priv *priv)
  3729. {
  3730. /* Remove all resets to allow NIC to operate */
  3731. iwl_write32(priv, CSR_RESET, 0);
  3732. }
  3733. /**
  3734. * iwl3945_read_ucode - Read uCode images from disk file.
  3735. *
  3736. * Copy into buffers for card to fetch via bus-mastering
  3737. */
  3738. static int iwl3945_read_ucode(struct iwl_priv *priv)
  3739. {
  3740. struct iwl_ucode *ucode;
  3741. int ret = -EINVAL, index;
  3742. const struct firmware *ucode_raw;
  3743. /* firmware file name contains uCode/driver compatibility version */
  3744. const char *name_pre = priv->cfg->fw_name_pre;
  3745. const unsigned int api_max = priv->cfg->ucode_api_max;
  3746. const unsigned int api_min = priv->cfg->ucode_api_min;
  3747. char buf[25];
  3748. u8 *src;
  3749. size_t len;
  3750. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  3751. /* Ask kernel firmware_class module to get the boot firmware off disk.
  3752. * request_firmware() is synchronous, file is in memory on return. */
  3753. for (index = api_max; index >= api_min; index--) {
  3754. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  3755. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  3756. if (ret < 0) {
  3757. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  3758. buf, ret);
  3759. if (ret == -ENOENT)
  3760. continue;
  3761. else
  3762. goto error;
  3763. } else {
  3764. if (index < api_max)
  3765. IWL_ERR(priv, "Loaded firmware %s, "
  3766. "which is deprecated. "
  3767. " Please use API v%u instead.\n",
  3768. buf, api_max);
  3769. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  3770. buf, ucode_raw->size);
  3771. break;
  3772. }
  3773. }
  3774. if (ret < 0)
  3775. goto error;
  3776. /* Make sure that we got at least our header! */
  3777. if (ucode_raw->size < sizeof(*ucode)) {
  3778. IWL_ERR(priv, "File size way too small!\n");
  3779. ret = -EINVAL;
  3780. goto err_release;
  3781. }
  3782. /* Data from ucode file: header followed by uCode images */
  3783. ucode = (void *)ucode_raw->data;
  3784. priv->ucode_ver = le32_to_cpu(ucode->ver);
  3785. api_ver = IWL_UCODE_API(priv->ucode_ver);
  3786. inst_size = le32_to_cpu(ucode->inst_size);
  3787. data_size = le32_to_cpu(ucode->data_size);
  3788. init_size = le32_to_cpu(ucode->init_size);
  3789. init_data_size = le32_to_cpu(ucode->init_data_size);
  3790. boot_size = le32_to_cpu(ucode->boot_size);
  3791. /* api_ver should match the api version forming part of the
  3792. * firmware filename ... but we don't check for that and only rely
  3793. * on the API version read from firware header from here on forward */
  3794. if (api_ver < api_min || api_ver > api_max) {
  3795. IWL_ERR(priv, "Driver unable to support your firmware API. "
  3796. "Driver supports v%u, firmware is v%u.\n",
  3797. api_max, api_ver);
  3798. priv->ucode_ver = 0;
  3799. ret = -EINVAL;
  3800. goto err_release;
  3801. }
  3802. if (api_ver != api_max)
  3803. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  3804. "got %u. New firmware can be obtained "
  3805. "from http://www.intellinuxwireless.org.\n",
  3806. api_max, api_ver);
  3807. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  3808. IWL_UCODE_MAJOR(priv->ucode_ver),
  3809. IWL_UCODE_MINOR(priv->ucode_ver),
  3810. IWL_UCODE_API(priv->ucode_ver),
  3811. IWL_UCODE_SERIAL(priv->ucode_ver));
  3812. IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
  3813. priv->ucode_ver);
  3814. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  3815. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
  3816. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
  3817. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
  3818. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  3819. /* Verify size of file vs. image size info in file's header */
  3820. if (ucode_raw->size < sizeof(*ucode) +
  3821. inst_size + data_size + init_size +
  3822. init_data_size + boot_size) {
  3823. IWL_DEBUG_INFO("uCode file size %d too small\n",
  3824. (int)ucode_raw->size);
  3825. ret = -EINVAL;
  3826. goto err_release;
  3827. }
  3828. /* Verify that uCode images will fit in card's SRAM */
  3829. if (inst_size > IWL39_MAX_INST_SIZE) {
  3830. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  3831. inst_size);
  3832. ret = -EINVAL;
  3833. goto err_release;
  3834. }
  3835. if (data_size > IWL39_MAX_DATA_SIZE) {
  3836. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  3837. data_size);
  3838. ret = -EINVAL;
  3839. goto err_release;
  3840. }
  3841. if (init_size > IWL39_MAX_INST_SIZE) {
  3842. IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
  3843. init_size);
  3844. ret = -EINVAL;
  3845. goto err_release;
  3846. }
  3847. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  3848. IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
  3849. init_data_size);
  3850. ret = -EINVAL;
  3851. goto err_release;
  3852. }
  3853. if (boot_size > IWL39_MAX_BSM_SIZE) {
  3854. IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
  3855. boot_size);
  3856. ret = -EINVAL;
  3857. goto err_release;
  3858. }
  3859. /* Allocate ucode buffers for card's bus-master loading ... */
  3860. /* Runtime instructions and 2 copies of data:
  3861. * 1) unmodified from disk
  3862. * 2) backup cache for save/restore during power-downs */
  3863. priv->ucode_code.len = inst_size;
  3864. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  3865. priv->ucode_data.len = data_size;
  3866. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  3867. priv->ucode_data_backup.len = data_size;
  3868. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3869. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  3870. !priv->ucode_data_backup.v_addr)
  3871. goto err_pci_alloc;
  3872. /* Initialization instructions and data */
  3873. if (init_size && init_data_size) {
  3874. priv->ucode_init.len = init_size;
  3875. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  3876. priv->ucode_init_data.len = init_data_size;
  3877. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3878. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  3879. goto err_pci_alloc;
  3880. }
  3881. /* Bootstrap (instructions only, no data) */
  3882. if (boot_size) {
  3883. priv->ucode_boot.len = boot_size;
  3884. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3885. if (!priv->ucode_boot.v_addr)
  3886. goto err_pci_alloc;
  3887. }
  3888. /* Copy images into buffers for card's bus-master reads ... */
  3889. /* Runtime instructions (first block of data in file) */
  3890. src = &ucode->data[0];
  3891. len = priv->ucode_code.len;
  3892. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  3893. memcpy(priv->ucode_code.v_addr, src, len);
  3894. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  3895. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  3896. /* Runtime data (2nd block)
  3897. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  3898. src = &ucode->data[inst_size];
  3899. len = priv->ucode_data.len;
  3900. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  3901. memcpy(priv->ucode_data.v_addr, src, len);
  3902. memcpy(priv->ucode_data_backup.v_addr, src, len);
  3903. /* Initialization instructions (3rd block) */
  3904. if (init_size) {
  3905. src = &ucode->data[inst_size + data_size];
  3906. len = priv->ucode_init.len;
  3907. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  3908. len);
  3909. memcpy(priv->ucode_init.v_addr, src, len);
  3910. }
  3911. /* Initialization data (4th block) */
  3912. if (init_data_size) {
  3913. src = &ucode->data[inst_size + data_size + init_size];
  3914. len = priv->ucode_init_data.len;
  3915. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  3916. (int)len);
  3917. memcpy(priv->ucode_init_data.v_addr, src, len);
  3918. }
  3919. /* Bootstrap instructions (5th block) */
  3920. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  3921. len = priv->ucode_boot.len;
  3922. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  3923. (int)len);
  3924. memcpy(priv->ucode_boot.v_addr, src, len);
  3925. /* We have our copies now, allow OS release its copies */
  3926. release_firmware(ucode_raw);
  3927. return 0;
  3928. err_pci_alloc:
  3929. IWL_ERR(priv, "failed to allocate pci memory\n");
  3930. ret = -ENOMEM;
  3931. iwl3945_dealloc_ucode_pci(priv);
  3932. err_release:
  3933. release_firmware(ucode_raw);
  3934. error:
  3935. return ret;
  3936. }
  3937. /**
  3938. * iwl3945_set_ucode_ptrs - Set uCode address location
  3939. *
  3940. * Tell initialization uCode where to find runtime uCode.
  3941. *
  3942. * BSM registers initially contain pointers to initialization uCode.
  3943. * We need to replace them to load runtime uCode inst and data,
  3944. * and to save runtime data when powering down.
  3945. */
  3946. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  3947. {
  3948. dma_addr_t pinst;
  3949. dma_addr_t pdata;
  3950. int rc = 0;
  3951. unsigned long flags;
  3952. /* bits 31:0 for 3945 */
  3953. pinst = priv->ucode_code.p_addr;
  3954. pdata = priv->ucode_data_backup.p_addr;
  3955. spin_lock_irqsave(&priv->lock, flags);
  3956. rc = iwl_grab_nic_access(priv);
  3957. if (rc) {
  3958. spin_unlock_irqrestore(&priv->lock, flags);
  3959. return rc;
  3960. }
  3961. /* Tell bootstrap uCode where to find image to load */
  3962. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  3963. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  3964. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  3965. priv->ucode_data.len);
  3966. /* Inst byte count must be last to set up, bit 31 signals uCode
  3967. * that all new ptr/size info is in place */
  3968. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  3969. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  3970. iwl_release_nic_access(priv);
  3971. spin_unlock_irqrestore(&priv->lock, flags);
  3972. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  3973. return rc;
  3974. }
  3975. /**
  3976. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  3977. *
  3978. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  3979. *
  3980. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  3981. */
  3982. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  3983. {
  3984. /* Check alive response for "valid" sign from uCode */
  3985. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  3986. /* We had an error bringing up the hardware, so take it
  3987. * all the way back down so we can try again */
  3988. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  3989. goto restart;
  3990. }
  3991. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  3992. * This is a paranoid check, because we would not have gotten the
  3993. * "initialize" alive if code weren't properly loaded. */
  3994. if (iwl3945_verify_ucode(priv)) {
  3995. /* Runtime instruction load was bad;
  3996. * take it all the way back down so we can try again */
  3997. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  3998. goto restart;
  3999. }
  4000. /* Send pointers to protocol/runtime uCode image ... init code will
  4001. * load and launch runtime uCode, which will send us another "Alive"
  4002. * notification. */
  4003. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4004. if (iwl3945_set_ucode_ptrs(priv)) {
  4005. /* Runtime instruction load won't happen;
  4006. * take it all the way back down so we can try again */
  4007. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4008. goto restart;
  4009. }
  4010. return;
  4011. restart:
  4012. queue_work(priv->workqueue, &priv->restart);
  4013. }
  4014. /* temporary */
  4015. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
  4016. struct sk_buff *skb);
  4017. /**
  4018. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  4019. * from protocol/runtime uCode (initialization uCode's
  4020. * Alive gets handled by iwl3945_init_alive_start()).
  4021. */
  4022. static void iwl3945_alive_start(struct iwl_priv *priv)
  4023. {
  4024. int rc = 0;
  4025. int thermal_spin = 0;
  4026. u32 rfkill;
  4027. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4028. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4029. /* We had an error bringing up the hardware, so take it
  4030. * all the way back down so we can try again */
  4031. IWL_DEBUG_INFO("Alive failed.\n");
  4032. goto restart;
  4033. }
  4034. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4035. * This is a paranoid check, because we would not have gotten the
  4036. * "runtime" alive if code weren't properly loaded. */
  4037. if (iwl3945_verify_ucode(priv)) {
  4038. /* Runtime instruction load was bad;
  4039. * take it all the way back down so we can try again */
  4040. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4041. goto restart;
  4042. }
  4043. iwl3945_clear_stations_table(priv);
  4044. rc = iwl_grab_nic_access(priv);
  4045. if (rc) {
  4046. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  4047. return;
  4048. }
  4049. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  4050. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  4051. iwl_release_nic_access(priv);
  4052. if (rfkill & 0x1) {
  4053. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4054. /* if RFKILL is not on, then wait for thermal
  4055. * sensor in adapter to kick in */
  4056. while (iwl3945_hw_get_temperature(priv) == 0) {
  4057. thermal_spin++;
  4058. udelay(10);
  4059. }
  4060. if (thermal_spin)
  4061. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  4062. thermal_spin * 10);
  4063. } else
  4064. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4065. /* After the ALIVE response, we can send commands to 3945 uCode */
  4066. set_bit(STATUS_ALIVE, &priv->status);
  4067. /* Clear out the uCode error bit if it is set */
  4068. clear_bit(STATUS_FW_ERROR, &priv->status);
  4069. if (iwl_is_rfkill(priv))
  4070. return;
  4071. ieee80211_wake_queues(priv->hw);
  4072. priv->active_rate = priv->rates_mask;
  4073. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4074. iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4075. if (iwl3945_is_associated(priv)) {
  4076. struct iwl3945_rxon_cmd *active_rxon =
  4077. (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
  4078. memcpy(&priv->staging39_rxon, &priv->active39_rxon,
  4079. sizeof(priv->staging39_rxon));
  4080. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4081. } else {
  4082. /* Initialize our rx_config data */
  4083. iwl3945_connection_init_rx_config(priv, priv->iw_mode);
  4084. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4085. }
  4086. /* Configure Bluetooth device coexistence support */
  4087. iwl3945_send_bt_config(priv);
  4088. /* Configure the adapter for unassociated operation */
  4089. iwl3945_commit_rxon(priv);
  4090. iwl3945_reg_txpower_periodic(priv);
  4091. iwl3945_led_register(priv);
  4092. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4093. set_bit(STATUS_READY, &priv->status);
  4094. wake_up_interruptible(&priv->wait_command_queue);
  4095. if (priv->error_recovering)
  4096. iwl3945_error_recovery(priv);
  4097. /* reassociate for ADHOC mode */
  4098. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  4099. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  4100. priv->vif);
  4101. if (beacon)
  4102. iwl3945_mac_beacon_update(priv->hw, beacon);
  4103. }
  4104. return;
  4105. restart:
  4106. queue_work(priv->workqueue, &priv->restart);
  4107. }
  4108. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  4109. static void __iwl3945_down(struct iwl_priv *priv)
  4110. {
  4111. unsigned long flags;
  4112. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4113. struct ieee80211_conf *conf = NULL;
  4114. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4115. conf = ieee80211_get_hw_conf(priv->hw);
  4116. if (!exit_pending)
  4117. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4118. iwl3945_led_unregister(priv);
  4119. iwl3945_clear_stations_table(priv);
  4120. /* Unblock any waiting calls */
  4121. wake_up_interruptible_all(&priv->wait_command_queue);
  4122. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4123. * exiting the module */
  4124. if (!exit_pending)
  4125. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4126. /* stop and reset the on-board processor */
  4127. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4128. /* tell the device to stop sending interrupts */
  4129. spin_lock_irqsave(&priv->lock, flags);
  4130. iwl3945_disable_interrupts(priv);
  4131. spin_unlock_irqrestore(&priv->lock, flags);
  4132. iwl_synchronize_irq(priv);
  4133. if (priv->mac80211_registered)
  4134. ieee80211_stop_queues(priv->hw);
  4135. /* If we have not previously called iwl3945_init() then
  4136. * clear all bits but the RF Kill and SUSPEND bits and return */
  4137. if (!iwl_is_init(priv)) {
  4138. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4139. STATUS_RF_KILL_HW |
  4140. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4141. STATUS_RF_KILL_SW |
  4142. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4143. STATUS_GEO_CONFIGURED |
  4144. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4145. STATUS_IN_SUSPEND |
  4146. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  4147. STATUS_EXIT_PENDING;
  4148. goto exit;
  4149. }
  4150. /* ...otherwise clear out all the status bits but the RF Kill and
  4151. * SUSPEND bits and continue taking the NIC down. */
  4152. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4153. STATUS_RF_KILL_HW |
  4154. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4155. STATUS_RF_KILL_SW |
  4156. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4157. STATUS_GEO_CONFIGURED |
  4158. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4159. STATUS_IN_SUSPEND |
  4160. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4161. STATUS_FW_ERROR |
  4162. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  4163. STATUS_EXIT_PENDING;
  4164. spin_lock_irqsave(&priv->lock, flags);
  4165. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4166. spin_unlock_irqrestore(&priv->lock, flags);
  4167. iwl3945_hw_txq_ctx_stop(priv);
  4168. iwl3945_hw_rxq_stop(priv);
  4169. spin_lock_irqsave(&priv->lock, flags);
  4170. if (!iwl_grab_nic_access(priv)) {
  4171. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4172. APMG_CLK_VAL_DMA_CLK_RQT);
  4173. iwl_release_nic_access(priv);
  4174. }
  4175. spin_unlock_irqrestore(&priv->lock, flags);
  4176. udelay(5);
  4177. priv->cfg->ops->lib->apm_ops.reset(priv);
  4178. exit:
  4179. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  4180. if (priv->ibss_beacon)
  4181. dev_kfree_skb(priv->ibss_beacon);
  4182. priv->ibss_beacon = NULL;
  4183. /* clear out any free frames */
  4184. iwl3945_clear_free_frames(priv);
  4185. }
  4186. static void iwl3945_down(struct iwl_priv *priv)
  4187. {
  4188. mutex_lock(&priv->mutex);
  4189. __iwl3945_down(priv);
  4190. mutex_unlock(&priv->mutex);
  4191. iwl3945_cancel_deferred_work(priv);
  4192. }
  4193. #define MAX_HW_RESTARTS 5
  4194. static int __iwl3945_up(struct iwl_priv *priv)
  4195. {
  4196. int rc, i;
  4197. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4198. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  4199. return -EIO;
  4200. }
  4201. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4202. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  4203. "parameter)\n");
  4204. return -ENODEV;
  4205. }
  4206. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4207. IWL_ERR(priv, "ucode not available for device bring up\n");
  4208. return -EIO;
  4209. }
  4210. /* If platform's RF_KILL switch is NOT set to KILL */
  4211. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4212. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4213. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4214. else {
  4215. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4216. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4217. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  4218. return -ENODEV;
  4219. }
  4220. }
  4221. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4222. rc = iwl3945_hw_nic_init(priv);
  4223. if (rc) {
  4224. IWL_ERR(priv, "Unable to int nic\n");
  4225. return rc;
  4226. }
  4227. /* make sure rfkill handshake bits are cleared */
  4228. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4229. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4230. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4231. /* clear (again), then enable host interrupts */
  4232. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4233. iwl3945_enable_interrupts(priv);
  4234. /* really make sure rfkill handshake bits are cleared */
  4235. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4236. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4237. /* Copy original ucode data image from disk into backup cache.
  4238. * This will be used to initialize the on-board processor's
  4239. * data SRAM for a clean start when the runtime program first loads. */
  4240. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4241. priv->ucode_data.len);
  4242. /* We return success when we resume from suspend and rf_kill is on. */
  4243. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4244. return 0;
  4245. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4246. iwl3945_clear_stations_table(priv);
  4247. /* load bootstrap state machine,
  4248. * load bootstrap program into processor's memory,
  4249. * prepare to load the "initialize" uCode */
  4250. priv->cfg->ops->lib->load_ucode(priv);
  4251. if (rc) {
  4252. IWL_ERR(priv,
  4253. "Unable to set up bootstrap uCode: %d\n", rc);
  4254. continue;
  4255. }
  4256. /* start card; "initialize" will load runtime ucode */
  4257. iwl3945_nic_start(priv);
  4258. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4259. return 0;
  4260. }
  4261. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4262. __iwl3945_down(priv);
  4263. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4264. /* tried to restart and config the device for as long as our
  4265. * patience could withstand */
  4266. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  4267. return -EIO;
  4268. }
  4269. /*****************************************************************************
  4270. *
  4271. * Workqueue callbacks
  4272. *
  4273. *****************************************************************************/
  4274. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  4275. {
  4276. struct iwl_priv *priv =
  4277. container_of(data, struct iwl_priv, init_alive_start.work);
  4278. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4279. return;
  4280. mutex_lock(&priv->mutex);
  4281. iwl3945_init_alive_start(priv);
  4282. mutex_unlock(&priv->mutex);
  4283. }
  4284. static void iwl3945_bg_alive_start(struct work_struct *data)
  4285. {
  4286. struct iwl_priv *priv =
  4287. container_of(data, struct iwl_priv, alive_start.work);
  4288. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4289. return;
  4290. mutex_lock(&priv->mutex);
  4291. iwl3945_alive_start(priv);
  4292. mutex_unlock(&priv->mutex);
  4293. }
  4294. static void iwl3945_bg_rf_kill(struct work_struct *work)
  4295. {
  4296. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4297. wake_up_interruptible(&priv->wait_command_queue);
  4298. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4299. return;
  4300. mutex_lock(&priv->mutex);
  4301. if (!iwl_is_rfkill(priv)) {
  4302. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4303. "HW and/or SW RF Kill no longer active, restarting "
  4304. "device\n");
  4305. if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
  4306. test_bit(STATUS_ALIVE, &priv->status))
  4307. queue_work(priv->workqueue, &priv->restart);
  4308. } else {
  4309. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4310. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4311. "disabled by SW switch\n");
  4312. else
  4313. IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
  4314. "Kill switch must be turned off for "
  4315. "wireless networking to work.\n");
  4316. }
  4317. mutex_unlock(&priv->mutex);
  4318. iwl3945_rfkill_set_hw_state(priv);
  4319. }
  4320. static void iwl3945_rfkill_poll(struct work_struct *data)
  4321. {
  4322. struct iwl_priv *priv =
  4323. container_of(data, struct iwl_priv, rfkill_poll.work);
  4324. unsigned long status = priv->status;
  4325. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4326. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4327. else
  4328. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4329. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  4330. queue_work(priv->workqueue, &priv->rf_kill);
  4331. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4332. round_jiffies_relative(2 * HZ));
  4333. }
  4334. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4335. static void iwl3945_bg_scan_check(struct work_struct *data)
  4336. {
  4337. struct iwl_priv *priv =
  4338. container_of(data, struct iwl_priv, scan_check.work);
  4339. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4340. return;
  4341. mutex_lock(&priv->mutex);
  4342. if (test_bit(STATUS_SCANNING, &priv->status) ||
  4343. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4344. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  4345. "Scan completion watchdog resetting adapter (%dms)\n",
  4346. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  4347. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4348. iwl3945_send_scan_abort(priv);
  4349. }
  4350. mutex_unlock(&priv->mutex);
  4351. }
  4352. static void iwl3945_bg_request_scan(struct work_struct *data)
  4353. {
  4354. struct iwl_priv *priv =
  4355. container_of(data, struct iwl_priv, request_scan);
  4356. struct iwl_host_cmd cmd = {
  4357. .id = REPLY_SCAN_CMD,
  4358. .len = sizeof(struct iwl3945_scan_cmd),
  4359. .meta.flags = CMD_SIZE_HUGE,
  4360. };
  4361. int rc = 0;
  4362. struct iwl3945_scan_cmd *scan;
  4363. struct ieee80211_conf *conf = NULL;
  4364. u8 n_probes = 2;
  4365. enum ieee80211_band band;
  4366. DECLARE_SSID_BUF(ssid);
  4367. conf = ieee80211_get_hw_conf(priv->hw);
  4368. mutex_lock(&priv->mutex);
  4369. if (!iwl_is_ready(priv)) {
  4370. IWL_WARN(priv, "request scan called when driver not ready.\n");
  4371. goto done;
  4372. }
  4373. /* Make sure the scan wasn't canceled before this queued work
  4374. * was given the chance to run... */
  4375. if (!test_bit(STATUS_SCANNING, &priv->status))
  4376. goto done;
  4377. /* This should never be called or scheduled if there is currently
  4378. * a scan active in the hardware. */
  4379. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  4380. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  4381. "Ignoring second request.\n");
  4382. rc = -EIO;
  4383. goto done;
  4384. }
  4385. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4386. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  4387. goto done;
  4388. }
  4389. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4390. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  4391. goto done;
  4392. }
  4393. if (iwl_is_rfkill(priv)) {
  4394. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  4395. goto done;
  4396. }
  4397. if (!test_bit(STATUS_READY, &priv->status)) {
  4398. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  4399. goto done;
  4400. }
  4401. if (!priv->scan_bands) {
  4402. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  4403. goto done;
  4404. }
  4405. if (!priv->scan) {
  4406. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  4407. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  4408. if (!priv->scan) {
  4409. rc = -ENOMEM;
  4410. goto done;
  4411. }
  4412. }
  4413. scan = priv->scan;
  4414. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  4415. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  4416. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  4417. if (iwl3945_is_associated(priv)) {
  4418. u16 interval = 0;
  4419. u32 extra;
  4420. u32 suspend_time = 100;
  4421. u32 scan_suspend_time = 100;
  4422. unsigned long flags;
  4423. IWL_DEBUG_INFO("Scanning while associated...\n");
  4424. spin_lock_irqsave(&priv->lock, flags);
  4425. interval = priv->beacon_int;
  4426. spin_unlock_irqrestore(&priv->lock, flags);
  4427. scan->suspend_time = 0;
  4428. scan->max_out_time = cpu_to_le32(200 * 1024);
  4429. if (!interval)
  4430. interval = suspend_time;
  4431. /*
  4432. * suspend time format:
  4433. * 0-19: beacon interval in usec (time before exec.)
  4434. * 20-23: 0
  4435. * 24-31: number of beacons (suspend between channels)
  4436. */
  4437. extra = (suspend_time / interval) << 24;
  4438. scan_suspend_time = 0xFF0FFFFF &
  4439. (extra | ((suspend_time % interval) * 1024));
  4440. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  4441. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  4442. scan_suspend_time, interval);
  4443. }
  4444. /* We should add the ability for user to lock to PASSIVE ONLY */
  4445. if (priv->one_direct_scan) {
  4446. IWL_DEBUG_SCAN
  4447. ("Kicking off one direct scan for '%s'\n",
  4448. print_ssid(ssid, priv->direct_ssid,
  4449. priv->direct_ssid_len));
  4450. scan->direct_scan[0].id = WLAN_EID_SSID;
  4451. scan->direct_scan[0].len = priv->direct_ssid_len;
  4452. memcpy(scan->direct_scan[0].ssid,
  4453. priv->direct_ssid, priv->direct_ssid_len);
  4454. n_probes++;
  4455. } else
  4456. IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
  4457. /* We don't build a direct scan probe request; the uCode will do
  4458. * that based on the direct_mask added to each channel entry */
  4459. scan->tx_cmd.len = cpu_to_le16(
  4460. iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  4461. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  4462. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  4463. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  4464. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  4465. /* flags + rate selection */
  4466. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  4467. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  4468. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  4469. scan->good_CRC_th = 0;
  4470. band = IEEE80211_BAND_2GHZ;
  4471. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  4472. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  4473. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  4474. band = IEEE80211_BAND_5GHZ;
  4475. } else {
  4476. IWL_WARN(priv, "Invalid scan band count\n");
  4477. goto done;
  4478. }
  4479. /* select Rx antennas */
  4480. scan->flags |= iwl3945_get_antenna_flags(priv);
  4481. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  4482. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  4483. scan->channel_count =
  4484. iwl3945_get_channels_for_scan(priv, band, 1, /* active */
  4485. n_probes,
  4486. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  4487. if (scan->channel_count == 0) {
  4488. IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
  4489. goto done;
  4490. }
  4491. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  4492. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  4493. cmd.data = scan;
  4494. scan->len = cpu_to_le16(cmd.len);
  4495. set_bit(STATUS_SCAN_HW, &priv->status);
  4496. rc = iwl_send_cmd_sync(priv, &cmd);
  4497. if (rc)
  4498. goto done;
  4499. queue_delayed_work(priv->workqueue, &priv->scan_check,
  4500. IWL_SCAN_CHECK_WATCHDOG);
  4501. mutex_unlock(&priv->mutex);
  4502. return;
  4503. done:
  4504. /* can not perform scan make sure we clear scanning
  4505. * bits from status so next scan request can be performed.
  4506. * if we dont clear scanning status bit here all next scan
  4507. * will fail
  4508. */
  4509. clear_bit(STATUS_SCAN_HW, &priv->status);
  4510. clear_bit(STATUS_SCANNING, &priv->status);
  4511. /* inform mac80211 scan aborted */
  4512. queue_work(priv->workqueue, &priv->scan_completed);
  4513. mutex_unlock(&priv->mutex);
  4514. }
  4515. static void iwl3945_bg_up(struct work_struct *data)
  4516. {
  4517. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  4518. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4519. return;
  4520. mutex_lock(&priv->mutex);
  4521. __iwl3945_up(priv);
  4522. mutex_unlock(&priv->mutex);
  4523. iwl3945_rfkill_set_hw_state(priv);
  4524. }
  4525. static void iwl3945_bg_restart(struct work_struct *data)
  4526. {
  4527. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  4528. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4529. return;
  4530. iwl3945_down(priv);
  4531. queue_work(priv->workqueue, &priv->up);
  4532. }
  4533. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  4534. {
  4535. struct iwl_priv *priv =
  4536. container_of(data, struct iwl_priv, rx_replenish);
  4537. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4538. return;
  4539. mutex_lock(&priv->mutex);
  4540. iwl3945_rx_replenish(priv);
  4541. mutex_unlock(&priv->mutex);
  4542. }
  4543. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  4544. static void iwl3945_post_associate(struct iwl_priv *priv)
  4545. {
  4546. int rc = 0;
  4547. struct ieee80211_conf *conf = NULL;
  4548. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4549. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  4550. return;
  4551. }
  4552. IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
  4553. priv->assoc_id, priv->active39_rxon.bssid_addr);
  4554. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4555. return;
  4556. if (!priv->vif || !priv->is_open)
  4557. return;
  4558. iwl_scan_cancel_timeout(priv, 200);
  4559. conf = ieee80211_get_hw_conf(priv->hw);
  4560. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4561. iwl3945_commit_rxon(priv);
  4562. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4563. iwl3945_setup_rxon_timing(priv);
  4564. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4565. sizeof(priv->rxon_timing), &priv->rxon_timing);
  4566. if (rc)
  4567. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4568. "Attempting to continue.\n");
  4569. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4570. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4571. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  4572. priv->assoc_id, priv->beacon_int);
  4573. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4574. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4575. else
  4576. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4577. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4578. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4579. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  4580. else
  4581. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4582. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4583. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4584. }
  4585. iwl3945_commit_rxon(priv);
  4586. switch (priv->iw_mode) {
  4587. case NL80211_IFTYPE_STATION:
  4588. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  4589. break;
  4590. case NL80211_IFTYPE_ADHOC:
  4591. priv->assoc_id = 1;
  4592. iwl3945_add_station(priv, priv->bssid, 0, 0);
  4593. iwl3945_sync_sta(priv, IWL_STA_ID,
  4594. (priv->band == IEEE80211_BAND_5GHZ) ?
  4595. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  4596. CMD_ASYNC);
  4597. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  4598. iwl3945_send_beacon_cmd(priv);
  4599. break;
  4600. default:
  4601. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  4602. __func__, priv->iw_mode);
  4603. break;
  4604. }
  4605. iwl3945_activate_qos(priv, 0);
  4606. /* we have just associated, don't start scan too early */
  4607. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  4608. }
  4609. static void iwl3945_bg_abort_scan(struct work_struct *work)
  4610. {
  4611. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  4612. if (!iwl_is_ready(priv))
  4613. return;
  4614. mutex_lock(&priv->mutex);
  4615. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  4616. iwl3945_send_scan_abort(priv);
  4617. mutex_unlock(&priv->mutex);
  4618. }
  4619. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
  4620. static void iwl3945_bg_scan_completed(struct work_struct *work)
  4621. {
  4622. struct iwl_priv *priv =
  4623. container_of(work, struct iwl_priv, scan_completed);
  4624. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  4625. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4626. return;
  4627. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  4628. iwl3945_mac_config(priv->hw, 0);
  4629. ieee80211_scan_completed(priv->hw);
  4630. /* Since setting the TXPOWER may have been deferred while
  4631. * performing the scan, fire one off */
  4632. mutex_lock(&priv->mutex);
  4633. iwl3945_hw_reg_send_txpower(priv);
  4634. mutex_unlock(&priv->mutex);
  4635. }
  4636. /*****************************************************************************
  4637. *
  4638. * mac80211 entry point functions
  4639. *
  4640. *****************************************************************************/
  4641. #define UCODE_READY_TIMEOUT (2 * HZ)
  4642. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  4643. {
  4644. struct iwl_priv *priv = hw->priv;
  4645. int ret;
  4646. IWL_DEBUG_MAC80211("enter\n");
  4647. /* we should be verifying the device is ready to be opened */
  4648. mutex_lock(&priv->mutex);
  4649. memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
  4650. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  4651. * ucode filename and max sizes are card-specific. */
  4652. if (!priv->ucode_code.len) {
  4653. ret = iwl3945_read_ucode(priv);
  4654. if (ret) {
  4655. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  4656. mutex_unlock(&priv->mutex);
  4657. goto out_release_irq;
  4658. }
  4659. }
  4660. ret = __iwl3945_up(priv);
  4661. mutex_unlock(&priv->mutex);
  4662. iwl3945_rfkill_set_hw_state(priv);
  4663. if (ret)
  4664. goto out_release_irq;
  4665. IWL_DEBUG_INFO("Start UP work.\n");
  4666. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  4667. return 0;
  4668. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  4669. * mac80211 will not be run successfully. */
  4670. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  4671. test_bit(STATUS_READY, &priv->status),
  4672. UCODE_READY_TIMEOUT);
  4673. if (!ret) {
  4674. if (!test_bit(STATUS_READY, &priv->status)) {
  4675. IWL_ERR(priv,
  4676. "Wait for START_ALIVE timeout after %dms.\n",
  4677. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  4678. ret = -ETIMEDOUT;
  4679. goto out_release_irq;
  4680. }
  4681. }
  4682. /* ucode is running and will send rfkill notifications,
  4683. * no need to poll the killswitch state anymore */
  4684. cancel_delayed_work(&priv->rfkill_poll);
  4685. priv->is_open = 1;
  4686. IWL_DEBUG_MAC80211("leave\n");
  4687. return 0;
  4688. out_release_irq:
  4689. priv->is_open = 0;
  4690. IWL_DEBUG_MAC80211("leave - failed\n");
  4691. return ret;
  4692. }
  4693. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  4694. {
  4695. struct iwl_priv *priv = hw->priv;
  4696. IWL_DEBUG_MAC80211("enter\n");
  4697. if (!priv->is_open) {
  4698. IWL_DEBUG_MAC80211("leave - skip\n");
  4699. return;
  4700. }
  4701. priv->is_open = 0;
  4702. if (iwl_is_ready_rf(priv)) {
  4703. /* stop mac, cancel any scan request and clear
  4704. * RXON_FILTER_ASSOC_MSK BIT
  4705. */
  4706. mutex_lock(&priv->mutex);
  4707. iwl_scan_cancel_timeout(priv, 100);
  4708. mutex_unlock(&priv->mutex);
  4709. }
  4710. iwl3945_down(priv);
  4711. flush_workqueue(priv->workqueue);
  4712. /* start polling the killswitch state again */
  4713. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4714. round_jiffies_relative(2 * HZ));
  4715. IWL_DEBUG_MAC80211("leave\n");
  4716. }
  4717. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  4718. {
  4719. struct iwl_priv *priv = hw->priv;
  4720. IWL_DEBUG_MAC80211("enter\n");
  4721. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  4722. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  4723. if (iwl3945_tx_skb(priv, skb))
  4724. dev_kfree_skb_any(skb);
  4725. IWL_DEBUG_MAC80211("leave\n");
  4726. return NETDEV_TX_OK;
  4727. }
  4728. static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
  4729. struct ieee80211_if_init_conf *conf)
  4730. {
  4731. struct iwl_priv *priv = hw->priv;
  4732. unsigned long flags;
  4733. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  4734. if (priv->vif) {
  4735. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  4736. return -EOPNOTSUPP;
  4737. }
  4738. spin_lock_irqsave(&priv->lock, flags);
  4739. priv->vif = conf->vif;
  4740. priv->iw_mode = conf->type;
  4741. spin_unlock_irqrestore(&priv->lock, flags);
  4742. mutex_lock(&priv->mutex);
  4743. if (conf->mac_addr) {
  4744. IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
  4745. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  4746. }
  4747. if (iwl_is_ready(priv))
  4748. iwl3945_set_mode(priv, conf->type);
  4749. mutex_unlock(&priv->mutex);
  4750. IWL_DEBUG_MAC80211("leave\n");
  4751. return 0;
  4752. }
  4753. /**
  4754. * iwl3945_mac_config - mac80211 config callback
  4755. *
  4756. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  4757. * be set inappropriately and the driver currently sets the hardware up to
  4758. * use it whenever needed.
  4759. */
  4760. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
  4761. {
  4762. struct iwl_priv *priv = hw->priv;
  4763. const struct iwl_channel_info *ch_info;
  4764. struct ieee80211_conf *conf = &hw->conf;
  4765. unsigned long flags;
  4766. int ret = 0;
  4767. mutex_lock(&priv->mutex);
  4768. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  4769. if (!iwl_is_ready(priv)) {
  4770. IWL_DEBUG_MAC80211("leave - not ready\n");
  4771. ret = -EIO;
  4772. goto out;
  4773. }
  4774. if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
  4775. test_bit(STATUS_SCANNING, &priv->status))) {
  4776. IWL_DEBUG_MAC80211("leave - scanning\n");
  4777. set_bit(STATUS_CONF_PENDING, &priv->status);
  4778. mutex_unlock(&priv->mutex);
  4779. return 0;
  4780. }
  4781. spin_lock_irqsave(&priv->lock, flags);
  4782. ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
  4783. conf->channel->hw_value);
  4784. if (!is_channel_valid(ch_info)) {
  4785. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
  4786. conf->channel->hw_value, conf->channel->band);
  4787. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  4788. spin_unlock_irqrestore(&priv->lock, flags);
  4789. ret = -EINVAL;
  4790. goto out;
  4791. }
  4792. iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
  4793. iwl3945_set_flags_for_phymode(priv, conf->channel->band);
  4794. /* The list of supported rates and rate mask can be different
  4795. * for each phymode; since the phymode may have changed, reset
  4796. * the rate mask to what mac80211 lists */
  4797. iwl3945_set_rate(priv);
  4798. spin_unlock_irqrestore(&priv->lock, flags);
  4799. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  4800. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  4801. iwl3945_hw_channel_switch(priv, conf->channel);
  4802. goto out;
  4803. }
  4804. #endif
  4805. iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
  4806. if (!conf->radio_enabled) {
  4807. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  4808. goto out;
  4809. }
  4810. if (iwl_is_rfkill(priv)) {
  4811. IWL_DEBUG_MAC80211("leave - RF kill\n");
  4812. ret = -EIO;
  4813. goto out;
  4814. }
  4815. iwl3945_set_rate(priv);
  4816. if (memcmp(&priv->active39_rxon,
  4817. &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
  4818. iwl3945_commit_rxon(priv);
  4819. else
  4820. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  4821. IWL_DEBUG_MAC80211("leave\n");
  4822. out:
  4823. clear_bit(STATUS_CONF_PENDING, &priv->status);
  4824. mutex_unlock(&priv->mutex);
  4825. return ret;
  4826. }
  4827. static void iwl3945_config_ap(struct iwl_priv *priv)
  4828. {
  4829. int rc = 0;
  4830. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4831. return;
  4832. /* The following should be done only at AP bring up */
  4833. if (!(iwl3945_is_associated(priv))) {
  4834. /* RXON - unassoc (to set timing command) */
  4835. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4836. iwl3945_commit_rxon(priv);
  4837. /* RXON Timing */
  4838. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4839. iwl3945_setup_rxon_timing(priv);
  4840. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4841. sizeof(priv->rxon_timing),
  4842. &priv->rxon_timing);
  4843. if (rc)
  4844. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4845. "Attempting to continue.\n");
  4846. /* FIXME: what should be the assoc_id for AP? */
  4847. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4848. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4849. priv->staging39_rxon.flags |=
  4850. RXON_FLG_SHORT_PREAMBLE_MSK;
  4851. else
  4852. priv->staging39_rxon.flags &=
  4853. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4854. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4855. if (priv->assoc_capability &
  4856. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4857. priv->staging39_rxon.flags |=
  4858. RXON_FLG_SHORT_SLOT_MSK;
  4859. else
  4860. priv->staging39_rxon.flags &=
  4861. ~RXON_FLG_SHORT_SLOT_MSK;
  4862. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4863. priv->staging39_rxon.flags &=
  4864. ~RXON_FLG_SHORT_SLOT_MSK;
  4865. }
  4866. /* restore RXON assoc */
  4867. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4868. iwl3945_commit_rxon(priv);
  4869. iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
  4870. }
  4871. iwl3945_send_beacon_cmd(priv);
  4872. /* FIXME - we need to add code here to detect a totally new
  4873. * configuration, reset the AP, unassoc, rxon timing, assoc,
  4874. * clear sta table, add BCAST sta... */
  4875. }
  4876. static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
  4877. struct ieee80211_vif *vif,
  4878. struct ieee80211_if_conf *conf)
  4879. {
  4880. struct iwl_priv *priv = hw->priv;
  4881. int rc;
  4882. if (conf == NULL)
  4883. return -EIO;
  4884. if (priv->vif != vif) {
  4885. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  4886. return 0;
  4887. }
  4888. /* handle this temporarily here */
  4889. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  4890. conf->changed & IEEE80211_IFCC_BEACON) {
  4891. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  4892. if (!beacon)
  4893. return -ENOMEM;
  4894. mutex_lock(&priv->mutex);
  4895. rc = iwl3945_mac_beacon_update(hw, beacon);
  4896. mutex_unlock(&priv->mutex);
  4897. if (rc)
  4898. return rc;
  4899. }
  4900. if (!iwl_is_alive(priv))
  4901. return -EAGAIN;
  4902. mutex_lock(&priv->mutex);
  4903. if (conf->bssid)
  4904. IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
  4905. /*
  4906. * very dubious code was here; the probe filtering flag is never set:
  4907. *
  4908. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  4909. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  4910. */
  4911. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4912. if (!conf->bssid) {
  4913. conf->bssid = priv->mac_addr;
  4914. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  4915. IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
  4916. conf->bssid);
  4917. }
  4918. if (priv->ibss_beacon)
  4919. dev_kfree_skb(priv->ibss_beacon);
  4920. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  4921. }
  4922. if (iwl_is_rfkill(priv))
  4923. goto done;
  4924. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  4925. !is_multicast_ether_addr(conf->bssid)) {
  4926. /* If there is currently a HW scan going on in the background
  4927. * then we need to cancel it else the RXON below will fail. */
  4928. if (iwl_scan_cancel_timeout(priv, 100)) {
  4929. IWL_WARN(priv, "Aborted scan still in progress "
  4930. "after 100ms\n");
  4931. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  4932. mutex_unlock(&priv->mutex);
  4933. return -EAGAIN;
  4934. }
  4935. memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  4936. /* TODO: Audit driver for usage of these members and see
  4937. * if mac80211 deprecates them (priv->bssid looks like it
  4938. * shouldn't be there, but I haven't scanned the IBSS code
  4939. * to verify) - jpk */
  4940. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  4941. if (priv->iw_mode == NL80211_IFTYPE_AP)
  4942. iwl3945_config_ap(priv);
  4943. else {
  4944. rc = iwl3945_commit_rxon(priv);
  4945. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  4946. iwl3945_add_station(priv,
  4947. priv->active39_rxon.bssid_addr, 1, 0);
  4948. }
  4949. } else {
  4950. iwl_scan_cancel_timeout(priv, 100);
  4951. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4952. iwl3945_commit_rxon(priv);
  4953. }
  4954. done:
  4955. IWL_DEBUG_MAC80211("leave\n");
  4956. mutex_unlock(&priv->mutex);
  4957. return 0;
  4958. }
  4959. static void iwl3945_configure_filter(struct ieee80211_hw *hw,
  4960. unsigned int changed_flags,
  4961. unsigned int *total_flags,
  4962. int mc_count, struct dev_addr_list *mc_list)
  4963. {
  4964. struct iwl_priv *priv = hw->priv;
  4965. __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
  4966. IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
  4967. changed_flags, *total_flags);
  4968. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  4969. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  4970. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  4971. else
  4972. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  4973. }
  4974. if (changed_flags & FIF_ALLMULTI) {
  4975. if (*total_flags & FIF_ALLMULTI)
  4976. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  4977. else
  4978. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  4979. }
  4980. if (changed_flags & FIF_CONTROL) {
  4981. if (*total_flags & FIF_CONTROL)
  4982. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  4983. else
  4984. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  4985. }
  4986. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  4987. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  4988. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  4989. else
  4990. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  4991. }
  4992. /* We avoid iwl_commit_rxon here to commit the new filter flags
  4993. * since mac80211 will call ieee80211_hw_config immediately.
  4994. * (mc_list is not supported at this time). Otherwise, we need to
  4995. * queue a background iwl_commit_rxon work.
  4996. */
  4997. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  4998. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  4999. }
  5000. static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
  5001. struct ieee80211_if_init_conf *conf)
  5002. {
  5003. struct iwl_priv *priv = hw->priv;
  5004. IWL_DEBUG_MAC80211("enter\n");
  5005. mutex_lock(&priv->mutex);
  5006. if (iwl_is_ready_rf(priv)) {
  5007. iwl_scan_cancel_timeout(priv, 100);
  5008. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5009. iwl3945_commit_rxon(priv);
  5010. }
  5011. if (priv->vif == conf->vif) {
  5012. priv->vif = NULL;
  5013. memset(priv->bssid, 0, ETH_ALEN);
  5014. }
  5015. mutex_unlock(&priv->mutex);
  5016. IWL_DEBUG_MAC80211("leave\n");
  5017. }
  5018. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  5019. static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
  5020. struct ieee80211_vif *vif,
  5021. struct ieee80211_bss_conf *bss_conf,
  5022. u32 changes)
  5023. {
  5024. struct iwl_priv *priv = hw->priv;
  5025. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  5026. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5027. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  5028. bss_conf->use_short_preamble);
  5029. if (bss_conf->use_short_preamble)
  5030. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5031. else
  5032. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5033. }
  5034. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5035. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  5036. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5037. priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5038. else
  5039. priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5040. }
  5041. if (changes & BSS_CHANGED_ASSOC) {
  5042. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  5043. /* This should never happen as this function should
  5044. * never be called from interrupt context. */
  5045. if (WARN_ON_ONCE(in_interrupt()))
  5046. return;
  5047. if (bss_conf->assoc) {
  5048. priv->assoc_id = bss_conf->aid;
  5049. priv->beacon_int = bss_conf->beacon_int;
  5050. priv->timestamp = bss_conf->timestamp;
  5051. priv->assoc_capability = bss_conf->assoc_capability;
  5052. priv->next_scan_jiffies = jiffies +
  5053. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  5054. mutex_lock(&priv->mutex);
  5055. iwl3945_post_associate(priv);
  5056. mutex_unlock(&priv->mutex);
  5057. } else {
  5058. priv->assoc_id = 0;
  5059. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  5060. }
  5061. } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
  5062. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  5063. iwl3945_send_rxon_assoc(priv);
  5064. }
  5065. }
  5066. static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5067. {
  5068. int rc = 0;
  5069. unsigned long flags;
  5070. struct iwl_priv *priv = hw->priv;
  5071. DECLARE_SSID_BUF(ssid_buf);
  5072. IWL_DEBUG_MAC80211("enter\n");
  5073. mutex_lock(&priv->mutex);
  5074. spin_lock_irqsave(&priv->lock, flags);
  5075. if (!iwl_is_ready_rf(priv)) {
  5076. rc = -EIO;
  5077. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5078. goto out_unlock;
  5079. }
  5080. /* we don't schedule scan within next_scan_jiffies period */
  5081. if (priv->next_scan_jiffies &&
  5082. time_after(priv->next_scan_jiffies, jiffies)) {
  5083. rc = -EAGAIN;
  5084. goto out_unlock;
  5085. }
  5086. /* if we just finished scan ask for delay for a broadcast scan */
  5087. if ((len == 0) && priv->last_scan_jiffies &&
  5088. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  5089. jiffies)) {
  5090. rc = -EAGAIN;
  5091. goto out_unlock;
  5092. }
  5093. if (len) {
  5094. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5095. print_ssid(ssid_buf, ssid, len), (int)len);
  5096. priv->one_direct_scan = 1;
  5097. priv->direct_ssid_len = (u8)
  5098. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5099. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5100. } else
  5101. priv->one_direct_scan = 0;
  5102. rc = iwl3945_scan_initiate(priv);
  5103. IWL_DEBUG_MAC80211("leave\n");
  5104. out_unlock:
  5105. spin_unlock_irqrestore(&priv->lock, flags);
  5106. mutex_unlock(&priv->mutex);
  5107. return rc;
  5108. }
  5109. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5110. struct ieee80211_vif *vif,
  5111. struct ieee80211_sta *sta,
  5112. struct ieee80211_key_conf *key)
  5113. {
  5114. struct iwl_priv *priv = hw->priv;
  5115. const u8 *addr;
  5116. int ret;
  5117. u8 sta_id;
  5118. IWL_DEBUG_MAC80211("enter\n");
  5119. if (iwl3945_mod_params.sw_crypto) {
  5120. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5121. return -EOPNOTSUPP;
  5122. }
  5123. addr = sta ? sta->addr : iwl_bcast_addr;
  5124. sta_id = iwl3945_hw_find_station(priv, addr);
  5125. if (sta_id == IWL_INVALID_STATION) {
  5126. IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
  5127. addr);
  5128. return -EINVAL;
  5129. }
  5130. mutex_lock(&priv->mutex);
  5131. iwl_scan_cancel_timeout(priv, 100);
  5132. switch (cmd) {
  5133. case SET_KEY:
  5134. ret = iwl3945_update_sta_key_info(priv, key, sta_id);
  5135. if (!ret) {
  5136. iwl3945_set_rxon_hwcrypto(priv, 1);
  5137. iwl3945_commit_rxon(priv);
  5138. key->hw_key_idx = sta_id;
  5139. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  5140. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  5141. }
  5142. break;
  5143. case DISABLE_KEY:
  5144. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  5145. if (!ret) {
  5146. iwl3945_set_rxon_hwcrypto(priv, 0);
  5147. iwl3945_commit_rxon(priv);
  5148. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5149. }
  5150. break;
  5151. default:
  5152. ret = -EINVAL;
  5153. }
  5154. IWL_DEBUG_MAC80211("leave\n");
  5155. mutex_unlock(&priv->mutex);
  5156. return ret;
  5157. }
  5158. static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  5159. const struct ieee80211_tx_queue_params *params)
  5160. {
  5161. struct iwl_priv *priv = hw->priv;
  5162. unsigned long flags;
  5163. int q;
  5164. IWL_DEBUG_MAC80211("enter\n");
  5165. if (!iwl_is_ready_rf(priv)) {
  5166. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5167. return -EIO;
  5168. }
  5169. if (queue >= AC_NUM) {
  5170. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5171. return 0;
  5172. }
  5173. q = AC_NUM - 1 - queue;
  5174. spin_lock_irqsave(&priv->lock, flags);
  5175. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5176. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5177. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5178. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5179. cpu_to_le16((params->txop * 32));
  5180. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5181. priv->qos_data.qos_active = 1;
  5182. spin_unlock_irqrestore(&priv->lock, flags);
  5183. mutex_lock(&priv->mutex);
  5184. if (priv->iw_mode == NL80211_IFTYPE_AP)
  5185. iwl3945_activate_qos(priv, 1);
  5186. else if (priv->assoc_id && iwl3945_is_associated(priv))
  5187. iwl3945_activate_qos(priv, 0);
  5188. mutex_unlock(&priv->mutex);
  5189. IWL_DEBUG_MAC80211("leave\n");
  5190. return 0;
  5191. }
  5192. static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
  5193. struct ieee80211_tx_queue_stats *stats)
  5194. {
  5195. struct iwl_priv *priv = hw->priv;
  5196. int i, avail;
  5197. struct iwl_tx_queue *txq;
  5198. struct iwl_queue *q;
  5199. unsigned long flags;
  5200. IWL_DEBUG_MAC80211("enter\n");
  5201. if (!iwl_is_ready_rf(priv)) {
  5202. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5203. return -EIO;
  5204. }
  5205. spin_lock_irqsave(&priv->lock, flags);
  5206. for (i = 0; i < AC_NUM; i++) {
  5207. txq = &priv->txq[i];
  5208. q = &txq->q;
  5209. avail = iwl_queue_space(q);
  5210. stats[i].len = q->n_window - avail;
  5211. stats[i].limit = q->n_window - q->high_mark;
  5212. stats[i].count = q->n_window;
  5213. }
  5214. spin_unlock_irqrestore(&priv->lock, flags);
  5215. IWL_DEBUG_MAC80211("leave\n");
  5216. return 0;
  5217. }
  5218. static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
  5219. {
  5220. struct iwl_priv *priv = hw->priv;
  5221. unsigned long flags;
  5222. mutex_lock(&priv->mutex);
  5223. IWL_DEBUG_MAC80211("enter\n");
  5224. iwl_reset_qos(priv);
  5225. spin_lock_irqsave(&priv->lock, flags);
  5226. priv->assoc_id = 0;
  5227. priv->assoc_capability = 0;
  5228. priv->call_post_assoc_from_beacon = 0;
  5229. /* new association get rid of ibss beacon skb */
  5230. if (priv->ibss_beacon)
  5231. dev_kfree_skb(priv->ibss_beacon);
  5232. priv->ibss_beacon = NULL;
  5233. priv->beacon_int = priv->hw->conf.beacon_int;
  5234. priv->timestamp = 0;
  5235. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  5236. priv->beacon_int = 0;
  5237. spin_unlock_irqrestore(&priv->lock, flags);
  5238. if (!iwl_is_ready_rf(priv)) {
  5239. IWL_DEBUG_MAC80211("leave - not ready\n");
  5240. mutex_unlock(&priv->mutex);
  5241. return;
  5242. }
  5243. /* we are restarting association process
  5244. * clear RXON_FILTER_ASSOC_MSK bit
  5245. */
  5246. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  5247. iwl_scan_cancel_timeout(priv, 100);
  5248. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5249. iwl3945_commit_rxon(priv);
  5250. }
  5251. /* Per mac80211.h: This is only used in IBSS mode... */
  5252. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  5253. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  5254. mutex_unlock(&priv->mutex);
  5255. return;
  5256. }
  5257. iwl3945_set_rate(priv);
  5258. mutex_unlock(&priv->mutex);
  5259. IWL_DEBUG_MAC80211("leave\n");
  5260. }
  5261. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  5262. {
  5263. struct iwl_priv *priv = hw->priv;
  5264. unsigned long flags;
  5265. IWL_DEBUG_MAC80211("enter\n");
  5266. if (!iwl_is_ready_rf(priv)) {
  5267. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5268. return -EIO;
  5269. }
  5270. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  5271. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  5272. return -EIO;
  5273. }
  5274. spin_lock_irqsave(&priv->lock, flags);
  5275. if (priv->ibss_beacon)
  5276. dev_kfree_skb(priv->ibss_beacon);
  5277. priv->ibss_beacon = skb;
  5278. priv->assoc_id = 0;
  5279. IWL_DEBUG_MAC80211("leave\n");
  5280. spin_unlock_irqrestore(&priv->lock, flags);
  5281. iwl_reset_qos(priv);
  5282. iwl3945_post_associate(priv);
  5283. return 0;
  5284. }
  5285. /*****************************************************************************
  5286. *
  5287. * sysfs attributes
  5288. *
  5289. *****************************************************************************/
  5290. #ifdef CONFIG_IWL3945_DEBUG
  5291. /*
  5292. * The following adds a new attribute to the sysfs representation
  5293. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  5294. * used for controlling the debug level.
  5295. *
  5296. * See the level definitions in iwl for details.
  5297. */
  5298. static ssize_t show_debug_level(struct device *d,
  5299. struct device_attribute *attr, char *buf)
  5300. {
  5301. struct iwl_priv *priv = d->driver_data;
  5302. return sprintf(buf, "0x%08X\n", priv->debug_level);
  5303. }
  5304. static ssize_t store_debug_level(struct device *d,
  5305. struct device_attribute *attr,
  5306. const char *buf, size_t count)
  5307. {
  5308. struct iwl_priv *priv = d->driver_data;
  5309. unsigned long val;
  5310. int ret;
  5311. ret = strict_strtoul(buf, 0, &val);
  5312. if (ret)
  5313. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  5314. else
  5315. priv->debug_level = val;
  5316. return strnlen(buf, count);
  5317. }
  5318. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  5319. show_debug_level, store_debug_level);
  5320. #endif /* CONFIG_IWL3945_DEBUG */
  5321. static ssize_t show_temperature(struct device *d,
  5322. struct device_attribute *attr, char *buf)
  5323. {
  5324. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5325. if (!iwl_is_alive(priv))
  5326. return -EAGAIN;
  5327. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  5328. }
  5329. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  5330. static ssize_t show_tx_power(struct device *d,
  5331. struct device_attribute *attr, char *buf)
  5332. {
  5333. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5334. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  5335. }
  5336. static ssize_t store_tx_power(struct device *d,
  5337. struct device_attribute *attr,
  5338. const char *buf, size_t count)
  5339. {
  5340. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5341. char *p = (char *)buf;
  5342. u32 val;
  5343. val = simple_strtoul(p, &p, 10);
  5344. if (p == buf)
  5345. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  5346. else
  5347. iwl3945_hw_reg_set_txpower(priv, val);
  5348. return count;
  5349. }
  5350. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  5351. static ssize_t show_flags(struct device *d,
  5352. struct device_attribute *attr, char *buf)
  5353. {
  5354. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5355. return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
  5356. }
  5357. static ssize_t store_flags(struct device *d,
  5358. struct device_attribute *attr,
  5359. const char *buf, size_t count)
  5360. {
  5361. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5362. u32 flags = simple_strtoul(buf, NULL, 0);
  5363. mutex_lock(&priv->mutex);
  5364. if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
  5365. /* Cancel any currently running scans... */
  5366. if (iwl_scan_cancel_timeout(priv, 100))
  5367. IWL_WARN(priv, "Could not cancel scan.\n");
  5368. else {
  5369. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  5370. flags);
  5371. priv->staging39_rxon.flags = cpu_to_le32(flags);
  5372. iwl3945_commit_rxon(priv);
  5373. }
  5374. }
  5375. mutex_unlock(&priv->mutex);
  5376. return count;
  5377. }
  5378. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  5379. static ssize_t show_filter_flags(struct device *d,
  5380. struct device_attribute *attr, char *buf)
  5381. {
  5382. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5383. return sprintf(buf, "0x%04X\n",
  5384. le32_to_cpu(priv->active39_rxon.filter_flags));
  5385. }
  5386. static ssize_t store_filter_flags(struct device *d,
  5387. struct device_attribute *attr,
  5388. const char *buf, size_t count)
  5389. {
  5390. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5391. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  5392. mutex_lock(&priv->mutex);
  5393. if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
  5394. /* Cancel any currently running scans... */
  5395. if (iwl_scan_cancel_timeout(priv, 100))
  5396. IWL_WARN(priv, "Could not cancel scan.\n");
  5397. else {
  5398. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  5399. "0x%04X\n", filter_flags);
  5400. priv->staging39_rxon.filter_flags =
  5401. cpu_to_le32(filter_flags);
  5402. iwl3945_commit_rxon(priv);
  5403. }
  5404. }
  5405. mutex_unlock(&priv->mutex);
  5406. return count;
  5407. }
  5408. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  5409. store_filter_flags);
  5410. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  5411. static ssize_t show_measurement(struct device *d,
  5412. struct device_attribute *attr, char *buf)
  5413. {
  5414. struct iwl_priv *priv = dev_get_drvdata(d);
  5415. struct iwl_spectrum_notification measure_report;
  5416. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  5417. u8 *data = (u8 *)&measure_report;
  5418. unsigned long flags;
  5419. spin_lock_irqsave(&priv->lock, flags);
  5420. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  5421. spin_unlock_irqrestore(&priv->lock, flags);
  5422. return 0;
  5423. }
  5424. memcpy(&measure_report, &priv->measure_report, size);
  5425. priv->measurement_status = 0;
  5426. spin_unlock_irqrestore(&priv->lock, flags);
  5427. while (size && (PAGE_SIZE - len)) {
  5428. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  5429. PAGE_SIZE - len, 1);
  5430. len = strlen(buf);
  5431. if (PAGE_SIZE - len)
  5432. buf[len++] = '\n';
  5433. ofs += 16;
  5434. size -= min(size, 16U);
  5435. }
  5436. return len;
  5437. }
  5438. static ssize_t store_measurement(struct device *d,
  5439. struct device_attribute *attr,
  5440. const char *buf, size_t count)
  5441. {
  5442. struct iwl_priv *priv = dev_get_drvdata(d);
  5443. struct ieee80211_measurement_params params = {
  5444. .channel = le16_to_cpu(priv->active39_rxon.channel),
  5445. .start_time = cpu_to_le64(priv->last_tsf),
  5446. .duration = cpu_to_le16(1),
  5447. };
  5448. u8 type = IWL_MEASURE_BASIC;
  5449. u8 buffer[32];
  5450. u8 channel;
  5451. if (count) {
  5452. char *p = buffer;
  5453. strncpy(buffer, buf, min(sizeof(buffer), count));
  5454. channel = simple_strtoul(p, NULL, 0);
  5455. if (channel)
  5456. params.channel = channel;
  5457. p = buffer;
  5458. while (*p && *p != ' ')
  5459. p++;
  5460. if (*p)
  5461. type = simple_strtoul(p + 1, NULL, 0);
  5462. }
  5463. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  5464. "channel %d (for '%s')\n", type, params.channel, buf);
  5465. iwl3945_get_measurement(priv, &params, type);
  5466. return count;
  5467. }
  5468. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  5469. show_measurement, store_measurement);
  5470. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  5471. static ssize_t store_retry_rate(struct device *d,
  5472. struct device_attribute *attr,
  5473. const char *buf, size_t count)
  5474. {
  5475. struct iwl_priv *priv = dev_get_drvdata(d);
  5476. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  5477. if (priv->retry_rate <= 0)
  5478. priv->retry_rate = 1;
  5479. return count;
  5480. }
  5481. static ssize_t show_retry_rate(struct device *d,
  5482. struct device_attribute *attr, char *buf)
  5483. {
  5484. struct iwl_priv *priv = dev_get_drvdata(d);
  5485. return sprintf(buf, "%d", priv->retry_rate);
  5486. }
  5487. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  5488. store_retry_rate);
  5489. static ssize_t store_power_level(struct device *d,
  5490. struct device_attribute *attr,
  5491. const char *buf, size_t count)
  5492. {
  5493. struct iwl_priv *priv = dev_get_drvdata(d);
  5494. int rc;
  5495. int mode;
  5496. mode = simple_strtoul(buf, NULL, 0);
  5497. mutex_lock(&priv->mutex);
  5498. if (!iwl_is_ready(priv)) {
  5499. rc = -EAGAIN;
  5500. goto out;
  5501. }
  5502. if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
  5503. (mode == IWL39_POWER_AC))
  5504. mode = IWL39_POWER_AC;
  5505. else
  5506. mode |= IWL_POWER_ENABLED;
  5507. if (mode != priv->power_mode) {
  5508. rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  5509. if (rc) {
  5510. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  5511. goto out;
  5512. }
  5513. priv->power_mode = mode;
  5514. }
  5515. rc = count;
  5516. out:
  5517. mutex_unlock(&priv->mutex);
  5518. return rc;
  5519. }
  5520. #define MAX_WX_STRING 80
  5521. /* Values are in microsecond */
  5522. static const s32 timeout_duration[] = {
  5523. 350000,
  5524. 250000,
  5525. 75000,
  5526. 37000,
  5527. 25000,
  5528. };
  5529. static const s32 period_duration[] = {
  5530. 400000,
  5531. 700000,
  5532. 1000000,
  5533. 1000000,
  5534. 1000000
  5535. };
  5536. static ssize_t show_power_level(struct device *d,
  5537. struct device_attribute *attr, char *buf)
  5538. {
  5539. struct iwl_priv *priv = dev_get_drvdata(d);
  5540. int level = IWL_POWER_LEVEL(priv->power_mode);
  5541. char *p = buf;
  5542. p += sprintf(p, "%d ", level);
  5543. switch (level) {
  5544. case IWL_POWER_MODE_CAM:
  5545. case IWL39_POWER_AC:
  5546. p += sprintf(p, "(AC)");
  5547. break;
  5548. case IWL39_POWER_BATTERY:
  5549. p += sprintf(p, "(BATTERY)");
  5550. break;
  5551. default:
  5552. p += sprintf(p,
  5553. "(Timeout %dms, Period %dms)",
  5554. timeout_duration[level - 1] / 1000,
  5555. period_duration[level - 1] / 1000);
  5556. }
  5557. if (!(priv->power_mode & IWL_POWER_ENABLED))
  5558. p += sprintf(p, " OFF\n");
  5559. else
  5560. p += sprintf(p, " \n");
  5561. return p - buf + 1;
  5562. }
  5563. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  5564. store_power_level);
  5565. static ssize_t show_channels(struct device *d,
  5566. struct device_attribute *attr, char *buf)
  5567. {
  5568. /* all this shit doesn't belong into sysfs anyway */
  5569. return 0;
  5570. }
  5571. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  5572. static ssize_t show_statistics(struct device *d,
  5573. struct device_attribute *attr, char *buf)
  5574. {
  5575. struct iwl_priv *priv = dev_get_drvdata(d);
  5576. u32 size = sizeof(struct iwl3945_notif_statistics);
  5577. u32 len = 0, ofs = 0;
  5578. u8 *data = (u8 *)&priv->statistics_39;
  5579. int rc = 0;
  5580. if (!iwl_is_alive(priv))
  5581. return -EAGAIN;
  5582. mutex_lock(&priv->mutex);
  5583. rc = iwl3945_send_statistics_request(priv);
  5584. mutex_unlock(&priv->mutex);
  5585. if (rc) {
  5586. len = sprintf(buf,
  5587. "Error sending statistics request: 0x%08X\n", rc);
  5588. return len;
  5589. }
  5590. while (size && (PAGE_SIZE - len)) {
  5591. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  5592. PAGE_SIZE - len, 1);
  5593. len = strlen(buf);
  5594. if (PAGE_SIZE - len)
  5595. buf[len++] = '\n';
  5596. ofs += 16;
  5597. size -= min(size, 16U);
  5598. }
  5599. return len;
  5600. }
  5601. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  5602. static ssize_t show_antenna(struct device *d,
  5603. struct device_attribute *attr, char *buf)
  5604. {
  5605. struct iwl_priv *priv = dev_get_drvdata(d);
  5606. if (!iwl_is_alive(priv))
  5607. return -EAGAIN;
  5608. return sprintf(buf, "%d\n", priv->antenna);
  5609. }
  5610. static ssize_t store_antenna(struct device *d,
  5611. struct device_attribute *attr,
  5612. const char *buf, size_t count)
  5613. {
  5614. int ant;
  5615. struct iwl_priv *priv = dev_get_drvdata(d);
  5616. if (count == 0)
  5617. return 0;
  5618. if (sscanf(buf, "%1i", &ant) != 1) {
  5619. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  5620. return count;
  5621. }
  5622. if ((ant >= 0) && (ant <= 2)) {
  5623. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  5624. priv->antenna = (enum iwl3945_antenna)ant;
  5625. } else
  5626. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  5627. return count;
  5628. }
  5629. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  5630. static ssize_t show_status(struct device *d,
  5631. struct device_attribute *attr, char *buf)
  5632. {
  5633. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5634. if (!iwl_is_alive(priv))
  5635. return -EAGAIN;
  5636. return sprintf(buf, "0x%08x\n", (int)priv->status);
  5637. }
  5638. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  5639. static ssize_t dump_error_log(struct device *d,
  5640. struct device_attribute *attr,
  5641. const char *buf, size_t count)
  5642. {
  5643. char *p = (char *)buf;
  5644. if (p[0] == '1')
  5645. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  5646. return strnlen(buf, count);
  5647. }
  5648. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  5649. static ssize_t dump_event_log(struct device *d,
  5650. struct device_attribute *attr,
  5651. const char *buf, size_t count)
  5652. {
  5653. char *p = (char *)buf;
  5654. if (p[0] == '1')
  5655. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  5656. return strnlen(buf, count);
  5657. }
  5658. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  5659. /*****************************************************************************
  5660. *
  5661. * driver setup and tear down
  5662. *
  5663. *****************************************************************************/
  5664. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  5665. {
  5666. priv->workqueue = create_workqueue(DRV_NAME);
  5667. init_waitqueue_head(&priv->wait_command_queue);
  5668. INIT_WORK(&priv->up, iwl3945_bg_up);
  5669. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  5670. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  5671. INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
  5672. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  5673. INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
  5674. INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
  5675. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  5676. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  5677. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  5678. INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
  5679. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  5680. iwl3945_hw_setup_deferred_work(priv);
  5681. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  5682. iwl3945_irq_tasklet, (unsigned long)priv);
  5683. }
  5684. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  5685. {
  5686. iwl3945_hw_cancel_deferred_work(priv);
  5687. cancel_delayed_work_sync(&priv->init_alive_start);
  5688. cancel_delayed_work(&priv->scan_check);
  5689. cancel_delayed_work(&priv->alive_start);
  5690. cancel_work_sync(&priv->beacon_update);
  5691. }
  5692. static struct attribute *iwl3945_sysfs_entries[] = {
  5693. &dev_attr_antenna.attr,
  5694. &dev_attr_channels.attr,
  5695. &dev_attr_dump_errors.attr,
  5696. &dev_attr_dump_events.attr,
  5697. &dev_attr_flags.attr,
  5698. &dev_attr_filter_flags.attr,
  5699. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  5700. &dev_attr_measurement.attr,
  5701. #endif
  5702. &dev_attr_power_level.attr,
  5703. &dev_attr_retry_rate.attr,
  5704. &dev_attr_statistics.attr,
  5705. &dev_attr_status.attr,
  5706. &dev_attr_temperature.attr,
  5707. &dev_attr_tx_power.attr,
  5708. #ifdef CONFIG_IWL3945_DEBUG
  5709. &dev_attr_debug_level.attr,
  5710. #endif
  5711. NULL
  5712. };
  5713. static struct attribute_group iwl3945_attribute_group = {
  5714. .name = NULL, /* put in device directory */
  5715. .attrs = iwl3945_sysfs_entries,
  5716. };
  5717. static struct ieee80211_ops iwl3945_hw_ops = {
  5718. .tx = iwl3945_mac_tx,
  5719. .start = iwl3945_mac_start,
  5720. .stop = iwl3945_mac_stop,
  5721. .add_interface = iwl3945_mac_add_interface,
  5722. .remove_interface = iwl3945_mac_remove_interface,
  5723. .config = iwl3945_mac_config,
  5724. .config_interface = iwl3945_mac_config_interface,
  5725. .configure_filter = iwl3945_configure_filter,
  5726. .set_key = iwl3945_mac_set_key,
  5727. .get_tx_stats = iwl3945_mac_get_tx_stats,
  5728. .conf_tx = iwl3945_mac_conf_tx,
  5729. .reset_tsf = iwl3945_mac_reset_tsf,
  5730. .bss_info_changed = iwl3945_bss_info_changed,
  5731. .hw_scan = iwl3945_mac_hw_scan
  5732. };
  5733. static int iwl3945_init_drv(struct iwl_priv *priv)
  5734. {
  5735. int ret;
  5736. priv->retry_rate = 1;
  5737. priv->ibss_beacon = NULL;
  5738. spin_lock_init(&priv->lock);
  5739. spin_lock_init(&priv->power_data_39.lock);
  5740. spin_lock_init(&priv->sta_lock);
  5741. spin_lock_init(&priv->hcmd_lock);
  5742. INIT_LIST_HEAD(&priv->free_frames);
  5743. mutex_init(&priv->mutex);
  5744. /* Clear the driver's (not device's) station table */
  5745. iwl3945_clear_stations_table(priv);
  5746. priv->data_retry_limit = -1;
  5747. priv->ieee_channels = NULL;
  5748. priv->ieee_rates = NULL;
  5749. priv->band = IEEE80211_BAND_2GHZ;
  5750. priv->iw_mode = NL80211_IFTYPE_STATION;
  5751. iwl_reset_qos(priv);
  5752. priv->qos_data.qos_active = 0;
  5753. priv->qos_data.qos_cap.val = 0;
  5754. priv->rates_mask = IWL_RATES_MASK;
  5755. /* If power management is turned on, default to AC mode */
  5756. priv->power_mode = IWL39_POWER_AC;
  5757. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  5758. ret = iwl3945_init_channel_map(priv);
  5759. if (ret) {
  5760. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  5761. goto err;
  5762. }
  5763. ret = iwl3945_init_geos(priv);
  5764. if (ret) {
  5765. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  5766. goto err_free_channel_map;
  5767. }
  5768. return 0;
  5769. err_free_channel_map:
  5770. iwl3945_free_channel_map(priv);
  5771. err:
  5772. return ret;
  5773. }
  5774. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  5775. {
  5776. int err = 0;
  5777. struct iwl_priv *priv;
  5778. struct ieee80211_hw *hw;
  5779. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  5780. unsigned long flags;
  5781. /***********************
  5782. * 1. Allocating HW data
  5783. * ********************/
  5784. /* mac80211 allocates memory for this device instance, including
  5785. * space for this driver's private structure */
  5786. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  5787. if (hw == NULL) {
  5788. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  5789. err = -ENOMEM;
  5790. goto out;
  5791. }
  5792. priv = hw->priv;
  5793. SET_IEEE80211_DEV(hw, &pdev->dev);
  5794. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  5795. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  5796. IWL_ERR(priv,
  5797. "invalid queues_num, should be between %d and %d\n",
  5798. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  5799. err = -EINVAL;
  5800. goto out;
  5801. }
  5802. /*
  5803. * Disabling hardware scan means that mac80211 will perform scans
  5804. * "the hard way", rather than using device's scan.
  5805. */
  5806. if (iwl3945_mod_params.disable_hw_scan) {
  5807. IWL_DEBUG_INFO("Disabling hw_scan\n");
  5808. iwl3945_hw_ops.hw_scan = NULL;
  5809. }
  5810. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  5811. priv->cfg = cfg;
  5812. priv->pci_dev = pdev;
  5813. #ifdef CONFIG_IWL3945_DEBUG
  5814. priv->debug_level = iwl3945_mod_params.debug;
  5815. atomic_set(&priv->restrict_refcnt, 0);
  5816. #endif
  5817. hw->rate_control_algorithm = "iwl-3945-rs";
  5818. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  5819. /* Select antenna (may be helpful if only one antenna is connected) */
  5820. priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
  5821. /* Tell mac80211 our characteristics */
  5822. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  5823. IEEE80211_HW_NOISE_DBM;
  5824. hw->wiphy->interface_modes =
  5825. BIT(NL80211_IFTYPE_STATION) |
  5826. BIT(NL80211_IFTYPE_ADHOC);
  5827. hw->wiphy->fw_handles_regulatory = true;
  5828. /* 4 EDCA QOS priorities */
  5829. hw->queues = 4;
  5830. /***************************
  5831. * 2. Initializing PCI bus
  5832. * *************************/
  5833. if (pci_enable_device(pdev)) {
  5834. err = -ENODEV;
  5835. goto out_ieee80211_free_hw;
  5836. }
  5837. pci_set_master(pdev);
  5838. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  5839. if (!err)
  5840. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  5841. if (err) {
  5842. IWL_WARN(priv, "No suitable DMA available.\n");
  5843. goto out_pci_disable_device;
  5844. }
  5845. pci_set_drvdata(pdev, priv);
  5846. err = pci_request_regions(pdev, DRV_NAME);
  5847. if (err)
  5848. goto out_pci_disable_device;
  5849. /***********************
  5850. * 3. Read REV Register
  5851. * ********************/
  5852. priv->hw_base = pci_iomap(pdev, 0, 0);
  5853. if (!priv->hw_base) {
  5854. err = -ENODEV;
  5855. goto out_pci_release_regions;
  5856. }
  5857. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  5858. (unsigned long long) pci_resource_len(pdev, 0));
  5859. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  5860. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  5861. * PCI Tx retries from interfering with C3 CPU state */
  5862. pci_write_config_byte(pdev, 0x41, 0x00);
  5863. /* amp init */
  5864. err = priv->cfg->ops->lib->apm_ops.init(priv);
  5865. if (err < 0) {
  5866. IWL_DEBUG_INFO("Failed to init APMG\n");
  5867. goto out_iounmap;
  5868. }
  5869. /***********************
  5870. * 4. Read EEPROM
  5871. * ********************/
  5872. /* Read the EEPROM */
  5873. err = iwl3945_eeprom_init(priv);
  5874. if (err) {
  5875. IWL_ERR(priv, "Unable to init EEPROM\n");
  5876. goto out_remove_sysfs;
  5877. }
  5878. /* MAC Address location in EEPROM same for 3945/4965 */
  5879. get_eeprom_mac(priv, priv->mac_addr);
  5880. IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
  5881. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5882. /***********************
  5883. * 5. Setup HW Constants
  5884. * ********************/
  5885. /* Device-specific setup */
  5886. if (iwl3945_hw_set_hw_params(priv)) {
  5887. IWL_ERR(priv, "failed to set hw settings\n");
  5888. goto out_iounmap;
  5889. }
  5890. /***********************
  5891. * 6. Setup priv
  5892. * ********************/
  5893. err = iwl3945_init_drv(priv);
  5894. if (err) {
  5895. IWL_ERR(priv, "initializing driver failed\n");
  5896. goto out_free_geos;
  5897. }
  5898. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  5899. priv->cfg->name);
  5900. /***********************************
  5901. * 7. Initialize Module Parameters
  5902. * **********************************/
  5903. /* Initialize module parameter values here */
  5904. /* Disable radio (SW RF KILL) via parameter when loading driver */
  5905. if (iwl3945_mod_params.disable) {
  5906. set_bit(STATUS_RF_KILL_SW, &priv->status);
  5907. IWL_DEBUG_INFO("Radio disabled.\n");
  5908. }
  5909. /***********************
  5910. * 8. Setup Services
  5911. * ********************/
  5912. spin_lock_irqsave(&priv->lock, flags);
  5913. iwl3945_disable_interrupts(priv);
  5914. spin_unlock_irqrestore(&priv->lock, flags);
  5915. pci_enable_msi(priv->pci_dev);
  5916. err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
  5917. DRV_NAME, priv);
  5918. if (err) {
  5919. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  5920. goto out_disable_msi;
  5921. }
  5922. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5923. if (err) {
  5924. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  5925. goto out_release_irq;
  5926. }
  5927. iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  5928. iwl3945_setup_deferred_work(priv);
  5929. iwl3945_setup_rx_handlers(priv);
  5930. /*********************************
  5931. * 9. Setup and Register mac80211
  5932. * *******************************/
  5933. err = ieee80211_register_hw(priv->hw);
  5934. if (err) {
  5935. IWL_ERR(priv, "Failed to register network device: %d\n", err);
  5936. goto out_remove_sysfs;
  5937. }
  5938. priv->hw->conf.beacon_int = 100;
  5939. priv->mac80211_registered = 1;
  5940. err = iwl3945_rfkill_init(priv);
  5941. if (err)
  5942. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  5943. "Ignoring error: %d\n", err);
  5944. /* Start monitoring the killswitch */
  5945. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  5946. 2 * HZ);
  5947. return 0;
  5948. out_remove_sysfs:
  5949. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5950. out_free_geos:
  5951. iwl3945_free_geos(priv);
  5952. out_release_irq:
  5953. free_irq(priv->pci_dev->irq, priv);
  5954. destroy_workqueue(priv->workqueue);
  5955. priv->workqueue = NULL;
  5956. iwl3945_unset_hw_params(priv);
  5957. out_disable_msi:
  5958. pci_disable_msi(priv->pci_dev);
  5959. out_iounmap:
  5960. pci_iounmap(pdev, priv->hw_base);
  5961. out_pci_release_regions:
  5962. pci_release_regions(pdev);
  5963. out_pci_disable_device:
  5964. pci_disable_device(pdev);
  5965. pci_set_drvdata(pdev, NULL);
  5966. out_ieee80211_free_hw:
  5967. ieee80211_free_hw(priv->hw);
  5968. out:
  5969. return err;
  5970. }
  5971. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  5972. {
  5973. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5974. unsigned long flags;
  5975. if (!priv)
  5976. return;
  5977. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  5978. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5979. if (priv->mac80211_registered) {
  5980. ieee80211_unregister_hw(priv->hw);
  5981. priv->mac80211_registered = 0;
  5982. } else {
  5983. iwl3945_down(priv);
  5984. }
  5985. /* make sure we flush any pending irq or
  5986. * tasklet for the driver
  5987. */
  5988. spin_lock_irqsave(&priv->lock, flags);
  5989. iwl3945_disable_interrupts(priv);
  5990. spin_unlock_irqrestore(&priv->lock, flags);
  5991. iwl_synchronize_irq(priv);
  5992. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5993. iwl3945_rfkill_unregister(priv);
  5994. cancel_delayed_work(&priv->rfkill_poll);
  5995. iwl3945_dealloc_ucode_pci(priv);
  5996. if (priv->rxq.bd)
  5997. iwl_rx_queue_free(priv, &priv->rxq);
  5998. iwl3945_hw_txq_ctx_free(priv);
  5999. iwl3945_unset_hw_params(priv);
  6000. iwl3945_clear_stations_table(priv);
  6001. /*netif_stop_queue(dev); */
  6002. flush_workqueue(priv->workqueue);
  6003. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  6004. * priv->workqueue... so we can't take down the workqueue
  6005. * until now... */
  6006. destroy_workqueue(priv->workqueue);
  6007. priv->workqueue = NULL;
  6008. free_irq(pdev->irq, priv);
  6009. pci_disable_msi(pdev);
  6010. pci_iounmap(pdev, priv->hw_base);
  6011. pci_release_regions(pdev);
  6012. pci_disable_device(pdev);
  6013. pci_set_drvdata(pdev, NULL);
  6014. iwl3945_free_channel_map(priv);
  6015. iwl3945_free_geos(priv);
  6016. kfree(priv->scan);
  6017. if (priv->ibss_beacon)
  6018. dev_kfree_skb(priv->ibss_beacon);
  6019. ieee80211_free_hw(priv->hw);
  6020. }
  6021. #ifdef CONFIG_PM
  6022. static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6023. {
  6024. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6025. if (priv->is_open) {
  6026. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6027. iwl3945_mac_stop(priv->hw);
  6028. priv->is_open = 1;
  6029. }
  6030. pci_save_state(pdev);
  6031. pci_disable_device(pdev);
  6032. pci_set_power_state(pdev, PCI_D3hot);
  6033. return 0;
  6034. }
  6035. static int iwl3945_pci_resume(struct pci_dev *pdev)
  6036. {
  6037. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6038. pci_set_power_state(pdev, PCI_D0);
  6039. pci_enable_device(pdev);
  6040. pci_restore_state(pdev);
  6041. if (priv->is_open)
  6042. iwl3945_mac_start(priv->hw);
  6043. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6044. return 0;
  6045. }
  6046. #endif /* CONFIG_PM */
  6047. /*************** RFKILL FUNCTIONS **********/
  6048. #ifdef CONFIG_IWL3945_RFKILL
  6049. /* software rf-kill from user */
  6050. static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
  6051. {
  6052. struct iwl_priv *priv = data;
  6053. int err = 0;
  6054. if (!priv->rfkill)
  6055. return 0;
  6056. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6057. return 0;
  6058. IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
  6059. mutex_lock(&priv->mutex);
  6060. switch (state) {
  6061. case RFKILL_STATE_UNBLOCKED:
  6062. if (iwl_is_rfkill_hw(priv)) {
  6063. err = -EBUSY;
  6064. goto out_unlock;
  6065. }
  6066. iwl3945_radio_kill_sw(priv, 0);
  6067. break;
  6068. case RFKILL_STATE_SOFT_BLOCKED:
  6069. iwl3945_radio_kill_sw(priv, 1);
  6070. break;
  6071. default:
  6072. IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
  6073. break;
  6074. }
  6075. out_unlock:
  6076. mutex_unlock(&priv->mutex);
  6077. return err;
  6078. }
  6079. int iwl3945_rfkill_init(struct iwl_priv *priv)
  6080. {
  6081. struct device *device = wiphy_dev(priv->hw->wiphy);
  6082. int ret = 0;
  6083. BUG_ON(device == NULL);
  6084. IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
  6085. priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
  6086. if (!priv->rfkill) {
  6087. IWL_ERR(priv, "Unable to allocate rfkill device.\n");
  6088. ret = -ENOMEM;
  6089. goto error;
  6090. }
  6091. priv->rfkill->name = priv->cfg->name;
  6092. priv->rfkill->data = priv;
  6093. priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
  6094. priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
  6095. priv->rfkill->user_claim_unsupported = 1;
  6096. priv->rfkill->dev.class->suspend = NULL;
  6097. priv->rfkill->dev.class->resume = NULL;
  6098. ret = rfkill_register(priv->rfkill);
  6099. if (ret) {
  6100. IWL_ERR(priv, "Unable to register rfkill: %d\n", ret);
  6101. goto freed_rfkill;
  6102. }
  6103. IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
  6104. return ret;
  6105. freed_rfkill:
  6106. if (priv->rfkill != NULL)
  6107. rfkill_free(priv->rfkill);
  6108. priv->rfkill = NULL;
  6109. error:
  6110. IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
  6111. return ret;
  6112. }
  6113. void iwl3945_rfkill_unregister(struct iwl_priv *priv)
  6114. {
  6115. if (priv->rfkill)
  6116. rfkill_unregister(priv->rfkill);
  6117. priv->rfkill = NULL;
  6118. }
  6119. /* set rf-kill to the right state. */
  6120. void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
  6121. {
  6122. if (!priv->rfkill)
  6123. return;
  6124. if (iwl_is_rfkill_hw(priv)) {
  6125. rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
  6126. return;
  6127. }
  6128. if (!iwl_is_rfkill_sw(priv))
  6129. rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
  6130. else
  6131. rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
  6132. }
  6133. #endif
  6134. /*****************************************************************************
  6135. *
  6136. * driver and module entry point
  6137. *
  6138. *****************************************************************************/
  6139. static struct pci_driver iwl3945_driver = {
  6140. .name = DRV_NAME,
  6141. .id_table = iwl3945_hw_card_ids,
  6142. .probe = iwl3945_pci_probe,
  6143. .remove = __devexit_p(iwl3945_pci_remove),
  6144. #ifdef CONFIG_PM
  6145. .suspend = iwl3945_pci_suspend,
  6146. .resume = iwl3945_pci_resume,
  6147. #endif
  6148. };
  6149. static int __init iwl3945_init(void)
  6150. {
  6151. int ret;
  6152. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6153. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6154. ret = iwl3945_rate_control_register();
  6155. if (ret) {
  6156. printk(KERN_ERR DRV_NAME
  6157. "Unable to register rate control algorithm: %d\n", ret);
  6158. return ret;
  6159. }
  6160. ret = pci_register_driver(&iwl3945_driver);
  6161. if (ret) {
  6162. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  6163. goto error_register;
  6164. }
  6165. return ret;
  6166. error_register:
  6167. iwl3945_rate_control_unregister();
  6168. return ret;
  6169. }
  6170. static void __exit iwl3945_exit(void)
  6171. {
  6172. pci_unregister_driver(&iwl3945_driver);
  6173. iwl3945_rate_control_unregister();
  6174. }
  6175. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  6176. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  6177. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  6178. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  6179. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  6180. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  6181. MODULE_PARM_DESC(swcrypto,
  6182. "using software crypto (default 1 [software])\n");
  6183. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  6184. MODULE_PARM_DESC(debug, "debug output mask");
  6185. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  6186. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  6187. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  6188. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  6189. module_exit(iwl3945_exit);
  6190. module_init(iwl3945_init);