cx23885-cards.c 30 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060
  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <linux/delay.h>
  25. #include <media/cx25840.h>
  26. #include "cx23885.h"
  27. #include "tuner-xc2028.h"
  28. #include "netup-init.h"
  29. #include "cx23888-ir.h"
  30. /* ------------------------------------------------------------------ */
  31. /* board config info */
  32. struct cx23885_board cx23885_boards[] = {
  33. [CX23885_BOARD_UNKNOWN] = {
  34. .name = "UNKNOWN/GENERIC",
  35. /* Ensure safe default for unknown boards */
  36. .clk_freq = 0,
  37. .input = {{
  38. .type = CX23885_VMUX_COMPOSITE1,
  39. .vmux = 0,
  40. }, {
  41. .type = CX23885_VMUX_COMPOSITE2,
  42. .vmux = 1,
  43. }, {
  44. .type = CX23885_VMUX_COMPOSITE3,
  45. .vmux = 2,
  46. }, {
  47. .type = CX23885_VMUX_COMPOSITE4,
  48. .vmux = 3,
  49. } },
  50. },
  51. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  52. .name = "Hauppauge WinTV-HVR1800lp",
  53. .portc = CX23885_MPEG_DVB,
  54. .input = {{
  55. .type = CX23885_VMUX_TELEVISION,
  56. .vmux = 0,
  57. .gpio0 = 0xff00,
  58. }, {
  59. .type = CX23885_VMUX_DEBUG,
  60. .vmux = 0,
  61. .gpio0 = 0xff01,
  62. }, {
  63. .type = CX23885_VMUX_COMPOSITE1,
  64. .vmux = 1,
  65. .gpio0 = 0xff02,
  66. }, {
  67. .type = CX23885_VMUX_SVIDEO,
  68. .vmux = 2,
  69. .gpio0 = 0xff02,
  70. } },
  71. },
  72. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  73. .name = "Hauppauge WinTV-HVR1800",
  74. .porta = CX23885_ANALOG_VIDEO,
  75. .portb = CX23885_MPEG_ENCODER,
  76. .portc = CX23885_MPEG_DVB,
  77. .tuner_type = TUNER_PHILIPS_TDA8290,
  78. .tuner_addr = 0x42, /* 0x84 >> 1 */
  79. .input = {{
  80. .type = CX23885_VMUX_TELEVISION,
  81. .vmux = CX25840_VIN7_CH3 |
  82. CX25840_VIN5_CH2 |
  83. CX25840_VIN2_CH1,
  84. .gpio0 = 0,
  85. }, {
  86. .type = CX23885_VMUX_COMPOSITE1,
  87. .vmux = CX25840_VIN7_CH3 |
  88. CX25840_VIN4_CH2 |
  89. CX25840_VIN6_CH1,
  90. .gpio0 = 0,
  91. }, {
  92. .type = CX23885_VMUX_SVIDEO,
  93. .vmux = CX25840_VIN7_CH3 |
  94. CX25840_VIN4_CH2 |
  95. CX25840_VIN8_CH1 |
  96. CX25840_SVIDEO_ON,
  97. .gpio0 = 0,
  98. } },
  99. },
  100. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  101. .name = "Hauppauge WinTV-HVR1250",
  102. .portc = CX23885_MPEG_DVB,
  103. .input = {{
  104. .type = CX23885_VMUX_TELEVISION,
  105. .vmux = 0,
  106. .gpio0 = 0xff00,
  107. }, {
  108. .type = CX23885_VMUX_DEBUG,
  109. .vmux = 0,
  110. .gpio0 = 0xff01,
  111. }, {
  112. .type = CX23885_VMUX_COMPOSITE1,
  113. .vmux = 1,
  114. .gpio0 = 0xff02,
  115. }, {
  116. .type = CX23885_VMUX_SVIDEO,
  117. .vmux = 2,
  118. .gpio0 = 0xff02,
  119. } },
  120. },
  121. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  122. .name = "DViCO FusionHDTV5 Express",
  123. .portb = CX23885_MPEG_DVB,
  124. },
  125. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  126. .name = "Hauppauge WinTV-HVR1500Q",
  127. .portc = CX23885_MPEG_DVB,
  128. },
  129. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  130. .name = "Hauppauge WinTV-HVR1500",
  131. .portc = CX23885_MPEG_DVB,
  132. },
  133. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  134. .name = "Hauppauge WinTV-HVR1200",
  135. .portc = CX23885_MPEG_DVB,
  136. },
  137. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  138. .name = "Hauppauge WinTV-HVR1700",
  139. .portc = CX23885_MPEG_DVB,
  140. },
  141. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  142. .name = "Hauppauge WinTV-HVR1400",
  143. .portc = CX23885_MPEG_DVB,
  144. },
  145. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  146. .name = "DViCO FusionHDTV7 Dual Express",
  147. .portb = CX23885_MPEG_DVB,
  148. .portc = CX23885_MPEG_DVB,
  149. },
  150. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  151. .name = "DViCO FusionHDTV DVB-T Dual Express",
  152. .portb = CX23885_MPEG_DVB,
  153. .portc = CX23885_MPEG_DVB,
  154. },
  155. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  156. .name = "Leadtek Winfast PxDVR3200 H",
  157. .portc = CX23885_MPEG_DVB,
  158. },
  159. [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
  160. .name = "Compro VideoMate E650F",
  161. .portc = CX23885_MPEG_DVB,
  162. },
  163. [CX23885_BOARD_TBS_6920] = {
  164. .name = "TurboSight TBS 6920",
  165. .portb = CX23885_MPEG_DVB,
  166. },
  167. [CX23885_BOARD_TEVII_S470] = {
  168. .name = "TeVii S470",
  169. .portb = CX23885_MPEG_DVB,
  170. },
  171. [CX23885_BOARD_DVBWORLD_2005] = {
  172. .name = "DVBWorld DVB-S2 2005",
  173. .portb = CX23885_MPEG_DVB,
  174. },
  175. [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
  176. .cimax = 1,
  177. .name = "NetUP Dual DVB-S2 CI",
  178. .portb = CX23885_MPEG_DVB,
  179. .portc = CX23885_MPEG_DVB,
  180. },
  181. [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
  182. .name = "Hauppauge WinTV-HVR1270",
  183. .portc = CX23885_MPEG_DVB,
  184. },
  185. [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
  186. .name = "Hauppauge WinTV-HVR1275",
  187. .portc = CX23885_MPEG_DVB,
  188. },
  189. [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
  190. .name = "Hauppauge WinTV-HVR1255",
  191. .portc = CX23885_MPEG_DVB,
  192. },
  193. [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
  194. .name = "Hauppauge WinTV-HVR1210",
  195. .portc = CX23885_MPEG_DVB,
  196. },
  197. [CX23885_BOARD_MYGICA_X8506] = {
  198. .name = "Mygica X8506 DMB-TH",
  199. .tuner_type = TUNER_XC5000,
  200. .tuner_addr = 0x61,
  201. .porta = CX23885_ANALOG_VIDEO,
  202. .portb = CX23885_MPEG_DVB,
  203. .input = {
  204. {
  205. .type = CX23885_VMUX_TELEVISION,
  206. .vmux = CX25840_COMPOSITE2,
  207. },
  208. {
  209. .type = CX23885_VMUX_COMPOSITE1,
  210. .vmux = CX25840_COMPOSITE8,
  211. },
  212. {
  213. .type = CX23885_VMUX_SVIDEO,
  214. .vmux = CX25840_SVIDEO_LUMA3 |
  215. CX25840_SVIDEO_CHROMA4,
  216. },
  217. {
  218. .type = CX23885_VMUX_COMPONENT,
  219. .vmux = CX25840_COMPONENT_ON |
  220. CX25840_VIN1_CH1 |
  221. CX25840_VIN6_CH2 |
  222. CX25840_VIN7_CH3,
  223. },
  224. },
  225. },
  226. [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
  227. .name = "Magic-Pro ProHDTV Extreme 2",
  228. .tuner_type = TUNER_XC5000,
  229. .tuner_addr = 0x61,
  230. .porta = CX23885_ANALOG_VIDEO,
  231. .portb = CX23885_MPEG_DVB,
  232. .input = {
  233. {
  234. .type = CX23885_VMUX_TELEVISION,
  235. .vmux = CX25840_COMPOSITE2,
  236. },
  237. {
  238. .type = CX23885_VMUX_COMPOSITE1,
  239. .vmux = CX25840_COMPOSITE8,
  240. },
  241. {
  242. .type = CX23885_VMUX_SVIDEO,
  243. .vmux = CX25840_SVIDEO_LUMA3 |
  244. CX25840_SVIDEO_CHROMA4,
  245. },
  246. {
  247. .type = CX23885_VMUX_COMPONENT,
  248. .vmux = CX25840_COMPONENT_ON |
  249. CX25840_VIN1_CH1 |
  250. CX25840_VIN6_CH2 |
  251. CX25840_VIN7_CH3,
  252. },
  253. },
  254. },
  255. [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
  256. .name = "Hauppauge WinTV-HVR1850",
  257. .portb = CX23885_MPEG_ENCODER,
  258. .portc = CX23885_MPEG_DVB,
  259. },
  260. [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
  261. .name = "Compro VideoMate E800",
  262. .portc = CX23885_MPEG_DVB,
  263. },
  264. [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
  265. .name = "Hauppauge WinTV-HVR1290",
  266. .portc = CX23885_MPEG_DVB,
  267. },
  268. };
  269. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  270. /* ------------------------------------------------------------------ */
  271. /* PCI subsystem IDs */
  272. struct cx23885_subid cx23885_subids[] = {
  273. {
  274. .subvendor = 0x0070,
  275. .subdevice = 0x3400,
  276. .card = CX23885_BOARD_UNKNOWN,
  277. }, {
  278. .subvendor = 0x0070,
  279. .subdevice = 0x7600,
  280. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  281. }, {
  282. .subvendor = 0x0070,
  283. .subdevice = 0x7800,
  284. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  285. }, {
  286. .subvendor = 0x0070,
  287. .subdevice = 0x7801,
  288. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  289. }, {
  290. .subvendor = 0x0070,
  291. .subdevice = 0x7809,
  292. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  293. }, {
  294. .subvendor = 0x0070,
  295. .subdevice = 0x7911,
  296. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  297. }, {
  298. .subvendor = 0x18ac,
  299. .subdevice = 0xd500,
  300. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  301. }, {
  302. .subvendor = 0x0070,
  303. .subdevice = 0x7790,
  304. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  305. }, {
  306. .subvendor = 0x0070,
  307. .subdevice = 0x7797,
  308. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  309. }, {
  310. .subvendor = 0x0070,
  311. .subdevice = 0x7710,
  312. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  313. }, {
  314. .subvendor = 0x0070,
  315. .subdevice = 0x7717,
  316. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  317. }, {
  318. .subvendor = 0x0070,
  319. .subdevice = 0x71d1,
  320. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  321. }, {
  322. .subvendor = 0x0070,
  323. .subdevice = 0x71d3,
  324. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  325. }, {
  326. .subvendor = 0x0070,
  327. .subdevice = 0x8101,
  328. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  329. }, {
  330. .subvendor = 0x0070,
  331. .subdevice = 0x8010,
  332. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  333. }, {
  334. .subvendor = 0x18ac,
  335. .subdevice = 0xd618,
  336. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  337. }, {
  338. .subvendor = 0x18ac,
  339. .subdevice = 0xdb78,
  340. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  341. }, {
  342. .subvendor = 0x107d,
  343. .subdevice = 0x6681,
  344. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  345. }, {
  346. .subvendor = 0x185b,
  347. .subdevice = 0xe800,
  348. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
  349. }, {
  350. .subvendor = 0x6920,
  351. .subdevice = 0x8888,
  352. .card = CX23885_BOARD_TBS_6920,
  353. }, {
  354. .subvendor = 0xd470,
  355. .subdevice = 0x9022,
  356. .card = CX23885_BOARD_TEVII_S470,
  357. }, {
  358. .subvendor = 0x0001,
  359. .subdevice = 0x2005,
  360. .card = CX23885_BOARD_DVBWORLD_2005,
  361. }, {
  362. .subvendor = 0x1b55,
  363. .subdevice = 0x2a2c,
  364. .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
  365. }, {
  366. .subvendor = 0x0070,
  367. .subdevice = 0x2211,
  368. .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
  369. }, {
  370. .subvendor = 0x0070,
  371. .subdevice = 0x2215,
  372. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  373. }, {
  374. .subvendor = 0x0070,
  375. .subdevice = 0x2251,
  376. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  377. }, {
  378. .subvendor = 0x0070,
  379. .subdevice = 0x2291,
  380. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  381. }, {
  382. .subvendor = 0x0070,
  383. .subdevice = 0x2295,
  384. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  385. }, {
  386. .subvendor = 0x14f1,
  387. .subdevice = 0x8651,
  388. .card = CX23885_BOARD_MYGICA_X8506,
  389. }, {
  390. .subvendor = 0x14f1,
  391. .subdevice = 0x8657,
  392. .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
  393. }, {
  394. .subvendor = 0x0070,
  395. .subdevice = 0x8541,
  396. .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
  397. }, {
  398. .subvendor = 0x1858,
  399. .subdevice = 0xe800,
  400. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
  401. }, {
  402. .subvendor = 0x0070,
  403. .subdevice = 0x8551,
  404. .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
  405. },
  406. };
  407. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  408. void cx23885_card_list(struct cx23885_dev *dev)
  409. {
  410. int i;
  411. if (0 == dev->pci->subsystem_vendor &&
  412. 0 == dev->pci->subsystem_device) {
  413. printk(KERN_INFO
  414. "%s: Board has no valid PCIe Subsystem ID and can't\n"
  415. "%s: be autodetected. Pass card=<n> insmod option\n"
  416. "%s: to workaround that. Redirect complaints to the\n"
  417. "%s: vendor of the TV card. Best regards,\n"
  418. "%s: -- tux\n",
  419. dev->name, dev->name, dev->name, dev->name, dev->name);
  420. } else {
  421. printk(KERN_INFO
  422. "%s: Your board isn't known (yet) to the driver.\n"
  423. "%s: Try to pick one of the existing card configs via\n"
  424. "%s: card=<n> insmod option. Updating to the latest\n"
  425. "%s: version might help as well.\n",
  426. dev->name, dev->name, dev->name, dev->name);
  427. }
  428. printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  429. dev->name);
  430. for (i = 0; i < cx23885_bcount; i++)
  431. printk(KERN_INFO "%s: card=%d -> %s\n",
  432. dev->name, i, cx23885_boards[i].name);
  433. }
  434. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  435. {
  436. struct tveeprom tv;
  437. tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
  438. eeprom_data);
  439. /* Make sure we support the board model */
  440. switch (tv.model) {
  441. case 22001:
  442. /* WinTV-HVR1270 (PCIe, Retail, half height)
  443. * ATSC/QAM and basic analog, IR Blast */
  444. case 22009:
  445. /* WinTV-HVR1210 (PCIe, Retail, half height)
  446. * DVB-T and basic analog, IR Blast */
  447. case 22011:
  448. /* WinTV-HVR1270 (PCIe, Retail, half height)
  449. * ATSC/QAM and basic analog, IR Recv */
  450. case 22019:
  451. /* WinTV-HVR1210 (PCIe, Retail, half height)
  452. * DVB-T and basic analog, IR Recv */
  453. case 22021:
  454. /* WinTV-HVR1275 (PCIe, Retail, half height)
  455. * ATSC/QAM and basic analog, IR Recv */
  456. case 22029:
  457. /* WinTV-HVR1210 (PCIe, Retail, half height)
  458. * DVB-T and basic analog, IR Recv */
  459. case 22101:
  460. /* WinTV-HVR1270 (PCIe, Retail, full height)
  461. * ATSC/QAM and basic analog, IR Blast */
  462. case 22109:
  463. /* WinTV-HVR1210 (PCIe, Retail, full height)
  464. * DVB-T and basic analog, IR Blast */
  465. case 22111:
  466. /* WinTV-HVR1270 (PCIe, Retail, full height)
  467. * ATSC/QAM and basic analog, IR Recv */
  468. case 22119:
  469. /* WinTV-HVR1210 (PCIe, Retail, full height)
  470. * DVB-T and basic analog, IR Recv */
  471. case 22121:
  472. /* WinTV-HVR1275 (PCIe, Retail, full height)
  473. * ATSC/QAM and basic analog, IR Recv */
  474. case 22129:
  475. /* WinTV-HVR1210 (PCIe, Retail, full height)
  476. * DVB-T and basic analog, IR Recv */
  477. case 71009:
  478. /* WinTV-HVR1200 (PCIe, Retail, full height)
  479. * DVB-T and basic analog */
  480. case 71359:
  481. /* WinTV-HVR1200 (PCIe, OEM, half height)
  482. * DVB-T and basic analog */
  483. case 71439:
  484. /* WinTV-HVR1200 (PCIe, OEM, half height)
  485. * DVB-T and basic analog */
  486. case 71449:
  487. /* WinTV-HVR1200 (PCIe, OEM, full height)
  488. * DVB-T and basic analog */
  489. case 71939:
  490. /* WinTV-HVR1200 (PCIe, OEM, half height)
  491. * DVB-T and basic analog */
  492. case 71949:
  493. /* WinTV-HVR1200 (PCIe, OEM, full height)
  494. * DVB-T and basic analog */
  495. case 71959:
  496. /* WinTV-HVR1200 (PCIe, OEM, full height)
  497. * DVB-T and basic analog */
  498. case 71979:
  499. /* WinTV-HVR1200 (PCIe, OEM, half height)
  500. * DVB-T and basic analog */
  501. case 71999:
  502. /* WinTV-HVR1200 (PCIe, OEM, full height)
  503. * DVB-T and basic analog */
  504. case 76601:
  505. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  506. channel ATSC and MPEG2 HW Encoder */
  507. case 77001:
  508. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  509. and Basic analog */
  510. case 77011:
  511. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  512. and Basic analog */
  513. case 77041:
  514. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  515. and Basic analog */
  516. case 77051:
  517. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  518. and Basic analog */
  519. case 78011:
  520. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  521. Dual channel ATSC and MPEG2 HW Encoder */
  522. case 78501:
  523. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  524. Dual channel ATSC and MPEG2 HW Encoder */
  525. case 78521:
  526. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  527. Dual channel ATSC and MPEG2 HW Encoder */
  528. case 78531:
  529. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  530. Dual channel ATSC and MPEG2 HW Encoder */
  531. case 78631:
  532. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  533. Dual channel ATSC and MPEG2 HW Encoder */
  534. case 79001:
  535. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  536. ATSC and Basic analog */
  537. case 79101:
  538. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  539. ATSC and Basic analog */
  540. case 79561:
  541. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  542. ATSC and Basic analog */
  543. case 79571:
  544. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  545. ATSC and Basic analog */
  546. case 79671:
  547. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  548. ATSC and Basic analog */
  549. case 80019:
  550. /* WinTV-HVR1400 (Express Card, Retail, IR,
  551. * DVB-T and Basic analog */
  552. case 81509:
  553. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  554. * DVB-T and MPEG2 HW Encoder */
  555. case 81519:
  556. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  557. * DVB-T and MPEG2 HW Encoder */
  558. break;
  559. case 85021:
  560. /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
  561. Dual channel ATSC and MPEG2 HW Encoder */
  562. break;
  563. case 85721:
  564. /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
  565. Dual channel ATSC and Basic analog */
  566. break;
  567. default:
  568. printk(KERN_WARNING "%s: warning: "
  569. "unknown hauppauge model #%d\n",
  570. dev->name, tv.model);
  571. break;
  572. }
  573. printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
  574. dev->name, tv.model);
  575. }
  576. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  577. {
  578. struct cx23885_tsport *port = priv;
  579. struct cx23885_dev *dev = port->dev;
  580. u32 bitmask = 0;
  581. if (command == XC2028_RESET_CLK)
  582. return 0;
  583. if (command != 0) {
  584. printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
  585. __func__, command);
  586. return -EINVAL;
  587. }
  588. switch (dev->board) {
  589. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  590. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  591. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  592. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  593. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  594. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  595. /* Tuner Reset Command */
  596. bitmask = 0x04;
  597. break;
  598. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  599. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  600. /* Two identical tuners on two different i2c buses,
  601. * we need to reset the correct gpio. */
  602. if (port->nr == 1)
  603. bitmask = 0x01;
  604. else if (port->nr == 2)
  605. bitmask = 0x04;
  606. break;
  607. }
  608. if (bitmask) {
  609. /* Drive the tuner into reset and back out */
  610. cx_clear(GP0_IO, bitmask);
  611. mdelay(200);
  612. cx_set(GP0_IO, bitmask);
  613. }
  614. return 0;
  615. }
  616. void cx23885_gpio_setup(struct cx23885_dev *dev)
  617. {
  618. switch (dev->board) {
  619. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  620. /* GPIO-0 cx24227 demodulator reset */
  621. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  622. break;
  623. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  624. /* GPIO-0 cx24227 demodulator */
  625. /* GPIO-2 xc3028 tuner */
  626. /* Put the parts into reset */
  627. cx_set(GP0_IO, 0x00050000);
  628. cx_clear(GP0_IO, 0x00000005);
  629. msleep(5);
  630. /* Bring the parts out of reset */
  631. cx_set(GP0_IO, 0x00050005);
  632. break;
  633. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  634. /* GPIO-0 cx24227 demodulator reset */
  635. /* GPIO-2 xc5000 tuner reset */
  636. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  637. break;
  638. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  639. /* GPIO-0 656_CLK */
  640. /* GPIO-1 656_D0 */
  641. /* GPIO-2 8295A Reset */
  642. /* GPIO-3-10 cx23417 data0-7 */
  643. /* GPIO-11-14 cx23417 addr0-3 */
  644. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  645. /* GPIO-19 IR_RX */
  646. /* CX23417 GPIO's */
  647. /* EIO15 Zilog Reset */
  648. /* EIO14 S5H1409/CX24227 Reset */
  649. mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
  650. /* Put the demod into reset and protect the eeprom */
  651. mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
  652. mdelay(100);
  653. /* Bring the demod and blaster out of reset */
  654. mc417_gpio_set(dev, GPIO_15 | GPIO_14);
  655. mdelay(100);
  656. /* Force the TDA8295A into reset and back */
  657. cx23885_gpio_enable(dev, GPIO_2, 1);
  658. cx23885_gpio_set(dev, GPIO_2);
  659. mdelay(20);
  660. cx23885_gpio_clear(dev, GPIO_2);
  661. mdelay(20);
  662. cx23885_gpio_set(dev, GPIO_2);
  663. mdelay(20);
  664. break;
  665. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  666. /* GPIO-0 tda10048 demodulator reset */
  667. /* GPIO-2 tda18271 tuner reset */
  668. /* Put the parts into reset and back */
  669. cx_set(GP0_IO, 0x00050000);
  670. mdelay(20);
  671. cx_clear(GP0_IO, 0x00000005);
  672. mdelay(20);
  673. cx_set(GP0_IO, 0x00050005);
  674. break;
  675. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  676. /* GPIO-0 TDA10048 demodulator reset */
  677. /* GPIO-2 TDA8295A Reset */
  678. /* GPIO-3-10 cx23417 data0-7 */
  679. /* GPIO-11-14 cx23417 addr0-3 */
  680. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  681. /* The following GPIO's are on the interna AVCore (cx25840) */
  682. /* GPIO-19 IR_RX */
  683. /* GPIO-20 IR_TX 416/DVBT Select */
  684. /* GPIO-21 IIS DAT */
  685. /* GPIO-22 IIS WCLK */
  686. /* GPIO-23 IIS BCLK */
  687. /* Put the parts into reset and back */
  688. cx_set(GP0_IO, 0x00050000);
  689. mdelay(20);
  690. cx_clear(GP0_IO, 0x00000005);
  691. mdelay(20);
  692. cx_set(GP0_IO, 0x00050005);
  693. break;
  694. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  695. /* GPIO-0 Dibcom7000p demodulator reset */
  696. /* GPIO-2 xc3028L tuner reset */
  697. /* GPIO-13 LED */
  698. /* Put the parts into reset and back */
  699. cx_set(GP0_IO, 0x00050000);
  700. mdelay(20);
  701. cx_clear(GP0_IO, 0x00000005);
  702. mdelay(20);
  703. cx_set(GP0_IO, 0x00050005);
  704. break;
  705. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  706. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  707. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  708. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  709. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  710. /* Put the parts into reset and back */
  711. cx_set(GP0_IO, 0x000f0000);
  712. mdelay(20);
  713. cx_clear(GP0_IO, 0x0000000f);
  714. mdelay(20);
  715. cx_set(GP0_IO, 0x000f000f);
  716. break;
  717. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  718. /* GPIO-0 portb xc3028 reset */
  719. /* GPIO-1 portb zl10353 reset */
  720. /* GPIO-2 portc xc3028 reset */
  721. /* GPIO-3 portc zl10353 reset */
  722. /* Put the parts into reset and back */
  723. cx_set(GP0_IO, 0x000f0000);
  724. mdelay(20);
  725. cx_clear(GP0_IO, 0x0000000f);
  726. mdelay(20);
  727. cx_set(GP0_IO, 0x000f000f);
  728. break;
  729. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  730. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  731. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  732. /* GPIO-2 xc3028 tuner reset */
  733. /* The following GPIO's are on the internal AVCore (cx25840) */
  734. /* GPIO-? zl10353 demod reset */
  735. /* Put the parts into reset and back */
  736. cx_set(GP0_IO, 0x00040000);
  737. mdelay(20);
  738. cx_clear(GP0_IO, 0x00000004);
  739. mdelay(20);
  740. cx_set(GP0_IO, 0x00040004);
  741. break;
  742. case CX23885_BOARD_TBS_6920:
  743. case CX23885_BOARD_TEVII_S470:
  744. cx_write(MC417_CTL, 0x00000036);
  745. cx_write(MC417_OEN, 0x00001000);
  746. cx_write(MC417_RWD, 0x00001800);
  747. break;
  748. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  749. /* GPIO-0 INTA from CiMax1
  750. GPIO-1 INTB from CiMax2
  751. GPIO-2 reset chips
  752. GPIO-3 to GPIO-10 data/addr for CA
  753. GPIO-11 ~CS0 to CiMax1
  754. GPIO-12 ~CS1 to CiMax2
  755. GPIO-13 ADL0 load LSB addr
  756. GPIO-14 ADL1 load MSB addr
  757. GPIO-15 ~RDY from CiMax
  758. GPIO-17 ~RD to CiMax
  759. GPIO-18 ~WR to CiMax
  760. */
  761. cx_set(GP0_IO, 0x00040000); /* GPIO as out */
  762. /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
  763. cx_clear(GP0_IO, 0x00030004);
  764. mdelay(100);/* reset delay */
  765. cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
  766. cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
  767. /* GPIO-15 IN as ~ACK, rest as OUT */
  768. cx_write(MC417_OEN, 0x00001000);
  769. /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
  770. cx_write(MC417_RWD, 0x0000c300);
  771. /* enable irq */
  772. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  773. break;
  774. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  775. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  776. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  777. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  778. /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
  779. /* GPIO-6 I2C Gate which can isolate the demod from the bus */
  780. /* GPIO-9 Demod reset */
  781. /* Put the parts into reset and back */
  782. cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
  783. cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
  784. cx23885_gpio_clear(dev, GPIO_9);
  785. mdelay(20);
  786. cx23885_gpio_set(dev, GPIO_9);
  787. break;
  788. case CX23885_BOARD_MYGICA_X8506:
  789. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  790. /* GPIO-0 (0)Analog / (1)Digital TV */
  791. /* GPIO-1 reset XC5000 */
  792. /* GPIO-2 reset LGS8GL5 / LGS8G75 */
  793. cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
  794. cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
  795. mdelay(100);
  796. cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
  797. mdelay(100);
  798. break;
  799. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  800. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  801. /* GPIO-0 656_CLK */
  802. /* GPIO-1 656_D0 */
  803. /* GPIO-2 Wake# */
  804. /* GPIO-3-10 cx23417 data0-7 */
  805. /* GPIO-11-14 cx23417 addr0-3 */
  806. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  807. /* GPIO-19 IR_RX */
  808. /* GPIO-20 C_IR_TX */
  809. /* GPIO-21 I2S DAT */
  810. /* GPIO-22 I2S WCLK */
  811. /* GPIO-23 I2S BCLK */
  812. /* ALT GPIO: EXP GPIO LATCH */
  813. /* CX23417 GPIO's */
  814. /* GPIO-14 S5H1411/CX24228 Reset */
  815. /* GPIO-13 EEPROM write protect */
  816. mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
  817. /* Put the demod into reset and protect the eeprom */
  818. mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
  819. mdelay(100);
  820. /* Bring the demod out of reset */
  821. mc417_gpio_set(dev, GPIO_14);
  822. mdelay(100);
  823. /* CX24228 GPIO */
  824. /* Connected to IF / Mux */
  825. break;
  826. }
  827. }
  828. int cx23885_ir_init(struct cx23885_dev *dev)
  829. {
  830. int ret = 0;
  831. switch (dev->board) {
  832. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  833. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  834. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  835. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  836. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  837. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  838. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  839. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  840. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  841. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  842. /* FIXME: Implement me */
  843. break;
  844. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  845. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  846. ret = cx23888_ir_probe(dev);
  847. if (ret)
  848. break;
  849. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
  850. dev->pci_irqmask |= PCI_MSK_IR;
  851. break;
  852. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  853. request_module("ir-kbd-i2c");
  854. break;
  855. }
  856. return ret;
  857. }
  858. void cx23885_ir_fini(struct cx23885_dev *dev)
  859. {
  860. switch (dev->board) {
  861. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  862. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  863. dev->pci_irqmask &= ~PCI_MSK_IR;
  864. cx_clear(PCI_INT_MSK, PCI_MSK_IR);
  865. cx23888_ir_remove(dev);
  866. dev->sd_ir = NULL;
  867. break;
  868. }
  869. }
  870. void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
  871. {
  872. switch (dev->board) {
  873. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  874. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  875. if (dev->sd_ir && (dev->pci_irqmask & PCI_MSK_IR))
  876. cx_set(PCI_INT_MSK, PCI_MSK_IR);
  877. break;
  878. }
  879. }
  880. void cx23885_card_setup(struct cx23885_dev *dev)
  881. {
  882. struct cx23885_tsport *ts1 = &dev->ts1;
  883. struct cx23885_tsport *ts2 = &dev->ts2;
  884. static u8 eeprom[256];
  885. if (dev->i2c_bus[0].i2c_rc == 0) {
  886. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  887. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  888. eeprom, sizeof(eeprom));
  889. }
  890. switch (dev->board) {
  891. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  892. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  893. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  894. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  895. if (dev->i2c_bus[0].i2c_rc == 0)
  896. hauppauge_eeprom(dev, eeprom+0x80);
  897. break;
  898. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  899. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  900. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  901. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  902. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  903. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  904. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  905. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  906. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  907. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  908. if (dev->i2c_bus[0].i2c_rc == 0)
  909. hauppauge_eeprom(dev, eeprom+0xc0);
  910. break;
  911. }
  912. switch (dev->board) {
  913. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  914. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  915. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  916. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  917. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  918. /* break omitted intentionally */
  919. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  920. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  921. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  922. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  923. break;
  924. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  925. /* Defaults for VID B - Analog encoder */
  926. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  927. ts1->gen_ctrl_val = 0x10e;
  928. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  929. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  930. /* APB_TSVALERR_POL (active low)*/
  931. ts1->vld_misc_val = 0x2000;
  932. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  933. /* Defaults for VID C */
  934. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  935. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  936. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  937. break;
  938. case CX23885_BOARD_TEVII_S470:
  939. case CX23885_BOARD_TBS_6920:
  940. case CX23885_BOARD_DVBWORLD_2005:
  941. ts1->gen_ctrl_val = 0x5; /* Parallel */
  942. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  943. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  944. break;
  945. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  946. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  947. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  948. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  949. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  950. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  951. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  952. break;
  953. case CX23885_BOARD_MYGICA_X8506:
  954. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  955. ts1->gen_ctrl_val = 0x5; /* Parallel */
  956. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  957. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  958. break;
  959. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  960. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  961. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  962. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  963. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  964. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  965. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  966. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  967. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  968. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  969. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  970. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  971. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  972. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  973. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  974. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  975. default:
  976. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  977. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  978. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  979. }
  980. /* Certain boards support analog, or require the avcore to be
  981. * loaded, ensure this happens.
  982. */
  983. switch (dev->board) {
  984. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  985. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  986. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  987. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  988. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  989. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  990. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  991. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  992. case CX23885_BOARD_MYGICA_X8506:
  993. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  994. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  995. dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
  996. &dev->i2c_bus[2].i2c_adap,
  997. "cx25840", "cx25840", 0x88 >> 1, NULL);
  998. v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
  999. break;
  1000. }
  1001. /* AUX-PLL 27MHz CLK */
  1002. switch (dev->board) {
  1003. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  1004. netup_initialize(dev);
  1005. break;
  1006. }
  1007. }
  1008. /* ------------------------------------------------------------------ */