context.c 4.1 KB

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  1. /*
  2. * linux/arch/arm/mm/context.c
  3. *
  4. * Copyright (C) 2002-2003 Deep Blue Solutions Ltd, all rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/sched.h>
  12. #include <linux/mm.h>
  13. #include <linux/smp.h>
  14. #include <linux/percpu.h>
  15. #include <asm/mmu_context.h>
  16. #include <asm/tlbflush.h>
  17. static DEFINE_RAW_SPINLOCK(cpu_asid_lock);
  18. unsigned int cpu_last_asid = ASID_FIRST_VERSION;
  19. #ifdef CONFIG_SMP
  20. DEFINE_PER_CPU(struct mm_struct *, current_mm);
  21. #endif
  22. #ifdef CONFIG_ARM_LPAE
  23. void cpu_set_reserved_ttbr0(void)
  24. {
  25. unsigned long ttbl = __pa(swapper_pg_dir);
  26. unsigned long ttbh = 0;
  27. /*
  28. * Set TTBR0 to swapper_pg_dir which contains only global entries. The
  29. * ASID is set to 0.
  30. */
  31. asm volatile(
  32. " mcrr p15, 0, %0, %1, c2 @ set TTBR0\n"
  33. :
  34. : "r" (ttbl), "r" (ttbh));
  35. isb();
  36. }
  37. #else
  38. void cpu_set_reserved_ttbr0(void)
  39. {
  40. u32 ttb;
  41. /* Copy TTBR1 into TTBR0 */
  42. asm volatile(
  43. " mrc p15, 0, %0, c2, c0, 1 @ read TTBR1\n"
  44. " mcr p15, 0, %0, c2, c0, 0 @ set TTBR0\n"
  45. : "=r" (ttb));
  46. isb();
  47. }
  48. #endif
  49. /*
  50. * We fork()ed a process, and we need a new context for the child
  51. * to run in.
  52. */
  53. void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
  54. {
  55. mm->context.id = 0;
  56. raw_spin_lock_init(&mm->context.id_lock);
  57. }
  58. static void flush_context(void)
  59. {
  60. cpu_set_reserved_ttbr0();
  61. local_flush_tlb_all();
  62. if (icache_is_vivt_asid_tagged()) {
  63. __flush_icache_all();
  64. dsb();
  65. }
  66. }
  67. #ifdef CONFIG_SMP
  68. static void set_mm_context(struct mm_struct *mm, unsigned int asid)
  69. {
  70. unsigned long flags;
  71. /*
  72. * Locking needed for multi-threaded applications where the
  73. * same mm->context.id could be set from different CPUs during
  74. * the broadcast. This function is also called via IPI so the
  75. * mm->context.id_lock has to be IRQ-safe.
  76. */
  77. raw_spin_lock_irqsave(&mm->context.id_lock, flags);
  78. if (likely((mm->context.id ^ cpu_last_asid) >> ASID_BITS)) {
  79. /*
  80. * Old version of ASID found. Set the new one and
  81. * reset mm_cpumask(mm).
  82. */
  83. mm->context.id = asid;
  84. cpumask_clear(mm_cpumask(mm));
  85. }
  86. raw_spin_unlock_irqrestore(&mm->context.id_lock, flags);
  87. /*
  88. * Set the mm_cpumask(mm) bit for the current CPU.
  89. */
  90. cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
  91. }
  92. /*
  93. * Reset the ASID on the current CPU. This function call is broadcast
  94. * from the CPU handling the ASID rollover and holding cpu_asid_lock.
  95. */
  96. static void reset_context(void *info)
  97. {
  98. unsigned int asid;
  99. unsigned int cpu = smp_processor_id();
  100. struct mm_struct *mm = per_cpu(current_mm, cpu);
  101. /*
  102. * Check if a current_mm was set on this CPU as it might still
  103. * be in the early booting stages and using the reserved ASID.
  104. */
  105. if (!mm)
  106. return;
  107. smp_rmb();
  108. asid = cpu_last_asid + cpu + 1;
  109. flush_context();
  110. set_mm_context(mm, asid);
  111. /* set the new ASID */
  112. cpu_switch_mm(mm->pgd, mm);
  113. }
  114. #else
  115. static inline void set_mm_context(struct mm_struct *mm, unsigned int asid)
  116. {
  117. mm->context.id = asid;
  118. cpumask_copy(mm_cpumask(mm), cpumask_of(smp_processor_id()));
  119. }
  120. #endif
  121. void __new_context(struct mm_struct *mm)
  122. {
  123. unsigned int asid;
  124. raw_spin_lock(&cpu_asid_lock);
  125. #ifdef CONFIG_SMP
  126. /*
  127. * Check the ASID again, in case the change was broadcast from
  128. * another CPU before we acquired the lock.
  129. */
  130. if (unlikely(((mm->context.id ^ cpu_last_asid) >> ASID_BITS) == 0)) {
  131. cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
  132. raw_spin_unlock(&cpu_asid_lock);
  133. return;
  134. }
  135. #endif
  136. /*
  137. * At this point, it is guaranteed that the current mm (with
  138. * an old ASID) isn't active on any other CPU since the ASIDs
  139. * are changed simultaneously via IPI.
  140. */
  141. asid = ++cpu_last_asid;
  142. if (asid == 0)
  143. asid = cpu_last_asid = ASID_FIRST_VERSION;
  144. /*
  145. * If we've used up all our ASIDs, we need
  146. * to start a new version and flush the TLB.
  147. */
  148. if (unlikely((asid & ~ASID_MASK) == 0)) {
  149. asid = cpu_last_asid + smp_processor_id() + 1;
  150. flush_context();
  151. #ifdef CONFIG_SMP
  152. smp_wmb();
  153. smp_call_function(reset_context, NULL, 1);
  154. #endif
  155. cpu_last_asid += NR_CPUS;
  156. }
  157. set_mm_context(mm, asid);
  158. raw_spin_unlock(&cpu_asid_lock);
  159. }