omap2430.c 14 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/clk.h>
  33. #include <linux/io.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/pm_runtime.h>
  37. #include <linux/err.h>
  38. #include "musb_core.h"
  39. #include "omap2430.h"
  40. struct omap2430_glue {
  41. struct device *dev;
  42. struct platform_device *musb;
  43. };
  44. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  45. static struct timer_list musb_idle_timer;
  46. static void musb_do_idle(unsigned long _musb)
  47. {
  48. struct musb *musb = (void *)_musb;
  49. unsigned long flags;
  50. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  51. u8 power;
  52. #endif
  53. u8 devctl;
  54. spin_lock_irqsave(&musb->lock, flags);
  55. switch (musb->xceiv->state) {
  56. case OTG_STATE_A_WAIT_BCON:
  57. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  58. if (devctl & MUSB_DEVCTL_BDEVICE) {
  59. musb->xceiv->state = OTG_STATE_B_IDLE;
  60. MUSB_DEV_MODE(musb);
  61. } else {
  62. musb->xceiv->state = OTG_STATE_A_IDLE;
  63. MUSB_HST_MODE(musb);
  64. }
  65. break;
  66. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  67. case OTG_STATE_A_SUSPEND:
  68. /* finish RESUME signaling? */
  69. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  70. power = musb_readb(musb->mregs, MUSB_POWER);
  71. power &= ~MUSB_POWER_RESUME;
  72. dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
  73. musb_writeb(musb->mregs, MUSB_POWER, power);
  74. musb->is_active = 1;
  75. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  76. | MUSB_PORT_STAT_RESUME);
  77. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  78. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  79. /* NOTE: it might really be A_WAIT_BCON ... */
  80. musb->xceiv->state = OTG_STATE_A_HOST;
  81. }
  82. break;
  83. #endif
  84. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  85. case OTG_STATE_A_HOST:
  86. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  87. if (devctl & MUSB_DEVCTL_BDEVICE)
  88. musb->xceiv->state = OTG_STATE_B_IDLE;
  89. else
  90. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  91. #endif
  92. default:
  93. break;
  94. }
  95. spin_unlock_irqrestore(&musb->lock, flags);
  96. }
  97. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  98. {
  99. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  100. static unsigned long last_timer;
  101. if (timeout == 0)
  102. timeout = default_timeout;
  103. /* Never idle if active, or when VBUS timeout is not set as host */
  104. if (musb->is_active || ((musb->a_wait_bcon == 0)
  105. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  106. dev_dbg(musb->controller, "%s active, deleting timer\n",
  107. otg_state_string(musb->xceiv->state));
  108. del_timer(&musb_idle_timer);
  109. last_timer = jiffies;
  110. return;
  111. }
  112. if (time_after(last_timer, timeout)) {
  113. if (!timer_pending(&musb_idle_timer))
  114. last_timer = timeout;
  115. else {
  116. dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
  117. return;
  118. }
  119. }
  120. last_timer = timeout;
  121. dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
  122. otg_state_string(musb->xceiv->state),
  123. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  124. mod_timer(&musb_idle_timer, timeout);
  125. }
  126. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  127. {
  128. u8 devctl;
  129. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  130. int ret = 1;
  131. /* HDRC controls CPEN, but beware current surges during device
  132. * connect. They can trigger transient overcurrent conditions
  133. * that must be ignored.
  134. */
  135. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  136. if (is_on) {
  137. if (musb->xceiv->state == OTG_STATE_A_IDLE) {
  138. /* start the session */
  139. devctl |= MUSB_DEVCTL_SESSION;
  140. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  141. /*
  142. * Wait for the musb to set as A device to enable the
  143. * VBUS
  144. */
  145. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  146. cpu_relax();
  147. if (time_after(jiffies, timeout)) {
  148. dev_err(musb->controller,
  149. "configured as A device timeout");
  150. ret = -EINVAL;
  151. break;
  152. }
  153. }
  154. if (ret && musb->xceiv->set_vbus)
  155. otg_set_vbus(musb->xceiv, 1);
  156. } else {
  157. musb->is_active = 1;
  158. musb->xceiv->default_a = 1;
  159. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  160. devctl |= MUSB_DEVCTL_SESSION;
  161. MUSB_HST_MODE(musb);
  162. }
  163. } else {
  164. musb->is_active = 0;
  165. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  166. * jumping right to B_IDLE...
  167. */
  168. musb->xceiv->default_a = 0;
  169. musb->xceiv->state = OTG_STATE_B_IDLE;
  170. devctl &= ~MUSB_DEVCTL_SESSION;
  171. MUSB_DEV_MODE(musb);
  172. }
  173. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  174. dev_dbg(musb->controller, "VBUS %s, devctl %02x "
  175. /* otg %3x conf %08x prcm %08x */ "\n",
  176. otg_state_string(musb->xceiv->state),
  177. musb_readb(musb->mregs, MUSB_DEVCTL));
  178. }
  179. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  180. {
  181. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  182. devctl |= MUSB_DEVCTL_SESSION;
  183. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  184. return 0;
  185. }
  186. static inline void omap2430_low_level_exit(struct musb *musb)
  187. {
  188. u32 l;
  189. /* in any role */
  190. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  191. l |= ENABLEFORCE; /* enable MSTANDBY */
  192. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  193. }
  194. static inline void omap2430_low_level_init(struct musb *musb)
  195. {
  196. u32 l;
  197. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  198. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  199. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  200. }
  201. /* blocking notifier support */
  202. static int musb_otg_notifications(struct notifier_block *nb,
  203. unsigned long event, void *unused)
  204. {
  205. struct musb *musb = container_of(nb, struct musb, nb);
  206. struct device *dev = musb->controller;
  207. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  208. struct omap_musb_board_data *data = pdata->board_data;
  209. switch (event) {
  210. case USB_EVENT_ID:
  211. dev_dbg(musb->controller, "ID GND\n");
  212. if (is_otg_enabled(musb)) {
  213. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  214. if (musb->gadget_driver) {
  215. pm_runtime_get_sync(musb->controller);
  216. otg_init(musb->xceiv);
  217. omap2430_musb_set_vbus(musb, 1);
  218. }
  219. #endif
  220. } else {
  221. pm_runtime_get_sync(musb->controller);
  222. otg_init(musb->xceiv);
  223. omap2430_musb_set_vbus(musb, 1);
  224. }
  225. break;
  226. case USB_EVENT_VBUS:
  227. dev_dbg(musb->controller, "VBUS Connect\n");
  228. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  229. if (musb->gadget_driver)
  230. pm_runtime_get_sync(musb->controller);
  231. #endif
  232. otg_init(musb->xceiv);
  233. break;
  234. case USB_EVENT_NONE:
  235. dev_dbg(musb->controller, "VBUS Disconnect\n");
  236. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  237. if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
  238. if (musb->gadget_driver)
  239. #endif
  240. {
  241. pm_runtime_mark_last_busy(musb->controller);
  242. pm_runtime_put_autosuspend(musb->controller);
  243. }
  244. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  245. if (musb->xceiv->set_vbus)
  246. otg_set_vbus(musb->xceiv, 0);
  247. }
  248. otg_shutdown(musb->xceiv);
  249. break;
  250. default:
  251. dev_dbg(musb->controller, "ID float\n");
  252. return NOTIFY_DONE;
  253. }
  254. return NOTIFY_OK;
  255. }
  256. static int omap2430_musb_init(struct musb *musb)
  257. {
  258. u32 l, status = 0;
  259. struct device *dev = musb->controller;
  260. struct musb_hdrc_platform_data *plat = dev->platform_data;
  261. struct omap_musb_board_data *data = plat->board_data;
  262. /* We require some kind of external transceiver, hooked
  263. * up through ULPI. TWL4030-family PMICs include one,
  264. * which needs a driver, drivers aren't always needed.
  265. */
  266. musb->xceiv = otg_get_transceiver();
  267. if (!musb->xceiv) {
  268. pr_err("HS USB OTG: no transceiver configured\n");
  269. return -ENODEV;
  270. }
  271. status = pm_runtime_get_sync(dev);
  272. if (status < 0) {
  273. dev_err(dev, "pm_runtime_get_sync FAILED");
  274. goto err1;
  275. }
  276. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  277. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  278. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  279. l &= ~ULPI_12PIN; /* Disable ULPI */
  280. l |= UTMI_8BIT; /* Enable UTMI */
  281. } else {
  282. l |= ULPI_12PIN;
  283. }
  284. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  285. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  286. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  287. musb_readl(musb->mregs, OTG_REVISION),
  288. musb_readl(musb->mregs, OTG_SYSCONFIG),
  289. musb_readl(musb->mregs, OTG_SYSSTATUS),
  290. musb_readl(musb->mregs, OTG_INTERFSEL),
  291. musb_readl(musb->mregs, OTG_SIMENABLE));
  292. musb->nb.notifier_call = musb_otg_notifications;
  293. status = otg_register_notifier(musb->xceiv, &musb->nb);
  294. if (status)
  295. dev_dbg(musb->controller, "notification register failed\n");
  296. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  297. return 0;
  298. err1:
  299. pm_runtime_disable(dev);
  300. return status;
  301. }
  302. static void omap2430_musb_enable(struct musb *musb)
  303. {
  304. u8 devctl;
  305. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  306. struct device *dev = musb->controller;
  307. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  308. struct omap_musb_board_data *data = pdata->board_data;
  309. switch (musb->xceiv->last_event) {
  310. case USB_EVENT_ID:
  311. otg_init(musb->xceiv);
  312. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  313. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  314. /* start the session */
  315. devctl |= MUSB_DEVCTL_SESSION;
  316. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  317. while (musb_readb(musb->mregs, MUSB_DEVCTL) &
  318. MUSB_DEVCTL_BDEVICE) {
  319. cpu_relax();
  320. if (time_after(jiffies, timeout)) {
  321. dev_err(musb->controller,
  322. "configured as A device timeout");
  323. break;
  324. }
  325. }
  326. }
  327. break;
  328. case USB_EVENT_VBUS:
  329. otg_init(musb->xceiv);
  330. break;
  331. default:
  332. break;
  333. }
  334. }
  335. static void omap2430_musb_disable(struct musb *musb)
  336. {
  337. if (musb->xceiv->last_event)
  338. otg_shutdown(musb->xceiv);
  339. }
  340. static int omap2430_musb_exit(struct musb *musb)
  341. {
  342. del_timer_sync(&musb_idle_timer);
  343. omap2430_low_level_exit(musb);
  344. otg_put_transceiver(musb->xceiv);
  345. return 0;
  346. }
  347. static const struct musb_platform_ops omap2430_ops = {
  348. .init = omap2430_musb_init,
  349. .exit = omap2430_musb_exit,
  350. .set_mode = omap2430_musb_set_mode,
  351. .try_idle = omap2430_musb_try_idle,
  352. .set_vbus = omap2430_musb_set_vbus,
  353. .enable = omap2430_musb_enable,
  354. .disable = omap2430_musb_disable,
  355. };
  356. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  357. static int __init omap2430_probe(struct platform_device *pdev)
  358. {
  359. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  360. struct platform_device *musb;
  361. struct omap2430_glue *glue;
  362. int ret = -ENOMEM;
  363. glue = kzalloc(sizeof(*glue), GFP_KERNEL);
  364. if (!glue) {
  365. dev_err(&pdev->dev, "failed to allocate glue context\n");
  366. goto err0;
  367. }
  368. musb = platform_device_alloc("musb-hdrc", -1);
  369. if (!musb) {
  370. dev_err(&pdev->dev, "failed to allocate musb device\n");
  371. goto err1;
  372. }
  373. musb->dev.parent = &pdev->dev;
  374. musb->dev.dma_mask = &omap2430_dmamask;
  375. musb->dev.coherent_dma_mask = omap2430_dmamask;
  376. glue->dev = &pdev->dev;
  377. glue->musb = musb;
  378. pdata->platform_ops = &omap2430_ops;
  379. platform_set_drvdata(pdev, glue);
  380. ret = platform_device_add_resources(musb, pdev->resource,
  381. pdev->num_resources);
  382. if (ret) {
  383. dev_err(&pdev->dev, "failed to add resources\n");
  384. goto err2;
  385. }
  386. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  387. if (ret) {
  388. dev_err(&pdev->dev, "failed to add platform_data\n");
  389. goto err2;
  390. }
  391. ret = platform_device_add(musb);
  392. if (ret) {
  393. dev_err(&pdev->dev, "failed to register musb device\n");
  394. goto err2;
  395. }
  396. pm_runtime_enable(&pdev->dev);
  397. return 0;
  398. err2:
  399. platform_device_put(musb);
  400. err1:
  401. kfree(glue);
  402. err0:
  403. return ret;
  404. }
  405. static int __exit omap2430_remove(struct platform_device *pdev)
  406. {
  407. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  408. platform_device_del(glue->musb);
  409. platform_device_put(glue->musb);
  410. pm_runtime_put(&pdev->dev);
  411. pm_runtime_disable(&pdev->dev);
  412. kfree(glue);
  413. return 0;
  414. }
  415. #ifdef CONFIG_PM
  416. static int omap2430_runtime_suspend(struct device *dev)
  417. {
  418. struct omap2430_glue *glue = dev_get_drvdata(dev);
  419. struct musb *musb = glue_to_musb(glue);
  420. omap2430_low_level_exit(musb);
  421. otg_set_suspend(musb->xceiv, 1);
  422. return 0;
  423. }
  424. static int omap2430_runtime_resume(struct device *dev)
  425. {
  426. struct omap2430_glue *glue = dev_get_drvdata(dev);
  427. struct musb *musb = glue_to_musb(glue);
  428. omap2430_low_level_init(musb);
  429. otg_set_suspend(musb->xceiv, 0);
  430. return 0;
  431. }
  432. static struct dev_pm_ops omap2430_pm_ops = {
  433. .runtime_suspend = omap2430_runtime_suspend,
  434. .runtime_resume = omap2430_runtime_resume,
  435. };
  436. #define DEV_PM_OPS (&omap2430_pm_ops)
  437. #else
  438. #define DEV_PM_OPS NULL
  439. #endif
  440. static struct platform_driver omap2430_driver = {
  441. .remove = __exit_p(omap2430_remove),
  442. .driver = {
  443. .name = "musb-omap2430",
  444. .pm = DEV_PM_OPS,
  445. },
  446. };
  447. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  448. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  449. MODULE_LICENSE("GPL v2");
  450. static int __init omap2430_init(void)
  451. {
  452. return platform_driver_probe(&omap2430_driver, omap2430_probe);
  453. }
  454. subsys_initcall(omap2430_init);
  455. static void __exit omap2430_exit(void)
  456. {
  457. platform_driver_unregister(&omap2430_driver);
  458. }
  459. module_exit(omap2430_exit);