core.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889
  1. /*
  2. * arch/arm/mach-ep93xx/core.c
  3. * Core routines for Cirrus EP93xx chips.
  4. *
  5. * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
  6. * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
  7. *
  8. * Thanks go to Michael Burian and Ray Lehtiniemi for their key
  9. * role in the ep93xx linux community.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. */
  16. #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/dma-mapping.h>
  22. #include <linux/timex.h>
  23. #include <linux/irq.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/leds.h>
  27. #include <linux/termios.h>
  28. #include <linux/amba/bus.h>
  29. #include <linux/amba/serial.h>
  30. #include <linux/mtd/physmap.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-gpio.h>
  33. #include <linux/spi/spi.h>
  34. #include <mach/hardware.h>
  35. #include <mach/fb.h>
  36. #include <mach/ep93xx_keypad.h>
  37. #include <mach/ep93xx_spi.h>
  38. #include <asm/mach/map.h>
  39. #include <asm/mach/time.h>
  40. #include <asm/hardware/vic.h>
  41. /*************************************************************************
  42. * Static I/O mappings that are needed for all EP93xx platforms
  43. *************************************************************************/
  44. static struct map_desc ep93xx_io_desc[] __initdata = {
  45. {
  46. .virtual = EP93XX_AHB_VIRT_BASE,
  47. .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  48. .length = EP93XX_AHB_SIZE,
  49. .type = MT_DEVICE,
  50. }, {
  51. .virtual = EP93XX_APB_VIRT_BASE,
  52. .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  53. .length = EP93XX_APB_SIZE,
  54. .type = MT_DEVICE,
  55. },
  56. };
  57. void __init ep93xx_map_io(void)
  58. {
  59. iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  60. }
  61. /*************************************************************************
  62. * Timer handling for EP93xx
  63. *************************************************************************
  64. * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
  65. * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  66. * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
  67. * is free-running, and can't generate interrupts.
  68. *
  69. * The 508 kHz timers are ideal for use for the timer interrupt, as the
  70. * most common values of HZ divide 508 kHz nicely. We pick one of the 16
  71. * bit timers (timer 1) since we don't need more than 16 bits of reload
  72. * value as long as HZ >= 8.
  73. *
  74. * The higher clock rate of timer 4 makes it a better choice than the
  75. * other timers for use in gettimeoffset(), while the fact that it can't
  76. * generate interrupts means we don't have to worry about not being able
  77. * to use this timer for something else. We also use timer 4 for keeping
  78. * track of lost jiffies.
  79. */
  80. #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
  81. #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
  82. #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
  83. #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
  84. #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
  85. #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
  86. #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
  87. #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
  88. #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
  89. #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
  90. #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
  91. #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
  92. #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
  93. #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
  94. #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
  95. #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
  96. #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
  97. #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
  98. #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
  99. #define EP93XX_TIMER123_CLOCK 508469
  100. #define EP93XX_TIMER4_CLOCK 983040
  101. #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
  102. #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
  103. static unsigned int last_jiffy_time;
  104. static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
  105. {
  106. /* Writing any value clears the timer interrupt */
  107. __raw_writel(1, EP93XX_TIMER1_CLEAR);
  108. /* Recover lost jiffies */
  109. while ((signed long)
  110. (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
  111. >= TIMER4_TICKS_PER_JIFFY) {
  112. last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
  113. timer_tick();
  114. }
  115. return IRQ_HANDLED;
  116. }
  117. static struct irqaction ep93xx_timer_irq = {
  118. .name = "ep93xx timer",
  119. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  120. .handler = ep93xx_timer_interrupt,
  121. };
  122. static void __init ep93xx_timer_init(void)
  123. {
  124. u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
  125. EP93XX_TIMER123_CONTROL_CLKSEL;
  126. /* Enable periodic HZ timer. */
  127. __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
  128. __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
  129. __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
  130. EP93XX_TIMER1_CONTROL);
  131. /* Enable lost jiffy timer. */
  132. __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
  133. EP93XX_TIMER4_VALUE_HIGH);
  134. setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
  135. }
  136. static unsigned long ep93xx_gettimeoffset(void)
  137. {
  138. int offset;
  139. offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
  140. /* Calculate (1000000 / 983040) * offset. */
  141. return offset + (53 * offset / 3072);
  142. }
  143. struct sys_timer ep93xx_timer = {
  144. .init = ep93xx_timer_init,
  145. .offset = ep93xx_gettimeoffset,
  146. };
  147. /*************************************************************************
  148. * EP93xx IRQ handling
  149. *************************************************************************/
  150. extern void ep93xx_gpio_init_irq(void);
  151. void __init ep93xx_init_irq(void)
  152. {
  153. vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
  154. vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
  155. ep93xx_gpio_init_irq();
  156. }
  157. /*************************************************************************
  158. * EP93xx System Controller Software Locked register handling
  159. *************************************************************************/
  160. /*
  161. * syscon_swlock prevents anything else from writing to the syscon
  162. * block while a software locked register is being written.
  163. */
  164. static DEFINE_SPINLOCK(syscon_swlock);
  165. void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
  166. {
  167. unsigned long flags;
  168. spin_lock_irqsave(&syscon_swlock, flags);
  169. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  170. __raw_writel(val, reg);
  171. spin_unlock_irqrestore(&syscon_swlock, flags);
  172. }
  173. EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
  174. void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
  175. {
  176. unsigned long flags;
  177. unsigned int val;
  178. spin_lock_irqsave(&syscon_swlock, flags);
  179. val = __raw_readl(EP93XX_SYSCON_DEVCFG);
  180. val &= ~clear_bits;
  181. val |= set_bits;
  182. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  183. __raw_writel(val, EP93XX_SYSCON_DEVCFG);
  184. spin_unlock_irqrestore(&syscon_swlock, flags);
  185. }
  186. EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
  187. /**
  188. * ep93xx_chip_revision() - returns the EP93xx chip revision
  189. *
  190. * See <mach/platform.h> for more information.
  191. */
  192. unsigned int ep93xx_chip_revision(void)
  193. {
  194. unsigned int v;
  195. v = __raw_readl(EP93XX_SYSCON_SYSCFG);
  196. v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
  197. v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
  198. return v;
  199. }
  200. /*************************************************************************
  201. * EP93xx peripheral handling
  202. *************************************************************************/
  203. #define EP93XX_UART_MCR_OFFSET (0x0100)
  204. static void ep93xx_uart_set_mctrl(struct amba_device *dev,
  205. void __iomem *base, unsigned int mctrl)
  206. {
  207. unsigned int mcr;
  208. mcr = 0;
  209. if (mctrl & TIOCM_RTS)
  210. mcr |= 2;
  211. if (mctrl & TIOCM_DTR)
  212. mcr |= 1;
  213. __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
  214. }
  215. static struct amba_pl010_data ep93xx_uart_data = {
  216. .set_mctrl = ep93xx_uart_set_mctrl,
  217. };
  218. static struct amba_device uart1_device = {
  219. .dev = {
  220. .init_name = "apb:uart1",
  221. .platform_data = &ep93xx_uart_data,
  222. },
  223. .res = {
  224. .start = EP93XX_UART1_PHYS_BASE,
  225. .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
  226. .flags = IORESOURCE_MEM,
  227. },
  228. .irq = { IRQ_EP93XX_UART1, NO_IRQ },
  229. .periphid = 0x00041010,
  230. };
  231. static struct amba_device uart2_device = {
  232. .dev = {
  233. .init_name = "apb:uart2",
  234. .platform_data = &ep93xx_uart_data,
  235. },
  236. .res = {
  237. .start = EP93XX_UART2_PHYS_BASE,
  238. .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. .irq = { IRQ_EP93XX_UART2, NO_IRQ },
  242. .periphid = 0x00041010,
  243. };
  244. static struct amba_device uart3_device = {
  245. .dev = {
  246. .init_name = "apb:uart3",
  247. .platform_data = &ep93xx_uart_data,
  248. },
  249. .res = {
  250. .start = EP93XX_UART3_PHYS_BASE,
  251. .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. .irq = { IRQ_EP93XX_UART3, NO_IRQ },
  255. .periphid = 0x00041010,
  256. };
  257. static struct resource ep93xx_rtc_resource[] = {
  258. {
  259. .start = EP93XX_RTC_PHYS_BASE,
  260. .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
  261. .flags = IORESOURCE_MEM,
  262. },
  263. };
  264. static struct platform_device ep93xx_rtc_device = {
  265. .name = "ep93xx-rtc",
  266. .id = -1,
  267. .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
  268. .resource = ep93xx_rtc_resource,
  269. };
  270. static struct resource ep93xx_ohci_resources[] = {
  271. [0] = {
  272. .start = EP93XX_USB_PHYS_BASE,
  273. .end = EP93XX_USB_PHYS_BASE + 0x0fff,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. [1] = {
  277. .start = IRQ_EP93XX_USB,
  278. .end = IRQ_EP93XX_USB,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. };
  282. static struct platform_device ep93xx_ohci_device = {
  283. .name = "ep93xx-ohci",
  284. .id = -1,
  285. .dev = {
  286. .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
  287. .coherent_dma_mask = DMA_BIT_MASK(32),
  288. },
  289. .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
  290. .resource = ep93xx_ohci_resources,
  291. };
  292. /*************************************************************************
  293. * EP93xx physmap'ed flash
  294. *************************************************************************/
  295. static struct physmap_flash_data ep93xx_flash_data;
  296. static struct resource ep93xx_flash_resource = {
  297. .flags = IORESOURCE_MEM,
  298. };
  299. static struct platform_device ep93xx_flash = {
  300. .name = "physmap-flash",
  301. .id = 0,
  302. .dev = {
  303. .platform_data = &ep93xx_flash_data,
  304. },
  305. .num_resources = 1,
  306. .resource = &ep93xx_flash_resource,
  307. };
  308. /**
  309. * ep93xx_register_flash() - Register the external flash device.
  310. * @width: bank width in octets
  311. * @start: resource start address
  312. * @size: resource size
  313. */
  314. void __init ep93xx_register_flash(unsigned int width,
  315. resource_size_t start, resource_size_t size)
  316. {
  317. ep93xx_flash_data.width = width;
  318. ep93xx_flash_resource.start = start;
  319. ep93xx_flash_resource.end = start + size - 1;
  320. platform_device_register(&ep93xx_flash);
  321. }
  322. /*************************************************************************
  323. * EP93xx ethernet peripheral handling
  324. *************************************************************************/
  325. static struct ep93xx_eth_data ep93xx_eth_data;
  326. static struct resource ep93xx_eth_resource[] = {
  327. {
  328. .start = EP93XX_ETHERNET_PHYS_BASE,
  329. .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
  330. .flags = IORESOURCE_MEM,
  331. }, {
  332. .start = IRQ_EP93XX_ETHERNET,
  333. .end = IRQ_EP93XX_ETHERNET,
  334. .flags = IORESOURCE_IRQ,
  335. }
  336. };
  337. static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
  338. static struct platform_device ep93xx_eth_device = {
  339. .name = "ep93xx-eth",
  340. .id = -1,
  341. .dev = {
  342. .platform_data = &ep93xx_eth_data,
  343. .coherent_dma_mask = DMA_BIT_MASK(32),
  344. .dma_mask = &ep93xx_eth_dma_mask,
  345. },
  346. .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
  347. .resource = ep93xx_eth_resource,
  348. };
  349. /**
  350. * ep93xx_register_eth - Register the built-in ethernet platform device.
  351. * @data: platform specific ethernet configuration (__initdata)
  352. * @copy_addr: flag indicating that the MAC address should be copied
  353. * from the IndAd registers (as programmed by the bootloader)
  354. */
  355. void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
  356. {
  357. if (copy_addr)
  358. memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
  359. ep93xx_eth_data = *data;
  360. platform_device_register(&ep93xx_eth_device);
  361. }
  362. /*************************************************************************
  363. * EP93xx i2c peripheral handling
  364. *************************************************************************/
  365. static struct i2c_gpio_platform_data ep93xx_i2c_data;
  366. static struct platform_device ep93xx_i2c_device = {
  367. .name = "i2c-gpio",
  368. .id = 0,
  369. .dev = {
  370. .platform_data = &ep93xx_i2c_data,
  371. },
  372. };
  373. /**
  374. * ep93xx_register_i2c - Register the i2c platform device.
  375. * @data: platform specific i2c-gpio configuration (__initdata)
  376. * @devices: platform specific i2c bus device information (__initdata)
  377. * @num: the number of devices on the i2c bus
  378. */
  379. void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
  380. struct i2c_board_info *devices, int num)
  381. {
  382. /*
  383. * Set the EEPROM interface pin drive type control.
  384. * Defines the driver type for the EECLK and EEDAT pins as either
  385. * open drain, which will require an external pull-up, or a normal
  386. * CMOS driver.
  387. */
  388. if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
  389. pr_warning("sda != EEDAT, open drain has no effect\n");
  390. if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
  391. pr_warning("scl != EECLK, open drain has no effect\n");
  392. __raw_writel((data->sda_is_open_drain << 1) |
  393. (data->scl_is_open_drain << 0),
  394. EP93XX_GPIO_EEDRIVE);
  395. ep93xx_i2c_data = *data;
  396. i2c_register_board_info(0, devices, num);
  397. platform_device_register(&ep93xx_i2c_device);
  398. }
  399. /*************************************************************************
  400. * EP93xx SPI peripheral handling
  401. *************************************************************************/
  402. static struct ep93xx_spi_info ep93xx_spi_master_data;
  403. static struct resource ep93xx_spi_resources[] = {
  404. {
  405. .start = EP93XX_SPI_PHYS_BASE,
  406. .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
  407. .flags = IORESOURCE_MEM,
  408. },
  409. {
  410. .start = IRQ_EP93XX_SSP,
  411. .end = IRQ_EP93XX_SSP,
  412. .flags = IORESOURCE_IRQ,
  413. },
  414. };
  415. static struct platform_device ep93xx_spi_device = {
  416. .name = "ep93xx-spi",
  417. .id = 0,
  418. .dev = {
  419. .platform_data = &ep93xx_spi_master_data,
  420. },
  421. .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
  422. .resource = ep93xx_spi_resources,
  423. };
  424. /**
  425. * ep93xx_register_spi() - registers spi platform device
  426. * @info: ep93xx board specific spi master info (__initdata)
  427. * @devices: SPI devices to register (__initdata)
  428. * @num: number of SPI devices to register
  429. *
  430. * This function registers platform device for the EP93xx SPI controller and
  431. * also makes sure that SPI pins are muxed so that I2S is not using those pins.
  432. */
  433. void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
  434. struct spi_board_info *devices, int num)
  435. {
  436. /*
  437. * When SPI is used, we need to make sure that I2S is muxed off from
  438. * SPI pins.
  439. */
  440. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
  441. ep93xx_spi_master_data = *info;
  442. spi_register_board_info(devices, num);
  443. platform_device_register(&ep93xx_spi_device);
  444. }
  445. /*************************************************************************
  446. * EP93xx LEDs
  447. *************************************************************************/
  448. static struct gpio_led ep93xx_led_pins[] = {
  449. {
  450. .name = "platform:grled",
  451. .gpio = EP93XX_GPIO_LINE_GRLED,
  452. }, {
  453. .name = "platform:rdled",
  454. .gpio = EP93XX_GPIO_LINE_RDLED,
  455. },
  456. };
  457. static struct gpio_led_platform_data ep93xx_led_data = {
  458. .num_leds = ARRAY_SIZE(ep93xx_led_pins),
  459. .leds = ep93xx_led_pins,
  460. };
  461. static struct platform_device ep93xx_leds = {
  462. .name = "leds-gpio",
  463. .id = -1,
  464. .dev = {
  465. .platform_data = &ep93xx_led_data,
  466. },
  467. };
  468. /*************************************************************************
  469. * EP93xx pwm peripheral handling
  470. *************************************************************************/
  471. static struct resource ep93xx_pwm0_resource[] = {
  472. {
  473. .start = EP93XX_PWM_PHYS_BASE,
  474. .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
  475. .flags = IORESOURCE_MEM,
  476. },
  477. };
  478. static struct platform_device ep93xx_pwm0_device = {
  479. .name = "ep93xx-pwm",
  480. .id = 0,
  481. .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
  482. .resource = ep93xx_pwm0_resource,
  483. };
  484. static struct resource ep93xx_pwm1_resource[] = {
  485. {
  486. .start = EP93XX_PWM_PHYS_BASE + 0x20,
  487. .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
  488. .flags = IORESOURCE_MEM,
  489. },
  490. };
  491. static struct platform_device ep93xx_pwm1_device = {
  492. .name = "ep93xx-pwm",
  493. .id = 1,
  494. .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
  495. .resource = ep93xx_pwm1_resource,
  496. };
  497. void __init ep93xx_register_pwm(int pwm0, int pwm1)
  498. {
  499. if (pwm0)
  500. platform_device_register(&ep93xx_pwm0_device);
  501. /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
  502. if (pwm1)
  503. platform_device_register(&ep93xx_pwm1_device);
  504. }
  505. int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
  506. {
  507. int err;
  508. if (pdev->id == 0) {
  509. err = 0;
  510. } else if (pdev->id == 1) {
  511. err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
  512. dev_name(&pdev->dev));
  513. if (err)
  514. return err;
  515. err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
  516. if (err)
  517. goto fail;
  518. /* PWM 1 output on EGPIO[14] */
  519. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
  520. } else {
  521. err = -ENODEV;
  522. }
  523. return err;
  524. fail:
  525. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  526. return err;
  527. }
  528. EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
  529. void ep93xx_pwm_release_gpio(struct platform_device *pdev)
  530. {
  531. if (pdev->id == 1) {
  532. gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
  533. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  534. /* EGPIO[14] used for GPIO */
  535. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
  536. }
  537. }
  538. EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
  539. /*************************************************************************
  540. * EP93xx video peripheral handling
  541. *************************************************************************/
  542. static struct ep93xxfb_mach_info ep93xxfb_data;
  543. static struct resource ep93xx_fb_resource[] = {
  544. {
  545. .start = EP93XX_RASTER_PHYS_BASE,
  546. .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
  547. .flags = IORESOURCE_MEM,
  548. },
  549. };
  550. static struct platform_device ep93xx_fb_device = {
  551. .name = "ep93xx-fb",
  552. .id = -1,
  553. .dev = {
  554. .platform_data = &ep93xxfb_data,
  555. .coherent_dma_mask = DMA_BIT_MASK(32),
  556. .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
  557. },
  558. .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
  559. .resource = ep93xx_fb_resource,
  560. };
  561. static struct platform_device ep93xx_bl_device = {
  562. .name = "ep93xx-bl",
  563. .id = -1,
  564. };
  565. /**
  566. * ep93xx_register_fb - Register the framebuffer platform device.
  567. * @data: platform specific framebuffer configuration (__initdata)
  568. */
  569. void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
  570. {
  571. ep93xxfb_data = *data;
  572. platform_device_register(&ep93xx_fb_device);
  573. platform_device_register(&ep93xx_bl_device);
  574. }
  575. /*************************************************************************
  576. * EP93xx matrix keypad peripheral handling
  577. *************************************************************************/
  578. static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
  579. static struct resource ep93xx_keypad_resource[] = {
  580. {
  581. .start = EP93XX_KEY_MATRIX_PHYS_BASE,
  582. .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
  583. .flags = IORESOURCE_MEM,
  584. }, {
  585. .start = IRQ_EP93XX_KEY,
  586. .end = IRQ_EP93XX_KEY,
  587. .flags = IORESOURCE_IRQ,
  588. },
  589. };
  590. static struct platform_device ep93xx_keypad_device = {
  591. .name = "ep93xx-keypad",
  592. .id = -1,
  593. .dev = {
  594. .platform_data = &ep93xx_keypad_data,
  595. },
  596. .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
  597. .resource = ep93xx_keypad_resource,
  598. };
  599. /**
  600. * ep93xx_register_keypad - Register the keypad platform device.
  601. * @data: platform specific keypad configuration (__initdata)
  602. */
  603. void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
  604. {
  605. ep93xx_keypad_data = *data;
  606. platform_device_register(&ep93xx_keypad_device);
  607. }
  608. int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
  609. {
  610. int err;
  611. int i;
  612. for (i = 0; i < 8; i++) {
  613. err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
  614. if (err)
  615. goto fail_gpio_c;
  616. err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
  617. if (err)
  618. goto fail_gpio_d;
  619. }
  620. /* Enable the keypad controller; GPIO ports C and D used for keypad */
  621. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  622. EP93XX_SYSCON_DEVCFG_GONK);
  623. return 0;
  624. fail_gpio_d:
  625. gpio_free(EP93XX_GPIO_LINE_C(i));
  626. fail_gpio_c:
  627. for ( ; i >= 0; --i) {
  628. gpio_free(EP93XX_GPIO_LINE_C(i));
  629. gpio_free(EP93XX_GPIO_LINE_D(i));
  630. }
  631. return err;
  632. }
  633. EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
  634. void ep93xx_keypad_release_gpio(struct platform_device *pdev)
  635. {
  636. int i;
  637. for (i = 0; i < 8; i++) {
  638. gpio_free(EP93XX_GPIO_LINE_C(i));
  639. gpio_free(EP93XX_GPIO_LINE_D(i));
  640. }
  641. /* Disable the keypad controller; GPIO ports C and D used for GPIO */
  642. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  643. EP93XX_SYSCON_DEVCFG_GONK);
  644. }
  645. EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
  646. /*************************************************************************
  647. * EP93xx I2S audio peripheral handling
  648. *************************************************************************/
  649. static struct resource ep93xx_i2s_resource[] = {
  650. {
  651. .start = EP93XX_I2S_PHYS_BASE,
  652. .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
  653. .flags = IORESOURCE_MEM,
  654. },
  655. };
  656. static struct platform_device ep93xx_i2s_device = {
  657. .name = "ep93xx-i2s",
  658. .id = -1,
  659. .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
  660. .resource = ep93xx_i2s_resource,
  661. };
  662. static struct platform_device ep93xx_pcm_device = {
  663. .name = "ep93xx-pcm-audio",
  664. .id = -1,
  665. };
  666. void __init ep93xx_register_i2s(void)
  667. {
  668. platform_device_register(&ep93xx_i2s_device);
  669. platform_device_register(&ep93xx_pcm_device);
  670. }
  671. #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
  672. EP93XX_SYSCON_DEVCFG_I2SONAC97)
  673. #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
  674. EP93XX_SYSCON_I2SCLKDIV_SPOL)
  675. int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
  676. {
  677. unsigned val;
  678. /* Sanity check */
  679. if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
  680. return -EINVAL;
  681. if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
  682. return -EINVAL;
  683. /* Must have only one of I2SONSSP/I2SONAC97 set */
  684. if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
  685. (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
  686. return -EINVAL;
  687. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
  688. ep93xx_devcfg_set_bits(i2s_pins);
  689. /*
  690. * This is potentially racy with the clock api for i2s_mclk, sclk and
  691. * lrclk. Since the i2s driver is the only user of those clocks we
  692. * rely on it to prevent parallel use of this function and the
  693. * clock api for the i2s clocks.
  694. */
  695. val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
  696. val &= ~EP93XX_I2SCLKDIV_MASK;
  697. val |= i2s_config;
  698. ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
  699. return 0;
  700. }
  701. EXPORT_SYMBOL(ep93xx_i2s_acquire);
  702. void ep93xx_i2s_release(void)
  703. {
  704. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
  705. }
  706. EXPORT_SYMBOL(ep93xx_i2s_release);
  707. /*************************************************************************
  708. * EP93xx AC97 audio peripheral handling
  709. *************************************************************************/
  710. static struct resource ep93xx_ac97_resources[] = {
  711. {
  712. .start = EP93XX_AAC_PHYS_BASE,
  713. .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
  714. .flags = IORESOURCE_MEM,
  715. },
  716. {
  717. .start = IRQ_EP93XX_AACINTR,
  718. .end = IRQ_EP93XX_AACINTR,
  719. .flags = IORESOURCE_IRQ,
  720. },
  721. };
  722. static struct platform_device ep93xx_ac97_device = {
  723. .name = "ep93xx-ac97",
  724. .id = -1,
  725. .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
  726. .resource = ep93xx_ac97_resources,
  727. };
  728. void __init ep93xx_register_ac97(void)
  729. {
  730. /*
  731. * Make sure that the AC97 pins are not used by I2S.
  732. */
  733. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
  734. platform_device_register(&ep93xx_ac97_device);
  735. platform_device_register(&ep93xx_pcm_device);
  736. }
  737. extern void ep93xx_gpio_init(void);
  738. void __init ep93xx_init_devices(void)
  739. {
  740. /* Disallow access to MaverickCrunch initially */
  741. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
  742. ep93xx_gpio_init();
  743. amba_device_register(&uart1_device, &iomem_resource);
  744. amba_device_register(&uart2_device, &iomem_resource);
  745. amba_device_register(&uart3_device, &iomem_resource);
  746. platform_device_register(&ep93xx_rtc_device);
  747. platform_device_register(&ep93xx_ohci_device);
  748. platform_device_register(&ep93xx_leds);
  749. }