cxgb2.c 37 KB

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  1. /*****************************************************************************
  2. * *
  3. * File: cxgb2.c *
  4. * $Revision: 1.25 $ *
  5. * $Date: 2005/06/22 00:43:25 $ *
  6. * Description: *
  7. * Chelsio 10Gb Ethernet Driver. *
  8. * *
  9. * This program is free software; you can redistribute it and/or modify *
  10. * it under the terms of the GNU General Public License, version 2, as *
  11. * published by the Free Software Foundation. *
  12. * *
  13. * You should have received a copy of the GNU General Public License along *
  14. * with this program; if not, write to the Free Software Foundation, Inc., *
  15. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  16. * *
  17. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED *
  18. * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF *
  19. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
  20. * *
  21. * http://www.chelsio.com *
  22. * *
  23. * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
  24. * All rights reserved. *
  25. * *
  26. * Maintainers: maintainers@chelsio.com *
  27. * *
  28. * Authors: Dimitrios Michailidis <dm@chelsio.com> *
  29. * Tina Yang <tainay@chelsio.com> *
  30. * Felix Marti <felix@chelsio.com> *
  31. * Scott Bardone <sbardone@chelsio.com> *
  32. * Kurt Ottaway <kottaway@chelsio.com> *
  33. * Frank DiMambro <frank@chelsio.com> *
  34. * *
  35. * History: *
  36. * *
  37. ****************************************************************************/
  38. #include "common.h"
  39. #include <linux/module.h>
  40. #include <linux/init.h>
  41. #include <linux/pci.h>
  42. #include <linux/netdevice.h>
  43. #include <linux/etherdevice.h>
  44. #include <linux/if_vlan.h>
  45. #include <linux/mii.h>
  46. #include <linux/sockios.h>
  47. #include <linux/dma-mapping.h>
  48. #include <asm/uaccess.h>
  49. #include "cpl5_cmd.h"
  50. #include "regs.h"
  51. #include "gmac.h"
  52. #include "cphy.h"
  53. #include "sge.h"
  54. #include "tp.h"
  55. #include "espi.h"
  56. #include "elmer0.h"
  57. #include <linux/workqueue.h>
  58. static inline void schedule_mac_stats_update(struct adapter *ap, int secs)
  59. {
  60. schedule_delayed_work(&ap->stats_update_task, secs * HZ);
  61. }
  62. static inline void cancel_mac_stats_update(struct adapter *ap)
  63. {
  64. cancel_delayed_work(&ap->stats_update_task);
  65. }
  66. #define MAX_CMDQ_ENTRIES 16384
  67. #define MAX_CMDQ1_ENTRIES 1024
  68. #define MAX_RX_BUFFERS 16384
  69. #define MAX_RX_JUMBO_BUFFERS 16384
  70. #define MAX_TX_BUFFERS_HIGH 16384U
  71. #define MAX_TX_BUFFERS_LOW 1536U
  72. #define MAX_TX_BUFFERS 1460U
  73. #define MIN_FL_ENTRIES 32
  74. #define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  75. NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\
  76. NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
  77. /*
  78. * The EEPROM is actually bigger but only the first few bytes are used so we
  79. * only report those.
  80. */
  81. #define EEPROM_SIZE 32
  82. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  83. MODULE_AUTHOR("Chelsio Communications");
  84. MODULE_LICENSE("GPL");
  85. static int dflt_msg_enable = DFLT_MSG_ENABLE;
  86. module_param(dflt_msg_enable, int, 0);
  87. MODULE_PARM_DESC(dflt_msg_enable, "Chelsio T1 default message enable bitmap");
  88. #define HCLOCK 0x0
  89. #define LCLOCK 0x1
  90. /* T1 cards powersave mode */
  91. static int t1_clock(struct adapter *adapter, int mode);
  92. static int t1powersave = 1; /* HW default is powersave mode. */
  93. module_param(t1powersave, int, 0);
  94. MODULE_PARM_DESC(t1powersave, "Enable/Disable T1 powersaving mode");
  95. static int disable_msi = 0;
  96. module_param(disable_msi, int, 0);
  97. MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
  98. static const char pci_speed[][4] = {
  99. "33", "66", "100", "133"
  100. };
  101. /*
  102. * Setup MAC to receive the types of packets we want.
  103. */
  104. static void t1_set_rxmode(struct net_device *dev)
  105. {
  106. struct adapter *adapter = dev->priv;
  107. struct cmac *mac = adapter->port[dev->if_port].mac;
  108. struct t1_rx_mode rm;
  109. rm.dev = dev;
  110. rm.idx = 0;
  111. rm.list = dev->mc_list;
  112. mac->ops->set_rx_mode(mac, &rm);
  113. }
  114. static void link_report(struct port_info *p)
  115. {
  116. if (!netif_carrier_ok(p->dev))
  117. printk(KERN_INFO "%s: link down\n", p->dev->name);
  118. else {
  119. const char *s = "10Mbps";
  120. switch (p->link_config.speed) {
  121. case SPEED_10000: s = "10Gbps"; break;
  122. case SPEED_1000: s = "1000Mbps"; break;
  123. case SPEED_100: s = "100Mbps"; break;
  124. }
  125. printk(KERN_INFO "%s: link up, %s, %s-duplex\n",
  126. p->dev->name, s,
  127. p->link_config.duplex == DUPLEX_FULL ? "full" : "half");
  128. }
  129. }
  130. void t1_link_negotiated(struct adapter *adapter, int port_id, int link_stat,
  131. int speed, int duplex, int pause)
  132. {
  133. struct port_info *p = &adapter->port[port_id];
  134. if (link_stat != netif_carrier_ok(p->dev)) {
  135. if (link_stat)
  136. netif_carrier_on(p->dev);
  137. else
  138. netif_carrier_off(p->dev);
  139. link_report(p);
  140. /* multi-ports: inform toe */
  141. if ((speed > 0) && (adapter->params.nports > 1)) {
  142. unsigned int sched_speed = 10;
  143. switch (speed) {
  144. case SPEED_1000:
  145. sched_speed = 1000;
  146. break;
  147. case SPEED_100:
  148. sched_speed = 100;
  149. break;
  150. case SPEED_10:
  151. sched_speed = 10;
  152. break;
  153. }
  154. t1_sched_update_parms(adapter->sge, port_id, 0, sched_speed);
  155. }
  156. }
  157. }
  158. static void link_start(struct port_info *p)
  159. {
  160. struct cmac *mac = p->mac;
  161. mac->ops->reset(mac);
  162. if (mac->ops->macaddress_set)
  163. mac->ops->macaddress_set(mac, p->dev->dev_addr);
  164. t1_set_rxmode(p->dev);
  165. t1_link_start(p->phy, mac, &p->link_config);
  166. mac->ops->enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
  167. }
  168. static void enable_hw_csum(struct adapter *adapter)
  169. {
  170. if (adapter->flags & TSO_CAPABLE)
  171. t1_tp_set_ip_checksum_offload(adapter->tp, 1); /* for TSO only */
  172. if (adapter->flags & UDP_CSUM_CAPABLE)
  173. t1_tp_set_udp_checksum_offload(adapter->tp, 1);
  174. t1_tp_set_tcp_checksum_offload(adapter->tp, 1);
  175. }
  176. /*
  177. * Things to do upon first use of a card.
  178. * This must run with the rtnl lock held.
  179. */
  180. static int cxgb_up(struct adapter *adapter)
  181. {
  182. int err = 0;
  183. if (!(adapter->flags & FULL_INIT_DONE)) {
  184. err = t1_init_hw_modules(adapter);
  185. if (err)
  186. goto out_err;
  187. enable_hw_csum(adapter);
  188. adapter->flags |= FULL_INIT_DONE;
  189. }
  190. t1_interrupts_clear(adapter);
  191. adapter->params.has_msi = !disable_msi && !pci_enable_msi(adapter->pdev);
  192. err = request_irq(adapter->pdev->irq, t1_interrupt,
  193. adapter->params.has_msi ? 0 : IRQF_SHARED,
  194. adapter->name, adapter);
  195. if (err) {
  196. if (adapter->params.has_msi)
  197. pci_disable_msi(adapter->pdev);
  198. goto out_err;
  199. }
  200. t1_sge_start(adapter->sge);
  201. t1_interrupts_enable(adapter);
  202. out_err:
  203. return err;
  204. }
  205. /*
  206. * Release resources when all the ports have been stopped.
  207. */
  208. static void cxgb_down(struct adapter *adapter)
  209. {
  210. t1_sge_stop(adapter->sge);
  211. t1_interrupts_disable(adapter);
  212. free_irq(adapter->pdev->irq, adapter);
  213. if (adapter->params.has_msi)
  214. pci_disable_msi(adapter->pdev);
  215. }
  216. static int cxgb_open(struct net_device *dev)
  217. {
  218. int err;
  219. struct adapter *adapter = dev->priv;
  220. int other_ports = adapter->open_device_map & PORT_MASK;
  221. if (!adapter->open_device_map && (err = cxgb_up(adapter)) < 0)
  222. return err;
  223. __set_bit(dev->if_port, &adapter->open_device_map);
  224. link_start(&adapter->port[dev->if_port]);
  225. netif_start_queue(dev);
  226. if (!other_ports && adapter->params.stats_update_period)
  227. schedule_mac_stats_update(adapter,
  228. adapter->params.stats_update_period);
  229. return 0;
  230. }
  231. static int cxgb_close(struct net_device *dev)
  232. {
  233. struct adapter *adapter = dev->priv;
  234. struct port_info *p = &adapter->port[dev->if_port];
  235. struct cmac *mac = p->mac;
  236. netif_stop_queue(dev);
  237. mac->ops->disable(mac, MAC_DIRECTION_TX | MAC_DIRECTION_RX);
  238. netif_carrier_off(dev);
  239. clear_bit(dev->if_port, &adapter->open_device_map);
  240. if (adapter->params.stats_update_period &&
  241. !(adapter->open_device_map & PORT_MASK)) {
  242. /* Stop statistics accumulation. */
  243. smp_mb__after_clear_bit();
  244. spin_lock(&adapter->work_lock); /* sync with update task */
  245. spin_unlock(&adapter->work_lock);
  246. cancel_mac_stats_update(adapter);
  247. }
  248. if (!adapter->open_device_map)
  249. cxgb_down(adapter);
  250. return 0;
  251. }
  252. static struct net_device_stats *t1_get_stats(struct net_device *dev)
  253. {
  254. struct adapter *adapter = dev->priv;
  255. struct port_info *p = &adapter->port[dev->if_port];
  256. struct net_device_stats *ns = &p->netstats;
  257. const struct cmac_statistics *pstats;
  258. /* Do a full update of the MAC stats */
  259. pstats = p->mac->ops->statistics_update(p->mac,
  260. MAC_STATS_UPDATE_FULL);
  261. ns->tx_packets = pstats->TxUnicastFramesOK +
  262. pstats->TxMulticastFramesOK + pstats->TxBroadcastFramesOK;
  263. ns->rx_packets = pstats->RxUnicastFramesOK +
  264. pstats->RxMulticastFramesOK + pstats->RxBroadcastFramesOK;
  265. ns->tx_bytes = pstats->TxOctetsOK;
  266. ns->rx_bytes = pstats->RxOctetsOK;
  267. ns->tx_errors = pstats->TxLateCollisions + pstats->TxLengthErrors +
  268. pstats->TxUnderrun + pstats->TxFramesAbortedDueToXSCollisions;
  269. ns->rx_errors = pstats->RxDataErrors + pstats->RxJabberErrors +
  270. pstats->RxFCSErrors + pstats->RxAlignErrors +
  271. pstats->RxSequenceErrors + pstats->RxFrameTooLongErrors +
  272. pstats->RxSymbolErrors + pstats->RxRuntErrors;
  273. ns->multicast = pstats->RxMulticastFramesOK;
  274. ns->collisions = pstats->TxTotalCollisions;
  275. /* detailed rx_errors */
  276. ns->rx_length_errors = pstats->RxFrameTooLongErrors +
  277. pstats->RxJabberErrors;
  278. ns->rx_over_errors = 0;
  279. ns->rx_crc_errors = pstats->RxFCSErrors;
  280. ns->rx_frame_errors = pstats->RxAlignErrors;
  281. ns->rx_fifo_errors = 0;
  282. ns->rx_missed_errors = 0;
  283. /* detailed tx_errors */
  284. ns->tx_aborted_errors = pstats->TxFramesAbortedDueToXSCollisions;
  285. ns->tx_carrier_errors = 0;
  286. ns->tx_fifo_errors = pstats->TxUnderrun;
  287. ns->tx_heartbeat_errors = 0;
  288. ns->tx_window_errors = pstats->TxLateCollisions;
  289. return ns;
  290. }
  291. static u32 get_msglevel(struct net_device *dev)
  292. {
  293. struct adapter *adapter = dev->priv;
  294. return adapter->msg_enable;
  295. }
  296. static void set_msglevel(struct net_device *dev, u32 val)
  297. {
  298. struct adapter *adapter = dev->priv;
  299. adapter->msg_enable = val;
  300. }
  301. static char stats_strings[][ETH_GSTRING_LEN] = {
  302. "TxOctetsOK",
  303. "TxOctetsBad",
  304. "TxUnicastFramesOK",
  305. "TxMulticastFramesOK",
  306. "TxBroadcastFramesOK",
  307. "TxPauseFrames",
  308. "TxFramesWithDeferredXmissions",
  309. "TxLateCollisions",
  310. "TxTotalCollisions",
  311. "TxFramesAbortedDueToXSCollisions",
  312. "TxUnderrun",
  313. "TxLengthErrors",
  314. "TxInternalMACXmitError",
  315. "TxFramesWithExcessiveDeferral",
  316. "TxFCSErrors",
  317. "RxOctetsOK",
  318. "RxOctetsBad",
  319. "RxUnicastFramesOK",
  320. "RxMulticastFramesOK",
  321. "RxBroadcastFramesOK",
  322. "RxPauseFrames",
  323. "RxFCSErrors",
  324. "RxAlignErrors",
  325. "RxSymbolErrors",
  326. "RxDataErrors",
  327. "RxSequenceErrors",
  328. "RxRuntErrors",
  329. "RxJabberErrors",
  330. "RxInternalMACRcvError",
  331. "RxInRangeLengthErrors",
  332. "RxOutOfRangeLengthField",
  333. "RxFrameTooLongErrors",
  334. /* Port stats */
  335. "RxPackets",
  336. "RxCsumGood",
  337. "TxPackets",
  338. "TxCsumOffload",
  339. "TxTso",
  340. "RxVlan",
  341. "TxVlan",
  342. /* Interrupt stats */
  343. "rx drops",
  344. "pure_rsps",
  345. "unhandled irqs",
  346. "respQ_empty",
  347. "respQ_overflow",
  348. "freelistQ_empty",
  349. "pkt_too_big",
  350. "pkt_mismatch",
  351. "cmdQ_full0",
  352. "cmdQ_full1",
  353. "espi_DIP2ParityErr",
  354. "espi_DIP4Err",
  355. "espi_RxDrops",
  356. "espi_TxDrops",
  357. "espi_RxOvfl",
  358. "espi_ParityErr"
  359. };
  360. #define T2_REGMAP_SIZE (3 * 1024)
  361. static int get_regs_len(struct net_device *dev)
  362. {
  363. return T2_REGMAP_SIZE;
  364. }
  365. static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  366. {
  367. struct adapter *adapter = dev->priv;
  368. strcpy(info->driver, DRV_NAME);
  369. strcpy(info->version, DRV_VERSION);
  370. strcpy(info->fw_version, "N/A");
  371. strcpy(info->bus_info, pci_name(adapter->pdev));
  372. }
  373. static int get_stats_count(struct net_device *dev)
  374. {
  375. return ARRAY_SIZE(stats_strings);
  376. }
  377. static void get_strings(struct net_device *dev, u32 stringset, u8 *data)
  378. {
  379. if (stringset == ETH_SS_STATS)
  380. memcpy(data, stats_strings, sizeof(stats_strings));
  381. }
  382. static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
  383. u64 *data)
  384. {
  385. struct adapter *adapter = dev->priv;
  386. struct cmac *mac = adapter->port[dev->if_port].mac;
  387. const struct cmac_statistics *s;
  388. const struct sge_intr_counts *t;
  389. struct sge_port_stats ss;
  390. unsigned int len;
  391. s = mac->ops->statistics_update(mac, MAC_STATS_UPDATE_FULL);
  392. len = sizeof(u64)*(&s->TxFCSErrors + 1 - &s->TxOctetsOK);
  393. memcpy(data, &s->TxOctetsOK, len);
  394. data += len;
  395. len = sizeof(u64)*(&s->RxFrameTooLongErrors + 1 - &s->RxOctetsOK);
  396. memcpy(data, &s->RxOctetsOK, len);
  397. data += len;
  398. t1_sge_get_port_stats(adapter->sge, dev->if_port, &ss);
  399. memcpy(data, &ss, sizeof(ss));
  400. data += sizeof(ss);
  401. t = t1_sge_get_intr_counts(adapter->sge);
  402. *data++ = t->rx_drops;
  403. *data++ = t->pure_rsps;
  404. *data++ = t->unhandled_irqs;
  405. *data++ = t->respQ_empty;
  406. *data++ = t->respQ_overflow;
  407. *data++ = t->freelistQ_empty;
  408. *data++ = t->pkt_too_big;
  409. *data++ = t->pkt_mismatch;
  410. *data++ = t->cmdQ_full[0];
  411. *data++ = t->cmdQ_full[1];
  412. if (adapter->espi) {
  413. const struct espi_intr_counts *e;
  414. e = t1_espi_get_intr_counts(adapter->espi);
  415. *data++ = e->DIP2_parity_err;
  416. *data++ = e->DIP4_err;
  417. *data++ = e->rx_drops;
  418. *data++ = e->tx_drops;
  419. *data++ = e->rx_ovflw;
  420. *data++ = e->parity_err;
  421. }
  422. }
  423. static inline void reg_block_dump(struct adapter *ap, void *buf,
  424. unsigned int start, unsigned int end)
  425. {
  426. u32 *p = buf + start;
  427. for ( ; start <= end; start += sizeof(u32))
  428. *p++ = readl(ap->regs + start);
  429. }
  430. static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
  431. void *buf)
  432. {
  433. struct adapter *ap = dev->priv;
  434. /*
  435. * Version scheme: bits 0..9: chip version, bits 10..15: chip revision
  436. */
  437. regs->version = 2;
  438. memset(buf, 0, T2_REGMAP_SIZE);
  439. reg_block_dump(ap, buf, 0, A_SG_RESPACCUTIMER);
  440. reg_block_dump(ap, buf, A_MC3_CFG, A_MC4_INT_CAUSE);
  441. reg_block_dump(ap, buf, A_TPI_ADDR, A_TPI_PAR);
  442. reg_block_dump(ap, buf, A_TP_IN_CONFIG, A_TP_TX_DROP_COUNT);
  443. reg_block_dump(ap, buf, A_RAT_ROUTE_CONTROL, A_RAT_INTR_CAUSE);
  444. reg_block_dump(ap, buf, A_CSPI_RX_AE_WM, A_CSPI_INTR_ENABLE);
  445. reg_block_dump(ap, buf, A_ESPI_SCH_TOKEN0, A_ESPI_GOSTAT);
  446. reg_block_dump(ap, buf, A_ULP_ULIMIT, A_ULP_PIO_CTRL);
  447. reg_block_dump(ap, buf, A_PL_ENABLE, A_PL_CAUSE);
  448. reg_block_dump(ap, buf, A_MC5_CONFIG, A_MC5_MASK_WRITE_CMD);
  449. }
  450. static int get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  451. {
  452. struct adapter *adapter = dev->priv;
  453. struct port_info *p = &adapter->port[dev->if_port];
  454. cmd->supported = p->link_config.supported;
  455. cmd->advertising = p->link_config.advertising;
  456. if (netif_carrier_ok(dev)) {
  457. cmd->speed = p->link_config.speed;
  458. cmd->duplex = p->link_config.duplex;
  459. } else {
  460. cmd->speed = -1;
  461. cmd->duplex = -1;
  462. }
  463. cmd->port = (cmd->supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE;
  464. cmd->phy_address = p->phy->addr;
  465. cmd->transceiver = XCVR_EXTERNAL;
  466. cmd->autoneg = p->link_config.autoneg;
  467. cmd->maxtxpkt = 0;
  468. cmd->maxrxpkt = 0;
  469. return 0;
  470. }
  471. static int speed_duplex_to_caps(int speed, int duplex)
  472. {
  473. int cap = 0;
  474. switch (speed) {
  475. case SPEED_10:
  476. if (duplex == DUPLEX_FULL)
  477. cap = SUPPORTED_10baseT_Full;
  478. else
  479. cap = SUPPORTED_10baseT_Half;
  480. break;
  481. case SPEED_100:
  482. if (duplex == DUPLEX_FULL)
  483. cap = SUPPORTED_100baseT_Full;
  484. else
  485. cap = SUPPORTED_100baseT_Half;
  486. break;
  487. case SPEED_1000:
  488. if (duplex == DUPLEX_FULL)
  489. cap = SUPPORTED_1000baseT_Full;
  490. else
  491. cap = SUPPORTED_1000baseT_Half;
  492. break;
  493. case SPEED_10000:
  494. if (duplex == DUPLEX_FULL)
  495. cap = SUPPORTED_10000baseT_Full;
  496. }
  497. return cap;
  498. }
  499. #define ADVERTISED_MASK (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | \
  500. ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | \
  501. ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full | \
  502. ADVERTISED_10000baseT_Full)
  503. static int set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  504. {
  505. struct adapter *adapter = dev->priv;
  506. struct port_info *p = &adapter->port[dev->if_port];
  507. struct link_config *lc = &p->link_config;
  508. if (!(lc->supported & SUPPORTED_Autoneg))
  509. return -EOPNOTSUPP; /* can't change speed/duplex */
  510. if (cmd->autoneg == AUTONEG_DISABLE) {
  511. int cap = speed_duplex_to_caps(cmd->speed, cmd->duplex);
  512. if (!(lc->supported & cap) || cmd->speed == SPEED_1000)
  513. return -EINVAL;
  514. lc->requested_speed = cmd->speed;
  515. lc->requested_duplex = cmd->duplex;
  516. lc->advertising = 0;
  517. } else {
  518. cmd->advertising &= ADVERTISED_MASK;
  519. if (cmd->advertising & (cmd->advertising - 1))
  520. cmd->advertising = lc->supported;
  521. cmd->advertising &= lc->supported;
  522. if (!cmd->advertising)
  523. return -EINVAL;
  524. lc->requested_speed = SPEED_INVALID;
  525. lc->requested_duplex = DUPLEX_INVALID;
  526. lc->advertising = cmd->advertising | ADVERTISED_Autoneg;
  527. }
  528. lc->autoneg = cmd->autoneg;
  529. if (netif_running(dev))
  530. t1_link_start(p->phy, p->mac, lc);
  531. return 0;
  532. }
  533. static void get_pauseparam(struct net_device *dev,
  534. struct ethtool_pauseparam *epause)
  535. {
  536. struct adapter *adapter = dev->priv;
  537. struct port_info *p = &adapter->port[dev->if_port];
  538. epause->autoneg = (p->link_config.requested_fc & PAUSE_AUTONEG) != 0;
  539. epause->rx_pause = (p->link_config.fc & PAUSE_RX) != 0;
  540. epause->tx_pause = (p->link_config.fc & PAUSE_TX) != 0;
  541. }
  542. static int set_pauseparam(struct net_device *dev,
  543. struct ethtool_pauseparam *epause)
  544. {
  545. struct adapter *adapter = dev->priv;
  546. struct port_info *p = &adapter->port[dev->if_port];
  547. struct link_config *lc = &p->link_config;
  548. if (epause->autoneg == AUTONEG_DISABLE)
  549. lc->requested_fc = 0;
  550. else if (lc->supported & SUPPORTED_Autoneg)
  551. lc->requested_fc = PAUSE_AUTONEG;
  552. else
  553. return -EINVAL;
  554. if (epause->rx_pause)
  555. lc->requested_fc |= PAUSE_RX;
  556. if (epause->tx_pause)
  557. lc->requested_fc |= PAUSE_TX;
  558. if (lc->autoneg == AUTONEG_ENABLE) {
  559. if (netif_running(dev))
  560. t1_link_start(p->phy, p->mac, lc);
  561. } else {
  562. lc->fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);
  563. if (netif_running(dev))
  564. p->mac->ops->set_speed_duplex_fc(p->mac, -1, -1,
  565. lc->fc);
  566. }
  567. return 0;
  568. }
  569. static u32 get_rx_csum(struct net_device *dev)
  570. {
  571. struct adapter *adapter = dev->priv;
  572. return (adapter->flags & RX_CSUM_ENABLED) != 0;
  573. }
  574. static int set_rx_csum(struct net_device *dev, u32 data)
  575. {
  576. struct adapter *adapter = dev->priv;
  577. if (data)
  578. adapter->flags |= RX_CSUM_ENABLED;
  579. else
  580. adapter->flags &= ~RX_CSUM_ENABLED;
  581. return 0;
  582. }
  583. static int set_tso(struct net_device *dev, u32 value)
  584. {
  585. struct adapter *adapter = dev->priv;
  586. if (!(adapter->flags & TSO_CAPABLE))
  587. return value ? -EOPNOTSUPP : 0;
  588. return ethtool_op_set_tso(dev, value);
  589. }
  590. static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
  591. {
  592. struct adapter *adapter = dev->priv;
  593. int jumbo_fl = t1_is_T1B(adapter) ? 1 : 0;
  594. e->rx_max_pending = MAX_RX_BUFFERS;
  595. e->rx_mini_max_pending = 0;
  596. e->rx_jumbo_max_pending = MAX_RX_JUMBO_BUFFERS;
  597. e->tx_max_pending = MAX_CMDQ_ENTRIES;
  598. e->rx_pending = adapter->params.sge.freelQ_size[!jumbo_fl];
  599. e->rx_mini_pending = 0;
  600. e->rx_jumbo_pending = adapter->params.sge.freelQ_size[jumbo_fl];
  601. e->tx_pending = adapter->params.sge.cmdQ_size[0];
  602. }
  603. static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
  604. {
  605. struct adapter *adapter = dev->priv;
  606. int jumbo_fl = t1_is_T1B(adapter) ? 1 : 0;
  607. if (e->rx_pending > MAX_RX_BUFFERS || e->rx_mini_pending ||
  608. e->rx_jumbo_pending > MAX_RX_JUMBO_BUFFERS ||
  609. e->tx_pending > MAX_CMDQ_ENTRIES ||
  610. e->rx_pending < MIN_FL_ENTRIES ||
  611. e->rx_jumbo_pending < MIN_FL_ENTRIES ||
  612. e->tx_pending < (adapter->params.nports + 1) * (MAX_SKB_FRAGS + 1))
  613. return -EINVAL;
  614. if (adapter->flags & FULL_INIT_DONE)
  615. return -EBUSY;
  616. adapter->params.sge.freelQ_size[!jumbo_fl] = e->rx_pending;
  617. adapter->params.sge.freelQ_size[jumbo_fl] = e->rx_jumbo_pending;
  618. adapter->params.sge.cmdQ_size[0] = e->tx_pending;
  619. adapter->params.sge.cmdQ_size[1] = e->tx_pending > MAX_CMDQ1_ENTRIES ?
  620. MAX_CMDQ1_ENTRIES : e->tx_pending;
  621. return 0;
  622. }
  623. static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
  624. {
  625. struct adapter *adapter = dev->priv;
  626. adapter->params.sge.rx_coalesce_usecs = c->rx_coalesce_usecs;
  627. adapter->params.sge.coalesce_enable = c->use_adaptive_rx_coalesce;
  628. adapter->params.sge.sample_interval_usecs = c->rate_sample_interval;
  629. t1_sge_set_coalesce_params(adapter->sge, &adapter->params.sge);
  630. return 0;
  631. }
  632. static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
  633. {
  634. struct adapter *adapter = dev->priv;
  635. c->rx_coalesce_usecs = adapter->params.sge.rx_coalesce_usecs;
  636. c->rate_sample_interval = adapter->params.sge.sample_interval_usecs;
  637. c->use_adaptive_rx_coalesce = adapter->params.sge.coalesce_enable;
  638. return 0;
  639. }
  640. static int get_eeprom_len(struct net_device *dev)
  641. {
  642. struct adapter *adapter = dev->priv;
  643. return t1_is_asic(adapter) ? EEPROM_SIZE : 0;
  644. }
  645. #define EEPROM_MAGIC(ap) \
  646. (PCI_VENDOR_ID_CHELSIO | ((ap)->params.chip_version << 16))
  647. static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e,
  648. u8 *data)
  649. {
  650. int i;
  651. u8 buf[EEPROM_SIZE] __attribute__((aligned(4)));
  652. struct adapter *adapter = dev->priv;
  653. e->magic = EEPROM_MAGIC(adapter);
  654. for (i = e->offset & ~3; i < e->offset + e->len; i += sizeof(u32))
  655. t1_seeprom_read(adapter, i, (u32 *)&buf[i]);
  656. memcpy(data, buf + e->offset, e->len);
  657. return 0;
  658. }
  659. static const struct ethtool_ops t1_ethtool_ops = {
  660. .get_settings = get_settings,
  661. .set_settings = set_settings,
  662. .get_drvinfo = get_drvinfo,
  663. .get_msglevel = get_msglevel,
  664. .set_msglevel = set_msglevel,
  665. .get_ringparam = get_sge_param,
  666. .set_ringparam = set_sge_param,
  667. .get_coalesce = get_coalesce,
  668. .set_coalesce = set_coalesce,
  669. .get_eeprom_len = get_eeprom_len,
  670. .get_eeprom = get_eeprom,
  671. .get_pauseparam = get_pauseparam,
  672. .set_pauseparam = set_pauseparam,
  673. .get_rx_csum = get_rx_csum,
  674. .set_rx_csum = set_rx_csum,
  675. .get_tx_csum = ethtool_op_get_tx_csum,
  676. .set_tx_csum = ethtool_op_set_tx_csum,
  677. .get_sg = ethtool_op_get_sg,
  678. .set_sg = ethtool_op_set_sg,
  679. .get_link = ethtool_op_get_link,
  680. .get_strings = get_strings,
  681. .get_stats_count = get_stats_count,
  682. .get_ethtool_stats = get_stats,
  683. .get_regs_len = get_regs_len,
  684. .get_regs = get_regs,
  685. .get_tso = ethtool_op_get_tso,
  686. .set_tso = set_tso,
  687. };
  688. static int t1_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
  689. {
  690. struct adapter *adapter = dev->priv;
  691. struct mii_ioctl_data *data = if_mii(req);
  692. switch (cmd) {
  693. case SIOCGMIIPHY:
  694. data->phy_id = adapter->port[dev->if_port].phy->addr;
  695. /* FALLTHRU */
  696. case SIOCGMIIREG: {
  697. struct cphy *phy = adapter->port[dev->if_port].phy;
  698. u32 val;
  699. if (!phy->mdio_read)
  700. return -EOPNOTSUPP;
  701. phy->mdio_read(adapter, data->phy_id, 0, data->reg_num & 0x1f,
  702. &val);
  703. data->val_out = val;
  704. break;
  705. }
  706. case SIOCSMIIREG: {
  707. struct cphy *phy = adapter->port[dev->if_port].phy;
  708. if (!capable(CAP_NET_ADMIN))
  709. return -EPERM;
  710. if (!phy->mdio_write)
  711. return -EOPNOTSUPP;
  712. phy->mdio_write(adapter, data->phy_id, 0, data->reg_num & 0x1f,
  713. data->val_in);
  714. break;
  715. }
  716. default:
  717. return -EOPNOTSUPP;
  718. }
  719. return 0;
  720. }
  721. static int t1_change_mtu(struct net_device *dev, int new_mtu)
  722. {
  723. int ret;
  724. struct adapter *adapter = dev->priv;
  725. struct cmac *mac = adapter->port[dev->if_port].mac;
  726. if (!mac->ops->set_mtu)
  727. return -EOPNOTSUPP;
  728. if (new_mtu < 68)
  729. return -EINVAL;
  730. if ((ret = mac->ops->set_mtu(mac, new_mtu)))
  731. return ret;
  732. dev->mtu = new_mtu;
  733. return 0;
  734. }
  735. static int t1_set_mac_addr(struct net_device *dev, void *p)
  736. {
  737. struct adapter *adapter = dev->priv;
  738. struct cmac *mac = adapter->port[dev->if_port].mac;
  739. struct sockaddr *addr = p;
  740. if (!mac->ops->macaddress_set)
  741. return -EOPNOTSUPP;
  742. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  743. mac->ops->macaddress_set(mac, dev->dev_addr);
  744. return 0;
  745. }
  746. #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  747. static void vlan_rx_register(struct net_device *dev,
  748. struct vlan_group *grp)
  749. {
  750. struct adapter *adapter = dev->priv;
  751. spin_lock_irq(&adapter->async_lock);
  752. adapter->vlan_grp = grp;
  753. t1_set_vlan_accel(adapter, grp != NULL);
  754. spin_unlock_irq(&adapter->async_lock);
  755. }
  756. static void vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
  757. {
  758. struct adapter *adapter = dev->priv;
  759. spin_lock_irq(&adapter->async_lock);
  760. if (adapter->vlan_grp)
  761. adapter->vlan_grp->vlan_devices[vid] = NULL;
  762. spin_unlock_irq(&adapter->async_lock);
  763. }
  764. #endif
  765. #ifdef CONFIG_NET_POLL_CONTROLLER
  766. static void t1_netpoll(struct net_device *dev)
  767. {
  768. unsigned long flags;
  769. struct adapter *adapter = dev->priv;
  770. local_irq_save(flags);
  771. t1_interrupt(adapter->pdev->irq, adapter);
  772. local_irq_restore(flags);
  773. }
  774. #endif
  775. /*
  776. * Periodic accumulation of MAC statistics. This is used only if the MAC
  777. * does not have any other way to prevent stats counter overflow.
  778. */
  779. static void mac_stats_task(struct work_struct *work)
  780. {
  781. int i;
  782. struct adapter *adapter =
  783. container_of(work, struct adapter, stats_update_task.work);
  784. for_each_port(adapter, i) {
  785. struct port_info *p = &adapter->port[i];
  786. if (netif_running(p->dev))
  787. p->mac->ops->statistics_update(p->mac,
  788. MAC_STATS_UPDATE_FAST);
  789. }
  790. /* Schedule the next statistics update if any port is active. */
  791. spin_lock(&adapter->work_lock);
  792. if (adapter->open_device_map & PORT_MASK)
  793. schedule_mac_stats_update(adapter,
  794. adapter->params.stats_update_period);
  795. spin_unlock(&adapter->work_lock);
  796. }
  797. /*
  798. * Processes elmer0 external interrupts in process context.
  799. */
  800. static void ext_intr_task(struct work_struct *work)
  801. {
  802. struct adapter *adapter =
  803. container_of(work, struct adapter, ext_intr_handler_task);
  804. t1_elmer0_ext_intr_handler(adapter);
  805. /* Now reenable external interrupts */
  806. spin_lock_irq(&adapter->async_lock);
  807. adapter->slow_intr_mask |= F_PL_INTR_EXT;
  808. writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE);
  809. writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
  810. adapter->regs + A_PL_ENABLE);
  811. spin_unlock_irq(&adapter->async_lock);
  812. }
  813. /*
  814. * Interrupt-context handler for elmer0 external interrupts.
  815. */
  816. void t1_elmer0_ext_intr(struct adapter *adapter)
  817. {
  818. /*
  819. * Schedule a task to handle external interrupts as we require
  820. * a process context. We disable EXT interrupts in the interim
  821. * and let the task reenable them when it's done.
  822. */
  823. adapter->slow_intr_mask &= ~F_PL_INTR_EXT;
  824. writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
  825. adapter->regs + A_PL_ENABLE);
  826. schedule_work(&adapter->ext_intr_handler_task);
  827. }
  828. void t1_fatal_err(struct adapter *adapter)
  829. {
  830. if (adapter->flags & FULL_INIT_DONE) {
  831. t1_sge_stop(adapter->sge);
  832. t1_interrupts_disable(adapter);
  833. }
  834. CH_ALERT("%s: encountered fatal error, operation suspended\n",
  835. adapter->name);
  836. }
  837. static int __devinit init_one(struct pci_dev *pdev,
  838. const struct pci_device_id *ent)
  839. {
  840. static int version_printed;
  841. int i, err, pci_using_dac = 0;
  842. unsigned long mmio_start, mmio_len;
  843. const struct board_info *bi;
  844. struct adapter *adapter = NULL;
  845. struct port_info *pi;
  846. if (!version_printed) {
  847. printk(KERN_INFO "%s - version %s\n", DRV_DESCRIPTION,
  848. DRV_VERSION);
  849. ++version_printed;
  850. }
  851. err = pci_enable_device(pdev);
  852. if (err)
  853. return err;
  854. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
  855. CH_ERR("%s: cannot find PCI device memory base address\n",
  856. pci_name(pdev));
  857. err = -ENODEV;
  858. goto out_disable_pdev;
  859. }
  860. if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
  861. pci_using_dac = 1;
  862. if (pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
  863. CH_ERR("%s: unable to obtain 64-bit DMA for"
  864. "consistent allocations\n", pci_name(pdev));
  865. err = -ENODEV;
  866. goto out_disable_pdev;
  867. }
  868. } else if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) != 0) {
  869. CH_ERR("%s: no usable DMA configuration\n", pci_name(pdev));
  870. goto out_disable_pdev;
  871. }
  872. err = pci_request_regions(pdev, DRV_NAME);
  873. if (err) {
  874. CH_ERR("%s: cannot obtain PCI resources\n", pci_name(pdev));
  875. goto out_disable_pdev;
  876. }
  877. pci_set_master(pdev);
  878. mmio_start = pci_resource_start(pdev, 0);
  879. mmio_len = pci_resource_len(pdev, 0);
  880. bi = t1_get_board_info(ent->driver_data);
  881. for (i = 0; i < bi->port_number; ++i) {
  882. struct net_device *netdev;
  883. netdev = alloc_etherdev(adapter ? 0 : sizeof(*adapter));
  884. if (!netdev) {
  885. err = -ENOMEM;
  886. goto out_free_dev;
  887. }
  888. SET_MODULE_OWNER(netdev);
  889. SET_NETDEV_DEV(netdev, &pdev->dev);
  890. if (!adapter) {
  891. adapter = netdev->priv;
  892. adapter->pdev = pdev;
  893. adapter->port[0].dev = netdev; /* so we don't leak it */
  894. adapter->regs = ioremap(mmio_start, mmio_len);
  895. if (!adapter->regs) {
  896. CH_ERR("%s: cannot map device registers\n",
  897. pci_name(pdev));
  898. err = -ENOMEM;
  899. goto out_free_dev;
  900. }
  901. if (t1_get_board_rev(adapter, bi, &adapter->params)) {
  902. err = -ENODEV; /* Can't handle this chip rev */
  903. goto out_free_dev;
  904. }
  905. adapter->name = pci_name(pdev);
  906. adapter->msg_enable = dflt_msg_enable;
  907. adapter->mmio_len = mmio_len;
  908. spin_lock_init(&adapter->tpi_lock);
  909. spin_lock_init(&adapter->work_lock);
  910. spin_lock_init(&adapter->async_lock);
  911. spin_lock_init(&adapter->mac_lock);
  912. INIT_WORK(&adapter->ext_intr_handler_task,
  913. ext_intr_task);
  914. INIT_DELAYED_WORK(&adapter->stats_update_task,
  915. mac_stats_task);
  916. pci_set_drvdata(pdev, netdev);
  917. }
  918. pi = &adapter->port[i];
  919. pi->dev = netdev;
  920. netif_carrier_off(netdev);
  921. netdev->irq = pdev->irq;
  922. netdev->if_port = i;
  923. netdev->mem_start = mmio_start;
  924. netdev->mem_end = mmio_start + mmio_len - 1;
  925. netdev->priv = adapter;
  926. netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
  927. netdev->features |= NETIF_F_LLTX;
  928. adapter->flags |= RX_CSUM_ENABLED | TCP_CSUM_CAPABLE;
  929. if (pci_using_dac)
  930. netdev->features |= NETIF_F_HIGHDMA;
  931. if (vlan_tso_capable(adapter)) {
  932. #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  933. adapter->flags |= VLAN_ACCEL_CAPABLE;
  934. netdev->features |=
  935. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
  936. netdev->vlan_rx_register = vlan_rx_register;
  937. netdev->vlan_rx_kill_vid = vlan_rx_kill_vid;
  938. #endif
  939. /* T204: disable TSO */
  940. if (!(is_T2(adapter)) || bi->port_number != 4) {
  941. adapter->flags |= TSO_CAPABLE;
  942. netdev->features |= NETIF_F_TSO;
  943. }
  944. }
  945. netdev->open = cxgb_open;
  946. netdev->stop = cxgb_close;
  947. netdev->hard_start_xmit = t1_start_xmit;
  948. netdev->hard_header_len += (adapter->flags & TSO_CAPABLE) ?
  949. sizeof(struct cpl_tx_pkt_lso) : sizeof(struct cpl_tx_pkt);
  950. netdev->get_stats = t1_get_stats;
  951. netdev->set_multicast_list = t1_set_rxmode;
  952. netdev->do_ioctl = t1_ioctl;
  953. netdev->change_mtu = t1_change_mtu;
  954. netdev->set_mac_address = t1_set_mac_addr;
  955. #ifdef CONFIG_NET_POLL_CONTROLLER
  956. netdev->poll_controller = t1_netpoll;
  957. #endif
  958. #ifdef CONFIG_CHELSIO_T1_NAPI
  959. netdev->weight = 64;
  960. netdev->poll = t1_poll;
  961. #endif
  962. SET_ETHTOOL_OPS(netdev, &t1_ethtool_ops);
  963. }
  964. if (t1_init_sw_modules(adapter, bi) < 0) {
  965. err = -ENODEV;
  966. goto out_free_dev;
  967. }
  968. /*
  969. * The card is now ready to go. If any errors occur during device
  970. * registration we do not fail the whole card but rather proceed only
  971. * with the ports we manage to register successfully. However we must
  972. * register at least one net device.
  973. */
  974. for (i = 0; i < bi->port_number; ++i) {
  975. err = register_netdev(adapter->port[i].dev);
  976. if (err)
  977. CH_WARN("%s: cannot register net device %s, skipping\n",
  978. pci_name(pdev), adapter->port[i].dev->name);
  979. else {
  980. /*
  981. * Change the name we use for messages to the name of
  982. * the first successfully registered interface.
  983. */
  984. if (!adapter->registered_device_map)
  985. adapter->name = adapter->port[i].dev->name;
  986. __set_bit(i, &adapter->registered_device_map);
  987. }
  988. }
  989. if (!adapter->registered_device_map) {
  990. CH_ERR("%s: could not register any net devices\n",
  991. pci_name(pdev));
  992. goto out_release_adapter_res;
  993. }
  994. printk(KERN_INFO "%s: %s (rev %d), %s %dMHz/%d-bit\n", adapter->name,
  995. bi->desc, adapter->params.chip_revision,
  996. adapter->params.pci.is_pcix ? "PCIX" : "PCI",
  997. adapter->params.pci.speed, adapter->params.pci.width);
  998. /*
  999. * Set the T1B ASIC and memory clocks.
  1000. */
  1001. if (t1powersave)
  1002. adapter->t1powersave = LCLOCK; /* HW default is powersave mode. */
  1003. else
  1004. adapter->t1powersave = HCLOCK;
  1005. if (t1_is_T1B(adapter))
  1006. t1_clock(adapter, t1powersave);
  1007. return 0;
  1008. out_release_adapter_res:
  1009. t1_free_sw_modules(adapter);
  1010. out_free_dev:
  1011. if (adapter) {
  1012. if (adapter->regs)
  1013. iounmap(adapter->regs);
  1014. for (i = bi->port_number - 1; i >= 0; --i)
  1015. if (adapter->port[i].dev)
  1016. free_netdev(adapter->port[i].dev);
  1017. }
  1018. pci_release_regions(pdev);
  1019. out_disable_pdev:
  1020. pci_disable_device(pdev);
  1021. pci_set_drvdata(pdev, NULL);
  1022. return err;
  1023. }
  1024. static void bit_bang(struct adapter *adapter, int bitdata, int nbits)
  1025. {
  1026. int data;
  1027. int i;
  1028. u32 val;
  1029. enum {
  1030. S_CLOCK = 1 << 3,
  1031. S_DATA = 1 << 4
  1032. };
  1033. for (i = (nbits - 1); i > -1; i--) {
  1034. udelay(50);
  1035. data = ((bitdata >> i) & 0x1);
  1036. __t1_tpi_read(adapter, A_ELMER0_GPO, &val);
  1037. if (data)
  1038. val |= S_DATA;
  1039. else
  1040. val &= ~S_DATA;
  1041. udelay(50);
  1042. /* Set SCLOCK low */
  1043. val &= ~S_CLOCK;
  1044. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1045. udelay(50);
  1046. /* Write SCLOCK high */
  1047. val |= S_CLOCK;
  1048. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1049. }
  1050. }
  1051. static int t1_clock(struct adapter *adapter, int mode)
  1052. {
  1053. u32 val;
  1054. int M_CORE_VAL;
  1055. int M_MEM_VAL;
  1056. enum {
  1057. M_CORE_BITS = 9,
  1058. T_CORE_VAL = 0,
  1059. T_CORE_BITS = 2,
  1060. N_CORE_VAL = 0,
  1061. N_CORE_BITS = 2,
  1062. M_MEM_BITS = 9,
  1063. T_MEM_VAL = 0,
  1064. T_MEM_BITS = 2,
  1065. N_MEM_VAL = 0,
  1066. N_MEM_BITS = 2,
  1067. NP_LOAD = 1 << 17,
  1068. S_LOAD_MEM = 1 << 5,
  1069. S_LOAD_CORE = 1 << 6,
  1070. S_CLOCK = 1 << 3
  1071. };
  1072. if (!t1_is_T1B(adapter))
  1073. return -ENODEV; /* Can't re-clock this chip. */
  1074. if (mode & 2)
  1075. return 0; /* show current mode. */
  1076. if ((adapter->t1powersave & 1) == (mode & 1))
  1077. return -EALREADY; /* ASIC already running in mode. */
  1078. if ((mode & 1) == HCLOCK) {
  1079. M_CORE_VAL = 0x14;
  1080. M_MEM_VAL = 0x18;
  1081. adapter->t1powersave = HCLOCK; /* overclock */
  1082. } else {
  1083. M_CORE_VAL = 0xe;
  1084. M_MEM_VAL = 0x10;
  1085. adapter->t1powersave = LCLOCK; /* underclock */
  1086. }
  1087. /* Don't interrupt this serial stream! */
  1088. spin_lock(&adapter->tpi_lock);
  1089. /* Initialize for ASIC core */
  1090. __t1_tpi_read(adapter, A_ELMER0_GPO, &val);
  1091. val |= NP_LOAD;
  1092. udelay(50);
  1093. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1094. udelay(50);
  1095. __t1_tpi_read(adapter, A_ELMER0_GPO, &val);
  1096. val &= ~S_LOAD_CORE;
  1097. val &= ~S_CLOCK;
  1098. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1099. udelay(50);
  1100. /* Serial program the ASIC clock synthesizer */
  1101. bit_bang(adapter, T_CORE_VAL, T_CORE_BITS);
  1102. bit_bang(adapter, N_CORE_VAL, N_CORE_BITS);
  1103. bit_bang(adapter, M_CORE_VAL, M_CORE_BITS);
  1104. udelay(50);
  1105. /* Finish ASIC core */
  1106. __t1_tpi_read(adapter, A_ELMER0_GPO, &val);
  1107. val |= S_LOAD_CORE;
  1108. udelay(50);
  1109. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1110. udelay(50);
  1111. __t1_tpi_read(adapter, A_ELMER0_GPO, &val);
  1112. val &= ~S_LOAD_CORE;
  1113. udelay(50);
  1114. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1115. udelay(50);
  1116. /* Initialize for memory */
  1117. __t1_tpi_read(adapter, A_ELMER0_GPO, &val);
  1118. val |= NP_LOAD;
  1119. udelay(50);
  1120. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1121. udelay(50);
  1122. __t1_tpi_read(adapter, A_ELMER0_GPO, &val);
  1123. val &= ~S_LOAD_MEM;
  1124. val &= ~S_CLOCK;
  1125. udelay(50);
  1126. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1127. udelay(50);
  1128. /* Serial program the memory clock synthesizer */
  1129. bit_bang(adapter, T_MEM_VAL, T_MEM_BITS);
  1130. bit_bang(adapter, N_MEM_VAL, N_MEM_BITS);
  1131. bit_bang(adapter, M_MEM_VAL, M_MEM_BITS);
  1132. udelay(50);
  1133. /* Finish memory */
  1134. __t1_tpi_read(adapter, A_ELMER0_GPO, &val);
  1135. val |= S_LOAD_MEM;
  1136. udelay(50);
  1137. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1138. udelay(50);
  1139. __t1_tpi_read(adapter, A_ELMER0_GPO, &val);
  1140. val &= ~S_LOAD_MEM;
  1141. udelay(50);
  1142. __t1_tpi_write(adapter, A_ELMER0_GPO, val);
  1143. spin_unlock(&adapter->tpi_lock);
  1144. return 0;
  1145. }
  1146. static inline void t1_sw_reset(struct pci_dev *pdev)
  1147. {
  1148. pci_write_config_dword(pdev, A_PCICFG_PM_CSR, 3);
  1149. pci_write_config_dword(pdev, A_PCICFG_PM_CSR, 0);
  1150. }
  1151. static void __devexit remove_one(struct pci_dev *pdev)
  1152. {
  1153. struct net_device *dev = pci_get_drvdata(pdev);
  1154. struct adapter *adapter = dev->priv;
  1155. int i;
  1156. for_each_port(adapter, i) {
  1157. if (test_bit(i, &adapter->registered_device_map))
  1158. unregister_netdev(adapter->port[i].dev);
  1159. }
  1160. t1_free_sw_modules(adapter);
  1161. iounmap(adapter->regs);
  1162. while (--i >= 0) {
  1163. if (adapter->port[i].dev)
  1164. free_netdev(adapter->port[i].dev);
  1165. }
  1166. pci_release_regions(pdev);
  1167. pci_disable_device(pdev);
  1168. pci_set_drvdata(pdev, NULL);
  1169. t1_sw_reset(pdev);
  1170. }
  1171. static struct pci_driver driver = {
  1172. .name = DRV_NAME,
  1173. .id_table = t1_pci_tbl,
  1174. .probe = init_one,
  1175. .remove = __devexit_p(remove_one),
  1176. };
  1177. static int __init t1_init_module(void)
  1178. {
  1179. return pci_register_driver(&driver);
  1180. }
  1181. static void __exit t1_cleanup_module(void)
  1182. {
  1183. pci_unregister_driver(&driver);
  1184. }
  1185. module_init(t1_init_module);
  1186. module_exit(t1_cleanup_module);