lpfc_sli.c 109 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2008 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. #include "lpfc_debugfs.h"
  39. /*
  40. * Define macro to log: Mailbox command x%x cannot issue Data
  41. * This allows multiple uses of lpfc_msgBlk0311
  42. * w/o perturbing log msg utility.
  43. */
  44. #define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
  45. lpfc_printf_log(phba, \
  46. KERN_INFO, \
  47. LOG_MBOX | LOG_SLI, \
  48. "(%d):0311 Mailbox command x%x cannot " \
  49. "issue Data: x%x x%x x%x\n", \
  50. pmbox->vport ? pmbox->vport->vpi : 0, \
  51. pmbox->mb.mbxCommand, \
  52. phba->pport->port_state, \
  53. psli->sli_flag, \
  54. flag)
  55. /* There are only four IOCB completion types. */
  56. typedef enum _lpfc_iocb_type {
  57. LPFC_UNKNOWN_IOCB,
  58. LPFC_UNSOL_IOCB,
  59. LPFC_SOL_IOCB,
  60. LPFC_ABORT_IOCB
  61. } lpfc_iocb_type;
  62. /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
  63. * to the start of the ring, and the slot number of the
  64. * desired iocb entry, calc a pointer to that entry.
  65. */
  66. static inline IOCB_t *
  67. lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  68. {
  69. return (IOCB_t *) (((char *) pring->cmdringaddr) +
  70. pring->cmdidx * phba->iocb_cmd_size);
  71. }
  72. static inline IOCB_t *
  73. lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  74. {
  75. return (IOCB_t *) (((char *) pring->rspringaddr) +
  76. pring->rspidx * phba->iocb_rsp_size);
  77. }
  78. static struct lpfc_iocbq *
  79. __lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  80. {
  81. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  82. struct lpfc_iocbq * iocbq = NULL;
  83. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  84. return iocbq;
  85. }
  86. struct lpfc_iocbq *
  87. lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  88. {
  89. struct lpfc_iocbq * iocbq = NULL;
  90. unsigned long iflags;
  91. spin_lock_irqsave(&phba->hbalock, iflags);
  92. iocbq = __lpfc_sli_get_iocbq(phba);
  93. spin_unlock_irqrestore(&phba->hbalock, iflags);
  94. return iocbq;
  95. }
  96. static void
  97. __lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  98. {
  99. size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
  100. /*
  101. * Clean all volatile data fields, preserve iotag and node struct.
  102. */
  103. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  104. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  105. }
  106. void
  107. lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  108. {
  109. unsigned long iflags;
  110. /*
  111. * Clean all volatile data fields, preserve iotag and node struct.
  112. */
  113. spin_lock_irqsave(&phba->hbalock, iflags);
  114. __lpfc_sli_release_iocbq(phba, iocbq);
  115. spin_unlock_irqrestore(&phba->hbalock, iflags);
  116. }
  117. /*
  118. * Translate the iocb command to an iocb command type used to decide the final
  119. * disposition of each completed IOCB.
  120. */
  121. static lpfc_iocb_type
  122. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  123. {
  124. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  125. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  126. return 0;
  127. switch (iocb_cmnd) {
  128. case CMD_XMIT_SEQUENCE_CR:
  129. case CMD_XMIT_SEQUENCE_CX:
  130. case CMD_XMIT_BCAST_CN:
  131. case CMD_XMIT_BCAST_CX:
  132. case CMD_ELS_REQUEST_CR:
  133. case CMD_ELS_REQUEST_CX:
  134. case CMD_CREATE_XRI_CR:
  135. case CMD_CREATE_XRI_CX:
  136. case CMD_GET_RPI_CN:
  137. case CMD_XMIT_ELS_RSP_CX:
  138. case CMD_GET_RPI_CR:
  139. case CMD_FCP_IWRITE_CR:
  140. case CMD_FCP_IWRITE_CX:
  141. case CMD_FCP_IREAD_CR:
  142. case CMD_FCP_IREAD_CX:
  143. case CMD_FCP_ICMND_CR:
  144. case CMD_FCP_ICMND_CX:
  145. case CMD_FCP_TSEND_CX:
  146. case CMD_FCP_TRSP_CX:
  147. case CMD_FCP_TRECEIVE_CX:
  148. case CMD_FCP_AUTO_TRSP_CX:
  149. case CMD_ADAPTER_MSG:
  150. case CMD_ADAPTER_DUMP:
  151. case CMD_XMIT_SEQUENCE64_CR:
  152. case CMD_XMIT_SEQUENCE64_CX:
  153. case CMD_XMIT_BCAST64_CN:
  154. case CMD_XMIT_BCAST64_CX:
  155. case CMD_ELS_REQUEST64_CR:
  156. case CMD_ELS_REQUEST64_CX:
  157. case CMD_FCP_IWRITE64_CR:
  158. case CMD_FCP_IWRITE64_CX:
  159. case CMD_FCP_IREAD64_CR:
  160. case CMD_FCP_IREAD64_CX:
  161. case CMD_FCP_ICMND64_CR:
  162. case CMD_FCP_ICMND64_CX:
  163. case CMD_FCP_TSEND64_CX:
  164. case CMD_FCP_TRSP64_CX:
  165. case CMD_FCP_TRECEIVE64_CX:
  166. case CMD_GEN_REQUEST64_CR:
  167. case CMD_GEN_REQUEST64_CX:
  168. case CMD_XMIT_ELS_RSP64_CX:
  169. type = LPFC_SOL_IOCB;
  170. break;
  171. case CMD_ABORT_XRI_CN:
  172. case CMD_ABORT_XRI_CX:
  173. case CMD_CLOSE_XRI_CN:
  174. case CMD_CLOSE_XRI_CX:
  175. case CMD_XRI_ABORTED_CX:
  176. case CMD_ABORT_MXRI64_CN:
  177. type = LPFC_ABORT_IOCB;
  178. break;
  179. case CMD_RCV_SEQUENCE_CX:
  180. case CMD_RCV_ELS_REQ_CX:
  181. case CMD_RCV_SEQUENCE64_CX:
  182. case CMD_RCV_ELS_REQ64_CX:
  183. case CMD_ASYNC_STATUS:
  184. case CMD_IOCB_RCV_SEQ64_CX:
  185. case CMD_IOCB_RCV_ELS64_CX:
  186. case CMD_IOCB_RCV_CONT64_CX:
  187. type = LPFC_UNSOL_IOCB;
  188. break;
  189. default:
  190. type = LPFC_UNKNOWN_IOCB;
  191. break;
  192. }
  193. return type;
  194. }
  195. static int
  196. lpfc_sli_ring_map(struct lpfc_hba *phba)
  197. {
  198. struct lpfc_sli *psli = &phba->sli;
  199. LPFC_MBOXQ_t *pmb;
  200. MAILBOX_t *pmbox;
  201. int i, rc, ret = 0;
  202. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  203. if (!pmb)
  204. return -ENOMEM;
  205. pmbox = &pmb->mb;
  206. phba->link_state = LPFC_INIT_MBX_CMDS;
  207. for (i = 0; i < psli->num_rings; i++) {
  208. lpfc_config_ring(phba, i, pmb);
  209. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  210. if (rc != MBX_SUCCESS) {
  211. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  212. "0446 Adapter failed to init (%d), "
  213. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  214. "ring %d\n",
  215. rc, pmbox->mbxCommand,
  216. pmbox->mbxStatus, i);
  217. phba->link_state = LPFC_HBA_ERROR;
  218. ret = -ENXIO;
  219. break;
  220. }
  221. }
  222. mempool_free(pmb, phba->mbox_mem_pool);
  223. return ret;
  224. }
  225. static int
  226. lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  227. struct lpfc_iocbq *piocb)
  228. {
  229. list_add_tail(&piocb->list, &pring->txcmplq);
  230. pring->txcmplq_cnt++;
  231. if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
  232. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  233. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  234. if (!piocb->vport)
  235. BUG();
  236. else
  237. mod_timer(&piocb->vport->els_tmofunc,
  238. jiffies + HZ * (phba->fc_ratov << 1));
  239. }
  240. return 0;
  241. }
  242. static struct lpfc_iocbq *
  243. lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  244. {
  245. struct lpfc_iocbq *cmd_iocb;
  246. list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
  247. if (cmd_iocb != NULL)
  248. pring->txq_cnt--;
  249. return cmd_iocb;
  250. }
  251. static IOCB_t *
  252. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  253. {
  254. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  255. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  256. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  257. uint32_t max_cmd_idx = pring->numCiocb;
  258. if ((pring->next_cmdidx == pring->cmdidx) &&
  259. (++pring->next_cmdidx >= max_cmd_idx))
  260. pring->next_cmdidx = 0;
  261. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  262. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  263. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  264. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  265. "0315 Ring %d issue: portCmdGet %d "
  266. "is bigger then cmd ring %d\n",
  267. pring->ringno,
  268. pring->local_getidx, max_cmd_idx);
  269. phba->link_state = LPFC_HBA_ERROR;
  270. /*
  271. * All error attention handlers are posted to
  272. * worker thread
  273. */
  274. phba->work_ha |= HA_ERATT;
  275. phba->work_hs = HS_FFER3;
  276. /* hbalock should already be held */
  277. if (phba->work_wait)
  278. lpfc_worker_wake_up(phba);
  279. return NULL;
  280. }
  281. if (pring->local_getidx == pring->next_cmdidx)
  282. return NULL;
  283. }
  284. return lpfc_cmd_iocb(phba, pring);
  285. }
  286. uint16_t
  287. lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  288. {
  289. struct lpfc_iocbq **new_arr;
  290. struct lpfc_iocbq **old_arr;
  291. size_t new_len;
  292. struct lpfc_sli *psli = &phba->sli;
  293. uint16_t iotag;
  294. spin_lock_irq(&phba->hbalock);
  295. iotag = psli->last_iotag;
  296. if(++iotag < psli->iocbq_lookup_len) {
  297. psli->last_iotag = iotag;
  298. psli->iocbq_lookup[iotag] = iocbq;
  299. spin_unlock_irq(&phba->hbalock);
  300. iocbq->iotag = iotag;
  301. return iotag;
  302. } else if (psli->iocbq_lookup_len < (0xffff
  303. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  304. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  305. spin_unlock_irq(&phba->hbalock);
  306. new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
  307. GFP_KERNEL);
  308. if (new_arr) {
  309. spin_lock_irq(&phba->hbalock);
  310. old_arr = psli->iocbq_lookup;
  311. if (new_len <= psli->iocbq_lookup_len) {
  312. /* highly unprobable case */
  313. kfree(new_arr);
  314. iotag = psli->last_iotag;
  315. if(++iotag < psli->iocbq_lookup_len) {
  316. psli->last_iotag = iotag;
  317. psli->iocbq_lookup[iotag] = iocbq;
  318. spin_unlock_irq(&phba->hbalock);
  319. iocbq->iotag = iotag;
  320. return iotag;
  321. }
  322. spin_unlock_irq(&phba->hbalock);
  323. return 0;
  324. }
  325. if (psli->iocbq_lookup)
  326. memcpy(new_arr, old_arr,
  327. ((psli->last_iotag + 1) *
  328. sizeof (struct lpfc_iocbq *)));
  329. psli->iocbq_lookup = new_arr;
  330. psli->iocbq_lookup_len = new_len;
  331. psli->last_iotag = iotag;
  332. psli->iocbq_lookup[iotag] = iocbq;
  333. spin_unlock_irq(&phba->hbalock);
  334. iocbq->iotag = iotag;
  335. kfree(old_arr);
  336. return iotag;
  337. }
  338. } else
  339. spin_unlock_irq(&phba->hbalock);
  340. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  341. "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  342. psli->last_iotag);
  343. return 0;
  344. }
  345. static void
  346. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  347. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  348. {
  349. /*
  350. * Set up an iotag
  351. */
  352. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  353. if (pring->ringno == LPFC_ELS_RING) {
  354. lpfc_debugfs_slow_ring_trc(phba,
  355. "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  356. *(((uint32_t *) &nextiocb->iocb) + 4),
  357. *(((uint32_t *) &nextiocb->iocb) + 6),
  358. *(((uint32_t *) &nextiocb->iocb) + 7));
  359. }
  360. /*
  361. * Issue iocb command to adapter
  362. */
  363. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
  364. wmb();
  365. pring->stats.iocb_cmd++;
  366. /*
  367. * If there is no completion routine to call, we can release the
  368. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  369. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  370. */
  371. if (nextiocb->iocb_cmpl)
  372. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  373. else
  374. __lpfc_sli_release_iocbq(phba, nextiocb);
  375. /*
  376. * Let the HBA know what IOCB slot will be the next one the
  377. * driver will put a command into.
  378. */
  379. pring->cmdidx = pring->next_cmdidx;
  380. writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
  381. }
  382. static void
  383. lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  384. {
  385. int ringno = pring->ringno;
  386. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  387. wmb();
  388. /*
  389. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  390. * The HBA will tell us when an IOCB entry is available.
  391. */
  392. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  393. readl(phba->CAregaddr); /* flush */
  394. pring->stats.iocb_cmd_full++;
  395. }
  396. static void
  397. lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  398. {
  399. int ringno = pring->ringno;
  400. /*
  401. * Tell the HBA that there is work to do in this ring.
  402. */
  403. wmb();
  404. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  405. readl(phba->CAregaddr); /* flush */
  406. }
  407. static void
  408. lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  409. {
  410. IOCB_t *iocb;
  411. struct lpfc_iocbq *nextiocb;
  412. /*
  413. * Check to see if:
  414. * (a) there is anything on the txq to send
  415. * (b) link is up
  416. * (c) link attention events can be processed (fcp ring only)
  417. * (d) IOCB processing is not blocked by the outstanding mbox command.
  418. */
  419. if (pring->txq_cnt &&
  420. lpfc_is_link_up(phba) &&
  421. (pring->ringno != phba->sli.fcp_ring ||
  422. phba->sli.sli_flag & LPFC_PROCESS_LA)) {
  423. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  424. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  425. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  426. if (iocb)
  427. lpfc_sli_update_ring(phba, pring);
  428. else
  429. lpfc_sli_update_full_ring(phba, pring);
  430. }
  431. return;
  432. }
  433. static struct lpfc_hbq_entry *
  434. lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
  435. {
  436. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  437. if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
  438. ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
  439. hbqp->next_hbqPutIdx = 0;
  440. if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
  441. uint32_t raw_index = phba->hbq_get[hbqno];
  442. uint32_t getidx = le32_to_cpu(raw_index);
  443. hbqp->local_hbqGetIdx = getidx;
  444. if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
  445. lpfc_printf_log(phba, KERN_ERR,
  446. LOG_SLI | LOG_VPORT,
  447. "1802 HBQ %d: local_hbqGetIdx "
  448. "%u is > than hbqp->entry_count %u\n",
  449. hbqno, hbqp->local_hbqGetIdx,
  450. hbqp->entry_count);
  451. phba->link_state = LPFC_HBA_ERROR;
  452. return NULL;
  453. }
  454. if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
  455. return NULL;
  456. }
  457. return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
  458. hbqp->hbqPutIdx;
  459. }
  460. void
  461. lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
  462. {
  463. struct lpfc_dmabuf *dmabuf, *next_dmabuf;
  464. struct hbq_dmabuf *hbq_buf;
  465. int i, hbq_count;
  466. hbq_count = lpfc_sli_hbq_count();
  467. /* Return all memory used by all HBQs */
  468. for (i = 0; i < hbq_count; ++i) {
  469. list_for_each_entry_safe(dmabuf, next_dmabuf,
  470. &phba->hbqs[i].hbq_buffer_list, list) {
  471. hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
  472. list_del(&hbq_buf->dbuf.list);
  473. (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
  474. }
  475. phba->hbqs[i].buffer_count = 0;
  476. }
  477. }
  478. static struct lpfc_hbq_entry *
  479. lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
  480. struct hbq_dmabuf *hbq_buf)
  481. {
  482. struct lpfc_hbq_entry *hbqe;
  483. dma_addr_t physaddr = hbq_buf->dbuf.phys;
  484. /* Get next HBQ entry slot to use */
  485. hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
  486. if (hbqe) {
  487. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  488. hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
  489. hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
  490. hbqe->bde.tus.f.bdeSize = hbq_buf->size;
  491. hbqe->bde.tus.f.bdeFlags = 0;
  492. hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
  493. hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
  494. /* Sync SLIM */
  495. hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
  496. writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
  497. /* flush */
  498. readl(phba->hbq_put + hbqno);
  499. list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
  500. }
  501. return hbqe;
  502. }
  503. static struct lpfc_hbq_init lpfc_els_hbq = {
  504. .rn = 1,
  505. .entry_count = 200,
  506. .mask_count = 0,
  507. .profile = 0,
  508. .ring_mask = (1 << LPFC_ELS_RING),
  509. .buffer_count = 0,
  510. .init_count = 20,
  511. .add_count = 5,
  512. };
  513. static struct lpfc_hbq_init lpfc_extra_hbq = {
  514. .rn = 1,
  515. .entry_count = 200,
  516. .mask_count = 0,
  517. .profile = 0,
  518. .ring_mask = (1 << LPFC_EXTRA_RING),
  519. .buffer_count = 0,
  520. .init_count = 0,
  521. .add_count = 5,
  522. };
  523. struct lpfc_hbq_init *lpfc_hbq_defs[] = {
  524. &lpfc_els_hbq,
  525. &lpfc_extra_hbq,
  526. };
  527. static int
  528. lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
  529. {
  530. uint32_t i, start, end;
  531. struct hbq_dmabuf *hbq_buffer;
  532. if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
  533. return 0;
  534. }
  535. start = phba->hbqs[hbqno].buffer_count;
  536. end = count + start;
  537. if (end > lpfc_hbq_defs[hbqno]->entry_count) {
  538. end = lpfc_hbq_defs[hbqno]->entry_count;
  539. }
  540. /* Populate HBQ entries */
  541. for (i = start; i < end; i++) {
  542. hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  543. if (!hbq_buffer)
  544. return 1;
  545. hbq_buffer->tag = (i | (hbqno << 16));
  546. if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
  547. phba->hbqs[hbqno].buffer_count++;
  548. else
  549. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  550. }
  551. return 0;
  552. }
  553. int
  554. lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
  555. {
  556. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  557. lpfc_hbq_defs[qno]->add_count));
  558. }
  559. static int
  560. lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
  561. {
  562. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  563. lpfc_hbq_defs[qno]->init_count));
  564. }
  565. static struct hbq_dmabuf *
  566. lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
  567. {
  568. struct lpfc_dmabuf *d_buf;
  569. struct hbq_dmabuf *hbq_buf;
  570. uint32_t hbqno;
  571. hbqno = tag >> 16;
  572. if (hbqno >= LPFC_MAX_HBQS)
  573. return NULL;
  574. list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
  575. hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
  576. if (hbq_buf->tag == tag) {
  577. return hbq_buf;
  578. }
  579. }
  580. lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
  581. "1803 Bad hbq tag. Data: x%x x%x\n",
  582. tag, phba->hbqs[tag >> 16].buffer_count);
  583. return NULL;
  584. }
  585. void
  586. lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
  587. {
  588. uint32_t hbqno;
  589. if (hbq_buffer) {
  590. hbqno = hbq_buffer->tag >> 16;
  591. if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
  592. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  593. }
  594. }
  595. }
  596. static int
  597. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  598. {
  599. uint8_t ret;
  600. switch (mbxCommand) {
  601. case MBX_LOAD_SM:
  602. case MBX_READ_NV:
  603. case MBX_WRITE_NV:
  604. case MBX_WRITE_VPARMS:
  605. case MBX_RUN_BIU_DIAG:
  606. case MBX_INIT_LINK:
  607. case MBX_DOWN_LINK:
  608. case MBX_CONFIG_LINK:
  609. case MBX_CONFIG_RING:
  610. case MBX_RESET_RING:
  611. case MBX_READ_CONFIG:
  612. case MBX_READ_RCONFIG:
  613. case MBX_READ_SPARM:
  614. case MBX_READ_STATUS:
  615. case MBX_READ_RPI:
  616. case MBX_READ_XRI:
  617. case MBX_READ_REV:
  618. case MBX_READ_LNK_STAT:
  619. case MBX_REG_LOGIN:
  620. case MBX_UNREG_LOGIN:
  621. case MBX_READ_LA:
  622. case MBX_CLEAR_LA:
  623. case MBX_DUMP_MEMORY:
  624. case MBX_DUMP_CONTEXT:
  625. case MBX_RUN_DIAGS:
  626. case MBX_RESTART:
  627. case MBX_UPDATE_CFG:
  628. case MBX_DOWN_LOAD:
  629. case MBX_DEL_LD_ENTRY:
  630. case MBX_RUN_PROGRAM:
  631. case MBX_SET_MASK:
  632. case MBX_SET_VARIABLE:
  633. case MBX_UNREG_D_ID:
  634. case MBX_KILL_BOARD:
  635. case MBX_CONFIG_FARP:
  636. case MBX_BEACON:
  637. case MBX_LOAD_AREA:
  638. case MBX_RUN_BIU_DIAG64:
  639. case MBX_CONFIG_PORT:
  640. case MBX_READ_SPARM64:
  641. case MBX_READ_RPI64:
  642. case MBX_REG_LOGIN64:
  643. case MBX_READ_LA64:
  644. case MBX_WRITE_WWN:
  645. case MBX_SET_DEBUG:
  646. case MBX_LOAD_EXP_ROM:
  647. case MBX_ASYNCEVT_ENABLE:
  648. case MBX_REG_VPI:
  649. case MBX_UNREG_VPI:
  650. case MBX_HEARTBEAT:
  651. ret = mbxCommand;
  652. break;
  653. default:
  654. ret = MBX_SHUTDOWN;
  655. break;
  656. }
  657. return ret;
  658. }
  659. static void
  660. lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
  661. {
  662. wait_queue_head_t *pdone_q;
  663. unsigned long drvr_flag;
  664. /*
  665. * If pdone_q is empty, the driver thread gave up waiting and
  666. * continued running.
  667. */
  668. pmboxq->mbox_flag |= LPFC_MBX_WAKE;
  669. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  670. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  671. if (pdone_q)
  672. wake_up_interruptible(pdone_q);
  673. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  674. return;
  675. }
  676. void
  677. lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
  678. {
  679. struct lpfc_dmabuf *mp;
  680. uint16_t rpi;
  681. int rc;
  682. mp = (struct lpfc_dmabuf *) (pmb->context1);
  683. if (mp) {
  684. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  685. kfree(mp);
  686. }
  687. /*
  688. * If a REG_LOGIN succeeded after node is destroyed or node
  689. * is in re-discovery driver need to cleanup the RPI.
  690. */
  691. if (!(phba->pport->load_flag & FC_UNLOADING) &&
  692. pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
  693. !pmb->mb.mbxStatus) {
  694. rpi = pmb->mb.un.varWords[0];
  695. lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
  696. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  697. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  698. if (rc != MBX_NOT_FINISHED)
  699. return;
  700. }
  701. mempool_free(pmb, phba->mbox_mem_pool);
  702. return;
  703. }
  704. int
  705. lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
  706. {
  707. MAILBOX_t *pmbox;
  708. LPFC_MBOXQ_t *pmb;
  709. int rc;
  710. LIST_HEAD(cmplq);
  711. phba->sli.slistat.mbox_event++;
  712. /* Get all completed mailboxe buffers into the cmplq */
  713. spin_lock_irq(&phba->hbalock);
  714. list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
  715. spin_unlock_irq(&phba->hbalock);
  716. /* Get a Mailbox buffer to setup mailbox commands for callback */
  717. do {
  718. list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
  719. if (pmb == NULL)
  720. break;
  721. pmbox = &pmb->mb;
  722. if (pmbox->mbxCommand != MBX_HEARTBEAT) {
  723. if (pmb->vport) {
  724. lpfc_debugfs_disc_trc(pmb->vport,
  725. LPFC_DISC_TRC_MBOX_VPORT,
  726. "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
  727. (uint32_t)pmbox->mbxCommand,
  728. pmbox->un.varWords[0],
  729. pmbox->un.varWords[1]);
  730. }
  731. else {
  732. lpfc_debugfs_disc_trc(phba->pport,
  733. LPFC_DISC_TRC_MBOX,
  734. "MBOX cmpl: cmd:x%x mb:x%x x%x",
  735. (uint32_t)pmbox->mbxCommand,
  736. pmbox->un.varWords[0],
  737. pmbox->un.varWords[1]);
  738. }
  739. }
  740. /*
  741. * It is a fatal error if unknown mbox command completion.
  742. */
  743. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  744. MBX_SHUTDOWN) {
  745. /* Unknow mailbox command compl */
  746. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  747. "(%d):0323 Unknown Mailbox command "
  748. "%x Cmpl\n",
  749. pmb->vport ? pmb->vport->vpi : 0,
  750. pmbox->mbxCommand);
  751. phba->link_state = LPFC_HBA_ERROR;
  752. phba->work_hs = HS_FFER3;
  753. lpfc_handle_eratt(phba);
  754. continue;
  755. }
  756. if (pmbox->mbxStatus) {
  757. phba->sli.slistat.mbox_stat_err++;
  758. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  759. /* Mbox cmd cmpl error - RETRYing */
  760. lpfc_printf_log(phba, KERN_INFO,
  761. LOG_MBOX | LOG_SLI,
  762. "(%d):0305 Mbox cmd cmpl "
  763. "error - RETRYing Data: x%x "
  764. "x%x x%x x%x\n",
  765. pmb->vport ? pmb->vport->vpi :0,
  766. pmbox->mbxCommand,
  767. pmbox->mbxStatus,
  768. pmbox->un.varWords[0],
  769. pmb->vport->port_state);
  770. pmbox->mbxStatus = 0;
  771. pmbox->mbxOwner = OWN_HOST;
  772. spin_lock_irq(&phba->hbalock);
  773. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  774. spin_unlock_irq(&phba->hbalock);
  775. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  776. if (rc == MBX_SUCCESS)
  777. continue;
  778. }
  779. }
  780. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  781. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  782. "(%d):0307 Mailbox cmd x%x Cmpl x%p "
  783. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  784. pmb->vport ? pmb->vport->vpi : 0,
  785. pmbox->mbxCommand,
  786. pmb->mbox_cmpl,
  787. *((uint32_t *) pmbox),
  788. pmbox->un.varWords[0],
  789. pmbox->un.varWords[1],
  790. pmbox->un.varWords[2],
  791. pmbox->un.varWords[3],
  792. pmbox->un.varWords[4],
  793. pmbox->un.varWords[5],
  794. pmbox->un.varWords[6],
  795. pmbox->un.varWords[7]);
  796. if (pmb->mbox_cmpl)
  797. pmb->mbox_cmpl(phba,pmb);
  798. } while (1);
  799. return 0;
  800. }
  801. static struct lpfc_dmabuf *
  802. lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
  803. {
  804. struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
  805. uint32_t hbqno;
  806. void *virt; /* virtual address ptr */
  807. dma_addr_t phys; /* mapped address */
  808. hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
  809. if (hbq_entry == NULL)
  810. return NULL;
  811. list_del(&hbq_entry->dbuf.list);
  812. hbqno = tag >> 16;
  813. new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  814. if (new_hbq_entry == NULL)
  815. return &hbq_entry->dbuf;
  816. new_hbq_entry->tag = -1;
  817. phys = new_hbq_entry->dbuf.phys;
  818. virt = new_hbq_entry->dbuf.virt;
  819. new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
  820. new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
  821. hbq_entry->dbuf.phys = phys;
  822. hbq_entry->dbuf.virt = virt;
  823. lpfc_sli_free_hbq(phba, hbq_entry);
  824. return &new_hbq_entry->dbuf;
  825. }
  826. static struct lpfc_dmabuf *
  827. lpfc_sli_get_buff(struct lpfc_hba *phba,
  828. struct lpfc_sli_ring *pring,
  829. uint32_t tag)
  830. {
  831. if (tag & QUE_BUFTAG_BIT)
  832. return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
  833. else
  834. return lpfc_sli_replace_hbqbuff(phba, tag);
  835. }
  836. static int
  837. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  838. struct lpfc_iocbq *saveq)
  839. {
  840. IOCB_t * irsp;
  841. WORD5 * w5p;
  842. uint32_t Rctl, Type;
  843. uint32_t match, i;
  844. struct lpfc_iocbq *iocbq;
  845. match = 0;
  846. irsp = &(saveq->iocb);
  847. if (irsp->ulpStatus == IOSTAT_NEED_BUFFER)
  848. return 1;
  849. if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
  850. if (pring->lpfc_sli_rcv_async_status)
  851. pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
  852. else
  853. lpfc_printf_log(phba,
  854. KERN_WARNING,
  855. LOG_SLI,
  856. "0316 Ring %d handler: unexpected "
  857. "ASYNC_STATUS iocb received evt_code "
  858. "0x%x\n",
  859. pring->ringno,
  860. irsp->un.asyncstat.evt_code);
  861. return 1;
  862. }
  863. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  864. if (irsp->ulpBdeCount != 0) {
  865. saveq->context2 = lpfc_sli_get_buff(phba, pring,
  866. irsp->un.ulpWord[3]);
  867. if (!saveq->context2)
  868. lpfc_printf_log(phba,
  869. KERN_ERR,
  870. LOG_SLI,
  871. "0341 Ring %d Cannot find buffer for "
  872. "an unsolicited iocb. tag 0x%x\n",
  873. pring->ringno,
  874. irsp->un.ulpWord[3]);
  875. }
  876. if (irsp->ulpBdeCount == 2) {
  877. saveq->context3 = lpfc_sli_get_buff(phba, pring,
  878. irsp->unsli3.sli3Words[7]);
  879. if (!saveq->context3)
  880. lpfc_printf_log(phba,
  881. KERN_ERR,
  882. LOG_SLI,
  883. "0342 Ring %d Cannot find buffer for an"
  884. " unsolicited iocb. tag 0x%x\n",
  885. pring->ringno,
  886. irsp->unsli3.sli3Words[7]);
  887. }
  888. list_for_each_entry(iocbq, &saveq->list, list) {
  889. irsp = &(iocbq->iocb);
  890. if (irsp->ulpBdeCount != 0) {
  891. iocbq->context2 = lpfc_sli_get_buff(phba, pring,
  892. irsp->un.ulpWord[3]);
  893. if (!iocbq->context2)
  894. lpfc_printf_log(phba,
  895. KERN_ERR,
  896. LOG_SLI,
  897. "0343 Ring %d Cannot find "
  898. "buffer for an unsolicited iocb"
  899. ". tag 0x%x\n", pring->ringno,
  900. irsp->un.ulpWord[3]);
  901. }
  902. if (irsp->ulpBdeCount == 2) {
  903. iocbq->context3 = lpfc_sli_get_buff(phba, pring,
  904. irsp->unsli3.sli3Words[7]);
  905. if (!iocbq->context3)
  906. lpfc_printf_log(phba,
  907. KERN_ERR,
  908. LOG_SLI,
  909. "0344 Ring %d Cannot find "
  910. "buffer for an unsolicited "
  911. "iocb. tag 0x%x\n",
  912. pring->ringno,
  913. irsp->unsli3.sli3Words[7]);
  914. }
  915. }
  916. }
  917. if (irsp->ulpBdeCount != 0 &&
  918. (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
  919. irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
  920. int found = 0;
  921. /* search continue save q for same XRI */
  922. list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
  923. if (iocbq->iocb.ulpContext == saveq->iocb.ulpContext) {
  924. list_add_tail(&saveq->list, &iocbq->list);
  925. found = 1;
  926. break;
  927. }
  928. }
  929. if (!found)
  930. list_add_tail(&saveq->clist,
  931. &pring->iocb_continue_saveq);
  932. if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
  933. list_del_init(&iocbq->clist);
  934. saveq = iocbq;
  935. irsp = &(saveq->iocb);
  936. } else
  937. return 0;
  938. }
  939. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
  940. (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
  941. (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
  942. Rctl = FC_ELS_REQ;
  943. Type = FC_ELS_DATA;
  944. } else {
  945. w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
  946. Rctl = w5p->hcsw.Rctl;
  947. Type = w5p->hcsw.Type;
  948. /* Firmware Workaround */
  949. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  950. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
  951. irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
  952. Rctl = FC_ELS_REQ;
  953. Type = FC_ELS_DATA;
  954. w5p->hcsw.Rctl = Rctl;
  955. w5p->hcsw.Type = Type;
  956. }
  957. }
  958. /* unSolicited Responses */
  959. if (pring->prt[0].profile) {
  960. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  961. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  962. saveq);
  963. match = 1;
  964. } else {
  965. /* We must search, based on rctl / type
  966. for the right routine */
  967. for (i = 0; i < pring->num_mask; i++) {
  968. if ((pring->prt[i].rctl == Rctl)
  969. && (pring->prt[i].type == Type)) {
  970. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  971. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  972. (phba, pring, saveq);
  973. match = 1;
  974. break;
  975. }
  976. }
  977. }
  978. if (match == 0) {
  979. /* Unexpected Rctl / Type received */
  980. /* Ring <ringno> handler: unexpected
  981. Rctl <Rctl> Type <Type> received */
  982. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  983. "0313 Ring %d handler: unexpected Rctl x%x "
  984. "Type x%x received\n",
  985. pring->ringno, Rctl, Type);
  986. }
  987. return 1;
  988. }
  989. static struct lpfc_iocbq *
  990. lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
  991. struct lpfc_sli_ring *pring,
  992. struct lpfc_iocbq *prspiocb)
  993. {
  994. struct lpfc_iocbq *cmd_iocb = NULL;
  995. uint16_t iotag;
  996. iotag = prspiocb->iocb.ulpIoTag;
  997. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  998. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  999. list_del_init(&cmd_iocb->list);
  1000. pring->txcmplq_cnt--;
  1001. return cmd_iocb;
  1002. }
  1003. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1004. "0317 iotag x%x is out off "
  1005. "range: max iotag x%x wd0 x%x\n",
  1006. iotag, phba->sli.last_iotag,
  1007. *(((uint32_t *) &prspiocb->iocb) + 7));
  1008. return NULL;
  1009. }
  1010. static int
  1011. lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1012. struct lpfc_iocbq *saveq)
  1013. {
  1014. struct lpfc_iocbq *cmdiocbp;
  1015. int rc = 1;
  1016. unsigned long iflag;
  1017. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  1018. spin_lock_irqsave(&phba->hbalock, iflag);
  1019. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  1020. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1021. if (cmdiocbp) {
  1022. if (cmdiocbp->iocb_cmpl) {
  1023. /*
  1024. * Post all ELS completions to the worker thread.
  1025. * All other are passed to the completion callback.
  1026. */
  1027. if (pring->ringno == LPFC_ELS_RING) {
  1028. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  1029. cmdiocbp->iocb_flag &=
  1030. ~LPFC_DRIVER_ABORTED;
  1031. saveq->iocb.ulpStatus =
  1032. IOSTAT_LOCAL_REJECT;
  1033. saveq->iocb.un.ulpWord[4] =
  1034. IOERR_SLI_ABORTED;
  1035. /* Firmware could still be in progress
  1036. * of DMAing payload, so don't free data
  1037. * buffer till after a hbeat.
  1038. */
  1039. saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
  1040. }
  1041. }
  1042. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  1043. } else
  1044. lpfc_sli_release_iocbq(phba, cmdiocbp);
  1045. } else {
  1046. /*
  1047. * Unknown initiating command based on the response iotag.
  1048. * This could be the case on the ELS ring because of
  1049. * lpfc_els_abort().
  1050. */
  1051. if (pring->ringno != LPFC_ELS_RING) {
  1052. /*
  1053. * Ring <ringno> handler: unexpected completion IoTag
  1054. * <IoTag>
  1055. */
  1056. lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
  1057. "0322 Ring %d handler: "
  1058. "unexpected completion IoTag x%x "
  1059. "Data: x%x x%x x%x x%x\n",
  1060. pring->ringno,
  1061. saveq->iocb.ulpIoTag,
  1062. saveq->iocb.ulpStatus,
  1063. saveq->iocb.un.ulpWord[4],
  1064. saveq->iocb.ulpCommand,
  1065. saveq->iocb.ulpContext);
  1066. }
  1067. }
  1068. return rc;
  1069. }
  1070. static void
  1071. lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1072. {
  1073. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1074. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1075. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1076. /*
  1077. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1078. * rsp ring <portRspMax>
  1079. */
  1080. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1081. "0312 Ring %d handler: portRspPut %d "
  1082. "is bigger then rsp ring %d\n",
  1083. pring->ringno, le32_to_cpu(pgp->rspPutInx),
  1084. pring->numRiocb);
  1085. phba->link_state = LPFC_HBA_ERROR;
  1086. /*
  1087. * All error attention handlers are posted to
  1088. * worker thread
  1089. */
  1090. phba->work_ha |= HA_ERATT;
  1091. phba->work_hs = HS_FFER3;
  1092. /* hbalock should already be held */
  1093. if (phba->work_wait)
  1094. lpfc_worker_wake_up(phba);
  1095. return;
  1096. }
  1097. void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
  1098. {
  1099. struct lpfc_sli *psli = &phba->sli;
  1100. struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
  1101. IOCB_t *irsp = NULL;
  1102. IOCB_t *entry = NULL;
  1103. struct lpfc_iocbq *cmdiocbq = NULL;
  1104. struct lpfc_iocbq rspiocbq;
  1105. struct lpfc_pgp *pgp;
  1106. uint32_t status;
  1107. uint32_t portRspPut, portRspMax;
  1108. int type;
  1109. uint32_t rsp_cmpl = 0;
  1110. uint32_t ha_copy;
  1111. unsigned long iflags;
  1112. pring->stats.iocb_event++;
  1113. pgp = (phba->sli_rev == 3) ?
  1114. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1115. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1116. /*
  1117. * The next available response entry should never exceed the maximum
  1118. * entries. If it does, treat it as an adapter hardware error.
  1119. */
  1120. portRspMax = pring->numRiocb;
  1121. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1122. if (unlikely(portRspPut >= portRspMax)) {
  1123. lpfc_sli_rsp_pointers_error(phba, pring);
  1124. return;
  1125. }
  1126. rmb();
  1127. while (pring->rspidx != portRspPut) {
  1128. entry = lpfc_resp_iocb(phba, pring);
  1129. if (++pring->rspidx >= portRspMax)
  1130. pring->rspidx = 0;
  1131. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1132. (uint32_t *) &rspiocbq.iocb,
  1133. phba->iocb_rsp_size);
  1134. irsp = &rspiocbq.iocb;
  1135. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1136. pring->stats.iocb_rsp++;
  1137. rsp_cmpl++;
  1138. if (unlikely(irsp->ulpStatus)) {
  1139. /* Rsp ring <ringno> error: IOCB */
  1140. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1141. "0326 Rsp Ring %d error: IOCB Data: "
  1142. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1143. pring->ringno,
  1144. irsp->un.ulpWord[0],
  1145. irsp->un.ulpWord[1],
  1146. irsp->un.ulpWord[2],
  1147. irsp->un.ulpWord[3],
  1148. irsp->un.ulpWord[4],
  1149. irsp->un.ulpWord[5],
  1150. *(((uint32_t *) irsp) + 6),
  1151. *(((uint32_t *) irsp) + 7));
  1152. }
  1153. switch (type) {
  1154. case LPFC_ABORT_IOCB:
  1155. case LPFC_SOL_IOCB:
  1156. /*
  1157. * Idle exchange closed via ABTS from port. No iocb
  1158. * resources need to be recovered.
  1159. */
  1160. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1161. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1162. "0314 IOCB cmd 0x%x "
  1163. "processed. Skipping "
  1164. "completion",
  1165. irsp->ulpCommand);
  1166. break;
  1167. }
  1168. spin_lock_irqsave(&phba->hbalock, iflags);
  1169. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1170. &rspiocbq);
  1171. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1172. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1173. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1174. &rspiocbq);
  1175. }
  1176. break;
  1177. default:
  1178. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1179. char adaptermsg[LPFC_MAX_ADPTMSG];
  1180. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1181. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1182. MAX_MSG_DATA);
  1183. dev_warn(&((phba->pcidev)->dev),
  1184. "lpfc%d: %s\n",
  1185. phba->brd_no, adaptermsg);
  1186. } else {
  1187. /* Unknown IOCB command */
  1188. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1189. "0321 Unknown IOCB command "
  1190. "Data: x%x, x%x x%x x%x x%x\n",
  1191. type, irsp->ulpCommand,
  1192. irsp->ulpStatus,
  1193. irsp->ulpIoTag,
  1194. irsp->ulpContext);
  1195. }
  1196. break;
  1197. }
  1198. /*
  1199. * The response IOCB has been processed. Update the ring
  1200. * pointer in SLIM. If the port response put pointer has not
  1201. * been updated, sync the pgp->rspPutInx and fetch the new port
  1202. * response put pointer.
  1203. */
  1204. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1205. if (pring->rspidx == portRspPut)
  1206. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1207. }
  1208. ha_copy = readl(phba->HAregaddr);
  1209. ha_copy >>= (LPFC_FCP_RING * 4);
  1210. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  1211. spin_lock_irqsave(&phba->hbalock, iflags);
  1212. pring->stats.iocb_rsp_full++;
  1213. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  1214. writel(status, phba->CAregaddr);
  1215. readl(phba->CAregaddr);
  1216. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1217. }
  1218. if ((ha_copy & HA_R0CE_RSP) &&
  1219. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1220. spin_lock_irqsave(&phba->hbalock, iflags);
  1221. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1222. pring->stats.iocb_cmd_empty++;
  1223. /* Force update of the local copy of cmdGetInx */
  1224. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1225. lpfc_sli_resume_iocb(phba, pring);
  1226. if ((pring->lpfc_sli_cmd_available))
  1227. (pring->lpfc_sli_cmd_available) (phba, pring);
  1228. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1229. }
  1230. return;
  1231. }
  1232. /*
  1233. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  1234. * to check it explicitly.
  1235. */
  1236. static int
  1237. lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
  1238. struct lpfc_sli_ring *pring, uint32_t mask)
  1239. {
  1240. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1241. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1242. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1243. IOCB_t *irsp = NULL;
  1244. IOCB_t *entry = NULL;
  1245. struct lpfc_iocbq *cmdiocbq = NULL;
  1246. struct lpfc_iocbq rspiocbq;
  1247. uint32_t status;
  1248. uint32_t portRspPut, portRspMax;
  1249. int rc = 1;
  1250. lpfc_iocb_type type;
  1251. unsigned long iflag;
  1252. uint32_t rsp_cmpl = 0;
  1253. spin_lock_irqsave(&phba->hbalock, iflag);
  1254. pring->stats.iocb_event++;
  1255. /*
  1256. * The next available response entry should never exceed the maximum
  1257. * entries. If it does, treat it as an adapter hardware error.
  1258. */
  1259. portRspMax = pring->numRiocb;
  1260. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1261. if (unlikely(portRspPut >= portRspMax)) {
  1262. lpfc_sli_rsp_pointers_error(phba, pring);
  1263. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1264. return 1;
  1265. }
  1266. rmb();
  1267. while (pring->rspidx != portRspPut) {
  1268. /*
  1269. * Fetch an entry off the ring and copy it into a local data
  1270. * structure. The copy involves a byte-swap since the
  1271. * network byte order and pci byte orders are different.
  1272. */
  1273. entry = lpfc_resp_iocb(phba, pring);
  1274. phba->last_completion_time = jiffies;
  1275. if (++pring->rspidx >= portRspMax)
  1276. pring->rspidx = 0;
  1277. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1278. (uint32_t *) &rspiocbq.iocb,
  1279. phba->iocb_rsp_size);
  1280. INIT_LIST_HEAD(&(rspiocbq.list));
  1281. irsp = &rspiocbq.iocb;
  1282. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1283. pring->stats.iocb_rsp++;
  1284. rsp_cmpl++;
  1285. if (unlikely(irsp->ulpStatus)) {
  1286. /*
  1287. * If resource errors reported from HBA, reduce
  1288. * queuedepths of the SCSI device.
  1289. */
  1290. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1291. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1292. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1293. lpfc_adjust_queue_depth(phba);
  1294. spin_lock_irqsave(&phba->hbalock, iflag);
  1295. }
  1296. /* Rsp ring <ringno> error: IOCB */
  1297. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1298. "0336 Rsp Ring %d error: IOCB Data: "
  1299. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1300. pring->ringno,
  1301. irsp->un.ulpWord[0],
  1302. irsp->un.ulpWord[1],
  1303. irsp->un.ulpWord[2],
  1304. irsp->un.ulpWord[3],
  1305. irsp->un.ulpWord[4],
  1306. irsp->un.ulpWord[5],
  1307. *(((uint32_t *) irsp) + 6),
  1308. *(((uint32_t *) irsp) + 7));
  1309. }
  1310. switch (type) {
  1311. case LPFC_ABORT_IOCB:
  1312. case LPFC_SOL_IOCB:
  1313. /*
  1314. * Idle exchange closed via ABTS from port. No iocb
  1315. * resources need to be recovered.
  1316. */
  1317. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1318. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1319. "0333 IOCB cmd 0x%x"
  1320. " processed. Skipping"
  1321. " completion\n",
  1322. irsp->ulpCommand);
  1323. break;
  1324. }
  1325. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1326. &rspiocbq);
  1327. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1328. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1329. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1330. &rspiocbq);
  1331. } else {
  1332. spin_unlock_irqrestore(&phba->hbalock,
  1333. iflag);
  1334. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1335. &rspiocbq);
  1336. spin_lock_irqsave(&phba->hbalock,
  1337. iflag);
  1338. }
  1339. }
  1340. break;
  1341. case LPFC_UNSOL_IOCB:
  1342. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1343. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1344. spin_lock_irqsave(&phba->hbalock, iflag);
  1345. break;
  1346. default:
  1347. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1348. char adaptermsg[LPFC_MAX_ADPTMSG];
  1349. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1350. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1351. MAX_MSG_DATA);
  1352. dev_warn(&((phba->pcidev)->dev),
  1353. "lpfc%d: %s\n",
  1354. phba->brd_no, adaptermsg);
  1355. } else {
  1356. /* Unknown IOCB command */
  1357. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1358. "0334 Unknown IOCB command "
  1359. "Data: x%x, x%x x%x x%x x%x\n",
  1360. type, irsp->ulpCommand,
  1361. irsp->ulpStatus,
  1362. irsp->ulpIoTag,
  1363. irsp->ulpContext);
  1364. }
  1365. break;
  1366. }
  1367. /*
  1368. * The response IOCB has been processed. Update the ring
  1369. * pointer in SLIM. If the port response put pointer has not
  1370. * been updated, sync the pgp->rspPutInx and fetch the new port
  1371. * response put pointer.
  1372. */
  1373. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1374. if (pring->rspidx == portRspPut)
  1375. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1376. }
  1377. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1378. pring->stats.iocb_rsp_full++;
  1379. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1380. writel(status, phba->CAregaddr);
  1381. readl(phba->CAregaddr);
  1382. }
  1383. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1384. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1385. pring->stats.iocb_cmd_empty++;
  1386. /* Force update of the local copy of cmdGetInx */
  1387. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1388. lpfc_sli_resume_iocb(phba, pring);
  1389. if ((pring->lpfc_sli_cmd_available))
  1390. (pring->lpfc_sli_cmd_available) (phba, pring);
  1391. }
  1392. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1393. return rc;
  1394. }
  1395. int
  1396. lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
  1397. struct lpfc_sli_ring *pring, uint32_t mask)
  1398. {
  1399. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1400. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1401. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1402. IOCB_t *entry;
  1403. IOCB_t *irsp = NULL;
  1404. struct lpfc_iocbq *rspiocbp = NULL;
  1405. struct lpfc_iocbq *next_iocb;
  1406. struct lpfc_iocbq *cmdiocbp;
  1407. struct lpfc_iocbq *saveq;
  1408. uint8_t iocb_cmd_type;
  1409. lpfc_iocb_type type;
  1410. uint32_t status, free_saveq;
  1411. uint32_t portRspPut, portRspMax;
  1412. int rc = 1;
  1413. unsigned long iflag;
  1414. spin_lock_irqsave(&phba->hbalock, iflag);
  1415. pring->stats.iocb_event++;
  1416. /*
  1417. * The next available response entry should never exceed the maximum
  1418. * entries. If it does, treat it as an adapter hardware error.
  1419. */
  1420. portRspMax = pring->numRiocb;
  1421. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1422. if (portRspPut >= portRspMax) {
  1423. /*
  1424. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1425. * rsp ring <portRspMax>
  1426. */
  1427. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1428. "0303 Ring %d handler: portRspPut %d "
  1429. "is bigger then rsp ring %d\n",
  1430. pring->ringno, portRspPut, portRspMax);
  1431. phba->link_state = LPFC_HBA_ERROR;
  1432. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1433. phba->work_hs = HS_FFER3;
  1434. lpfc_handle_eratt(phba);
  1435. return 1;
  1436. }
  1437. rmb();
  1438. while (pring->rspidx != portRspPut) {
  1439. /*
  1440. * Build a completion list and call the appropriate handler.
  1441. * The process is to get the next available response iocb, get
  1442. * a free iocb from the list, copy the response data into the
  1443. * free iocb, insert to the continuation list, and update the
  1444. * next response index to slim. This process makes response
  1445. * iocb's in the ring available to DMA as fast as possible but
  1446. * pays a penalty for a copy operation. Since the iocb is
  1447. * only 32 bytes, this penalty is considered small relative to
  1448. * the PCI reads for register values and a slim write. When
  1449. * the ulpLe field is set, the entire Command has been
  1450. * received.
  1451. */
  1452. entry = lpfc_resp_iocb(phba, pring);
  1453. phba->last_completion_time = jiffies;
  1454. rspiocbp = __lpfc_sli_get_iocbq(phba);
  1455. if (rspiocbp == NULL) {
  1456. printk(KERN_ERR "%s: out of buffers! Failing "
  1457. "completion.\n", __FUNCTION__);
  1458. break;
  1459. }
  1460. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
  1461. phba->iocb_rsp_size);
  1462. irsp = &rspiocbp->iocb;
  1463. if (++pring->rspidx >= portRspMax)
  1464. pring->rspidx = 0;
  1465. if (pring->ringno == LPFC_ELS_RING) {
  1466. lpfc_debugfs_slow_ring_trc(phba,
  1467. "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  1468. *(((uint32_t *) irsp) + 4),
  1469. *(((uint32_t *) irsp) + 6),
  1470. *(((uint32_t *) irsp) + 7));
  1471. }
  1472. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1473. list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
  1474. pring->iocb_continueq_cnt++;
  1475. if (irsp->ulpLe) {
  1476. /*
  1477. * By default, the driver expects to free all resources
  1478. * associated with this iocb completion.
  1479. */
  1480. free_saveq = 1;
  1481. saveq = list_get_first(&pring->iocb_continueq,
  1482. struct lpfc_iocbq, list);
  1483. irsp = &(saveq->iocb);
  1484. list_del_init(&pring->iocb_continueq);
  1485. pring->iocb_continueq_cnt = 0;
  1486. pring->stats.iocb_rsp++;
  1487. /*
  1488. * If resource errors reported from HBA, reduce
  1489. * queuedepths of the SCSI device.
  1490. */
  1491. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1492. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1493. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1494. lpfc_adjust_queue_depth(phba);
  1495. spin_lock_irqsave(&phba->hbalock, iflag);
  1496. }
  1497. if (irsp->ulpStatus) {
  1498. /* Rsp ring <ringno> error: IOCB */
  1499. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1500. "0328 Rsp Ring %d error: "
  1501. "IOCB Data: "
  1502. "x%x x%x x%x x%x "
  1503. "x%x x%x x%x x%x "
  1504. "x%x x%x x%x x%x "
  1505. "x%x x%x x%x x%x\n",
  1506. pring->ringno,
  1507. irsp->un.ulpWord[0],
  1508. irsp->un.ulpWord[1],
  1509. irsp->un.ulpWord[2],
  1510. irsp->un.ulpWord[3],
  1511. irsp->un.ulpWord[4],
  1512. irsp->un.ulpWord[5],
  1513. *(((uint32_t *) irsp) + 6),
  1514. *(((uint32_t *) irsp) + 7),
  1515. *(((uint32_t *) irsp) + 8),
  1516. *(((uint32_t *) irsp) + 9),
  1517. *(((uint32_t *) irsp) + 10),
  1518. *(((uint32_t *) irsp) + 11),
  1519. *(((uint32_t *) irsp) + 12),
  1520. *(((uint32_t *) irsp) + 13),
  1521. *(((uint32_t *) irsp) + 14),
  1522. *(((uint32_t *) irsp) + 15));
  1523. }
  1524. /*
  1525. * Fetch the IOCB command type and call the correct
  1526. * completion routine. Solicited and Unsolicited
  1527. * IOCBs on the ELS ring get freed back to the
  1528. * lpfc_iocb_list by the discovery kernel thread.
  1529. */
  1530. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1531. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1532. if (type == LPFC_SOL_IOCB) {
  1533. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1534. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1535. saveq);
  1536. spin_lock_irqsave(&phba->hbalock, iflag);
  1537. } else if (type == LPFC_UNSOL_IOCB) {
  1538. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1539. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1540. saveq);
  1541. spin_lock_irqsave(&phba->hbalock, iflag);
  1542. if (!rc)
  1543. free_saveq = 0;
  1544. } else if (type == LPFC_ABORT_IOCB) {
  1545. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1546. ((cmdiocbp =
  1547. lpfc_sli_iocbq_lookup(phba, pring,
  1548. saveq)))) {
  1549. /* Call the specified completion
  1550. routine */
  1551. if (cmdiocbp->iocb_cmpl) {
  1552. spin_unlock_irqrestore(
  1553. &phba->hbalock,
  1554. iflag);
  1555. (cmdiocbp->iocb_cmpl) (phba,
  1556. cmdiocbp, saveq);
  1557. spin_lock_irqsave(
  1558. &phba->hbalock,
  1559. iflag);
  1560. } else
  1561. __lpfc_sli_release_iocbq(phba,
  1562. cmdiocbp);
  1563. }
  1564. } else if (type == LPFC_UNKNOWN_IOCB) {
  1565. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1566. char adaptermsg[LPFC_MAX_ADPTMSG];
  1567. memset(adaptermsg, 0,
  1568. LPFC_MAX_ADPTMSG);
  1569. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1570. MAX_MSG_DATA);
  1571. dev_warn(&((phba->pcidev)->dev),
  1572. "lpfc%d: %s\n",
  1573. phba->brd_no, adaptermsg);
  1574. } else {
  1575. /* Unknown IOCB command */
  1576. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1577. "0335 Unknown IOCB "
  1578. "command Data: x%x "
  1579. "x%x x%x x%x\n",
  1580. irsp->ulpCommand,
  1581. irsp->ulpStatus,
  1582. irsp->ulpIoTag,
  1583. irsp->ulpContext);
  1584. }
  1585. }
  1586. if (free_saveq) {
  1587. list_for_each_entry_safe(rspiocbp, next_iocb,
  1588. &saveq->list, list) {
  1589. list_del(&rspiocbp->list);
  1590. __lpfc_sli_release_iocbq(phba,
  1591. rspiocbp);
  1592. }
  1593. __lpfc_sli_release_iocbq(phba, saveq);
  1594. }
  1595. rspiocbp = NULL;
  1596. }
  1597. /*
  1598. * If the port response put pointer has not been updated, sync
  1599. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1600. * response put pointer.
  1601. */
  1602. if (pring->rspidx == portRspPut) {
  1603. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1604. }
  1605. } /* while (pring->rspidx != portRspPut) */
  1606. if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
  1607. /* At least one response entry has been freed */
  1608. pring->stats.iocb_rsp_full++;
  1609. /* SET RxRE_RSP in Chip Att register */
  1610. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1611. writel(status, phba->CAregaddr);
  1612. readl(phba->CAregaddr); /* flush */
  1613. }
  1614. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1615. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1616. pring->stats.iocb_cmd_empty++;
  1617. /* Force update of the local copy of cmdGetInx */
  1618. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1619. lpfc_sli_resume_iocb(phba, pring);
  1620. if ((pring->lpfc_sli_cmd_available))
  1621. (pring->lpfc_sli_cmd_available) (phba, pring);
  1622. }
  1623. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1624. return rc;
  1625. }
  1626. void
  1627. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1628. {
  1629. LIST_HEAD(completions);
  1630. struct lpfc_iocbq *iocb, *next_iocb;
  1631. IOCB_t *cmd = NULL;
  1632. if (pring->ringno == LPFC_ELS_RING) {
  1633. lpfc_fabric_abort_hba(phba);
  1634. }
  1635. /* Error everything on txq and txcmplq
  1636. * First do the txq.
  1637. */
  1638. spin_lock_irq(&phba->hbalock);
  1639. list_splice_init(&pring->txq, &completions);
  1640. pring->txq_cnt = 0;
  1641. /* Next issue ABTS for everything on the txcmplq */
  1642. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1643. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1644. spin_unlock_irq(&phba->hbalock);
  1645. while (!list_empty(&completions)) {
  1646. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1647. cmd = &iocb->iocb;
  1648. list_del_init(&iocb->list);
  1649. if (!iocb->iocb_cmpl)
  1650. lpfc_sli_release_iocbq(phba, iocb);
  1651. else {
  1652. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1653. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1654. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1655. }
  1656. }
  1657. }
  1658. int
  1659. lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
  1660. {
  1661. uint32_t status;
  1662. int i = 0;
  1663. int retval = 0;
  1664. /* Read the HBA Host Status Register */
  1665. status = readl(phba->HSregaddr);
  1666. /*
  1667. * Check status register every 100ms for 5 retries, then every
  1668. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1669. * every 2.5 sec for 4.
  1670. * Break our of the loop if errors occurred during init.
  1671. */
  1672. while (((status & mask) != mask) &&
  1673. !(status & HS_FFERM) &&
  1674. i++ < 20) {
  1675. if (i <= 5)
  1676. msleep(10);
  1677. else if (i <= 10)
  1678. msleep(500);
  1679. else
  1680. msleep(2500);
  1681. if (i == 15) {
  1682. /* Do post */
  1683. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1684. lpfc_sli_brdrestart(phba);
  1685. }
  1686. /* Read the HBA Host Status Register */
  1687. status = readl(phba->HSregaddr);
  1688. }
  1689. /* Check to see if any errors occurred during init */
  1690. if ((status & HS_FFERM) || (i >= 20)) {
  1691. phba->link_state = LPFC_HBA_ERROR;
  1692. retval = 1;
  1693. }
  1694. return retval;
  1695. }
  1696. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1697. void lpfc_reset_barrier(struct lpfc_hba *phba)
  1698. {
  1699. uint32_t __iomem *resp_buf;
  1700. uint32_t __iomem *mbox_buf;
  1701. volatile uint32_t mbox;
  1702. uint32_t hc_copy;
  1703. int i;
  1704. uint8_t hdrtype;
  1705. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1706. if (hdrtype != 0x80 ||
  1707. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1708. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1709. return;
  1710. /*
  1711. * Tell the other part of the chip to suspend temporarily all
  1712. * its DMA activity.
  1713. */
  1714. resp_buf = phba->MBslimaddr;
  1715. /* Disable the error attention */
  1716. hc_copy = readl(phba->HCregaddr);
  1717. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1718. readl(phba->HCregaddr); /* flush */
  1719. phba->link_flag |= LS_IGNORE_ERATT;
  1720. if (readl(phba->HAregaddr) & HA_ERATT) {
  1721. /* Clear Chip error bit */
  1722. writel(HA_ERATT, phba->HAregaddr);
  1723. phba->pport->stopped = 1;
  1724. }
  1725. mbox = 0;
  1726. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1727. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1728. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1729. mbox_buf = phba->MBslimaddr;
  1730. writel(mbox, mbox_buf);
  1731. for (i = 0;
  1732. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1733. mdelay(1);
  1734. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1735. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1736. phba->pport->stopped)
  1737. goto restore_hc;
  1738. else
  1739. goto clear_errat;
  1740. }
  1741. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1742. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1743. mdelay(1);
  1744. clear_errat:
  1745. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1746. mdelay(1);
  1747. if (readl(phba->HAregaddr) & HA_ERATT) {
  1748. writel(HA_ERATT, phba->HAregaddr);
  1749. phba->pport->stopped = 1;
  1750. }
  1751. restore_hc:
  1752. phba->link_flag &= ~LS_IGNORE_ERATT;
  1753. writel(hc_copy, phba->HCregaddr);
  1754. readl(phba->HCregaddr); /* flush */
  1755. }
  1756. int
  1757. lpfc_sli_brdkill(struct lpfc_hba *phba)
  1758. {
  1759. struct lpfc_sli *psli;
  1760. LPFC_MBOXQ_t *pmb;
  1761. uint32_t status;
  1762. uint32_t ha_copy;
  1763. int retval;
  1764. int i = 0;
  1765. psli = &phba->sli;
  1766. /* Kill HBA */
  1767. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1768. "0329 Kill HBA Data: x%x x%x\n",
  1769. phba->pport->port_state, psli->sli_flag);
  1770. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1771. if (!pmb)
  1772. return 1;
  1773. /* Disable the error attention */
  1774. spin_lock_irq(&phba->hbalock);
  1775. status = readl(phba->HCregaddr);
  1776. status &= ~HC_ERINT_ENA;
  1777. writel(status, phba->HCregaddr);
  1778. readl(phba->HCregaddr); /* flush */
  1779. phba->link_flag |= LS_IGNORE_ERATT;
  1780. spin_unlock_irq(&phba->hbalock);
  1781. lpfc_kill_board(phba, pmb);
  1782. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1783. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1784. if (retval != MBX_SUCCESS) {
  1785. if (retval != MBX_BUSY)
  1786. mempool_free(pmb, phba->mbox_mem_pool);
  1787. spin_lock_irq(&phba->hbalock);
  1788. phba->link_flag &= ~LS_IGNORE_ERATT;
  1789. spin_unlock_irq(&phba->hbalock);
  1790. return 1;
  1791. }
  1792. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1793. mempool_free(pmb, phba->mbox_mem_pool);
  1794. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1795. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1796. * 3 seconds we still set HBA_ERROR state because the status of the
  1797. * board is now undefined.
  1798. */
  1799. ha_copy = readl(phba->HAregaddr);
  1800. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1801. mdelay(100);
  1802. ha_copy = readl(phba->HAregaddr);
  1803. }
  1804. del_timer_sync(&psli->mbox_tmo);
  1805. if (ha_copy & HA_ERATT) {
  1806. writel(HA_ERATT, phba->HAregaddr);
  1807. phba->pport->stopped = 1;
  1808. }
  1809. spin_lock_irq(&phba->hbalock);
  1810. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1811. phba->link_flag &= ~LS_IGNORE_ERATT;
  1812. spin_unlock_irq(&phba->hbalock);
  1813. psli->mbox_active = NULL;
  1814. lpfc_hba_down_post(phba);
  1815. phba->link_state = LPFC_HBA_ERROR;
  1816. return ha_copy & HA_ERATT ? 0 : 1;
  1817. }
  1818. int
  1819. lpfc_sli_brdreset(struct lpfc_hba *phba)
  1820. {
  1821. struct lpfc_sli *psli;
  1822. struct lpfc_sli_ring *pring;
  1823. uint16_t cfg_value;
  1824. int i;
  1825. psli = &phba->sli;
  1826. /* Reset HBA */
  1827. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1828. "0325 Reset HBA Data: x%x x%x\n",
  1829. phba->pport->port_state, psli->sli_flag);
  1830. /* perform board reset */
  1831. phba->fc_eventTag = 0;
  1832. phba->pport->fc_myDID = 0;
  1833. phba->pport->fc_prevDID = 0;
  1834. /* Turn off parity checking and serr during the physical reset */
  1835. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1836. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1837. (cfg_value &
  1838. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1839. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1840. /* Now toggle INITFF bit in the Host Control Register */
  1841. writel(HC_INITFF, phba->HCregaddr);
  1842. mdelay(1);
  1843. readl(phba->HCregaddr); /* flush */
  1844. writel(0, phba->HCregaddr);
  1845. readl(phba->HCregaddr); /* flush */
  1846. /* Restore PCI cmd register */
  1847. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1848. /* Initialize relevant SLI info */
  1849. for (i = 0; i < psli->num_rings; i++) {
  1850. pring = &psli->ring[i];
  1851. pring->flag = 0;
  1852. pring->rspidx = 0;
  1853. pring->next_cmdidx = 0;
  1854. pring->local_getidx = 0;
  1855. pring->cmdidx = 0;
  1856. pring->missbufcnt = 0;
  1857. }
  1858. phba->link_state = LPFC_WARM_START;
  1859. return 0;
  1860. }
  1861. int
  1862. lpfc_sli_brdrestart(struct lpfc_hba *phba)
  1863. {
  1864. MAILBOX_t *mb;
  1865. struct lpfc_sli *psli;
  1866. uint16_t skip_post;
  1867. volatile uint32_t word0;
  1868. void __iomem *to_slim;
  1869. spin_lock_irq(&phba->hbalock);
  1870. psli = &phba->sli;
  1871. /* Restart HBA */
  1872. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1873. "0337 Restart HBA Data: x%x x%x\n",
  1874. phba->pport->port_state, psli->sli_flag);
  1875. word0 = 0;
  1876. mb = (MAILBOX_t *) &word0;
  1877. mb->mbxCommand = MBX_RESTART;
  1878. mb->mbxHc = 1;
  1879. lpfc_reset_barrier(phba);
  1880. to_slim = phba->MBslimaddr;
  1881. writel(*(uint32_t *) mb, to_slim);
  1882. readl(to_slim); /* flush */
  1883. /* Only skip post after fc_ffinit is completed */
  1884. if (phba->pport->port_state) {
  1885. skip_post = 1;
  1886. word0 = 1; /* This is really setting up word1 */
  1887. } else {
  1888. skip_post = 0;
  1889. word0 = 0; /* This is really setting up word1 */
  1890. }
  1891. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1892. writel(*(uint32_t *) mb, to_slim);
  1893. readl(to_slim); /* flush */
  1894. lpfc_sli_brdreset(phba);
  1895. phba->pport->stopped = 0;
  1896. phba->link_state = LPFC_INIT_START;
  1897. spin_unlock_irq(&phba->hbalock);
  1898. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1899. psli->stats_start = get_seconds();
  1900. if (skip_post)
  1901. mdelay(100);
  1902. else
  1903. mdelay(2000);
  1904. lpfc_hba_down_post(phba);
  1905. return 0;
  1906. }
  1907. static int
  1908. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1909. {
  1910. uint32_t status, i = 0;
  1911. /* Read the HBA Host Status Register */
  1912. status = readl(phba->HSregaddr);
  1913. /* Check status register to see what current state is */
  1914. i = 0;
  1915. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1916. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1917. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1918. * 4.
  1919. */
  1920. if (i++ >= 20) {
  1921. /* Adapter failed to init, timeout, status reg
  1922. <status> */
  1923. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1924. "0436 Adapter failed to init, "
  1925. "timeout, status reg x%x, "
  1926. "FW Data: A8 x%x AC x%x\n", status,
  1927. readl(phba->MBslimaddr + 0xa8),
  1928. readl(phba->MBslimaddr + 0xac));
  1929. phba->link_state = LPFC_HBA_ERROR;
  1930. return -ETIMEDOUT;
  1931. }
  1932. /* Check to see if any errors occurred during init */
  1933. if (status & HS_FFERM) {
  1934. /* ERROR: During chipset initialization */
  1935. /* Adapter failed to init, chipset, status reg
  1936. <status> */
  1937. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1938. "0437 Adapter failed to init, "
  1939. "chipset, status reg x%x, "
  1940. "FW Data: A8 x%x AC x%x\n", status,
  1941. readl(phba->MBslimaddr + 0xa8),
  1942. readl(phba->MBslimaddr + 0xac));
  1943. phba->link_state = LPFC_HBA_ERROR;
  1944. return -EIO;
  1945. }
  1946. if (i <= 5) {
  1947. msleep(10);
  1948. } else if (i <= 10) {
  1949. msleep(500);
  1950. } else {
  1951. msleep(2500);
  1952. }
  1953. if (i == 15) {
  1954. /* Do post */
  1955. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1956. lpfc_sli_brdrestart(phba);
  1957. }
  1958. /* Read the HBA Host Status Register */
  1959. status = readl(phba->HSregaddr);
  1960. }
  1961. /* Check to see if any errors occurred during init */
  1962. if (status & HS_FFERM) {
  1963. /* ERROR: During chipset initialization */
  1964. /* Adapter failed to init, chipset, status reg <status> */
  1965. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1966. "0438 Adapter failed to init, chipset, "
  1967. "status reg x%x, "
  1968. "FW Data: A8 x%x AC x%x\n", status,
  1969. readl(phba->MBslimaddr + 0xa8),
  1970. readl(phba->MBslimaddr + 0xac));
  1971. phba->link_state = LPFC_HBA_ERROR;
  1972. return -EIO;
  1973. }
  1974. /* Clear all interrupt enable conditions */
  1975. writel(0, phba->HCregaddr);
  1976. readl(phba->HCregaddr); /* flush */
  1977. /* setup host attn register */
  1978. writel(0xffffffff, phba->HAregaddr);
  1979. readl(phba->HAregaddr); /* flush */
  1980. return 0;
  1981. }
  1982. int
  1983. lpfc_sli_hbq_count(void)
  1984. {
  1985. return ARRAY_SIZE(lpfc_hbq_defs);
  1986. }
  1987. static int
  1988. lpfc_sli_hbq_entry_count(void)
  1989. {
  1990. int hbq_count = lpfc_sli_hbq_count();
  1991. int count = 0;
  1992. int i;
  1993. for (i = 0; i < hbq_count; ++i)
  1994. count += lpfc_hbq_defs[i]->entry_count;
  1995. return count;
  1996. }
  1997. int
  1998. lpfc_sli_hbq_size(void)
  1999. {
  2000. return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
  2001. }
  2002. static int
  2003. lpfc_sli_hbq_setup(struct lpfc_hba *phba)
  2004. {
  2005. int hbq_count = lpfc_sli_hbq_count();
  2006. LPFC_MBOXQ_t *pmb;
  2007. MAILBOX_t *pmbox;
  2008. uint32_t hbqno;
  2009. uint32_t hbq_entry_index;
  2010. /* Get a Mailbox buffer to setup mailbox
  2011. * commands for HBA initialization
  2012. */
  2013. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  2014. if (!pmb)
  2015. return -ENOMEM;
  2016. pmbox = &pmb->mb;
  2017. /* Initialize the struct lpfc_sli_hbq structure for each hbq */
  2018. phba->link_state = LPFC_INIT_MBX_CMDS;
  2019. hbq_entry_index = 0;
  2020. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  2021. phba->hbqs[hbqno].next_hbqPutIdx = 0;
  2022. phba->hbqs[hbqno].hbqPutIdx = 0;
  2023. phba->hbqs[hbqno].local_hbqGetIdx = 0;
  2024. phba->hbqs[hbqno].entry_count =
  2025. lpfc_hbq_defs[hbqno]->entry_count;
  2026. lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
  2027. hbq_entry_index, pmb);
  2028. hbq_entry_index += phba->hbqs[hbqno].entry_count;
  2029. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  2030. /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
  2031. mbxStatus <status>, ring <num> */
  2032. lpfc_printf_log(phba, KERN_ERR,
  2033. LOG_SLI | LOG_VPORT,
  2034. "1805 Adapter failed to init. "
  2035. "Data: x%x x%x x%x\n",
  2036. pmbox->mbxCommand,
  2037. pmbox->mbxStatus, hbqno);
  2038. phba->link_state = LPFC_HBA_ERROR;
  2039. mempool_free(pmb, phba->mbox_mem_pool);
  2040. return ENXIO;
  2041. }
  2042. }
  2043. phba->hbq_count = hbq_count;
  2044. mempool_free(pmb, phba->mbox_mem_pool);
  2045. /* Initially populate or replenish the HBQs */
  2046. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  2047. if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
  2048. return -ENOMEM;
  2049. }
  2050. return 0;
  2051. }
  2052. static int
  2053. lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
  2054. {
  2055. LPFC_MBOXQ_t *pmb;
  2056. uint32_t resetcount = 0, rc = 0, done = 0;
  2057. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  2058. if (!pmb) {
  2059. phba->link_state = LPFC_HBA_ERROR;
  2060. return -ENOMEM;
  2061. }
  2062. phba->sli_rev = sli_mode;
  2063. while (resetcount < 2 && !done) {
  2064. spin_lock_irq(&phba->hbalock);
  2065. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2066. spin_unlock_irq(&phba->hbalock);
  2067. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  2068. lpfc_sli_brdrestart(phba);
  2069. msleep(2500);
  2070. rc = lpfc_sli_chipset_init(phba);
  2071. if (rc)
  2072. break;
  2073. spin_lock_irq(&phba->hbalock);
  2074. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2075. spin_unlock_irq(&phba->hbalock);
  2076. resetcount++;
  2077. /* Call pre CONFIG_PORT mailbox command initialization. A
  2078. * value of 0 means the call was successful. Any other
  2079. * nonzero value is a failure, but if ERESTART is returned,
  2080. * the driver may reset the HBA and try again.
  2081. */
  2082. rc = lpfc_config_port_prep(phba);
  2083. if (rc == -ERESTART) {
  2084. phba->link_state = LPFC_LINK_UNKNOWN;
  2085. continue;
  2086. } else if (rc) {
  2087. break;
  2088. }
  2089. phba->link_state = LPFC_INIT_MBX_CMDS;
  2090. lpfc_config_port(phba, pmb);
  2091. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  2092. if (rc != MBX_SUCCESS) {
  2093. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2094. "0442 Adapter failed to init, mbxCmd x%x "
  2095. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  2096. pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
  2097. spin_lock_irq(&phba->hbalock);
  2098. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  2099. spin_unlock_irq(&phba->hbalock);
  2100. rc = -ENXIO;
  2101. } else {
  2102. done = 1;
  2103. phba->max_vpi = (phba->max_vpi &&
  2104. pmb->mb.un.varCfgPort.gmv) != 0
  2105. ? pmb->mb.un.varCfgPort.max_vpi
  2106. : 0;
  2107. }
  2108. }
  2109. if (!done) {
  2110. rc = -EINVAL;
  2111. goto do_prep_failed;
  2112. }
  2113. if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
  2114. (!pmb->mb.un.varCfgPort.cMA)) {
  2115. rc = -ENXIO;
  2116. }
  2117. do_prep_failed:
  2118. mempool_free(pmb, phba->mbox_mem_pool);
  2119. return rc;
  2120. }
  2121. int
  2122. lpfc_sli_hba_setup(struct lpfc_hba *phba)
  2123. {
  2124. uint32_t rc;
  2125. int mode = 3;
  2126. switch (lpfc_sli_mode) {
  2127. case 2:
  2128. if (phba->cfg_enable_npiv) {
  2129. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2130. "1824 NPIV enabled: Override lpfc_sli_mode "
  2131. "parameter (%d) to auto (0).\n",
  2132. lpfc_sli_mode);
  2133. break;
  2134. }
  2135. mode = 2;
  2136. break;
  2137. case 0:
  2138. case 3:
  2139. break;
  2140. default:
  2141. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2142. "1819 Unrecognized lpfc_sli_mode "
  2143. "parameter: %d.\n", lpfc_sli_mode);
  2144. break;
  2145. }
  2146. rc = lpfc_do_config_port(phba, mode);
  2147. if (rc && lpfc_sli_mode == 3)
  2148. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2149. "1820 Unable to select SLI-3. "
  2150. "Not supported by adapter.\n");
  2151. if (rc && mode != 2)
  2152. rc = lpfc_do_config_port(phba, 2);
  2153. if (rc)
  2154. goto lpfc_sli_hba_setup_error;
  2155. if (phba->sli_rev == 3) {
  2156. phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
  2157. phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
  2158. phba->sli3_options |= LPFC_SLI3_ENABLED;
  2159. phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
  2160. } else {
  2161. phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
  2162. phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
  2163. phba->sli3_options = 0;
  2164. }
  2165. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2166. "0444 Firmware in SLI %x mode. Max_vpi %d\n",
  2167. phba->sli_rev, phba->max_vpi);
  2168. rc = lpfc_sli_ring_map(phba);
  2169. if (rc)
  2170. goto lpfc_sli_hba_setup_error;
  2171. /* Init HBQs */
  2172. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  2173. rc = lpfc_sli_hbq_setup(phba);
  2174. if (rc)
  2175. goto lpfc_sli_hba_setup_error;
  2176. }
  2177. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  2178. rc = lpfc_config_port_post(phba);
  2179. if (rc)
  2180. goto lpfc_sli_hba_setup_error;
  2181. return rc;
  2182. lpfc_sli_hba_setup_error:
  2183. phba->link_state = LPFC_HBA_ERROR;
  2184. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2185. "0445 Firmware initialization failed\n");
  2186. return rc;
  2187. }
  2188. /*! lpfc_mbox_timeout
  2189. *
  2190. * \pre
  2191. * \post
  2192. * \param hba Pointer to per struct lpfc_hba structure
  2193. * \param l1 Pointer to the driver's mailbox queue.
  2194. * \return
  2195. * void
  2196. *
  2197. * \b Description:
  2198. *
  2199. * This routine handles mailbox timeout events at timer interrupt context.
  2200. */
  2201. void
  2202. lpfc_mbox_timeout(unsigned long ptr)
  2203. {
  2204. struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
  2205. unsigned long iflag;
  2206. uint32_t tmo_posted;
  2207. spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
  2208. tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
  2209. if (!tmo_posted)
  2210. phba->pport->work_port_events |= WORKER_MBOX_TMO;
  2211. spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
  2212. if (!tmo_posted) {
  2213. spin_lock_irqsave(&phba->hbalock, iflag);
  2214. if (phba->work_wait)
  2215. lpfc_worker_wake_up(phba);
  2216. spin_unlock_irqrestore(&phba->hbalock, iflag);
  2217. }
  2218. }
  2219. void
  2220. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  2221. {
  2222. LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
  2223. MAILBOX_t *mb = &pmbox->mb;
  2224. struct lpfc_sli *psli = &phba->sli;
  2225. struct lpfc_sli_ring *pring;
  2226. if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
  2227. return;
  2228. }
  2229. /* Mbox cmd <mbxCommand> timeout */
  2230. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2231. "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  2232. mb->mbxCommand,
  2233. phba->pport->port_state,
  2234. phba->sli.sli_flag,
  2235. phba->sli.mbox_active);
  2236. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  2237. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  2238. * it to fail all oustanding SCSI IO.
  2239. */
  2240. spin_lock_irq(&phba->pport->work_port_lock);
  2241. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2242. spin_unlock_irq(&phba->pport->work_port_lock);
  2243. spin_lock_irq(&phba->hbalock);
  2244. phba->link_state = LPFC_LINK_UNKNOWN;
  2245. phba->pport->fc_flag |= FC_ESTABLISH_LINK;
  2246. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  2247. spin_unlock_irq(&phba->hbalock);
  2248. pring = &psli->ring[psli->fcp_ring];
  2249. lpfc_sli_abort_iocb_ring(phba, pring);
  2250. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2251. "0345 Resetting board due to mailbox timeout\n");
  2252. /*
  2253. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  2254. * on oustanding mailbox commands.
  2255. */
  2256. /* If resets are disabled then set error state and return. */
  2257. if (!phba->cfg_enable_hba_reset) {
  2258. phba->link_state = LPFC_HBA_ERROR;
  2259. return;
  2260. }
  2261. lpfc_offline_prep(phba);
  2262. lpfc_offline(phba);
  2263. lpfc_sli_brdrestart(phba);
  2264. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  2265. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  2266. lpfc_unblock_mgmt_io(phba);
  2267. return;
  2268. }
  2269. int
  2270. lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
  2271. {
  2272. MAILBOX_t *mb;
  2273. struct lpfc_sli *psli = &phba->sli;
  2274. uint32_t status, evtctr;
  2275. uint32_t ha_copy;
  2276. int i;
  2277. unsigned long timeout;
  2278. unsigned long drvr_flag = 0;
  2279. volatile uint32_t word0, ldata;
  2280. void __iomem *to_slim;
  2281. if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
  2282. pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
  2283. if(!pmbox->vport) {
  2284. lpfc_printf_log(phba, KERN_ERR,
  2285. LOG_MBOX | LOG_VPORT,
  2286. "1806 Mbox x%x failed. No vport\n",
  2287. pmbox->mb.mbxCommand);
  2288. dump_stack();
  2289. return MBX_NOT_FINISHED;
  2290. }
  2291. }
  2292. /* If the PCI channel is in offline state, do not post mbox. */
  2293. if (unlikely(pci_channel_offline(phba->pcidev)))
  2294. return MBX_NOT_FINISHED;
  2295. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2296. psli = &phba->sli;
  2297. mb = &pmbox->mb;
  2298. status = MBX_SUCCESS;
  2299. if (phba->link_state == LPFC_HBA_ERROR) {
  2300. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2301. /* Mbox command <mbxCommand> cannot issue */
  2302. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2303. return MBX_NOT_FINISHED;
  2304. }
  2305. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  2306. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  2307. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2308. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2309. return MBX_NOT_FINISHED;
  2310. }
  2311. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  2312. /* Polling for a mbox command when another one is already active
  2313. * is not allowed in SLI. Also, the driver must have established
  2314. * SLI2 mode to queue and process multiple mbox commands.
  2315. */
  2316. if (flag & MBX_POLL) {
  2317. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2318. /* Mbox command <mbxCommand> cannot issue */
  2319. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2320. return MBX_NOT_FINISHED;
  2321. }
  2322. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  2323. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2324. /* Mbox command <mbxCommand> cannot issue */
  2325. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2326. return MBX_NOT_FINISHED;
  2327. }
  2328. /* Another mailbox command is still being processed, queue this
  2329. * command to be processed later.
  2330. */
  2331. lpfc_mbox_put(phba, pmbox);
  2332. /* Mbox cmd issue - BUSY */
  2333. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2334. "(%d):0308 Mbox cmd issue - BUSY Data: "
  2335. "x%x x%x x%x x%x\n",
  2336. pmbox->vport ? pmbox->vport->vpi : 0xffffff,
  2337. mb->mbxCommand, phba->pport->port_state,
  2338. psli->sli_flag, flag);
  2339. psli->slistat.mbox_busy++;
  2340. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2341. if (pmbox->vport) {
  2342. lpfc_debugfs_disc_trc(pmbox->vport,
  2343. LPFC_DISC_TRC_MBOX_VPORT,
  2344. "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
  2345. (uint32_t)mb->mbxCommand,
  2346. mb->un.varWords[0], mb->un.varWords[1]);
  2347. }
  2348. else {
  2349. lpfc_debugfs_disc_trc(phba->pport,
  2350. LPFC_DISC_TRC_MBOX,
  2351. "MBOX Bsy: cmd:x%x mb:x%x x%x",
  2352. (uint32_t)mb->mbxCommand,
  2353. mb->un.varWords[0], mb->un.varWords[1]);
  2354. }
  2355. return MBX_BUSY;
  2356. }
  2357. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2358. /* If we are not polling, we MUST be in SLI2 mode */
  2359. if (flag != MBX_POLL) {
  2360. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  2361. (mb->mbxCommand != MBX_KILL_BOARD)) {
  2362. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2363. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2364. /* Mbox command <mbxCommand> cannot issue */
  2365. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2366. return MBX_NOT_FINISHED;
  2367. }
  2368. /* timeout active mbox command */
  2369. mod_timer(&psli->mbox_tmo, (jiffies +
  2370. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  2371. }
  2372. /* Mailbox cmd <cmd> issue */
  2373. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2374. "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
  2375. "x%x\n",
  2376. pmbox->vport ? pmbox->vport->vpi : 0,
  2377. mb->mbxCommand, phba->pport->port_state,
  2378. psli->sli_flag, flag);
  2379. if (mb->mbxCommand != MBX_HEARTBEAT) {
  2380. if (pmbox->vport) {
  2381. lpfc_debugfs_disc_trc(pmbox->vport,
  2382. LPFC_DISC_TRC_MBOX_VPORT,
  2383. "MBOX Send vport: cmd:x%x mb:x%x x%x",
  2384. (uint32_t)mb->mbxCommand,
  2385. mb->un.varWords[0], mb->un.varWords[1]);
  2386. }
  2387. else {
  2388. lpfc_debugfs_disc_trc(phba->pport,
  2389. LPFC_DISC_TRC_MBOX,
  2390. "MBOX Send: cmd:x%x mb:x%x x%x",
  2391. (uint32_t)mb->mbxCommand,
  2392. mb->un.varWords[0], mb->un.varWords[1]);
  2393. }
  2394. }
  2395. psli->slistat.mbox_cmd++;
  2396. evtctr = psli->slistat.mbox_event;
  2397. /* next set own bit for the adapter and copy over command word */
  2398. mb->mbxOwner = OWN_CHIP;
  2399. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2400. /* First copy command data to host SLIM area */
  2401. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  2402. } else {
  2403. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2404. /* copy command data into host mbox for cmpl */
  2405. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  2406. MAILBOX_CMD_SIZE);
  2407. }
  2408. /* First copy mbox command data to HBA SLIM, skip past first
  2409. word */
  2410. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  2411. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  2412. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  2413. /* Next copy over first word, with mbxOwner set */
  2414. ldata = *((volatile uint32_t *)mb);
  2415. to_slim = phba->MBslimaddr;
  2416. writel(ldata, to_slim);
  2417. readl(to_slim); /* flush */
  2418. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2419. /* switch over to host mailbox */
  2420. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  2421. }
  2422. }
  2423. wmb();
  2424. switch (flag) {
  2425. case MBX_NOWAIT:
  2426. /* Set up reference to mailbox command */
  2427. psli->mbox_active = pmbox;
  2428. /* Interrupt board to do it */
  2429. writel(CA_MBATT, phba->CAregaddr);
  2430. readl(phba->CAregaddr); /* flush */
  2431. /* Don't wait for it to finish, just return */
  2432. break;
  2433. case MBX_POLL:
  2434. /* Set up null reference to mailbox command */
  2435. psli->mbox_active = NULL;
  2436. /* Interrupt board to do it */
  2437. writel(CA_MBATT, phba->CAregaddr);
  2438. readl(phba->CAregaddr); /* flush */
  2439. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2440. /* First read mbox status word */
  2441. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  2442. word0 = le32_to_cpu(word0);
  2443. } else {
  2444. /* First read mbox status word */
  2445. word0 = readl(phba->MBslimaddr);
  2446. }
  2447. /* Read the HBA Host Attention Register */
  2448. ha_copy = readl(phba->HAregaddr);
  2449. timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
  2450. mb->mbxCommand) *
  2451. 1000) + jiffies;
  2452. i = 0;
  2453. /* Wait for command to complete */
  2454. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2455. (!(ha_copy & HA_MBATT) &&
  2456. (phba->link_state > LPFC_WARM_START))) {
  2457. if (time_after(jiffies, timeout)) {
  2458. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2459. spin_unlock_irqrestore(&phba->hbalock,
  2460. drvr_flag);
  2461. return MBX_NOT_FINISHED;
  2462. }
  2463. /* Check if we took a mbox interrupt while we were
  2464. polling */
  2465. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2466. && (evtctr != psli->slistat.mbox_event))
  2467. break;
  2468. if (i++ > 10) {
  2469. spin_unlock_irqrestore(&phba->hbalock,
  2470. drvr_flag);
  2471. msleep(1);
  2472. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2473. }
  2474. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2475. /* First copy command data */
  2476. word0 = *((volatile uint32_t *)
  2477. &phba->slim2p->mbx);
  2478. word0 = le32_to_cpu(word0);
  2479. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2480. MAILBOX_t *slimmb;
  2481. volatile uint32_t slimword0;
  2482. /* Check real SLIM for any errors */
  2483. slimword0 = readl(phba->MBslimaddr);
  2484. slimmb = (MAILBOX_t *) & slimword0;
  2485. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2486. && slimmb->mbxStatus) {
  2487. psli->sli_flag &=
  2488. ~LPFC_SLI2_ACTIVE;
  2489. word0 = slimword0;
  2490. }
  2491. }
  2492. } else {
  2493. /* First copy command data */
  2494. word0 = readl(phba->MBslimaddr);
  2495. }
  2496. /* Read the HBA Host Attention Register */
  2497. ha_copy = readl(phba->HAregaddr);
  2498. }
  2499. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2500. /* copy results back to user */
  2501. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2502. MAILBOX_CMD_SIZE);
  2503. } else {
  2504. /* First copy command data */
  2505. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2506. MAILBOX_CMD_SIZE);
  2507. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2508. pmbox->context2) {
  2509. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2510. phba->MBslimaddr + DMP_RSP_OFFSET,
  2511. mb->un.varDmp.word_cnt);
  2512. }
  2513. }
  2514. writel(HA_MBATT, phba->HAregaddr);
  2515. readl(phba->HAregaddr); /* flush */
  2516. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2517. status = mb->mbxStatus;
  2518. }
  2519. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2520. return status;
  2521. }
  2522. /*
  2523. * Caller needs to hold lock.
  2524. */
  2525. static void
  2526. __lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2527. struct lpfc_iocbq *piocb)
  2528. {
  2529. /* Insert the caller's iocb in the txq tail for later processing. */
  2530. list_add_tail(&piocb->list, &pring->txq);
  2531. pring->txq_cnt++;
  2532. }
  2533. static struct lpfc_iocbq *
  2534. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2535. struct lpfc_iocbq **piocb)
  2536. {
  2537. struct lpfc_iocbq * nextiocb;
  2538. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2539. if (!nextiocb) {
  2540. nextiocb = *piocb;
  2541. *piocb = NULL;
  2542. }
  2543. return nextiocb;
  2544. }
  2545. /*
  2546. * Lockless version of lpfc_sli_issue_iocb.
  2547. */
  2548. static int
  2549. __lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2550. struct lpfc_iocbq *piocb, uint32_t flag)
  2551. {
  2552. struct lpfc_iocbq *nextiocb;
  2553. IOCB_t *iocb;
  2554. if (piocb->iocb_cmpl && (!piocb->vport) &&
  2555. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  2556. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  2557. lpfc_printf_log(phba, KERN_ERR,
  2558. LOG_SLI | LOG_VPORT,
  2559. "1807 IOCB x%x failed. No vport\n",
  2560. piocb->iocb.ulpCommand);
  2561. dump_stack();
  2562. return IOCB_ERROR;
  2563. }
  2564. /* If the PCI channel is in offline state, do not post iocbs. */
  2565. if (unlikely(pci_channel_offline(phba->pcidev)))
  2566. return IOCB_ERROR;
  2567. /*
  2568. * We should never get an IOCB if we are in a < LINK_DOWN state
  2569. */
  2570. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  2571. return IOCB_ERROR;
  2572. /*
  2573. * Check to see if we are blocking IOCB processing because of a
  2574. * outstanding event.
  2575. */
  2576. if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
  2577. goto iocb_busy;
  2578. if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
  2579. /*
  2580. * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
  2581. * can be issued if the link is not up.
  2582. */
  2583. switch (piocb->iocb.ulpCommand) {
  2584. case CMD_QUE_RING_BUF_CN:
  2585. case CMD_QUE_RING_BUF64_CN:
  2586. /*
  2587. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2588. * completion, iocb_cmpl MUST be 0.
  2589. */
  2590. if (piocb->iocb_cmpl)
  2591. piocb->iocb_cmpl = NULL;
  2592. /*FALLTHROUGH*/
  2593. case CMD_CREATE_XRI_CR:
  2594. case CMD_CLOSE_XRI_CN:
  2595. case CMD_CLOSE_XRI_CX:
  2596. break;
  2597. default:
  2598. goto iocb_busy;
  2599. }
  2600. /*
  2601. * For FCP commands, we must be in a state where we can process link
  2602. * attention events.
  2603. */
  2604. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2605. !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
  2606. goto iocb_busy;
  2607. }
  2608. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2609. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2610. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2611. if (iocb)
  2612. lpfc_sli_update_ring(phba, pring);
  2613. else
  2614. lpfc_sli_update_full_ring(phba, pring);
  2615. if (!piocb)
  2616. return IOCB_SUCCESS;
  2617. goto out_busy;
  2618. iocb_busy:
  2619. pring->stats.iocb_cmd_delay++;
  2620. out_busy:
  2621. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2622. __lpfc_sli_ringtx_put(phba, pring, piocb);
  2623. return IOCB_SUCCESS;
  2624. }
  2625. return IOCB_BUSY;
  2626. }
  2627. int
  2628. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2629. struct lpfc_iocbq *piocb, uint32_t flag)
  2630. {
  2631. unsigned long iflags;
  2632. int rc;
  2633. spin_lock_irqsave(&phba->hbalock, iflags);
  2634. rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
  2635. spin_unlock_irqrestore(&phba->hbalock, iflags);
  2636. return rc;
  2637. }
  2638. static int
  2639. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2640. {
  2641. struct lpfc_sli *psli;
  2642. struct lpfc_sli_ring *pring;
  2643. psli = &phba->sli;
  2644. /* Adjust cmd/rsp ring iocb entries more evenly */
  2645. /* Take some away from the FCP ring */
  2646. pring = &psli->ring[psli->fcp_ring];
  2647. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2648. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2649. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2650. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2651. /* and give them to the extra ring */
  2652. pring = &psli->ring[psli->extra_ring];
  2653. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2654. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2655. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2656. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2657. /* Setup default profile for this ring */
  2658. pring->iotag_max = 4096;
  2659. pring->num_mask = 1;
  2660. pring->prt[0].profile = 0; /* Mask 0 */
  2661. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2662. pring->prt[0].type = phba->cfg_multi_ring_type;
  2663. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2664. return 0;
  2665. }
  2666. static void
  2667. lpfc_sli_async_event_handler(struct lpfc_hba * phba,
  2668. struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
  2669. {
  2670. IOCB_t *icmd;
  2671. uint16_t evt_code;
  2672. uint16_t temp;
  2673. struct temp_event temp_event_data;
  2674. struct Scsi_Host *shost;
  2675. icmd = &iocbq->iocb;
  2676. evt_code = icmd->un.asyncstat.evt_code;
  2677. temp = icmd->ulpContext;
  2678. if ((evt_code != ASYNC_TEMP_WARN) &&
  2679. (evt_code != ASYNC_TEMP_SAFE)) {
  2680. lpfc_printf_log(phba,
  2681. KERN_ERR,
  2682. LOG_SLI,
  2683. "0346 Ring %d handler: unexpected ASYNC_STATUS"
  2684. " evt_code 0x%x\n",
  2685. pring->ringno,
  2686. icmd->un.asyncstat.evt_code);
  2687. return;
  2688. }
  2689. temp_event_data.data = (uint32_t)temp;
  2690. temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
  2691. if (evt_code == ASYNC_TEMP_WARN) {
  2692. temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
  2693. lpfc_printf_log(phba,
  2694. KERN_ERR,
  2695. LOG_TEMP,
  2696. "0347 Adapter is very hot, please take "
  2697. "corrective action. temperature : %d Celsius\n",
  2698. temp);
  2699. }
  2700. if (evt_code == ASYNC_TEMP_SAFE) {
  2701. temp_event_data.event_code = LPFC_NORMAL_TEMP;
  2702. lpfc_printf_log(phba,
  2703. KERN_ERR,
  2704. LOG_TEMP,
  2705. "0340 Adapter temperature is OK now. "
  2706. "temperature : %d Celsius\n",
  2707. temp);
  2708. }
  2709. /* Send temperature change event to applications */
  2710. shost = lpfc_shost_from_vport(phba->pport);
  2711. fc_host_post_vendor_event(shost, fc_get_event_number(),
  2712. sizeof(temp_event_data), (char *) &temp_event_data,
  2713. SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
  2714. }
  2715. int
  2716. lpfc_sli_setup(struct lpfc_hba *phba)
  2717. {
  2718. int i, totiocbsize = 0;
  2719. struct lpfc_sli *psli = &phba->sli;
  2720. struct lpfc_sli_ring *pring;
  2721. psli->num_rings = MAX_CONFIGURED_RINGS;
  2722. psli->sli_flag = 0;
  2723. psli->fcp_ring = LPFC_FCP_RING;
  2724. psli->next_ring = LPFC_FCP_NEXT_RING;
  2725. psli->extra_ring = LPFC_EXTRA_RING;
  2726. psli->iocbq_lookup = NULL;
  2727. psli->iocbq_lookup_len = 0;
  2728. psli->last_iotag = 0;
  2729. for (i = 0; i < psli->num_rings; i++) {
  2730. pring = &psli->ring[i];
  2731. switch (i) {
  2732. case LPFC_FCP_RING: /* ring 0 - FCP */
  2733. /* numCiocb and numRiocb are used in config_port */
  2734. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2735. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2736. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2737. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2738. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2739. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2740. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2741. SLI3_IOCB_CMD_SIZE :
  2742. SLI2_IOCB_CMD_SIZE;
  2743. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2744. SLI3_IOCB_RSP_SIZE :
  2745. SLI2_IOCB_RSP_SIZE;
  2746. pring->iotag_ctr = 0;
  2747. pring->iotag_max =
  2748. (phba->cfg_hba_queue_depth * 2);
  2749. pring->fast_iotag = pring->iotag_max;
  2750. pring->num_mask = 0;
  2751. break;
  2752. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2753. /* numCiocb and numRiocb are used in config_port */
  2754. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2755. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2756. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2757. SLI3_IOCB_CMD_SIZE :
  2758. SLI2_IOCB_CMD_SIZE;
  2759. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2760. SLI3_IOCB_RSP_SIZE :
  2761. SLI2_IOCB_RSP_SIZE;
  2762. pring->iotag_max = phba->cfg_hba_queue_depth;
  2763. pring->num_mask = 0;
  2764. break;
  2765. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2766. /* numCiocb and numRiocb are used in config_port */
  2767. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2768. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2769. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2770. SLI3_IOCB_CMD_SIZE :
  2771. SLI2_IOCB_CMD_SIZE;
  2772. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2773. SLI3_IOCB_RSP_SIZE :
  2774. SLI2_IOCB_RSP_SIZE;
  2775. pring->fast_iotag = 0;
  2776. pring->iotag_ctr = 0;
  2777. pring->iotag_max = 4096;
  2778. pring->lpfc_sli_rcv_async_status =
  2779. lpfc_sli_async_event_handler;
  2780. pring->num_mask = 4;
  2781. pring->prt[0].profile = 0; /* Mask 0 */
  2782. pring->prt[0].rctl = FC_ELS_REQ;
  2783. pring->prt[0].type = FC_ELS_DATA;
  2784. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2785. lpfc_els_unsol_event;
  2786. pring->prt[1].profile = 0; /* Mask 1 */
  2787. pring->prt[1].rctl = FC_ELS_RSP;
  2788. pring->prt[1].type = FC_ELS_DATA;
  2789. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2790. lpfc_els_unsol_event;
  2791. pring->prt[2].profile = 0; /* Mask 2 */
  2792. /* NameServer Inquiry */
  2793. pring->prt[2].rctl = FC_UNSOL_CTL;
  2794. /* NameServer */
  2795. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2796. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2797. lpfc_ct_unsol_event;
  2798. pring->prt[3].profile = 0; /* Mask 3 */
  2799. /* NameServer response */
  2800. pring->prt[3].rctl = FC_SOL_CTL;
  2801. /* NameServer */
  2802. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2803. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2804. lpfc_ct_unsol_event;
  2805. break;
  2806. }
  2807. totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
  2808. (pring->numRiocb * pring->sizeRiocb);
  2809. }
  2810. if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
  2811. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2812. printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
  2813. "SLI2 SLIM Data: x%x x%lx\n",
  2814. phba->brd_no, totiocbsize,
  2815. (unsigned long) MAX_SLIM_IOCB_SIZE);
  2816. }
  2817. if (phba->cfg_multi_ring_support == 2)
  2818. lpfc_extra_ring_setup(phba);
  2819. return 0;
  2820. }
  2821. int
  2822. lpfc_sli_queue_setup(struct lpfc_hba *phba)
  2823. {
  2824. struct lpfc_sli *psli;
  2825. struct lpfc_sli_ring *pring;
  2826. int i;
  2827. psli = &phba->sli;
  2828. spin_lock_irq(&phba->hbalock);
  2829. INIT_LIST_HEAD(&psli->mboxq);
  2830. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2831. /* Initialize list headers for txq and txcmplq as double linked lists */
  2832. for (i = 0; i < psli->num_rings; i++) {
  2833. pring = &psli->ring[i];
  2834. pring->ringno = i;
  2835. pring->next_cmdidx = 0;
  2836. pring->local_getidx = 0;
  2837. pring->cmdidx = 0;
  2838. INIT_LIST_HEAD(&pring->txq);
  2839. INIT_LIST_HEAD(&pring->txcmplq);
  2840. INIT_LIST_HEAD(&pring->iocb_continueq);
  2841. INIT_LIST_HEAD(&pring->iocb_continue_saveq);
  2842. INIT_LIST_HEAD(&pring->postbufq);
  2843. }
  2844. spin_unlock_irq(&phba->hbalock);
  2845. return 1;
  2846. }
  2847. int
  2848. lpfc_sli_host_down(struct lpfc_vport *vport)
  2849. {
  2850. LIST_HEAD(completions);
  2851. struct lpfc_hba *phba = vport->phba;
  2852. struct lpfc_sli *psli = &phba->sli;
  2853. struct lpfc_sli_ring *pring;
  2854. struct lpfc_iocbq *iocb, *next_iocb;
  2855. int i;
  2856. unsigned long flags = 0;
  2857. uint16_t prev_pring_flag;
  2858. lpfc_cleanup_discovery_resources(vport);
  2859. spin_lock_irqsave(&phba->hbalock, flags);
  2860. for (i = 0; i < psli->num_rings; i++) {
  2861. pring = &psli->ring[i];
  2862. prev_pring_flag = pring->flag;
  2863. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2864. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2865. /*
  2866. * Error everything on the txq since these iocbs have not been
  2867. * given to the FW yet.
  2868. */
  2869. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2870. if (iocb->vport != vport)
  2871. continue;
  2872. list_move_tail(&iocb->list, &completions);
  2873. pring->txq_cnt--;
  2874. }
  2875. /* Next issue ABTS for everything on the txcmplq */
  2876. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
  2877. list) {
  2878. if (iocb->vport != vport)
  2879. continue;
  2880. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  2881. }
  2882. pring->flag = prev_pring_flag;
  2883. }
  2884. spin_unlock_irqrestore(&phba->hbalock, flags);
  2885. while (!list_empty(&completions)) {
  2886. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2887. if (!iocb->iocb_cmpl)
  2888. lpfc_sli_release_iocbq(phba, iocb);
  2889. else {
  2890. iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2891. iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
  2892. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2893. }
  2894. }
  2895. return 1;
  2896. }
  2897. int
  2898. lpfc_sli_hba_down(struct lpfc_hba *phba)
  2899. {
  2900. LIST_HEAD(completions);
  2901. struct lpfc_sli *psli = &phba->sli;
  2902. struct lpfc_sli_ring *pring;
  2903. struct lpfc_dmabuf *buf_ptr;
  2904. LPFC_MBOXQ_t *pmb;
  2905. struct lpfc_iocbq *iocb;
  2906. IOCB_t *cmd = NULL;
  2907. int i;
  2908. unsigned long flags = 0;
  2909. lpfc_hba_down_prep(phba);
  2910. lpfc_fabric_abort_hba(phba);
  2911. spin_lock_irqsave(&phba->hbalock, flags);
  2912. for (i = 0; i < psli->num_rings; i++) {
  2913. pring = &psli->ring[i];
  2914. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2915. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2916. /*
  2917. * Error everything on the txq since these iocbs have not been
  2918. * given to the FW yet.
  2919. */
  2920. list_splice_init(&pring->txq, &completions);
  2921. pring->txq_cnt = 0;
  2922. }
  2923. spin_unlock_irqrestore(&phba->hbalock, flags);
  2924. while (!list_empty(&completions)) {
  2925. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2926. cmd = &iocb->iocb;
  2927. if (!iocb->iocb_cmpl)
  2928. lpfc_sli_release_iocbq(phba, iocb);
  2929. else {
  2930. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2931. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2932. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2933. }
  2934. }
  2935. spin_lock_irqsave(&phba->hbalock, flags);
  2936. list_splice_init(&phba->elsbuf, &completions);
  2937. phba->elsbuf_cnt = 0;
  2938. phba->elsbuf_prev_cnt = 0;
  2939. spin_unlock_irqrestore(&phba->hbalock, flags);
  2940. while (!list_empty(&completions)) {
  2941. list_remove_head(&completions, buf_ptr,
  2942. struct lpfc_dmabuf, list);
  2943. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2944. kfree(buf_ptr);
  2945. }
  2946. /* Return any active mbox cmds */
  2947. del_timer_sync(&psli->mbox_tmo);
  2948. spin_lock_irqsave(&phba->hbalock, flags);
  2949. spin_lock(&phba->pport->work_port_lock);
  2950. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2951. spin_unlock(&phba->pport->work_port_lock);
  2952. if (psli->mbox_active) {
  2953. list_add_tail(&psli->mbox_active->list, &completions);
  2954. psli->mbox_active = NULL;
  2955. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2956. }
  2957. /* Return any pending or completed mbox cmds */
  2958. list_splice_init(&phba->sli.mboxq, &completions);
  2959. list_splice_init(&phba->sli.mboxq_cmpl, &completions);
  2960. INIT_LIST_HEAD(&psli->mboxq);
  2961. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2962. spin_unlock_irqrestore(&phba->hbalock, flags);
  2963. while (!list_empty(&completions)) {
  2964. list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
  2965. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2966. if (pmb->mbox_cmpl) {
  2967. pmb->mbox_cmpl(phba,pmb);
  2968. }
  2969. }
  2970. return 1;
  2971. }
  2972. void
  2973. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2974. {
  2975. uint32_t *src = srcp;
  2976. uint32_t *dest = destp;
  2977. uint32_t ldata;
  2978. int i;
  2979. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2980. ldata = *src;
  2981. ldata = le32_to_cpu(ldata);
  2982. *dest = ldata;
  2983. src++;
  2984. dest++;
  2985. }
  2986. }
  2987. int
  2988. lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2989. struct lpfc_dmabuf *mp)
  2990. {
  2991. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2992. later */
  2993. spin_lock_irq(&phba->hbalock);
  2994. list_add_tail(&mp->list, &pring->postbufq);
  2995. pring->postbufq_cnt++;
  2996. spin_unlock_irq(&phba->hbalock);
  2997. return 0;
  2998. }
  2999. uint32_t
  3000. lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
  3001. {
  3002. spin_lock_irq(&phba->hbalock);
  3003. phba->buffer_tag_count++;
  3004. /*
  3005. * Always set the QUE_BUFTAG_BIT to distiguish between
  3006. * a tag assigned by HBQ.
  3007. */
  3008. phba->buffer_tag_count |= QUE_BUFTAG_BIT;
  3009. spin_unlock_irq(&phba->hbalock);
  3010. return phba->buffer_tag_count;
  3011. }
  3012. struct lpfc_dmabuf *
  3013. lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3014. uint32_t tag)
  3015. {
  3016. struct lpfc_dmabuf *mp, *next_mp;
  3017. struct list_head *slp = &pring->postbufq;
  3018. /* Search postbufq, from the begining, looking for a match on tag */
  3019. spin_lock_irq(&phba->hbalock);
  3020. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  3021. if (mp->buffer_tag == tag) {
  3022. list_del_init(&mp->list);
  3023. pring->postbufq_cnt--;
  3024. spin_unlock_irq(&phba->hbalock);
  3025. return mp;
  3026. }
  3027. }
  3028. spin_unlock_irq(&phba->hbalock);
  3029. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  3030. "0410 Cannot find virtual addr for buffer tag on "
  3031. "ring %d Data x%lx x%p x%p x%x\n",
  3032. pring->ringno, (unsigned long) tag,
  3033. slp->next, slp->prev, pring->postbufq_cnt);
  3034. return NULL;
  3035. }
  3036. struct lpfc_dmabuf *
  3037. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3038. dma_addr_t phys)
  3039. {
  3040. struct lpfc_dmabuf *mp, *next_mp;
  3041. struct list_head *slp = &pring->postbufq;
  3042. /* Search postbufq, from the begining, looking for a match on phys */
  3043. spin_lock_irq(&phba->hbalock);
  3044. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  3045. if (mp->phys == phys) {
  3046. list_del_init(&mp->list);
  3047. pring->postbufq_cnt--;
  3048. spin_unlock_irq(&phba->hbalock);
  3049. return mp;
  3050. }
  3051. }
  3052. spin_unlock_irq(&phba->hbalock);
  3053. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  3054. "0410 Cannot find virtual addr for mapped buf on "
  3055. "ring %d Data x%llx x%p x%p x%x\n",
  3056. pring->ringno, (unsigned long long)phys,
  3057. slp->next, slp->prev, pring->postbufq_cnt);
  3058. return NULL;
  3059. }
  3060. static void
  3061. lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3062. struct lpfc_iocbq *rspiocb)
  3063. {
  3064. IOCB_t *irsp = &rspiocb->iocb;
  3065. uint16_t abort_iotag, abort_context;
  3066. struct lpfc_iocbq *abort_iocb;
  3067. struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
  3068. abort_iocb = NULL;
  3069. if (irsp->ulpStatus) {
  3070. abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
  3071. abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
  3072. spin_lock_irq(&phba->hbalock);
  3073. if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
  3074. abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
  3075. lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
  3076. "0327 Cannot abort els iocb %p "
  3077. "with tag %x context %x, abort status %x, "
  3078. "abort code %x\n",
  3079. abort_iocb, abort_iotag, abort_context,
  3080. irsp->ulpStatus, irsp->un.ulpWord[4]);
  3081. /*
  3082. * make sure we have the right iocbq before taking it
  3083. * off the txcmplq and try to call completion routine.
  3084. */
  3085. if (!abort_iocb ||
  3086. abort_iocb->iocb.ulpContext != abort_context ||
  3087. (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
  3088. spin_unlock_irq(&phba->hbalock);
  3089. else {
  3090. list_del_init(&abort_iocb->list);
  3091. pring->txcmplq_cnt--;
  3092. spin_unlock_irq(&phba->hbalock);
  3093. /* Firmware could still be in progress of DMAing
  3094. * payload, so don't free data buffer till after
  3095. * a hbeat.
  3096. */
  3097. abort_iocb->iocb_flag |= LPFC_DELAY_MEM_FREE;
  3098. abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
  3099. abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  3100. abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
  3101. (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
  3102. }
  3103. }
  3104. lpfc_sli_release_iocbq(phba, cmdiocb);
  3105. return;
  3106. }
  3107. static void
  3108. lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3109. struct lpfc_iocbq *rspiocb)
  3110. {
  3111. IOCB_t *irsp = &rspiocb->iocb;
  3112. /* ELS cmd tag <ulpIoTag> completes */
  3113. lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
  3114. "0133 Ignoring ELS cmd tag x%x completion Data: "
  3115. "x%x x%x x%x\n",
  3116. irsp->ulpIoTag, irsp->ulpStatus,
  3117. irsp->un.ulpWord[4], irsp->ulpTimeout);
  3118. if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
  3119. lpfc_ct_free_iocb(phba, cmdiocb);
  3120. else
  3121. lpfc_els_free_iocb(phba, cmdiocb);
  3122. return;
  3123. }
  3124. int
  3125. lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3126. struct lpfc_iocbq *cmdiocb)
  3127. {
  3128. struct lpfc_vport *vport = cmdiocb->vport;
  3129. struct lpfc_iocbq *abtsiocbp;
  3130. IOCB_t *icmd = NULL;
  3131. IOCB_t *iabt = NULL;
  3132. int retval = IOCB_ERROR;
  3133. /*
  3134. * There are certain command types we don't want to abort. And we
  3135. * don't want to abort commands that are already in the process of
  3136. * being aborted.
  3137. */
  3138. icmd = &cmdiocb->iocb;
  3139. if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
  3140. icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
  3141. (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
  3142. return 0;
  3143. /* If we're unloading, don't abort iocb on the ELS ring, but change the
  3144. * callback so that nothing happens when it finishes.
  3145. */
  3146. if ((vport->load_flag & FC_UNLOADING) &&
  3147. (pring->ringno == LPFC_ELS_RING)) {
  3148. if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
  3149. cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
  3150. else
  3151. cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
  3152. goto abort_iotag_exit;
  3153. }
  3154. /* issue ABTS for this IOCB based on iotag */
  3155. abtsiocbp = __lpfc_sli_get_iocbq(phba);
  3156. if (abtsiocbp == NULL)
  3157. return 0;
  3158. /* This signals the response to set the correct status
  3159. * before calling the completion handler.
  3160. */
  3161. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  3162. iabt = &abtsiocbp->iocb;
  3163. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  3164. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  3165. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  3166. iabt->ulpLe = 1;
  3167. iabt->ulpClass = icmd->ulpClass;
  3168. if (phba->link_state >= LPFC_LINK_UP)
  3169. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  3170. else
  3171. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  3172. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  3173. lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
  3174. "0339 Abort xri x%x, original iotag x%x, "
  3175. "abort cmd iotag x%x\n",
  3176. iabt->un.acxri.abortContextTag,
  3177. iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
  3178. retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  3179. abort_iotag_exit:
  3180. /*
  3181. * Caller to this routine should check for IOCB_ERROR
  3182. * and handle it properly. This routine no longer removes
  3183. * iocb off txcmplq and call compl in case of IOCB_ERROR.
  3184. */
  3185. return retval;
  3186. }
  3187. static int
  3188. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
  3189. uint16_t tgt_id, uint64_t lun_id,
  3190. lpfc_ctx_cmd ctx_cmd)
  3191. {
  3192. struct lpfc_scsi_buf *lpfc_cmd;
  3193. struct scsi_cmnd *cmnd;
  3194. int rc = 1;
  3195. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  3196. return rc;
  3197. if (iocbq->vport != vport)
  3198. return rc;
  3199. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  3200. cmnd = lpfc_cmd->pCmd;
  3201. if (cmnd == NULL)
  3202. return rc;
  3203. switch (ctx_cmd) {
  3204. case LPFC_CTX_LUN:
  3205. if ((cmnd->device->id == tgt_id) &&
  3206. (cmnd->device->lun == lun_id))
  3207. rc = 0;
  3208. break;
  3209. case LPFC_CTX_TGT:
  3210. if (cmnd->device->id == tgt_id)
  3211. rc = 0;
  3212. break;
  3213. case LPFC_CTX_HOST:
  3214. rc = 0;
  3215. break;
  3216. default:
  3217. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  3218. __FUNCTION__, ctx_cmd);
  3219. break;
  3220. }
  3221. return rc;
  3222. }
  3223. int
  3224. lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
  3225. lpfc_ctx_cmd ctx_cmd)
  3226. {
  3227. struct lpfc_hba *phba = vport->phba;
  3228. struct lpfc_iocbq *iocbq;
  3229. int sum, i;
  3230. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  3231. iocbq = phba->sli.iocbq_lookup[i];
  3232. if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
  3233. ctx_cmd) == 0)
  3234. sum++;
  3235. }
  3236. return sum;
  3237. }
  3238. void
  3239. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3240. struct lpfc_iocbq *rspiocb)
  3241. {
  3242. lpfc_sli_release_iocbq(phba, cmdiocb);
  3243. return;
  3244. }
  3245. int
  3246. lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
  3247. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
  3248. {
  3249. struct lpfc_hba *phba = vport->phba;
  3250. struct lpfc_iocbq *iocbq;
  3251. struct lpfc_iocbq *abtsiocb;
  3252. IOCB_t *cmd = NULL;
  3253. int errcnt = 0, ret_val = 0;
  3254. int i;
  3255. for (i = 1; i <= phba->sli.last_iotag; i++) {
  3256. iocbq = phba->sli.iocbq_lookup[i];
  3257. if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
  3258. abort_cmd) != 0)
  3259. continue;
  3260. /* issue ABTS for this IOCB based on iotag */
  3261. abtsiocb = lpfc_sli_get_iocbq(phba);
  3262. if (abtsiocb == NULL) {
  3263. errcnt++;
  3264. continue;
  3265. }
  3266. cmd = &iocbq->iocb;
  3267. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  3268. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  3269. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  3270. abtsiocb->iocb.ulpLe = 1;
  3271. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  3272. abtsiocb->vport = phba->pport;
  3273. if (lpfc_is_link_up(phba))
  3274. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  3275. else
  3276. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  3277. /* Setup callback routine and issue the command. */
  3278. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  3279. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  3280. if (ret_val == IOCB_ERROR) {
  3281. lpfc_sli_release_iocbq(phba, abtsiocb);
  3282. errcnt++;
  3283. continue;
  3284. }
  3285. }
  3286. return errcnt;
  3287. }
  3288. static void
  3289. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  3290. struct lpfc_iocbq *cmdiocbq,
  3291. struct lpfc_iocbq *rspiocbq)
  3292. {
  3293. wait_queue_head_t *pdone_q;
  3294. unsigned long iflags;
  3295. spin_lock_irqsave(&phba->hbalock, iflags);
  3296. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  3297. if (cmdiocbq->context2 && rspiocbq)
  3298. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  3299. &rspiocbq->iocb, sizeof(IOCB_t));
  3300. pdone_q = cmdiocbq->context_un.wait_queue;
  3301. if (pdone_q)
  3302. wake_up(pdone_q);
  3303. spin_unlock_irqrestore(&phba->hbalock, iflags);
  3304. return;
  3305. }
  3306. /*
  3307. * Issue the caller's iocb and wait for its completion, but no longer than the
  3308. * caller's timeout. Note that iocb_flags is cleared before the
  3309. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  3310. * definition this is a wait function.
  3311. */
  3312. int
  3313. lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
  3314. struct lpfc_sli_ring *pring,
  3315. struct lpfc_iocbq *piocb,
  3316. struct lpfc_iocbq *prspiocbq,
  3317. uint32_t timeout)
  3318. {
  3319. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3320. long timeleft, timeout_req = 0;
  3321. int retval = IOCB_SUCCESS;
  3322. uint32_t creg_val;
  3323. /*
  3324. * If the caller has provided a response iocbq buffer, then context2
  3325. * is NULL or its an error.
  3326. */
  3327. if (prspiocbq) {
  3328. if (piocb->context2)
  3329. return IOCB_ERROR;
  3330. piocb->context2 = prspiocbq;
  3331. }
  3332. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  3333. piocb->context_un.wait_queue = &done_q;
  3334. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  3335. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3336. creg_val = readl(phba->HCregaddr);
  3337. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  3338. writel(creg_val, phba->HCregaddr);
  3339. readl(phba->HCregaddr); /* flush */
  3340. }
  3341. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  3342. if (retval == IOCB_SUCCESS) {
  3343. timeout_req = timeout * HZ;
  3344. timeleft = wait_event_timeout(done_q,
  3345. piocb->iocb_flag & LPFC_IO_WAKE,
  3346. timeout_req);
  3347. if (piocb->iocb_flag & LPFC_IO_WAKE) {
  3348. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3349. "0331 IOCB wake signaled\n");
  3350. } else if (timeleft == 0) {
  3351. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3352. "0338 IOCB wait timeout error - no "
  3353. "wake response Data x%x\n", timeout);
  3354. retval = IOCB_TIMEDOUT;
  3355. } else {
  3356. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3357. "0330 IOCB wake NOT set, "
  3358. "Data x%x x%lx\n",
  3359. timeout, (timeleft / jiffies));
  3360. retval = IOCB_TIMEDOUT;
  3361. }
  3362. } else {
  3363. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3364. ":0332 IOCB wait issue failed, Data x%x\n",
  3365. retval);
  3366. retval = IOCB_ERROR;
  3367. }
  3368. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3369. creg_val = readl(phba->HCregaddr);
  3370. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  3371. writel(creg_val, phba->HCregaddr);
  3372. readl(phba->HCregaddr); /* flush */
  3373. }
  3374. if (prspiocbq)
  3375. piocb->context2 = NULL;
  3376. piocb->context_un.wait_queue = NULL;
  3377. piocb->iocb_cmpl = NULL;
  3378. return retval;
  3379. }
  3380. int
  3381. lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
  3382. uint32_t timeout)
  3383. {
  3384. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3385. int retval;
  3386. unsigned long flag;
  3387. /* The caller must leave context1 empty. */
  3388. if (pmboxq->context1)
  3389. return MBX_NOT_FINISHED;
  3390. /* setup wake call as IOCB callback */
  3391. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  3392. /* setup context field to pass wait_queue pointer to wake function */
  3393. pmboxq->context1 = &done_q;
  3394. /* now issue the command */
  3395. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  3396. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  3397. wait_event_interruptible_timeout(done_q,
  3398. pmboxq->mbox_flag & LPFC_MBX_WAKE,
  3399. timeout * HZ);
  3400. spin_lock_irqsave(&phba->hbalock, flag);
  3401. pmboxq->context1 = NULL;
  3402. /*
  3403. * if LPFC_MBX_WAKE flag is set the mailbox is completed
  3404. * else do not free the resources.
  3405. */
  3406. if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
  3407. retval = MBX_SUCCESS;
  3408. else {
  3409. retval = MBX_TIMEOUT;
  3410. pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  3411. }
  3412. spin_unlock_irqrestore(&phba->hbalock, flag);
  3413. }
  3414. return retval;
  3415. }
  3416. int
  3417. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  3418. {
  3419. struct lpfc_vport *vport = phba->pport;
  3420. int i = 0;
  3421. uint32_t ha_copy;
  3422. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
  3423. if (i++ > LPFC_MBOX_TMO * 1000)
  3424. return 1;
  3425. /*
  3426. * Call lpfc_sli_handle_mb_event only if a mailbox cmd
  3427. * did finish. This way we won't get the misleading
  3428. * "Stray Mailbox Interrupt" message.
  3429. */
  3430. spin_lock_irq(&phba->hbalock);
  3431. ha_copy = phba->work_ha;
  3432. phba->work_ha &= ~HA_MBATT;
  3433. spin_unlock_irq(&phba->hbalock);
  3434. if (ha_copy & HA_MBATT)
  3435. if (lpfc_sli_handle_mb_event(phba) == 0)
  3436. i = 0;
  3437. msleep(1);
  3438. }
  3439. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  3440. }
  3441. irqreturn_t
  3442. lpfc_intr_handler(int irq, void *dev_id)
  3443. {
  3444. struct lpfc_hba *phba;
  3445. uint32_t ha_copy;
  3446. uint32_t work_ha_copy;
  3447. unsigned long status;
  3448. uint32_t control;
  3449. MAILBOX_t *mbox, *pmbox;
  3450. struct lpfc_vport *vport;
  3451. struct lpfc_nodelist *ndlp;
  3452. struct lpfc_dmabuf *mp;
  3453. LPFC_MBOXQ_t *pmb;
  3454. int rc;
  3455. /*
  3456. * Get the driver's phba structure from the dev_id and
  3457. * assume the HBA is not interrupting.
  3458. */
  3459. phba = (struct lpfc_hba *) dev_id;
  3460. if (unlikely(!phba))
  3461. return IRQ_NONE;
  3462. /* If the pci channel is offline, ignore all the interrupts. */
  3463. if (unlikely(pci_channel_offline(phba->pcidev)))
  3464. return IRQ_NONE;
  3465. phba->sli.slistat.sli_intr++;
  3466. /*
  3467. * Call the HBA to see if it is interrupting. If not, don't claim
  3468. * the interrupt
  3469. */
  3470. /* Ignore all interrupts during initialization. */
  3471. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  3472. return IRQ_NONE;
  3473. /*
  3474. * Read host attention register to determine interrupt source
  3475. * Clear Attention Sources, except Error Attention (to
  3476. * preserve status) and Link Attention
  3477. */
  3478. spin_lock(&phba->hbalock);
  3479. ha_copy = readl(phba->HAregaddr);
  3480. /* If somebody is waiting to handle an eratt don't process it
  3481. * here. The brdkill function will do this.
  3482. */
  3483. if (phba->link_flag & LS_IGNORE_ERATT)
  3484. ha_copy &= ~HA_ERATT;
  3485. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  3486. readl(phba->HAregaddr); /* flush */
  3487. spin_unlock(&phba->hbalock);
  3488. if (unlikely(!ha_copy))
  3489. return IRQ_NONE;
  3490. work_ha_copy = ha_copy & phba->work_ha_mask;
  3491. if (unlikely(work_ha_copy)) {
  3492. if (work_ha_copy & HA_LATT) {
  3493. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  3494. /*
  3495. * Turn off Link Attention interrupts
  3496. * until CLEAR_LA done
  3497. */
  3498. spin_lock(&phba->hbalock);
  3499. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  3500. control = readl(phba->HCregaddr);
  3501. control &= ~HC_LAINT_ENA;
  3502. writel(control, phba->HCregaddr);
  3503. readl(phba->HCregaddr); /* flush */
  3504. spin_unlock(&phba->hbalock);
  3505. }
  3506. else
  3507. work_ha_copy &= ~HA_LATT;
  3508. }
  3509. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  3510. /*
  3511. * Turn off Slow Rings interrupts, LPFC_ELS_RING is
  3512. * the only slow ring.
  3513. */
  3514. status = (work_ha_copy &
  3515. (HA_RXMASK << (4*LPFC_ELS_RING)));
  3516. status >>= (4*LPFC_ELS_RING);
  3517. if (status & HA_RXMASK) {
  3518. spin_lock(&phba->hbalock);
  3519. control = readl(phba->HCregaddr);
  3520. lpfc_debugfs_slow_ring_trc(phba,
  3521. "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
  3522. control, status,
  3523. (uint32_t)phba->sli.slistat.sli_intr);
  3524. if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
  3525. lpfc_debugfs_slow_ring_trc(phba,
  3526. "ISR Disable ring:"
  3527. "pwork:x%x hawork:x%x wait:x%x",
  3528. phba->work_ha, work_ha_copy,
  3529. (uint32_t)((unsigned long)
  3530. phba->work_wait));
  3531. control &=
  3532. ~(HC_R0INT_ENA << LPFC_ELS_RING);
  3533. writel(control, phba->HCregaddr);
  3534. readl(phba->HCregaddr); /* flush */
  3535. }
  3536. else {
  3537. lpfc_debugfs_slow_ring_trc(phba,
  3538. "ISR slow ring: pwork:"
  3539. "x%x hawork:x%x wait:x%x",
  3540. phba->work_ha, work_ha_copy,
  3541. (uint32_t)((unsigned long)
  3542. phba->work_wait));
  3543. }
  3544. spin_unlock(&phba->hbalock);
  3545. }
  3546. }
  3547. if (work_ha_copy & HA_ERATT) {
  3548. /*
  3549. * There was a link/board error. Read the
  3550. * status register to retrieve the error event
  3551. * and process it.
  3552. */
  3553. phba->sli.slistat.err_attn_event++;
  3554. /* Save status info */
  3555. phba->work_hs = readl(phba->HSregaddr);
  3556. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  3557. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  3558. /* Clear Chip error bit */
  3559. writel(HA_ERATT, phba->HAregaddr);
  3560. readl(phba->HAregaddr); /* flush */
  3561. phba->pport->stopped = 1;
  3562. }
  3563. if ((work_ha_copy & HA_MBATT) &&
  3564. (phba->sli.mbox_active)) {
  3565. pmb = phba->sli.mbox_active;
  3566. pmbox = &pmb->mb;
  3567. mbox = &phba->slim2p->mbx;
  3568. vport = pmb->vport;
  3569. /* First check out the status word */
  3570. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
  3571. if (pmbox->mbxOwner != OWN_HOST) {
  3572. /*
  3573. * Stray Mailbox Interrupt, mbxCommand <cmd>
  3574. * mbxStatus <status>
  3575. */
  3576. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
  3577. LOG_SLI,
  3578. "(%d):0304 Stray Mailbox "
  3579. "Interrupt mbxCommand x%x "
  3580. "mbxStatus x%x\n",
  3581. (vport ? vport->vpi : 0),
  3582. pmbox->mbxCommand,
  3583. pmbox->mbxStatus);
  3584. /* clear mailbox attention bit */
  3585. work_ha_copy &= ~HA_MBATT;
  3586. } else {
  3587. phba->last_completion_time = jiffies;
  3588. del_timer(&phba->sli.mbox_tmo);
  3589. phba->sli.mbox_active = NULL;
  3590. if (pmb->mbox_cmpl) {
  3591. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  3592. MAILBOX_CMD_SIZE);
  3593. }
  3594. if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
  3595. pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
  3596. lpfc_debugfs_disc_trc(vport,
  3597. LPFC_DISC_TRC_MBOX_VPORT,
  3598. "MBOX dflt rpi: : "
  3599. "status:x%x rpi:x%x",
  3600. (uint32_t)pmbox->mbxStatus,
  3601. pmbox->un.varWords[0], 0);
  3602. if (!pmbox->mbxStatus) {
  3603. mp = (struct lpfc_dmabuf *)
  3604. (pmb->context1);
  3605. ndlp = (struct lpfc_nodelist *)
  3606. pmb->context2;
  3607. /* Reg_LOGIN of dflt RPI was
  3608. * successful. new lets get
  3609. * rid of the RPI using the
  3610. * same mbox buffer.
  3611. */
  3612. lpfc_unreg_login(phba,
  3613. vport->vpi,
  3614. pmbox->un.varWords[0],
  3615. pmb);
  3616. pmb->mbox_cmpl =
  3617. lpfc_mbx_cmpl_dflt_rpi;
  3618. pmb->context1 = mp;
  3619. pmb->context2 = ndlp;
  3620. pmb->vport = vport;
  3621. spin_lock(&phba->hbalock);
  3622. phba->sli.sli_flag &=
  3623. ~LPFC_SLI_MBOX_ACTIVE;
  3624. spin_unlock(&phba->hbalock);
  3625. goto send_current_mbox;
  3626. }
  3627. }
  3628. spin_lock(&phba->pport->work_port_lock);
  3629. phba->pport->work_port_events &=
  3630. ~WORKER_MBOX_TMO;
  3631. spin_unlock(&phba->pport->work_port_lock);
  3632. lpfc_mbox_cmpl_put(phba, pmb);
  3633. }
  3634. }
  3635. if ((work_ha_copy & HA_MBATT) &&
  3636. (phba->sli.mbox_active == NULL)) {
  3637. send_next_mbox:
  3638. spin_lock(&phba->hbalock);
  3639. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  3640. pmb = lpfc_mbox_get(phba);
  3641. spin_unlock(&phba->hbalock);
  3642. send_current_mbox:
  3643. /* Process next mailbox command if there is one */
  3644. if (pmb != NULL) {
  3645. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  3646. if (rc == MBX_NOT_FINISHED) {
  3647. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  3648. lpfc_mbox_cmpl_put(phba, pmb);
  3649. goto send_next_mbox;
  3650. }
  3651. }
  3652. }
  3653. spin_lock(&phba->hbalock);
  3654. phba->work_ha |= work_ha_copy;
  3655. if (phba->work_wait)
  3656. lpfc_worker_wake_up(phba);
  3657. spin_unlock(&phba->hbalock);
  3658. }
  3659. ha_copy &= ~(phba->work_ha_mask);
  3660. /*
  3661. * Process all events on FCP ring. Take the optimized path for
  3662. * FCP IO. Any other IO is slow path and is handled by
  3663. * the worker thread.
  3664. */
  3665. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  3666. status >>= (4*LPFC_FCP_RING);
  3667. if (status & HA_RXMASK)
  3668. lpfc_sli_handle_fast_ring_event(phba,
  3669. &phba->sli.ring[LPFC_FCP_RING],
  3670. status);
  3671. if (phba->cfg_multi_ring_support == 2) {
  3672. /*
  3673. * Process all events on extra ring. Take the optimized path
  3674. * for extra ring IO. Any other IO is slow path and is handled
  3675. * by the worker thread.
  3676. */
  3677. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  3678. status >>= (4*LPFC_EXTRA_RING);
  3679. if (status & HA_RXMASK) {
  3680. lpfc_sli_handle_fast_ring_event(phba,
  3681. &phba->sli.ring[LPFC_EXTRA_RING],
  3682. status);
  3683. }
  3684. }
  3685. return IRQ_HANDLED;
  3686. } /* lpfc_intr_handler */