setup.c 35 KB

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  1. /*
  2. * arch/blackfin/kernel/setup.c
  3. *
  4. * Copyright 2004-2006 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/console.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/seq_file.h>
  14. #include <linux/cpu.h>
  15. #include <linux/mm.h>
  16. #include <linux/module.h>
  17. #include <linux/tty.h>
  18. #include <linux/pfn.h>
  19. #include <linux/ext2_fs.h>
  20. #include <linux/cramfs_fs.h>
  21. #include <linux/romfs_fs.h>
  22. #include <asm/cplb.h>
  23. #include <asm/cacheflush.h>
  24. #include <asm/blackfin.h>
  25. #include <asm/cplbinit.h>
  26. #include <asm/div64.h>
  27. #include <asm/cpu.h>
  28. #include <asm/fixed_code.h>
  29. #include <asm/early_printk.h>
  30. u16 _bfin_swrst;
  31. EXPORT_SYMBOL(_bfin_swrst);
  32. unsigned long memory_start, memory_end, physical_mem_end;
  33. unsigned long _rambase, _ramstart, _ramend;
  34. unsigned long reserved_mem_dcache_on;
  35. unsigned long reserved_mem_icache_on;
  36. EXPORT_SYMBOL(memory_start);
  37. EXPORT_SYMBOL(memory_end);
  38. EXPORT_SYMBOL(physical_mem_end);
  39. EXPORT_SYMBOL(_ramend);
  40. EXPORT_SYMBOL(reserved_mem_dcache_on);
  41. #ifdef CONFIG_MTD_UCLINUX
  42. unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  43. unsigned long _ebss;
  44. EXPORT_SYMBOL(memory_mtd_end);
  45. EXPORT_SYMBOL(memory_mtd_start);
  46. EXPORT_SYMBOL(mtd_size);
  47. #endif
  48. char __initdata command_line[COMMAND_LINE_SIZE];
  49. void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
  50. *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
  51. /* boot memmap, for parsing "memmap=" */
  52. #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
  53. #define BFIN_MEMMAP_RAM 1
  54. #define BFIN_MEMMAP_RESERVED 2
  55. static struct bfin_memmap {
  56. int nr_map;
  57. struct bfin_memmap_entry {
  58. unsigned long long addr; /* start of memory segment */
  59. unsigned long long size;
  60. unsigned long type;
  61. } map[BFIN_MEMMAP_MAX];
  62. } bfin_memmap __initdata;
  63. /* for memmap sanitization */
  64. struct change_member {
  65. struct bfin_memmap_entry *pentry; /* pointer to original entry */
  66. unsigned long long addr; /* address for this change point */
  67. };
  68. static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
  69. static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
  70. static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
  71. static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
  72. DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
  73. static int early_init_clkin_hz(char *buf);
  74. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  75. void __init generate_cplb_tables(void)
  76. {
  77. unsigned int cpu;
  78. generate_cplb_tables_all();
  79. /* Generate per-CPU I&D CPLB tables */
  80. for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
  81. generate_cplb_tables_cpu(cpu);
  82. }
  83. #endif
  84. void __cpuinit bfin_setup_caches(unsigned int cpu)
  85. {
  86. #ifdef CONFIG_BFIN_ICACHE
  87. bfin_icache_init(icplb_tbl[cpu]);
  88. #endif
  89. #ifdef CONFIG_BFIN_DCACHE
  90. bfin_dcache_init(dcplb_tbl[cpu]);
  91. #endif
  92. /*
  93. * In cache coherence emulation mode, we need to have the
  94. * D-cache enabled before running any atomic operation which
  95. * might invove cache invalidation (i.e. spinlock, rwlock).
  96. * So printk's are deferred until then.
  97. */
  98. #ifdef CONFIG_BFIN_ICACHE
  99. printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
  100. #endif
  101. #ifdef CONFIG_BFIN_DCACHE
  102. printk(KERN_INFO "Data Cache Enabled for CPU%u"
  103. # if defined CONFIG_BFIN_WB
  104. " (write-back)"
  105. # elif defined CONFIG_BFIN_WT
  106. " (write-through)"
  107. # endif
  108. "\n", cpu);
  109. #endif
  110. }
  111. void __cpuinit bfin_setup_cpudata(unsigned int cpu)
  112. {
  113. struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
  114. cpudata->idle = current;
  115. cpudata->loops_per_jiffy = loops_per_jiffy;
  116. cpudata->imemctl = bfin_read_IMEM_CONTROL();
  117. cpudata->dmemctl = bfin_read_DMEM_CONTROL();
  118. }
  119. void __init bfin_cache_init(void)
  120. {
  121. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  122. generate_cplb_tables();
  123. #endif
  124. bfin_setup_caches(0);
  125. }
  126. void __init bfin_relocate_l1_mem(void)
  127. {
  128. unsigned long l1_code_length;
  129. unsigned long l1_data_a_length;
  130. unsigned long l1_data_b_length;
  131. unsigned long l2_length;
  132. /*
  133. * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S
  134. * we know that everything about l1 text/data is nice and aligned,
  135. * so copy by 4 byte chunks, and don't worry about overlapping
  136. * src/dest.
  137. *
  138. * We can't use the dma_memcpy functions, since they can call
  139. * scheduler functions which might be in L1 :( and core writes
  140. * into L1 instruction cause bad access errors, so we are stuck,
  141. * we are required to use DMA, but can't use the common dma
  142. * functions. We can't use memcpy either - since that might be
  143. * going to be in the relocated L1
  144. */
  145. blackfin_dma_early_init();
  146. /* if necessary, copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
  147. l1_code_length = _etext_l1 - _stext_l1;
  148. if (l1_code_length)
  149. early_dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
  150. /* if necessary, copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
  151. l1_data_a_length = _sbss_l1 - _sdata_l1;
  152. if (l1_data_a_length)
  153. early_dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
  154. /* if necessary, copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
  155. l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
  156. if (l1_data_b_length)
  157. early_dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
  158. l1_data_a_length, l1_data_b_length);
  159. early_dma_memcpy_done();
  160. /* if necessary, copy _stext_l2 to _edata_l2 to L2 SRAM */
  161. if (L2_LENGTH != 0) {
  162. l2_length = _sbss_l2 - _stext_l2;
  163. if (l2_length)
  164. memcpy(_stext_l2, _l2_lma_start, l2_length);
  165. }
  166. }
  167. /* add_memory_region to memmap */
  168. static void __init add_memory_region(unsigned long long start,
  169. unsigned long long size, int type)
  170. {
  171. int i;
  172. i = bfin_memmap.nr_map;
  173. if (i == BFIN_MEMMAP_MAX) {
  174. printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
  175. return;
  176. }
  177. bfin_memmap.map[i].addr = start;
  178. bfin_memmap.map[i].size = size;
  179. bfin_memmap.map[i].type = type;
  180. bfin_memmap.nr_map++;
  181. }
  182. /*
  183. * Sanitize the boot memmap, removing overlaps.
  184. */
  185. static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
  186. {
  187. struct change_member *change_tmp;
  188. unsigned long current_type, last_type;
  189. unsigned long long last_addr;
  190. int chgidx, still_changing;
  191. int overlap_entries;
  192. int new_entry;
  193. int old_nr, new_nr, chg_nr;
  194. int i;
  195. /*
  196. Visually we're performing the following (1,2,3,4 = memory types)
  197. Sample memory map (w/overlaps):
  198. ____22__________________
  199. ______________________4_
  200. ____1111________________
  201. _44_____________________
  202. 11111111________________
  203. ____________________33__
  204. ___________44___________
  205. __________33333_________
  206. ______________22________
  207. ___________________2222_
  208. _________111111111______
  209. _____________________11_
  210. _________________4______
  211. Sanitized equivalent (no overlap):
  212. 1_______________________
  213. _44_____________________
  214. ___1____________________
  215. ____22__________________
  216. ______11________________
  217. _________1______________
  218. __________3_____________
  219. ___________44___________
  220. _____________33_________
  221. _______________2________
  222. ________________1_______
  223. _________________4______
  224. ___________________2____
  225. ____________________33__
  226. ______________________4_
  227. */
  228. /* if there's only one memory region, don't bother */
  229. if (*pnr_map < 2)
  230. return -1;
  231. old_nr = *pnr_map;
  232. /* bail out if we find any unreasonable addresses in memmap */
  233. for (i = 0; i < old_nr; i++)
  234. if (map[i].addr + map[i].size < map[i].addr)
  235. return -1;
  236. /* create pointers for initial change-point information (for sorting) */
  237. for (i = 0; i < 2*old_nr; i++)
  238. change_point[i] = &change_point_list[i];
  239. /* record all known change-points (starting and ending addresses),
  240. omitting those that are for empty memory regions */
  241. chgidx = 0;
  242. for (i = 0; i < old_nr; i++) {
  243. if (map[i].size != 0) {
  244. change_point[chgidx]->addr = map[i].addr;
  245. change_point[chgidx++]->pentry = &map[i];
  246. change_point[chgidx]->addr = map[i].addr + map[i].size;
  247. change_point[chgidx++]->pentry = &map[i];
  248. }
  249. }
  250. chg_nr = chgidx; /* true number of change-points */
  251. /* sort change-point list by memory addresses (low -> high) */
  252. still_changing = 1;
  253. while (still_changing) {
  254. still_changing = 0;
  255. for (i = 1; i < chg_nr; i++) {
  256. /* if <current_addr> > <last_addr>, swap */
  257. /* or, if current=<start_addr> & last=<end_addr>, swap */
  258. if ((change_point[i]->addr < change_point[i-1]->addr) ||
  259. ((change_point[i]->addr == change_point[i-1]->addr) &&
  260. (change_point[i]->addr == change_point[i]->pentry->addr) &&
  261. (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
  262. ) {
  263. change_tmp = change_point[i];
  264. change_point[i] = change_point[i-1];
  265. change_point[i-1] = change_tmp;
  266. still_changing = 1;
  267. }
  268. }
  269. }
  270. /* create a new memmap, removing overlaps */
  271. overlap_entries = 0; /* number of entries in the overlap table */
  272. new_entry = 0; /* index for creating new memmap entries */
  273. last_type = 0; /* start with undefined memory type */
  274. last_addr = 0; /* start with 0 as last starting address */
  275. /* loop through change-points, determining affect on the new memmap */
  276. for (chgidx = 0; chgidx < chg_nr; chgidx++) {
  277. /* keep track of all overlapping memmap entries */
  278. if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
  279. /* add map entry to overlap list (> 1 entry implies an overlap) */
  280. overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
  281. } else {
  282. /* remove entry from list (order independent, so swap with last) */
  283. for (i = 0; i < overlap_entries; i++) {
  284. if (overlap_list[i] == change_point[chgidx]->pentry)
  285. overlap_list[i] = overlap_list[overlap_entries-1];
  286. }
  287. overlap_entries--;
  288. }
  289. /* if there are overlapping entries, decide which "type" to use */
  290. /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
  291. current_type = 0;
  292. for (i = 0; i < overlap_entries; i++)
  293. if (overlap_list[i]->type > current_type)
  294. current_type = overlap_list[i]->type;
  295. /* continue building up new memmap based on this information */
  296. if (current_type != last_type) {
  297. if (last_type != 0) {
  298. new_map[new_entry].size =
  299. change_point[chgidx]->addr - last_addr;
  300. /* move forward only if the new size was non-zero */
  301. if (new_map[new_entry].size != 0)
  302. if (++new_entry >= BFIN_MEMMAP_MAX)
  303. break; /* no more space left for new entries */
  304. }
  305. if (current_type != 0) {
  306. new_map[new_entry].addr = change_point[chgidx]->addr;
  307. new_map[new_entry].type = current_type;
  308. last_addr = change_point[chgidx]->addr;
  309. }
  310. last_type = current_type;
  311. }
  312. }
  313. new_nr = new_entry; /* retain count for new entries */
  314. /* copy new mapping into original location */
  315. memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
  316. *pnr_map = new_nr;
  317. return 0;
  318. }
  319. static void __init print_memory_map(char *who)
  320. {
  321. int i;
  322. for (i = 0; i < bfin_memmap.nr_map; i++) {
  323. printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
  324. bfin_memmap.map[i].addr,
  325. bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
  326. switch (bfin_memmap.map[i].type) {
  327. case BFIN_MEMMAP_RAM:
  328. printk("(usable)\n");
  329. break;
  330. case BFIN_MEMMAP_RESERVED:
  331. printk("(reserved)\n");
  332. break;
  333. default: printk("type %lu\n", bfin_memmap.map[i].type);
  334. break;
  335. }
  336. }
  337. }
  338. static __init int parse_memmap(char *arg)
  339. {
  340. unsigned long long start_at, mem_size;
  341. if (!arg)
  342. return -EINVAL;
  343. mem_size = memparse(arg, &arg);
  344. if (*arg == '@') {
  345. start_at = memparse(arg+1, &arg);
  346. add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
  347. } else if (*arg == '$') {
  348. start_at = memparse(arg+1, &arg);
  349. add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
  350. }
  351. return 0;
  352. }
  353. /*
  354. * Initial parsing of the command line. Currently, we support:
  355. * - Controlling the linux memory size: mem=xxx[KMG]
  356. * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
  357. * $ -> reserved memory is dcacheable
  358. * # -> reserved memory is icacheable
  359. * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
  360. * @ from <start> to <start>+<mem>, type RAM
  361. * $ from <start> to <start>+<mem>, type RESERVED
  362. */
  363. static __init void parse_cmdline_early(char *cmdline_p)
  364. {
  365. char c = ' ', *to = cmdline_p;
  366. unsigned int memsize;
  367. for (;;) {
  368. if (c == ' ') {
  369. if (!memcmp(to, "mem=", 4)) {
  370. to += 4;
  371. memsize = memparse(to, &to);
  372. if (memsize)
  373. _ramend = memsize;
  374. } else if (!memcmp(to, "max_mem=", 8)) {
  375. to += 8;
  376. memsize = memparse(to, &to);
  377. if (memsize) {
  378. physical_mem_end = memsize;
  379. if (*to != ' ') {
  380. if (*to == '$'
  381. || *(to + 1) == '$')
  382. reserved_mem_dcache_on = 1;
  383. if (*to == '#'
  384. || *(to + 1) == '#')
  385. reserved_mem_icache_on = 1;
  386. }
  387. }
  388. } else if (!memcmp(to, "clkin_hz=", 9)) {
  389. to += 9;
  390. early_init_clkin_hz(to);
  391. } else if (!memcmp(to, "earlyprintk=", 12)) {
  392. to += 12;
  393. setup_early_printk(to);
  394. } else if (!memcmp(to, "memmap=", 7)) {
  395. to += 7;
  396. parse_memmap(to);
  397. }
  398. }
  399. c = *(to++);
  400. if (!c)
  401. break;
  402. }
  403. }
  404. /*
  405. * Setup memory defaults from user config.
  406. * The physical memory layout looks like:
  407. *
  408. * [_rambase, _ramstart]: kernel image
  409. * [memory_start, memory_end]: dynamic memory managed by kernel
  410. * [memory_end, _ramend]: reserved memory
  411. * [memory_mtd_start(memory_end),
  412. * memory_mtd_start + mtd_size]: rootfs (if any)
  413. * [_ramend - DMA_UNCACHED_REGION,
  414. * _ramend]: uncached DMA region
  415. * [_ramend, physical_mem_end]: memory not managed by kernel
  416. */
  417. static __init void memory_setup(void)
  418. {
  419. #ifdef CONFIG_MTD_UCLINUX
  420. unsigned long mtd_phys = 0;
  421. #endif
  422. _rambase = (unsigned long)_stext;
  423. _ramstart = (unsigned long)_end;
  424. if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
  425. console_init();
  426. panic("DMA region exceeds memory limit: %lu.",
  427. _ramend - _ramstart);
  428. }
  429. memory_end = _ramend - DMA_UNCACHED_REGION;
  430. #ifdef CONFIG_MPU
  431. /* Round up to multiple of 4MB */
  432. memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
  433. #else
  434. memory_start = PAGE_ALIGN(_ramstart);
  435. #endif
  436. #if defined(CONFIG_MTD_UCLINUX)
  437. /* generic memory mapped MTD driver */
  438. memory_mtd_end = memory_end;
  439. mtd_phys = _ramstart;
  440. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
  441. # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
  442. if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
  443. mtd_size =
  444. PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
  445. # endif
  446. # if defined(CONFIG_CRAMFS)
  447. if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
  448. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
  449. # endif
  450. # if defined(CONFIG_ROMFS_FS)
  451. if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
  452. && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
  453. mtd_size =
  454. PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
  455. # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  456. /* Due to a Hardware Anomaly we need to limit the size of usable
  457. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  458. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  459. */
  460. # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  461. if (memory_end >= 56 * 1024 * 1024)
  462. memory_end = 56 * 1024 * 1024;
  463. # else
  464. if (memory_end >= 60 * 1024 * 1024)
  465. memory_end = 60 * 1024 * 1024;
  466. # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  467. # endif /* ANOMALY_05000263 */
  468. # endif /* CONFIG_ROMFS_FS */
  469. memory_end -= mtd_size;
  470. if (mtd_size == 0) {
  471. console_init();
  472. panic("Don't boot kernel without rootfs attached.");
  473. }
  474. /* Relocate MTD image to the top of memory after the uncached memory area */
  475. dma_memcpy((char *)memory_end, _end, mtd_size);
  476. memory_mtd_start = memory_end;
  477. _ebss = memory_mtd_start; /* define _ebss for compatible */
  478. #endif /* CONFIG_MTD_UCLINUX */
  479. #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  480. /* Due to a Hardware Anomaly we need to limit the size of usable
  481. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  482. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  483. */
  484. #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  485. if (memory_end >= 56 * 1024 * 1024)
  486. memory_end = 56 * 1024 * 1024;
  487. #else
  488. if (memory_end >= 60 * 1024 * 1024)
  489. memory_end = 60 * 1024 * 1024;
  490. #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  491. printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
  492. #endif /* ANOMALY_05000263 */
  493. #ifdef CONFIG_MPU
  494. page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
  495. page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
  496. #endif
  497. #if !defined(CONFIG_MTD_UCLINUX)
  498. /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
  499. memory_end -= SIZE_4K;
  500. #endif
  501. init_mm.start_code = (unsigned long)_stext;
  502. init_mm.end_code = (unsigned long)_etext;
  503. init_mm.end_data = (unsigned long)_edata;
  504. init_mm.brk = (unsigned long)0;
  505. printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
  506. printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
  507. printk(KERN_INFO "Memory map:\n"
  508. KERN_INFO " fixedcode = 0x%p-0x%p\n"
  509. KERN_INFO " text = 0x%p-0x%p\n"
  510. KERN_INFO " rodata = 0x%p-0x%p\n"
  511. KERN_INFO " bss = 0x%p-0x%p\n"
  512. KERN_INFO " data = 0x%p-0x%p\n"
  513. KERN_INFO " stack = 0x%p-0x%p\n"
  514. KERN_INFO " init = 0x%p-0x%p\n"
  515. KERN_INFO " available = 0x%p-0x%p\n"
  516. #ifdef CONFIG_MTD_UCLINUX
  517. KERN_INFO " rootfs = 0x%p-0x%p\n"
  518. #endif
  519. #if DMA_UNCACHED_REGION > 0
  520. KERN_INFO " DMA Zone = 0x%p-0x%p\n"
  521. #endif
  522. , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
  523. _stext, _etext,
  524. __start_rodata, __end_rodata,
  525. __bss_start, __bss_stop,
  526. _sdata, _edata,
  527. (void *)&init_thread_union,
  528. (void *)((int)(&init_thread_union) + 0x2000),
  529. __init_begin, __init_end,
  530. (void *)_ramstart, (void *)memory_end
  531. #ifdef CONFIG_MTD_UCLINUX
  532. , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
  533. #endif
  534. #if DMA_UNCACHED_REGION > 0
  535. , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
  536. #endif
  537. );
  538. }
  539. /*
  540. * Find the lowest, highest page frame number we have available
  541. */
  542. void __init find_min_max_pfn(void)
  543. {
  544. int i;
  545. max_pfn = 0;
  546. min_low_pfn = memory_end;
  547. for (i = 0; i < bfin_memmap.nr_map; i++) {
  548. unsigned long start, end;
  549. /* RAM? */
  550. if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
  551. continue;
  552. start = PFN_UP(bfin_memmap.map[i].addr);
  553. end = PFN_DOWN(bfin_memmap.map[i].addr +
  554. bfin_memmap.map[i].size);
  555. if (start >= end)
  556. continue;
  557. if (end > max_pfn)
  558. max_pfn = end;
  559. if (start < min_low_pfn)
  560. min_low_pfn = start;
  561. }
  562. }
  563. static __init void setup_bootmem_allocator(void)
  564. {
  565. int bootmap_size;
  566. int i;
  567. unsigned long start_pfn, end_pfn;
  568. unsigned long curr_pfn, last_pfn, size;
  569. /* mark memory between memory_start and memory_end usable */
  570. add_memory_region(memory_start,
  571. memory_end - memory_start, BFIN_MEMMAP_RAM);
  572. /* sanity check for overlap */
  573. sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
  574. print_memory_map("boot memmap");
  575. /* intialize globals in linux/bootmem.h */
  576. find_min_max_pfn();
  577. /* pfn of the last usable page frame */
  578. if (max_pfn > memory_end >> PAGE_SHIFT)
  579. max_pfn = memory_end >> PAGE_SHIFT;
  580. /* pfn of last page frame directly mapped by kernel */
  581. max_low_pfn = max_pfn;
  582. /* pfn of the first usable page frame after kernel image*/
  583. if (min_low_pfn < memory_start >> PAGE_SHIFT)
  584. min_low_pfn = memory_start >> PAGE_SHIFT;
  585. start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
  586. end_pfn = memory_end >> PAGE_SHIFT;
  587. /*
  588. * give all the memory to the bootmap allocator, tell it to put the
  589. * boot mem_map at the start of memory.
  590. */
  591. bootmap_size = init_bootmem_node(NODE_DATA(0),
  592. memory_start >> PAGE_SHIFT, /* map goes here */
  593. start_pfn, end_pfn);
  594. /* register the memmap regions with the bootmem allocator */
  595. for (i = 0; i < bfin_memmap.nr_map; i++) {
  596. /*
  597. * Reserve usable memory
  598. */
  599. if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
  600. continue;
  601. /*
  602. * We are rounding up the start address of usable memory:
  603. */
  604. curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
  605. if (curr_pfn >= end_pfn)
  606. continue;
  607. /*
  608. * ... and at the end of the usable range downwards:
  609. */
  610. last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
  611. bfin_memmap.map[i].size);
  612. if (last_pfn > end_pfn)
  613. last_pfn = end_pfn;
  614. /*
  615. * .. finally, did all the rounding and playing
  616. * around just make the area go away?
  617. */
  618. if (last_pfn <= curr_pfn)
  619. continue;
  620. size = last_pfn - curr_pfn;
  621. free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
  622. }
  623. /* reserve memory before memory_start, including bootmap */
  624. reserve_bootmem(PAGE_OFFSET,
  625. memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
  626. BOOTMEM_DEFAULT);
  627. }
  628. #define EBSZ_TO_MEG(ebsz) \
  629. ({ \
  630. int meg = 0; \
  631. switch (ebsz & 0xf) { \
  632. case 0x1: meg = 16; break; \
  633. case 0x3: meg = 32; break; \
  634. case 0x5: meg = 64; break; \
  635. case 0x7: meg = 128; break; \
  636. case 0x9: meg = 256; break; \
  637. case 0xb: meg = 512; break; \
  638. } \
  639. meg; \
  640. })
  641. static inline int __init get_mem_size(void)
  642. {
  643. #if defined(EBIU_SDBCTL)
  644. # if defined(BF561_FAMILY)
  645. int ret = 0;
  646. u32 sdbctl = bfin_read_EBIU_SDBCTL();
  647. ret += EBSZ_TO_MEG(sdbctl >> 0);
  648. ret += EBSZ_TO_MEG(sdbctl >> 8);
  649. ret += EBSZ_TO_MEG(sdbctl >> 16);
  650. ret += EBSZ_TO_MEG(sdbctl >> 24);
  651. return ret;
  652. # else
  653. return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
  654. # endif
  655. #elif defined(EBIU_DDRCTL1)
  656. u32 ddrctl = bfin_read_EBIU_DDRCTL1();
  657. int ret = 0;
  658. switch (ddrctl & 0xc0000) {
  659. case DEVSZ_64: ret = 64 / 8;
  660. case DEVSZ_128: ret = 128 / 8;
  661. case DEVSZ_256: ret = 256 / 8;
  662. case DEVSZ_512: ret = 512 / 8;
  663. }
  664. switch (ddrctl & 0x30000) {
  665. case DEVWD_4: ret *= 2;
  666. case DEVWD_8: ret *= 2;
  667. case DEVWD_16: break;
  668. }
  669. if ((ddrctl & 0xc000) == 0x4000)
  670. ret *= 2;
  671. return ret;
  672. #endif
  673. BUG();
  674. }
  675. void __init setup_arch(char **cmdline_p)
  676. {
  677. unsigned long sclk, cclk;
  678. #ifdef CONFIG_DUMMY_CONSOLE
  679. conswitchp = &dummy_con;
  680. #endif
  681. #if defined(CONFIG_CMDLINE_BOOL)
  682. strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
  683. command_line[sizeof(command_line) - 1] = 0;
  684. #endif
  685. /* Keep a copy of command line */
  686. *cmdline_p = &command_line[0];
  687. memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  688. boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
  689. /* setup memory defaults from the user config */
  690. physical_mem_end = 0;
  691. _ramend = get_mem_size() * 1024 * 1024;
  692. memset(&bfin_memmap, 0, sizeof(bfin_memmap));
  693. parse_cmdline_early(&command_line[0]);
  694. if (physical_mem_end == 0)
  695. physical_mem_end = _ramend;
  696. memory_setup();
  697. /* Initialize Async memory banks */
  698. bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
  699. bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
  700. bfin_write_EBIU_AMGCTL(AMGCTLVAL);
  701. #ifdef CONFIG_EBIU_MBSCTLVAL
  702. bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
  703. bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
  704. bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
  705. #endif
  706. cclk = get_cclk();
  707. sclk = get_sclk();
  708. if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk)
  709. panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK");
  710. #ifdef BF561_FAMILY
  711. if (ANOMALY_05000266) {
  712. bfin_read_IMDMA_D0_IRQ_STATUS();
  713. bfin_read_IMDMA_D1_IRQ_STATUS();
  714. }
  715. #endif
  716. printk(KERN_INFO "Hardware Trace ");
  717. if (bfin_read_TBUFCTL() & 0x1)
  718. printk("Active ");
  719. else
  720. printk("Off ");
  721. if (bfin_read_TBUFCTL() & 0x2)
  722. printk("and Enabled\n");
  723. else
  724. printk("and Disabled\n");
  725. #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
  726. /* we need to initialize the Flashrom device here since we might
  727. * do things with flash early on in the boot
  728. */
  729. flash_probe();
  730. #endif
  731. printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
  732. /* Newer parts mirror SWRST bits in SYSCR */
  733. #if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
  734. defined(CONFIG_BF538) || defined(CONFIG_BF539)
  735. _bfin_swrst = bfin_read_SWRST();
  736. #else
  737. _bfin_swrst = bfin_read_SYSCR();
  738. #endif
  739. #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
  740. bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
  741. #endif
  742. #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
  743. bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
  744. #endif
  745. #ifdef CONFIG_SMP
  746. if (_bfin_swrst & SWRST_DBL_FAULT_A) {
  747. #else
  748. if (_bfin_swrst & RESET_DOUBLE) {
  749. #endif
  750. printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
  751. #ifdef CONFIG_DEBUG_DOUBLEFAULT
  752. /* We assume the crashing kernel, and the current symbol table match */
  753. printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
  754. (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
  755. printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
  756. printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
  757. #endif
  758. printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
  759. init_retx);
  760. } else if (_bfin_swrst & RESET_WDOG)
  761. printk(KERN_INFO "Recovering from Watchdog event\n");
  762. else if (_bfin_swrst & RESET_SOFTWARE)
  763. printk(KERN_NOTICE "Reset caused by Software reset\n");
  764. printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
  765. if (bfin_compiled_revid() == 0xffff)
  766. printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
  767. else if (bfin_compiled_revid() == -1)
  768. printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
  769. else
  770. printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
  771. if (unlikely(CPUID != bfin_cpuid()))
  772. printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
  773. CPU, bfin_cpuid(), bfin_revid());
  774. else {
  775. if (bfin_revid() != bfin_compiled_revid()) {
  776. if (bfin_compiled_revid() == -1)
  777. printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
  778. bfin_revid());
  779. else if (bfin_compiled_revid() != 0xffff) {
  780. printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
  781. bfin_compiled_revid(), bfin_revid());
  782. if (bfin_compiled_revid() > bfin_revid())
  783. panic("Error: you are missing anomaly workarounds for this rev");
  784. }
  785. }
  786. if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
  787. printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
  788. CPU, bfin_revid());
  789. }
  790. /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
  791. if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
  792. panic("You can't run on this processor due to 05000448");
  793. printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
  794. printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
  795. cclk / 1000000, sclk / 1000000);
  796. setup_bootmem_allocator();
  797. paging_init();
  798. /* Copy atomic sequences to their fixed location, and sanity check that
  799. these locations are the ones that we advertise to userspace. */
  800. memcpy((void *)FIXED_CODE_START, &fixed_code_start,
  801. FIXED_CODE_END - FIXED_CODE_START);
  802. BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
  803. != SIGRETURN_STUB - FIXED_CODE_START);
  804. BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
  805. != ATOMIC_XCHG32 - FIXED_CODE_START);
  806. BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
  807. != ATOMIC_CAS32 - FIXED_CODE_START);
  808. BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
  809. != ATOMIC_ADD32 - FIXED_CODE_START);
  810. BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
  811. != ATOMIC_SUB32 - FIXED_CODE_START);
  812. BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
  813. != ATOMIC_IOR32 - FIXED_CODE_START);
  814. BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
  815. != ATOMIC_AND32 - FIXED_CODE_START);
  816. BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
  817. != ATOMIC_XOR32 - FIXED_CODE_START);
  818. BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
  819. != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
  820. #ifdef CONFIG_SMP
  821. platform_init_cpus();
  822. #endif
  823. init_exception_vectors();
  824. bfin_cache_init(); /* Initialize caches for the boot CPU */
  825. }
  826. static int __init topology_init(void)
  827. {
  828. unsigned int cpu;
  829. /* Record CPU-private information for the boot processor. */
  830. bfin_setup_cpudata(0);
  831. for_each_possible_cpu(cpu) {
  832. register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
  833. }
  834. return 0;
  835. }
  836. subsys_initcall(topology_init);
  837. /* Get the input clock frequency */
  838. static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
  839. static u_long get_clkin_hz(void)
  840. {
  841. return cached_clkin_hz;
  842. }
  843. static int __init early_init_clkin_hz(char *buf)
  844. {
  845. cached_clkin_hz = simple_strtoul(buf, NULL, 0);
  846. #ifdef BFIN_KERNEL_CLOCK
  847. if (cached_clkin_hz != CONFIG_CLKIN_HZ)
  848. panic("cannot change clkin_hz when reprogramming clocks");
  849. #endif
  850. return 1;
  851. }
  852. early_param("clkin_hz=", early_init_clkin_hz);
  853. /* Get the voltage input multiplier */
  854. static u_long get_vco(void)
  855. {
  856. static u_long cached_vco;
  857. u_long msel, pll_ctl;
  858. /* The assumption here is that VCO never changes at runtime.
  859. * If, someday, we support that, then we'll have to change this.
  860. */
  861. if (cached_vco)
  862. return cached_vco;
  863. pll_ctl = bfin_read_PLL_CTL();
  864. msel = (pll_ctl >> 9) & 0x3F;
  865. if (0 == msel)
  866. msel = 64;
  867. cached_vco = get_clkin_hz();
  868. cached_vco >>= (1 & pll_ctl); /* DF bit */
  869. cached_vco *= msel;
  870. return cached_vco;
  871. }
  872. /* Get the Core clock */
  873. u_long get_cclk(void)
  874. {
  875. static u_long cached_cclk_pll_div, cached_cclk;
  876. u_long csel, ssel;
  877. if (bfin_read_PLL_STAT() & 0x1)
  878. return get_clkin_hz();
  879. ssel = bfin_read_PLL_DIV();
  880. if (ssel == cached_cclk_pll_div)
  881. return cached_cclk;
  882. else
  883. cached_cclk_pll_div = ssel;
  884. csel = ((ssel >> 4) & 0x03);
  885. ssel &= 0xf;
  886. if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
  887. cached_cclk = get_vco() / ssel;
  888. else
  889. cached_cclk = get_vco() >> csel;
  890. return cached_cclk;
  891. }
  892. EXPORT_SYMBOL(get_cclk);
  893. /* Get the System clock */
  894. u_long get_sclk(void)
  895. {
  896. static u_long cached_sclk;
  897. u_long ssel;
  898. /* The assumption here is that SCLK never changes at runtime.
  899. * If, someday, we support that, then we'll have to change this.
  900. */
  901. if (cached_sclk)
  902. return cached_sclk;
  903. if (bfin_read_PLL_STAT() & 0x1)
  904. return get_clkin_hz();
  905. ssel = bfin_read_PLL_DIV() & 0xf;
  906. if (0 == ssel) {
  907. printk(KERN_WARNING "Invalid System Clock\n");
  908. ssel = 1;
  909. }
  910. cached_sclk = get_vco() / ssel;
  911. return cached_sclk;
  912. }
  913. EXPORT_SYMBOL(get_sclk);
  914. unsigned long sclk_to_usecs(unsigned long sclk)
  915. {
  916. u64 tmp = USEC_PER_SEC * (u64)sclk;
  917. do_div(tmp, get_sclk());
  918. return tmp;
  919. }
  920. EXPORT_SYMBOL(sclk_to_usecs);
  921. unsigned long usecs_to_sclk(unsigned long usecs)
  922. {
  923. u64 tmp = get_sclk() * (u64)usecs;
  924. do_div(tmp, USEC_PER_SEC);
  925. return tmp;
  926. }
  927. EXPORT_SYMBOL(usecs_to_sclk);
  928. /*
  929. * Get CPU information for use by the procfs.
  930. */
  931. static int show_cpuinfo(struct seq_file *m, void *v)
  932. {
  933. char *cpu, *mmu, *fpu, *vendor, *cache;
  934. uint32_t revid;
  935. int cpu_num = *(unsigned int *)v;
  936. u_long sclk, cclk;
  937. u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
  938. struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
  939. cpu = CPU;
  940. mmu = "none";
  941. fpu = "none";
  942. revid = bfin_revid();
  943. sclk = get_sclk();
  944. cclk = get_cclk();
  945. switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
  946. case 0xca:
  947. vendor = "Analog Devices";
  948. break;
  949. default:
  950. vendor = "unknown";
  951. break;
  952. }
  953. seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
  954. if (CPUID == bfin_cpuid())
  955. seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
  956. else
  957. seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
  958. CPUID, bfin_cpuid());
  959. seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
  960. "stepping\t: %d\n",
  961. cpu, cclk/1000000, sclk/1000000,
  962. #ifdef CONFIG_MPU
  963. "mpu on",
  964. #else
  965. "mpu off",
  966. #endif
  967. revid);
  968. seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
  969. cclk/1000000, cclk%1000000,
  970. sclk/1000000, sclk%1000000);
  971. seq_printf(m, "bogomips\t: %lu.%02lu\n"
  972. "Calibration\t: %lu loops\n",
  973. (cpudata->loops_per_jiffy * HZ) / 500000,
  974. ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
  975. (cpudata->loops_per_jiffy * HZ));
  976. /* Check Cache configutation */
  977. switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
  978. case ACACHE_BSRAM:
  979. cache = "dbank-A/B\t: cache/sram";
  980. dcache_size = 16;
  981. dsup_banks = 1;
  982. break;
  983. case ACACHE_BCACHE:
  984. cache = "dbank-A/B\t: cache/cache";
  985. dcache_size = 32;
  986. dsup_banks = 2;
  987. break;
  988. case ASRAM_BSRAM:
  989. cache = "dbank-A/B\t: sram/sram";
  990. dcache_size = 0;
  991. dsup_banks = 0;
  992. break;
  993. default:
  994. cache = "unknown";
  995. dcache_size = 0;
  996. dsup_banks = 0;
  997. break;
  998. }
  999. /* Is it turned on? */
  1000. if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
  1001. dcache_size = 0;
  1002. if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
  1003. icache_size = 0;
  1004. seq_printf(m, "cache size\t: %d KB(L1 icache) "
  1005. "%d KB(L1 dcache%s) %d KB(L2 cache)\n",
  1006. icache_size, dcache_size,
  1007. #if defined CONFIG_BFIN_WB
  1008. "-wb"
  1009. #elif defined CONFIG_BFIN_WT
  1010. "-wt"
  1011. #endif
  1012. "", 0);
  1013. seq_printf(m, "%s\n", cache);
  1014. if (icache_size)
  1015. seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
  1016. BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
  1017. else
  1018. seq_printf(m, "icache setup\t: off\n");
  1019. seq_printf(m,
  1020. "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
  1021. dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
  1022. BFIN_DLINES);
  1023. #ifdef __ARCH_SYNC_CORE_DCACHE
  1024. seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
  1025. #endif
  1026. #ifdef CONFIG_BFIN_ICACHE_LOCK
  1027. switch ((cpudata->imemctl >> 3) & WAYALL_L) {
  1028. case WAY0_L:
  1029. seq_printf(m, "Way0 Locked-Down\n");
  1030. break;
  1031. case WAY1_L:
  1032. seq_printf(m, "Way1 Locked-Down\n");
  1033. break;
  1034. case WAY01_L:
  1035. seq_printf(m, "Way0,Way1 Locked-Down\n");
  1036. break;
  1037. case WAY2_L:
  1038. seq_printf(m, "Way2 Locked-Down\n");
  1039. break;
  1040. case WAY02_L:
  1041. seq_printf(m, "Way0,Way2 Locked-Down\n");
  1042. break;
  1043. case WAY12_L:
  1044. seq_printf(m, "Way1,Way2 Locked-Down\n");
  1045. break;
  1046. case WAY012_L:
  1047. seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
  1048. break;
  1049. case WAY3_L:
  1050. seq_printf(m, "Way3 Locked-Down\n");
  1051. break;
  1052. case WAY03_L:
  1053. seq_printf(m, "Way0,Way3 Locked-Down\n");
  1054. break;
  1055. case WAY13_L:
  1056. seq_printf(m, "Way1,Way3 Locked-Down\n");
  1057. break;
  1058. case WAY013_L:
  1059. seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
  1060. break;
  1061. case WAY32_L:
  1062. seq_printf(m, "Way3,Way2 Locked-Down\n");
  1063. break;
  1064. case WAY320_L:
  1065. seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
  1066. break;
  1067. case WAY321_L:
  1068. seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
  1069. break;
  1070. case WAYALL_L:
  1071. seq_printf(m, "All Ways are locked\n");
  1072. break;
  1073. default:
  1074. seq_printf(m, "No Ways are locked\n");
  1075. }
  1076. #endif
  1077. if (cpu_num != num_possible_cpus() - 1)
  1078. return 0;
  1079. if (L2_LENGTH)
  1080. seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
  1081. seq_printf(m, "board name\t: %s\n", bfin_board_name);
  1082. seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
  1083. physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
  1084. seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
  1085. ((int)memory_end - (int)_stext) >> 10,
  1086. _stext,
  1087. (void *)memory_end);
  1088. seq_printf(m, "\n");
  1089. return 0;
  1090. }
  1091. static void *c_start(struct seq_file *m, loff_t *pos)
  1092. {
  1093. if (*pos == 0)
  1094. *pos = first_cpu(cpu_online_map);
  1095. if (*pos >= num_online_cpus())
  1096. return NULL;
  1097. return pos;
  1098. }
  1099. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  1100. {
  1101. *pos = next_cpu(*pos, cpu_online_map);
  1102. return c_start(m, pos);
  1103. }
  1104. static void c_stop(struct seq_file *m, void *v)
  1105. {
  1106. }
  1107. const struct seq_operations cpuinfo_op = {
  1108. .start = c_start,
  1109. .next = c_next,
  1110. .stop = c_stop,
  1111. .show = show_cpuinfo,
  1112. };
  1113. void __init cmdline_init(const char *r0)
  1114. {
  1115. if (r0)
  1116. strncpy(command_line, r0, COMMAND_LINE_SIZE);
  1117. }