tll6527m.c 24 KB

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  1. /* File: arch/blackfin/mach-bf527/boards/tll6527m.c
  2. * Based on: arch/blackfin/mach-bf527/boards/ezkit.c
  3. * Author: Ashish Gupta
  4. *
  5. * Copyright: 2010 - The Learning Labs Inc.
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/usb/musb.h>
  20. #include <linux/leds.h>
  21. #include <linux/input.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/reboot.h>
  25. #include <asm/nand.h>
  26. #include <asm/portmux.h>
  27. #include <asm/dpmc.h>
  28. #if defined(CONFIG_TOUCHSCREEN_AD7879) \
  29. || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  30. #include <linux/spi/ad7879.h>
  31. #define LCD_BACKLIGHT_GPIO 0x40
  32. /* TLL6527M uses TLL7UIQ35 / ADI LCD EZ Extender. AD7879 AUX GPIO is used for
  33. * LCD Backlight Enable
  34. */
  35. #endif
  36. /*
  37. * Name the Board for the /proc/cpuinfo
  38. */
  39. const char bfin_board_name[] = "TLL6527M";
  40. /*
  41. * Driver needs to know address, irq and flag pin.
  42. */
  43. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  44. static struct resource musb_resources[] = {
  45. [0] = {
  46. .start = 0xffc03800,
  47. .end = 0xffc03cff,
  48. .flags = IORESOURCE_MEM,
  49. },
  50. [1] = { /* general IRQ */
  51. .start = IRQ_USB_INT0,
  52. .end = IRQ_USB_INT0,
  53. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  54. },
  55. [2] = { /* DMA IRQ */
  56. .start = IRQ_USB_DMA,
  57. .end = IRQ_USB_DMA,
  58. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  59. },
  60. };
  61. static struct musb_hdrc_config musb_config = {
  62. .multipoint = 0,
  63. .dyn_fifo = 0,
  64. .soft_con = 1,
  65. .dma = 1,
  66. .num_eps = 8,
  67. .dma_channels = 8,
  68. /*.gpio_vrsel = GPIO_PG13,*/
  69. /* Some custom boards need to be active low, just set it to "0"
  70. * if it is the case.
  71. */
  72. .gpio_vrsel_active = 1,
  73. };
  74. static struct musb_hdrc_platform_data musb_plat = {
  75. #if defined(CONFIG_USB_MUSB_OTG)
  76. .mode = MUSB_OTG,
  77. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  78. .mode = MUSB_HOST,
  79. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  80. .mode = MUSB_PERIPHERAL,
  81. #endif
  82. .config = &musb_config,
  83. };
  84. static u64 musb_dmamask = ~(u32)0;
  85. static struct platform_device musb_device = {
  86. .name = "musb_hdrc",
  87. .id = 0,
  88. .dev = {
  89. .dma_mask = &musb_dmamask,
  90. .coherent_dma_mask = 0xffffffff,
  91. .platform_data = &musb_plat,
  92. },
  93. .num_resources = ARRAY_SIZE(musb_resources),
  94. .resource = musb_resources,
  95. };
  96. #endif
  97. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  98. #include <asm/bfin-lq035q1.h>
  99. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  100. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  101. .ppi_mode = USE_RGB565_16_BIT_PPI,
  102. .use_bl = 1,
  103. .gpio_bl = LCD_BACKLIGHT_GPIO,
  104. };
  105. static struct resource bfin_lq035q1_resources[] = {
  106. {
  107. .start = IRQ_PPI_ERROR,
  108. .end = IRQ_PPI_ERROR,
  109. .flags = IORESOURCE_IRQ,
  110. },
  111. };
  112. static struct platform_device bfin_lq035q1_device = {
  113. .name = "bfin-lq035q1",
  114. .id = -1,
  115. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  116. .resource = bfin_lq035q1_resources,
  117. .dev = {
  118. .platform_data = &bfin_lq035q1_data,
  119. },
  120. };
  121. #endif
  122. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  123. static struct mtd_partition tll6527m_partitions[] = {
  124. {
  125. .name = "bootloader(nor)",
  126. .size = 0xA0000,
  127. .offset = 0,
  128. }, {
  129. .name = "linux kernel(nor)",
  130. .size = 0xD00000,
  131. .offset = MTDPART_OFS_APPEND,
  132. }, {
  133. .name = "file system(nor)",
  134. .size = MTDPART_SIZ_FULL,
  135. .offset = MTDPART_OFS_APPEND,
  136. }
  137. };
  138. static struct physmap_flash_data tll6527m_flash_data = {
  139. .width = 2,
  140. .parts = tll6527m_partitions,
  141. .nr_parts = ARRAY_SIZE(tll6527m_partitions),
  142. };
  143. static unsigned tll6527m_flash_gpios[] = { GPIO_PG11, GPIO_PH11, GPIO_PH12 };
  144. static struct resource tll6527m_flash_resource[] = {
  145. {
  146. .name = "cfi_probe",
  147. .start = 0x20000000,
  148. .end = 0x201fffff,
  149. .flags = IORESOURCE_MEM,
  150. }, {
  151. .start = (unsigned long)tll6527m_flash_gpios,
  152. .end = ARRAY_SIZE(tll6527m_flash_gpios),
  153. .flags = IORESOURCE_IRQ,
  154. }
  155. };
  156. static struct platform_device tll6527m_flash_device = {
  157. .name = "gpio-addr-flash",
  158. .id = 0,
  159. .dev = {
  160. .platform_data = &tll6527m_flash_data,
  161. },
  162. .num_resources = ARRAY_SIZE(tll6527m_flash_resource),
  163. .resource = tll6527m_flash_resource,
  164. };
  165. #endif
  166. #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
  167. /* An SN74LVC138A 3:8 decoder chip has been used to generate 7 augmented
  168. * outputs used as SPI CS lines for all SPI SLAVE devices on TLL6527v1-0.
  169. * EXP_GPIO_SPISEL_BASE is the base number for the expanded outputs being
  170. * used as SPI CS lines, this should be > MAX_BLACKFIN_GPIOS
  171. */
  172. #include <linux/gpio-decoder.h>
  173. #define EXP_GPIO_SPISEL_BASE 0x64
  174. static unsigned gpio_addr_inputs[] = {
  175. GPIO_PG1, GPIO_PH9, GPIO_PH10
  176. };
  177. static struct gpio_decoder_platfrom_data spi_decoded_cs = {
  178. .base = EXP_GPIO_SPISEL_BASE,
  179. .input_addrs = gpio_addr_inputs,
  180. .nr_input_addrs = ARRAY_SIZE(gpio_addr_inputs),
  181. .default_output = 0,
  182. /* .default_output = (1 << ARRAY_SIZE(gpio_addr_inputs)) - 1 */
  183. };
  184. static struct platform_device spi_decoded_gpio = {
  185. .name = "gpio-decoder",
  186. .id = 0,
  187. .dev = {
  188. .platform_data = &spi_decoded_cs,
  189. },
  190. };
  191. #else
  192. #define EXP_GPIO_SPISEL_BASE 0x0
  193. #endif
  194. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  195. #include <linux/input/adxl34x.h>
  196. static const struct adxl34x_platform_data adxl345_info = {
  197. .x_axis_offset = 0,
  198. .y_axis_offset = 0,
  199. .z_axis_offset = 0,
  200. .tap_threshold = 0x31,
  201. .tap_duration = 0x10,
  202. .tap_latency = 0x60,
  203. .tap_window = 0xF0,
  204. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  205. .act_axis_control = 0xFF,
  206. .activity_threshold = 5,
  207. .inactivity_threshold = 2,
  208. .inactivity_time = 2,
  209. .free_fall_threshold = 0x7,
  210. .free_fall_time = 0x20,
  211. .data_rate = 0x8,
  212. .data_range = ADXL_FULL_RES,
  213. .ev_type = EV_ABS,
  214. .ev_code_x = ABS_X, /* EV_REL */
  215. .ev_code_y = ABS_Y, /* EV_REL */
  216. .ev_code_z = ABS_Z, /* EV_REL */
  217. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  218. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  219. .ev_code_act_inactivity = KEY_A, /* EV_KEY */
  220. .use_int2 = 1,
  221. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  222. .fifo_mode = ADXL_FIFO_STREAM,
  223. };
  224. #endif
  225. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  226. static struct platform_device rtc_device = {
  227. .name = "rtc-bfin",
  228. .id = -1,
  229. };
  230. #endif
  231. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  232. static struct platform_device bfin_mii_bus = {
  233. .name = "bfin_mii_bus",
  234. };
  235. static struct platform_device bfin_mac_device = {
  236. .name = "bfin_mac",
  237. .dev.platform_data = &bfin_mii_bus,
  238. };
  239. #endif
  240. #if defined(CONFIG_MTD_M25P80) \
  241. || defined(CONFIG_MTD_M25P80_MODULE)
  242. static struct mtd_partition bfin_spi_flash_partitions[] = {
  243. {
  244. .name = "bootloader(spi)",
  245. .size = 0x00040000,
  246. .offset = 0,
  247. .mask_flags = MTD_CAP_ROM
  248. }, {
  249. .name = "linux kernel(spi)",
  250. .size = MTDPART_SIZ_FULL,
  251. .offset = MTDPART_OFS_APPEND,
  252. }
  253. };
  254. static struct flash_platform_data bfin_spi_flash_data = {
  255. .name = "m25p80",
  256. .parts = bfin_spi_flash_partitions,
  257. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  258. .type = "m25p16",
  259. };
  260. /* SPI flash chip (m25p64) */
  261. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  262. .enable_dma = 0, /* use dma transfer with this chip*/
  263. .bits_per_word = 8,
  264. };
  265. #endif
  266. #if defined(CONFIG_BFIN_SPI_ADC) \
  267. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  268. /* SPI ADC chip */
  269. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  270. .enable_dma = 0, /* use dma transfer with this chip*/
  271. /*
  272. * tll6527m V1.0 does not support native spi slave selects
  273. * hence DMA mode will not be useful since the ADC needs
  274. * CS to toggle for each sample and cs_change_per_word
  275. * seems to be removed from spi_bfin5xx.c
  276. */
  277. .bits_per_word = 16,
  278. };
  279. #endif
  280. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  281. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  282. .enable_dma = 0,
  283. .bits_per_word = 8,
  284. };
  285. #endif
  286. #if defined(CONFIG_TOUCHSCREEN_AD7879) \
  287. || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  288. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  289. .model = 7879, /* Model = AD7879 */
  290. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  291. .pressure_max = 10000,
  292. .pressure_min = 0,
  293. .first_conversion_delay = 3,
  294. /* wait 512us before do a first conversion */
  295. .acquisition_time = 1, /* 4us acquisition time per sample */
  296. .median = 2, /* do 8 measurements */
  297. .averaging = 1,
  298. /* take the average of 4 middle samples */
  299. .pen_down_acc_interval = 255, /* 9.4 ms */
  300. .gpio_export = 1, /* configure AUX as GPIO output*/
  301. .gpio_base = LCD_BACKLIGHT_GPIO,
  302. };
  303. #endif
  304. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
  305. || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  306. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  307. .enable_dma = 0,
  308. .bits_per_word = 16,
  309. };
  310. #endif
  311. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  312. static struct bfin5xx_spi_chip spidev_chip_info = {
  313. .enable_dma = 0,
  314. .bits_per_word = 8,
  315. };
  316. #endif
  317. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  318. static struct platform_device bfin_i2s = {
  319. .name = "bfin-i2s",
  320. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  321. /* TODO: add platform data here */
  322. };
  323. #endif
  324. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  325. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  326. .enable_dma = 0,
  327. .bits_per_word = 8,
  328. };
  329. #endif
  330. #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
  331. static struct bfin5xx_spi_chip spi_mcp23s08_sys_chip_info = {
  332. .enable_dma = 0,
  333. .bits_per_word = 8,
  334. };
  335. static struct bfin5xx_spi_chip spi_mcp23s08_usr_chip_info = {
  336. .enable_dma = 0,
  337. .bits_per_word = 8,
  338. };
  339. #include <linux/spi/mcp23s08.h>
  340. static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
  341. .chip[0].is_present = true,
  342. .base = 0x30,
  343. };
  344. static const struct mcp23s08_platform_data bfin_mcp23s08_usr_gpio_info = {
  345. .chip[2].is_present = true,
  346. .base = 0x38,
  347. };
  348. #endif
  349. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  350. #if defined(CONFIG_MTD_M25P80) \
  351. || defined(CONFIG_MTD_M25P80_MODULE)
  352. {
  353. /* the modalias must be the same as spi device driver name */
  354. .modalias = "m25p80", /* Name of spi_driver for this device */
  355. .max_speed_hz = 25000000,
  356. /* max spi clock (SCK) speed in HZ */
  357. .bus_num = 0, /* Framework bus number */
  358. .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
  359. /* Can be connected to TLL6527M GPIO connector */
  360. /* Either SPI_ADC or M25P80 FLASH can be installed at a time */
  361. .platform_data = &bfin_spi_flash_data,
  362. .controller_data = &spi_flash_chip_info,
  363. .mode = SPI_MODE_3,
  364. },
  365. #endif
  366. #if defined(CONFIG_BFIN_SPI_ADC)
  367. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  368. {
  369. .modalias = "bfin_spi_adc",
  370. /* Name of spi_driver for this device */
  371. .max_speed_hz = 10000000,
  372. /* max spi clock (SCK) speed in HZ */
  373. .bus_num = 0, /* Framework bus number */
  374. .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
  375. /* Framework chip select. */
  376. .platform_data = NULL, /* No spi_driver specific config */
  377. .controller_data = &spi_adc_chip_info,
  378. .mode = SPI_MODE_0,
  379. },
  380. #endif
  381. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  382. {
  383. .modalias = "mmc_spi",
  384. /*
  385. * TLL6527M V1.0 does not support SD Card at SPI Clock > 10 MHz due to
  386. * SPI buffer limitations
  387. */
  388. .max_speed_hz = 10000000,
  389. /* max spi clock (SCK) speed in HZ */
  390. .bus_num = 0,
  391. .chip_select = EXP_GPIO_SPISEL_BASE + 0x05 + MAX_CTRL_CS,
  392. .controller_data = &mmc_spi_chip_info,
  393. .mode = SPI_MODE_0,
  394. },
  395. #endif
  396. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
  397. || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  398. {
  399. .modalias = "ad7879",
  400. .platform_data = &bfin_ad7879_ts_info,
  401. .irq = IRQ_PH14,
  402. .max_speed_hz = 5000000,
  403. /* max spi clock (SCK) speed in HZ */
  404. .bus_num = 0,
  405. .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
  406. .controller_data = &spi_ad7879_chip_info,
  407. .mode = SPI_CPHA | SPI_CPOL,
  408. },
  409. #endif
  410. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  411. {
  412. .modalias = "spidev",
  413. .max_speed_hz = 10000000,
  414. /* TLL6527Mv1-0 supports max spi clock (SCK) speed = 10 MHz */
  415. .bus_num = 0,
  416. .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
  417. .mode = SPI_CPHA | SPI_CPOL,
  418. .controller_data = &spidev_chip_info,
  419. },
  420. #endif
  421. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  422. {
  423. .modalias = "bfin-lq035q1-spi",
  424. .max_speed_hz = 20000000,
  425. .bus_num = 0,
  426. .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
  427. .controller_data = &lq035q1_spi_chip_info,
  428. .mode = SPI_CPHA | SPI_CPOL,
  429. },
  430. #endif
  431. #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
  432. {
  433. .modalias = "mcp23s08",
  434. .platform_data = &bfin_mcp23s08_sys_gpio_info,
  435. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  436. .bus_num = 0,
  437. .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
  438. .controller_data = &spi_mcp23s08_sys_chip_info,
  439. .mode = SPI_CPHA | SPI_CPOL,
  440. },
  441. {
  442. .modalias = "mcp23s08",
  443. .platform_data = &bfin_mcp23s08_usr_gpio_info,
  444. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  445. .bus_num = 0,
  446. .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
  447. .controller_data = &spi_mcp23s08_usr_chip_info,
  448. .mode = SPI_CPHA | SPI_CPOL,
  449. },
  450. #endif
  451. };
  452. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  453. /* SPI controller data */
  454. static struct bfin5xx_spi_master bfin_spi0_info = {
  455. .num_chipselect = EXP_GPIO_SPISEL_BASE + 8 + MAX_CTRL_CS,
  456. /* EXP_GPIO_SPISEL_BASE will be > MAX_BLACKFIN_GPIOS */
  457. .enable_dma = 1, /* master has the ability to do dma transfer */
  458. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  459. };
  460. /* SPI (0) */
  461. static struct resource bfin_spi0_resource[] = {
  462. [0] = {
  463. .start = SPI0_REGBASE,
  464. .end = SPI0_REGBASE + 0xFF,
  465. .flags = IORESOURCE_MEM,
  466. },
  467. [1] = {
  468. .start = CH_SPI,
  469. .end = CH_SPI,
  470. .flags = IORESOURCE_DMA,
  471. },
  472. [2] = {
  473. .start = IRQ_SPI,
  474. .end = IRQ_SPI,
  475. .flags = IORESOURCE_IRQ,
  476. },
  477. };
  478. static struct platform_device bfin_spi0_device = {
  479. .name = "bfin-spi",
  480. .id = 0, /* Bus number */
  481. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  482. .resource = bfin_spi0_resource,
  483. .dev = {
  484. .platform_data = &bfin_spi0_info, /* Passed to driver */
  485. },
  486. };
  487. #endif /* spi master and devices */
  488. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  489. #ifdef CONFIG_SERIAL_BFIN_UART0
  490. static struct resource bfin_uart0_resources[] = {
  491. {
  492. .start = UART0_THR,
  493. .end = UART0_GCTL+2,
  494. .flags = IORESOURCE_MEM,
  495. },
  496. {
  497. .start = IRQ_UART0_RX,
  498. .end = IRQ_UART0_RX+1,
  499. .flags = IORESOURCE_IRQ,
  500. },
  501. {
  502. .start = IRQ_UART0_ERROR,
  503. .end = IRQ_UART0_ERROR,
  504. .flags = IORESOURCE_IRQ,
  505. },
  506. {
  507. .start = CH_UART0_TX,
  508. .end = CH_UART0_TX,
  509. .flags = IORESOURCE_DMA,
  510. },
  511. {
  512. .start = CH_UART0_RX,
  513. .end = CH_UART0_RX,
  514. .flags = IORESOURCE_DMA,
  515. },
  516. };
  517. unsigned short bfin_uart0_peripherals[] = {
  518. P_UART0_TX, P_UART0_RX, 0
  519. };
  520. static struct platform_device bfin_uart0_device = {
  521. .name = "bfin-uart",
  522. .id = 0,
  523. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  524. .resource = bfin_uart0_resources,
  525. .dev = {
  526. .platform_data = &bfin_uart0_peripherals,
  527. /* Passed to driver */
  528. },
  529. };
  530. #endif
  531. #ifdef CONFIG_SERIAL_BFIN_UART1
  532. static struct resource bfin_uart1_resources[] = {
  533. {
  534. .start = UART1_THR,
  535. .end = UART1_GCTL+2,
  536. .flags = IORESOURCE_MEM,
  537. },
  538. {
  539. .start = IRQ_UART1_RX,
  540. .end = IRQ_UART1_RX+1,
  541. .flags = IORESOURCE_IRQ,
  542. },
  543. {
  544. .start = IRQ_UART1_ERROR,
  545. .end = IRQ_UART1_ERROR,
  546. .flags = IORESOURCE_IRQ,
  547. },
  548. {
  549. .start = CH_UART1_TX,
  550. .end = CH_UART1_TX,
  551. .flags = IORESOURCE_DMA,
  552. },
  553. {
  554. .start = CH_UART1_RX,
  555. .end = CH_UART1_RX,
  556. .flags = IORESOURCE_DMA,
  557. },
  558. #ifdef CONFIG_BFIN_UART1_CTSRTS
  559. { /* CTS pin */
  560. .start = GPIO_PF9,
  561. .end = GPIO_PF9,
  562. .flags = IORESOURCE_IO,
  563. },
  564. { /* RTS pin */
  565. .start = GPIO_PF10,
  566. .end = GPIO_PF10,
  567. .flags = IORESOURCE_IO,
  568. },
  569. #endif
  570. };
  571. unsigned short bfin_uart1_peripherals[] = {
  572. P_UART1_TX, P_UART1_RX, 0
  573. };
  574. static struct platform_device bfin_uart1_device = {
  575. .name = "bfin-uart",
  576. .id = 1,
  577. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  578. .resource = bfin_uart1_resources,
  579. .dev = {
  580. .platform_data = &bfin_uart1_peripherals,
  581. /* Passed to driver */
  582. },
  583. };
  584. #endif
  585. #endif
  586. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  587. #ifdef CONFIG_BFIN_SIR0
  588. static struct resource bfin_sir0_resources[] = {
  589. {
  590. .start = 0xFFC00400,
  591. .end = 0xFFC004FF,
  592. .flags = IORESOURCE_MEM,
  593. },
  594. {
  595. .start = IRQ_UART0_RX,
  596. .end = IRQ_UART0_RX+1,
  597. .flags = IORESOURCE_IRQ,
  598. },
  599. {
  600. .start = CH_UART0_RX,
  601. .end = CH_UART0_RX+1,
  602. .flags = IORESOURCE_DMA,
  603. },
  604. };
  605. static struct platform_device bfin_sir0_device = {
  606. .name = "bfin_sir",
  607. .id = 0,
  608. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  609. .resource = bfin_sir0_resources,
  610. };
  611. #endif
  612. #ifdef CONFIG_BFIN_SIR1
  613. static struct resource bfin_sir1_resources[] = {
  614. {
  615. .start = 0xFFC02000,
  616. .end = 0xFFC020FF,
  617. .flags = IORESOURCE_MEM,
  618. },
  619. {
  620. .start = IRQ_UART1_RX,
  621. .end = IRQ_UART1_RX+1,
  622. .flags = IORESOURCE_IRQ,
  623. },
  624. {
  625. .start = CH_UART1_RX,
  626. .end = CH_UART1_RX+1,
  627. .flags = IORESOURCE_DMA,
  628. },
  629. };
  630. static struct platform_device bfin_sir1_device = {
  631. .name = "bfin_sir",
  632. .id = 1,
  633. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  634. .resource = bfin_sir1_resources,
  635. };
  636. #endif
  637. #endif
  638. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  639. static struct resource bfin_twi0_resource[] = {
  640. [0] = {
  641. .start = TWI0_REGBASE,
  642. .end = TWI0_REGBASE,
  643. .flags = IORESOURCE_MEM,
  644. },
  645. [1] = {
  646. .start = IRQ_TWI,
  647. .end = IRQ_TWI,
  648. .flags = IORESOURCE_IRQ,
  649. },
  650. };
  651. static struct platform_device i2c_bfin_twi_device = {
  652. .name = "i2c-bfin-twi",
  653. .id = 0,
  654. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  655. .resource = bfin_twi0_resource,
  656. };
  657. #endif
  658. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  659. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  660. {
  661. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  662. },
  663. #endif
  664. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  665. {
  666. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  667. },
  668. #endif
  669. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) \
  670. || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  671. {
  672. I2C_BOARD_INFO("ad7879", 0x2C),
  673. .irq = IRQ_PH14,
  674. .platform_data = (void *)&bfin_ad7879_ts_info,
  675. },
  676. #endif
  677. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  678. {
  679. I2C_BOARD_INFO("ssm2602", 0x1b),
  680. },
  681. #endif
  682. {
  683. I2C_BOARD_INFO("adm1192", 0x2e),
  684. },
  685. {
  686. I2C_BOARD_INFO("ltc3576", 0x09),
  687. },
  688. #if defined(CONFIG_INPUT_ADXL34X_I2C) \
  689. || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  690. {
  691. I2C_BOARD_INFO("adxl34x", 0x53),
  692. .irq = IRQ_PH13,
  693. .platform_data = (void *)&adxl345_info,
  694. },
  695. #endif
  696. };
  697. #if defined(CONFIG_SERIAL_BFIN_SPORT) \
  698. || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  699. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  700. static struct resource bfin_sport0_uart_resources[] = {
  701. {
  702. .start = SPORT0_TCR1,
  703. .end = SPORT0_MRCS3+4,
  704. .flags = IORESOURCE_MEM,
  705. },
  706. {
  707. .start = IRQ_SPORT0_RX,
  708. .end = IRQ_SPORT0_RX+1,
  709. .flags = IORESOURCE_IRQ,
  710. },
  711. {
  712. .start = IRQ_SPORT0_ERROR,
  713. .end = IRQ_SPORT0_ERROR,
  714. .flags = IORESOURCE_IRQ,
  715. },
  716. };
  717. unsigned short bfin_sport0_peripherals[] = {
  718. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  719. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  720. };
  721. static struct platform_device bfin_sport0_uart_device = {
  722. .name = "bfin-sport-uart",
  723. .id = 0,
  724. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  725. .resource = bfin_sport0_uart_resources,
  726. .dev = {
  727. .platform_data = &bfin_sport0_peripherals,
  728. /* Passed to driver */
  729. },
  730. };
  731. #endif
  732. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  733. static struct resource bfin_sport1_uart_resources[] = {
  734. {
  735. .start = SPORT1_TCR1,
  736. .end = SPORT1_MRCS3+4,
  737. .flags = IORESOURCE_MEM,
  738. },
  739. {
  740. .start = IRQ_SPORT1_RX,
  741. .end = IRQ_SPORT1_RX+1,
  742. .flags = IORESOURCE_IRQ,
  743. },
  744. {
  745. .start = IRQ_SPORT1_ERROR,
  746. .end = IRQ_SPORT1_ERROR,
  747. .flags = IORESOURCE_IRQ,
  748. },
  749. };
  750. unsigned short bfin_sport1_peripherals[] = {
  751. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  752. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  753. };
  754. static struct platform_device bfin_sport1_uart_device = {
  755. .name = "bfin-sport-uart",
  756. .id = 1,
  757. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  758. .resource = bfin_sport1_uart_resources,
  759. .dev = {
  760. .platform_data = &bfin_sport1_peripherals,
  761. /* Passed to driver */
  762. },
  763. };
  764. #endif
  765. #endif
  766. static const unsigned int cclk_vlev_datasheet[] = {
  767. VRPAIR(VLEV_100, 400000000),
  768. VRPAIR(VLEV_105, 426000000),
  769. VRPAIR(VLEV_110, 500000000),
  770. VRPAIR(VLEV_115, 533000000),
  771. VRPAIR(VLEV_120, 600000000),
  772. };
  773. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  774. .tuple_tab = cclk_vlev_datasheet,
  775. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  776. .vr_settling_time = 25 /* us */,
  777. };
  778. static struct platform_device bfin_dpmc = {
  779. .name = "bfin dpmc",
  780. .dev = {
  781. .platform_data = &bfin_dmpc_vreg_data,
  782. },
  783. };
  784. static struct platform_device *tll6527m_devices[] __initdata = {
  785. &bfin_dpmc,
  786. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  787. &rtc_device,
  788. #endif
  789. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  790. &musb_device,
  791. #endif
  792. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  793. &bfin_mii_bus,
  794. &bfin_mac_device,
  795. #endif
  796. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  797. &bfin_spi0_device,
  798. #endif
  799. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  800. &bfin_lq035q1_device,
  801. #endif
  802. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  803. #ifdef CONFIG_SERIAL_BFIN_UART0
  804. &bfin_uart0_device,
  805. #endif
  806. #ifdef CONFIG_SERIAL_BFIN_UART1
  807. &bfin_uart1_device,
  808. #endif
  809. #endif
  810. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  811. #ifdef CONFIG_BFIN_SIR0
  812. &bfin_sir0_device,
  813. #endif
  814. #ifdef CONFIG_BFIN_SIR1
  815. &bfin_sir1_device,
  816. #endif
  817. #endif
  818. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  819. &i2c_bfin_twi_device,
  820. #endif
  821. #if defined(CONFIG_SERIAL_BFIN_SPORT) \
  822. || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  823. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  824. &bfin_sport0_uart_device,
  825. #endif
  826. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  827. &bfin_sport1_uart_device,
  828. #endif
  829. #endif
  830. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  831. &tll6527m_flash_device,
  832. #endif
  833. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  834. &bfin_i2s,
  835. #endif
  836. #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
  837. &spi_decoded_gpio,
  838. #endif
  839. };
  840. static int __init tll6527m_init(void)
  841. {
  842. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  843. i2c_register_board_info(0, bfin_i2c_board_info,
  844. ARRAY_SIZE(bfin_i2c_board_info));
  845. platform_add_devices(tll6527m_devices, ARRAY_SIZE(tll6527m_devices));
  846. spi_register_board_info(bfin_spi_board_info,
  847. ARRAY_SIZE(bfin_spi_board_info));
  848. return 0;
  849. }
  850. arch_initcall(tll6527m_init);
  851. static struct platform_device *tll6527m_early_devices[] __initdata = {
  852. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  853. #ifdef CONFIG_SERIAL_BFIN_UART0
  854. &bfin_uart0_device,
  855. #endif
  856. #ifdef CONFIG_SERIAL_BFIN_UART1
  857. &bfin_uart1_device,
  858. #endif
  859. #endif
  860. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  861. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  862. &bfin_sport0_uart_device,
  863. #endif
  864. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  865. &bfin_sport1_uart_device,
  866. #endif
  867. #endif
  868. };
  869. void __init native_machine_early_platform_add_devices(void)
  870. {
  871. printk(KERN_INFO "register early platform devices\n");
  872. early_platform_add_devices(tll6527m_early_devices,
  873. ARRAY_SIZE(tll6527m_early_devices));
  874. }
  875. void native_machine_restart(char *cmd)
  876. {
  877. /* workaround reboot hang when booting from SPI */
  878. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  879. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  880. }
  881. void bfin_get_ether_addr(char *addr)
  882. {
  883. /* the MAC is stored in OTP memory page 0xDF */
  884. u32 ret;
  885. u64 otp_mac;
  886. u32 (*otp_read)(u32 page, u32 flags,
  887. u64 *page_content) = (void *)0xEF00001A;
  888. ret = otp_read(0xDF, 0x00, &otp_mac);
  889. if (!(ret & 0x1)) {
  890. char *otp_mac_p = (char *)&otp_mac;
  891. for (ret = 0; ret < 6; ++ret)
  892. addr[ret] = otp_mac_p[5 - ret];
  893. }
  894. }
  895. EXPORT_SYMBOL(bfin_get_ether_addr);