kuroboxHG.dts 3.3 KB

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  1. /*
  2. * Device Tree Souce for Buffalo KuroboxHG
  3. *
  4. * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
  5. * the default configuration linkstation_defconfig.
  6. *
  7. * Based on sandpoint.dts
  8. *
  9. * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
  10. *
  11. * This file is licensed under
  12. * the terms of the GNU General Public License version 2. This program
  13. * is licensed "as is" without any warranty of any kind, whether express
  14. * or implied.
  15. XXXX add flash parts, rtc, ??
  16. */
  17. / {
  18. model = "KuroboxHG";
  19. compatible = "linkstation";
  20. #address-cells = <1>;
  21. #size-cells = <1>;
  22. cpus {
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. PowerPC,603e { /* Really 8241 */
  26. device_type = "cpu";
  27. reg = <0>;
  28. clock-frequency = <fdad680>; /* Fixed by bootloader */
  29. timebase-frequency = <1F04000>; /* Fixed by bootloader */
  30. bus-frequency = <0>; /* Fixed by bootloader */
  31. /* Following required by dtc but not used */
  32. i-cache-size = <4000>;
  33. d-cache-size = <4000>;
  34. };
  35. };
  36. memory {
  37. device_type = "memory";
  38. reg = <00000000 08000000>;
  39. };
  40. soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
  41. #address-cells = <1>;
  42. #size-cells = <1>;
  43. #interrupt-cells = <2>;
  44. device_type = "soc";
  45. compatible = "mpc10x";
  46. store-gathering = <0>; /* 0 == off, !0 == on */
  47. reg = <80000000 00100000>;
  48. ranges = <80000000 80000000 70000000 /* pci mem space */
  49. fc000000 fc000000 00100000 /* EUMB */
  50. fe000000 fe000000 00c00000 /* pci i/o space */
  51. fec00000 fec00000 00300000 /* pci cfg regs */
  52. fef00000 fef00000 00100000>; /* pci iack */
  53. i2c@80003000 {
  54. #address-cells = <1>;
  55. #size-cells = <0>;
  56. device_type = "i2c";
  57. compatible = "fsl-i2c";
  58. reg = <80003000 1000>;
  59. interrupts = <5 2>;
  60. interrupt-parent = <&mpic>;
  61. rtc@32 {
  62. device_type = "rtc";
  63. compatible = "ricoh,rs5c372a";
  64. reg = <32>;
  65. };
  66. };
  67. serial@80004500 {
  68. device_type = "serial";
  69. compatible = "ns16550";
  70. reg = <80004500 8>;
  71. clock-frequency = <7c044a8>;
  72. current-speed = <2580>;
  73. interrupts = <9 0>;
  74. interrupt-parent = <&mpic>;
  75. };
  76. serial@80004600 {
  77. device_type = "serial";
  78. compatible = "ns16550";
  79. reg = <80004600 8>;
  80. clock-frequency = <7c044a8>;
  81. current-speed = <e100>;
  82. interrupts = <a 0>;
  83. interrupt-parent = <&mpic>;
  84. };
  85. mpic: interrupt-controller@80040000 {
  86. #interrupt-cells = <2>;
  87. #address-cells = <0>;
  88. device_type = "open-pic";
  89. compatible = "chrp,open-pic";
  90. interrupt-controller;
  91. reg = <80040000 40000>;
  92. built-in;
  93. };
  94. pci@fec00000 {
  95. #address-cells = <3>;
  96. #size-cells = <2>;
  97. #interrupt-cells = <1>;
  98. device_type = "pci";
  99. compatible = "mpc10x-pci";
  100. reg = <fec00000 400000>;
  101. ranges = <01000000 0 0 fe000000 0 00c00000
  102. 02000000 0 80000000 80000000 0 70000000>;
  103. bus-range = <0 ff>;
  104. clock-frequency = <7f28155>;
  105. interrupt-parent = <&mpic>;
  106. interrupt-map-mask = <f800 0 0 7>;
  107. interrupt-map = <
  108. /* IDSEL 11 - IRQ0 ETH */
  109. 5800 0 0 1 &mpic 0 1
  110. 5800 0 0 2 &mpic 1 1
  111. 5800 0 0 3 &mpic 2 1
  112. 5800 0 0 4 &mpic 3 1
  113. /* IDSEL 12 - IRQ1 IDE0 */
  114. 6000 0 0 1 &mpic 1 1
  115. 6000 0 0 2 &mpic 2 1
  116. 6000 0 0 3 &mpic 3 1
  117. 6000 0 0 4 &mpic 0 1
  118. /* IDSEL 14 - IRQ3 USB2.0 */
  119. 7000 0 0 1 &mpic 3 1
  120. 7000 0 0 2 &mpic 3 1
  121. 7000 0 0 3 &mpic 3 1
  122. 7000 0 0 4 &mpic 3 1
  123. >;
  124. };
  125. };
  126. };