grumain.c 25 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * DRIVER TABLE MANAGER + GRU CONTEXT LOAD/UNLOAD
  5. *
  6. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/slab.h>
  24. #include <linux/mm.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sched.h>
  27. #include <linux/device.h>
  28. #include <linux/list.h>
  29. #include <linux/err.h>
  30. #include <asm/uv/uv_hub.h>
  31. #include "gru.h"
  32. #include "grutables.h"
  33. #include "gruhandles.h"
  34. unsigned long gru_options __read_mostly;
  35. static struct device_driver gru_driver = {
  36. .name = "gru"
  37. };
  38. static struct device gru_device = {
  39. .init_name = "",
  40. .driver = &gru_driver,
  41. };
  42. struct device *grudev = &gru_device;
  43. /*
  44. * Select a gru fault map to be used by the current cpu. Note that
  45. * multiple cpus may be using the same map.
  46. * ZZZ should "shift" be used?? Depends on HT cpu numbering
  47. * ZZZ should be inline but did not work on emulator
  48. */
  49. int gru_cpu_fault_map_id(void)
  50. {
  51. return uv_blade_processor_id() % GRU_NUM_TFM;
  52. }
  53. /*--------- ASID Management -------------------------------------------
  54. *
  55. * Initially, assign asids sequentially from MIN_ASID .. MAX_ASID.
  56. * Once MAX is reached, flush the TLB & start over. However,
  57. * some asids may still be in use. There won't be many (percentage wise) still
  58. * in use. Search active contexts & determine the value of the first
  59. * asid in use ("x"s below). Set "limit" to this value.
  60. * This defines a block of assignable asids.
  61. *
  62. * When "limit" is reached, search forward from limit+1 and determine the
  63. * next block of assignable asids.
  64. *
  65. * Repeat until MAX_ASID is reached, then start over again.
  66. *
  67. * Each time MAX_ASID is reached, increment the asid generation. Since
  68. * the search for in-use asids only checks contexts with GRUs currently
  69. * assigned, asids in some contexts will be missed. Prior to loading
  70. * a context, the asid generation of the GTS asid is rechecked. If it
  71. * doesn't match the current generation, a new asid will be assigned.
  72. *
  73. * 0---------------x------------x---------------------x----|
  74. * ^-next ^-limit ^-MAX_ASID
  75. *
  76. * All asid manipulation & context loading/unloading is protected by the
  77. * gs_lock.
  78. */
  79. /* Hit the asid limit. Start over */
  80. static int gru_wrap_asid(struct gru_state *gru)
  81. {
  82. gru_dbg(grudev, "gid %d\n", gru->gs_gid);
  83. STAT(asid_wrap);
  84. gru->gs_asid_gen++;
  85. return MIN_ASID;
  86. }
  87. /* Find the next chunk of unused asids */
  88. static int gru_reset_asid_limit(struct gru_state *gru, int asid)
  89. {
  90. int i, gid, inuse_asid, limit;
  91. gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid);
  92. STAT(asid_next);
  93. limit = MAX_ASID;
  94. if (asid >= limit)
  95. asid = gru_wrap_asid(gru);
  96. gru_flush_all_tlb(gru);
  97. gid = gru->gs_gid;
  98. again:
  99. for (i = 0; i < GRU_NUM_CCH; i++) {
  100. if (!gru->gs_gts[i] || is_kernel_context(gru->gs_gts[i]))
  101. continue;
  102. inuse_asid = gru->gs_gts[i]->ts_gms->ms_asids[gid].mt_asid;
  103. gru_dbg(grudev, "gid %d, gts %p, gms %p, inuse 0x%x, cxt %d\n",
  104. gru->gs_gid, gru->gs_gts[i], gru->gs_gts[i]->ts_gms,
  105. inuse_asid, i);
  106. if (inuse_asid == asid) {
  107. asid += ASID_INC;
  108. if (asid >= limit) {
  109. /*
  110. * empty range: reset the range limit and
  111. * start over
  112. */
  113. limit = MAX_ASID;
  114. if (asid >= MAX_ASID)
  115. asid = gru_wrap_asid(gru);
  116. goto again;
  117. }
  118. }
  119. if ((inuse_asid > asid) && (inuse_asid < limit))
  120. limit = inuse_asid;
  121. }
  122. gru->gs_asid_limit = limit;
  123. gru->gs_asid = asid;
  124. gru_dbg(grudev, "gid %d, new asid 0x%x, new_limit 0x%x\n", gru->gs_gid,
  125. asid, limit);
  126. return asid;
  127. }
  128. /* Assign a new ASID to a thread context. */
  129. static int gru_assign_asid(struct gru_state *gru)
  130. {
  131. int asid;
  132. gru->gs_asid += ASID_INC;
  133. asid = gru->gs_asid;
  134. if (asid >= gru->gs_asid_limit)
  135. asid = gru_reset_asid_limit(gru, asid);
  136. gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid);
  137. return asid;
  138. }
  139. /*
  140. * Clear n bits in a word. Return a word indicating the bits that were cleared.
  141. * Optionally, build an array of chars that contain the bit numbers allocated.
  142. */
  143. static unsigned long reserve_resources(unsigned long *p, int n, int mmax,
  144. char *idx)
  145. {
  146. unsigned long bits = 0;
  147. int i;
  148. while (n--) {
  149. i = find_first_bit(p, mmax);
  150. if (i == mmax)
  151. BUG();
  152. __clear_bit(i, p);
  153. __set_bit(i, &bits);
  154. if (idx)
  155. *idx++ = i;
  156. }
  157. return bits;
  158. }
  159. unsigned long gru_reserve_cb_resources(struct gru_state *gru, int cbr_au_count,
  160. char *cbmap)
  161. {
  162. return reserve_resources(&gru->gs_cbr_map, cbr_au_count, GRU_CBR_AU,
  163. cbmap);
  164. }
  165. unsigned long gru_reserve_ds_resources(struct gru_state *gru, int dsr_au_count,
  166. char *dsmap)
  167. {
  168. return reserve_resources(&gru->gs_dsr_map, dsr_au_count, GRU_DSR_AU,
  169. dsmap);
  170. }
  171. static void reserve_gru_resources(struct gru_state *gru,
  172. struct gru_thread_state *gts)
  173. {
  174. gru->gs_active_contexts++;
  175. gts->ts_cbr_map =
  176. gru_reserve_cb_resources(gru, gts->ts_cbr_au_count,
  177. gts->ts_cbr_idx);
  178. gts->ts_dsr_map =
  179. gru_reserve_ds_resources(gru, gts->ts_dsr_au_count, NULL);
  180. }
  181. static void free_gru_resources(struct gru_state *gru,
  182. struct gru_thread_state *gts)
  183. {
  184. gru->gs_active_contexts--;
  185. gru->gs_cbr_map |= gts->ts_cbr_map;
  186. gru->gs_dsr_map |= gts->ts_dsr_map;
  187. }
  188. /*
  189. * Check if a GRU has sufficient free resources to satisfy an allocation
  190. * request. Note: GRU locks may or may not be held when this is called. If
  191. * not held, recheck after acquiring the appropriate locks.
  192. *
  193. * Returns 1 if sufficient resources, 0 if not
  194. */
  195. static int check_gru_resources(struct gru_state *gru, int cbr_au_count,
  196. int dsr_au_count, int max_active_contexts)
  197. {
  198. return hweight64(gru->gs_cbr_map) >= cbr_au_count
  199. && hweight64(gru->gs_dsr_map) >= dsr_au_count
  200. && gru->gs_active_contexts < max_active_contexts;
  201. }
  202. /*
  203. * TLB manangment requires tracking all GRU chiplets that have loaded a GSEG
  204. * context.
  205. */
  206. static int gru_load_mm_tracker(struct gru_state *gru,
  207. struct gru_thread_state *gts)
  208. {
  209. struct gru_mm_struct *gms = gts->ts_gms;
  210. struct gru_mm_tracker *asids = &gms->ms_asids[gru->gs_gid];
  211. unsigned short ctxbitmap = (1 << gts->ts_ctxnum);
  212. int asid;
  213. spin_lock(&gms->ms_asid_lock);
  214. asid = asids->mt_asid;
  215. spin_lock(&gru->gs_asid_lock);
  216. if (asid == 0 || (asids->mt_ctxbitmap == 0 && asids->mt_asid_gen !=
  217. gru->gs_asid_gen)) {
  218. asid = gru_assign_asid(gru);
  219. asids->mt_asid = asid;
  220. asids->mt_asid_gen = gru->gs_asid_gen;
  221. STAT(asid_new);
  222. } else {
  223. STAT(asid_reuse);
  224. }
  225. spin_unlock(&gru->gs_asid_lock);
  226. BUG_ON(asids->mt_ctxbitmap & ctxbitmap);
  227. asids->mt_ctxbitmap |= ctxbitmap;
  228. if (!test_bit(gru->gs_gid, gms->ms_asidmap))
  229. __set_bit(gru->gs_gid, gms->ms_asidmap);
  230. spin_unlock(&gms->ms_asid_lock);
  231. gru_dbg(grudev,
  232. "gid %d, gts %p, gms %p, ctxnum %d, asid 0x%x, asidmap 0x%lx\n",
  233. gru->gs_gid, gts, gms, gts->ts_ctxnum, asid,
  234. gms->ms_asidmap[0]);
  235. return asid;
  236. }
  237. static void gru_unload_mm_tracker(struct gru_state *gru,
  238. struct gru_thread_state *gts)
  239. {
  240. struct gru_mm_struct *gms = gts->ts_gms;
  241. struct gru_mm_tracker *asids;
  242. unsigned short ctxbitmap;
  243. asids = &gms->ms_asids[gru->gs_gid];
  244. ctxbitmap = (1 << gts->ts_ctxnum);
  245. spin_lock(&gms->ms_asid_lock);
  246. spin_lock(&gru->gs_asid_lock);
  247. BUG_ON((asids->mt_ctxbitmap & ctxbitmap) != ctxbitmap);
  248. asids->mt_ctxbitmap ^= ctxbitmap;
  249. gru_dbg(grudev, "gid %d, gts %p, gms %p, ctxnum 0x%d, asidmap 0x%lx\n",
  250. gru->gs_gid, gts, gms, gts->ts_ctxnum, gms->ms_asidmap[0]);
  251. spin_unlock(&gru->gs_asid_lock);
  252. spin_unlock(&gms->ms_asid_lock);
  253. }
  254. /*
  255. * Decrement the reference count on a GTS structure. Free the structure
  256. * if the reference count goes to zero.
  257. */
  258. void gts_drop(struct gru_thread_state *gts)
  259. {
  260. if (gts && atomic_dec_return(&gts->ts_refcnt) == 0) {
  261. if (gts->ts_gms)
  262. gru_drop_mmu_notifier(gts->ts_gms);
  263. kfree(gts);
  264. STAT(gts_free);
  265. }
  266. }
  267. /*
  268. * Locate the GTS structure for the current thread.
  269. */
  270. static struct gru_thread_state *gru_find_current_gts_nolock(struct gru_vma_data
  271. *vdata, int tsid)
  272. {
  273. struct gru_thread_state *gts;
  274. list_for_each_entry(gts, &vdata->vd_head, ts_next)
  275. if (gts->ts_tsid == tsid)
  276. return gts;
  277. return NULL;
  278. }
  279. /*
  280. * Allocate a thread state structure.
  281. */
  282. struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
  283. int cbr_au_count, int dsr_au_count, int options, int tsid)
  284. {
  285. struct gru_thread_state *gts;
  286. struct gru_mm_struct *gms;
  287. int bytes;
  288. bytes = DSR_BYTES(dsr_au_count) + CBR_BYTES(cbr_au_count);
  289. bytes += sizeof(struct gru_thread_state);
  290. gts = kmalloc(bytes, GFP_KERNEL);
  291. if (!gts)
  292. return ERR_PTR(-ENOMEM);
  293. STAT(gts_alloc);
  294. memset(gts, 0, sizeof(struct gru_thread_state)); /* zero out header */
  295. atomic_set(&gts->ts_refcnt, 1);
  296. mutex_init(&gts->ts_ctxlock);
  297. gts->ts_cbr_au_count = cbr_au_count;
  298. gts->ts_dsr_au_count = dsr_au_count;
  299. gts->ts_user_options = options;
  300. gts->ts_user_blade_id = -1;
  301. gts->ts_user_chiplet_id = -1;
  302. gts->ts_tsid = tsid;
  303. gts->ts_ctxnum = NULLCTX;
  304. gts->ts_tlb_int_select = -1;
  305. gts->ts_cch_req_slice = -1;
  306. gts->ts_sizeavail = GRU_SIZEAVAIL(PAGE_SHIFT);
  307. if (vma) {
  308. gts->ts_mm = current->mm;
  309. gts->ts_vma = vma;
  310. gms = gru_register_mmu_notifier();
  311. if (IS_ERR(gms))
  312. goto err;
  313. gts->ts_gms = gms;
  314. }
  315. gru_dbg(grudev, "alloc gts %p\n", gts);
  316. return gts;
  317. err:
  318. gts_drop(gts);
  319. return ERR_CAST(gms);
  320. }
  321. /*
  322. * Allocate a vma private data structure.
  323. */
  324. struct gru_vma_data *gru_alloc_vma_data(struct vm_area_struct *vma, int tsid)
  325. {
  326. struct gru_vma_data *vdata = NULL;
  327. vdata = kmalloc(sizeof(*vdata), GFP_KERNEL);
  328. if (!vdata)
  329. return NULL;
  330. INIT_LIST_HEAD(&vdata->vd_head);
  331. spin_lock_init(&vdata->vd_lock);
  332. gru_dbg(grudev, "alloc vdata %p\n", vdata);
  333. return vdata;
  334. }
  335. /*
  336. * Find the thread state structure for the current thread.
  337. */
  338. struct gru_thread_state *gru_find_thread_state(struct vm_area_struct *vma,
  339. int tsid)
  340. {
  341. struct gru_vma_data *vdata = vma->vm_private_data;
  342. struct gru_thread_state *gts;
  343. spin_lock(&vdata->vd_lock);
  344. gts = gru_find_current_gts_nolock(vdata, tsid);
  345. spin_unlock(&vdata->vd_lock);
  346. gru_dbg(grudev, "vma %p, gts %p\n", vma, gts);
  347. return gts;
  348. }
  349. /*
  350. * Allocate a new thread state for a GSEG. Note that races may allow
  351. * another thread to race to create a gts.
  352. */
  353. struct gru_thread_state *gru_alloc_thread_state(struct vm_area_struct *vma,
  354. int tsid)
  355. {
  356. struct gru_vma_data *vdata = vma->vm_private_data;
  357. struct gru_thread_state *gts, *ngts;
  358. gts = gru_alloc_gts(vma, vdata->vd_cbr_au_count, vdata->vd_dsr_au_count,
  359. vdata->vd_user_options, tsid);
  360. if (IS_ERR(gts))
  361. return gts;
  362. spin_lock(&vdata->vd_lock);
  363. ngts = gru_find_current_gts_nolock(vdata, tsid);
  364. if (ngts) {
  365. gts_drop(gts);
  366. gts = ngts;
  367. STAT(gts_double_allocate);
  368. } else {
  369. list_add(&gts->ts_next, &vdata->vd_head);
  370. }
  371. spin_unlock(&vdata->vd_lock);
  372. gru_dbg(grudev, "vma %p, gts %p\n", vma, gts);
  373. return gts;
  374. }
  375. /*
  376. * Free the GRU context assigned to the thread state.
  377. */
  378. static void gru_free_gru_context(struct gru_thread_state *gts)
  379. {
  380. struct gru_state *gru;
  381. gru = gts->ts_gru;
  382. gru_dbg(grudev, "gts %p, gid %d\n", gts, gru->gs_gid);
  383. spin_lock(&gru->gs_lock);
  384. gru->gs_gts[gts->ts_ctxnum] = NULL;
  385. free_gru_resources(gru, gts);
  386. BUG_ON(test_bit(gts->ts_ctxnum, &gru->gs_context_map) == 0);
  387. __clear_bit(gts->ts_ctxnum, &gru->gs_context_map);
  388. gts->ts_ctxnum = NULLCTX;
  389. gts->ts_gru = NULL;
  390. gts->ts_blade = -1;
  391. spin_unlock(&gru->gs_lock);
  392. gts_drop(gts);
  393. STAT(free_context);
  394. }
  395. /*
  396. * Prefetching cachelines help hardware performance.
  397. * (Strictly a performance enhancement. Not functionally required).
  398. */
  399. static void prefetch_data(void *p, int num, int stride)
  400. {
  401. while (num-- > 0) {
  402. prefetchw(p);
  403. p += stride;
  404. }
  405. }
  406. static inline long gru_copy_handle(void *d, void *s)
  407. {
  408. memcpy(d, s, GRU_HANDLE_BYTES);
  409. return GRU_HANDLE_BYTES;
  410. }
  411. static void gru_prefetch_context(void *gseg, void *cb, void *cbe,
  412. unsigned long cbrmap, unsigned long length)
  413. {
  414. int i, scr;
  415. prefetch_data(gseg + GRU_DS_BASE, length / GRU_CACHE_LINE_BYTES,
  416. GRU_CACHE_LINE_BYTES);
  417. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  418. prefetch_data(cb, 1, GRU_CACHE_LINE_BYTES);
  419. prefetch_data(cbe + i * GRU_HANDLE_STRIDE, 1,
  420. GRU_CACHE_LINE_BYTES);
  421. cb += GRU_HANDLE_STRIDE;
  422. }
  423. }
  424. static void gru_load_context_data(void *save, void *grubase, int ctxnum,
  425. unsigned long cbrmap, unsigned long dsrmap,
  426. int data_valid)
  427. {
  428. void *gseg, *cb, *cbe;
  429. unsigned long length;
  430. int i, scr;
  431. gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
  432. cb = gseg + GRU_CB_BASE;
  433. cbe = grubase + GRU_CBE_BASE;
  434. length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
  435. gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
  436. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  437. if (data_valid) {
  438. save += gru_copy_handle(cb, save);
  439. save += gru_copy_handle(cbe + i * GRU_HANDLE_STRIDE,
  440. save);
  441. } else {
  442. memset(cb, 0, GRU_CACHE_LINE_BYTES);
  443. memset(cbe + i * GRU_HANDLE_STRIDE, 0,
  444. GRU_CACHE_LINE_BYTES);
  445. }
  446. cb += GRU_HANDLE_STRIDE;
  447. }
  448. if (data_valid)
  449. memcpy(gseg + GRU_DS_BASE, save, length);
  450. else
  451. memset(gseg + GRU_DS_BASE, 0, length);
  452. }
  453. static void gru_unload_context_data(void *save, void *grubase, int ctxnum,
  454. unsigned long cbrmap, unsigned long dsrmap)
  455. {
  456. void *gseg, *cb, *cbe;
  457. unsigned long length;
  458. int i, scr;
  459. gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
  460. cb = gseg + GRU_CB_BASE;
  461. cbe = grubase + GRU_CBE_BASE;
  462. length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
  463. gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
  464. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  465. save += gru_copy_handle(save, cb);
  466. save += gru_copy_handle(save, cbe + i * GRU_HANDLE_STRIDE);
  467. cb += GRU_HANDLE_STRIDE;
  468. }
  469. memcpy(save, gseg + GRU_DS_BASE, length);
  470. }
  471. void gru_unload_context(struct gru_thread_state *gts, int savestate)
  472. {
  473. struct gru_state *gru = gts->ts_gru;
  474. struct gru_context_configuration_handle *cch;
  475. int ctxnum = gts->ts_ctxnum;
  476. if (!is_kernel_context(gts))
  477. zap_vma_ptes(gts->ts_vma, UGRUADDR(gts), GRU_GSEG_PAGESIZE);
  478. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  479. gru_dbg(grudev, "gts %p\n", gts);
  480. lock_cch_handle(cch);
  481. if (cch_interrupt_sync(cch))
  482. BUG();
  483. if (!is_kernel_context(gts))
  484. gru_unload_mm_tracker(gru, gts);
  485. if (savestate) {
  486. gru_unload_context_data(gts->ts_gdata, gru->gs_gru_base_vaddr,
  487. ctxnum, gts->ts_cbr_map,
  488. gts->ts_dsr_map);
  489. gts->ts_data_valid = 1;
  490. }
  491. if (cch_deallocate(cch))
  492. BUG();
  493. unlock_cch_handle(cch);
  494. gru_free_gru_context(gts);
  495. }
  496. /*
  497. * Load a GRU context by copying it from the thread data structure in memory
  498. * to the GRU.
  499. */
  500. void gru_load_context(struct gru_thread_state *gts)
  501. {
  502. struct gru_state *gru = gts->ts_gru;
  503. struct gru_context_configuration_handle *cch;
  504. int i, err, asid, ctxnum = gts->ts_ctxnum;
  505. gru_dbg(grudev, "gts %p\n", gts);
  506. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  507. lock_cch_handle(cch);
  508. cch->tfm_fault_bit_enable =
  509. (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
  510. || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  511. cch->tlb_int_enable = (gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  512. if (cch->tlb_int_enable) {
  513. gts->ts_tlb_int_select = gru_cpu_fault_map_id();
  514. cch->tlb_int_select = gts->ts_tlb_int_select;
  515. }
  516. if (gts->ts_cch_req_slice >= 0) {
  517. cch->req_slice_set_enable = 1;
  518. cch->req_slice = gts->ts_cch_req_slice;
  519. } else {
  520. cch->req_slice_set_enable =0;
  521. }
  522. cch->tfm_done_bit_enable = 0;
  523. cch->dsr_allocation_map = gts->ts_dsr_map;
  524. cch->cbr_allocation_map = gts->ts_cbr_map;
  525. if (is_kernel_context(gts)) {
  526. cch->unmap_enable = 1;
  527. cch->tfm_done_bit_enable = 1;
  528. cch->cb_int_enable = 1;
  529. } else {
  530. cch->unmap_enable = 0;
  531. cch->tfm_done_bit_enable = 0;
  532. cch->cb_int_enable = 0;
  533. asid = gru_load_mm_tracker(gru, gts);
  534. for (i = 0; i < 8; i++) {
  535. cch->asid[i] = asid + i;
  536. cch->sizeavail[i] = gts->ts_sizeavail;
  537. }
  538. }
  539. err = cch_allocate(cch);
  540. if (err) {
  541. gru_dbg(grudev,
  542. "err %d: cch %p, gts %p, cbr 0x%lx, dsr 0x%lx\n",
  543. err, cch, gts, gts->ts_cbr_map, gts->ts_dsr_map);
  544. BUG();
  545. }
  546. gru_load_context_data(gts->ts_gdata, gru->gs_gru_base_vaddr, ctxnum,
  547. gts->ts_cbr_map, gts->ts_dsr_map, gts->ts_data_valid);
  548. if (cch_start(cch))
  549. BUG();
  550. unlock_cch_handle(cch);
  551. }
  552. /*
  553. * Update fields in an active CCH:
  554. * - retarget interrupts on local blade
  555. * - update sizeavail mask
  556. */
  557. int gru_update_cch(struct gru_thread_state *gts)
  558. {
  559. struct gru_context_configuration_handle *cch;
  560. struct gru_state *gru = gts->ts_gru;
  561. int i, ctxnum = gts->ts_ctxnum, ret = 0;
  562. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  563. lock_cch_handle(cch);
  564. if (cch->state == CCHSTATE_ACTIVE) {
  565. if (gru->gs_gts[gts->ts_ctxnum] != gts)
  566. goto exit;
  567. if (cch_interrupt(cch))
  568. BUG();
  569. for (i = 0; i < 8; i++)
  570. cch->sizeavail[i] = gts->ts_sizeavail;
  571. gts->ts_tlb_int_select = gru_cpu_fault_map_id();
  572. cch->tlb_int_select = gru_cpu_fault_map_id();
  573. cch->tfm_fault_bit_enable =
  574. (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
  575. || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  576. if (cch_start(cch))
  577. BUG();
  578. ret = 1;
  579. }
  580. exit:
  581. unlock_cch_handle(cch);
  582. return ret;
  583. }
  584. /*
  585. * Update CCH tlb interrupt select. Required when all the following is true:
  586. * - task's GRU context is loaded into a GRU
  587. * - task is using interrupt notification for TLB faults
  588. * - task has migrated to a different cpu on the same blade where
  589. * it was previously running.
  590. */
  591. static int gru_retarget_intr(struct gru_thread_state *gts)
  592. {
  593. if (gts->ts_tlb_int_select < 0
  594. || gts->ts_tlb_int_select == gru_cpu_fault_map_id())
  595. return 0;
  596. gru_dbg(grudev, "retarget from %d to %d\n", gts->ts_tlb_int_select,
  597. gru_cpu_fault_map_id());
  598. return gru_update_cch(gts);
  599. }
  600. /*
  601. * Unload the gru context if it is not assigned to the correct blade or
  602. * chiplet. Misassignment can occur if the process migrates to a different
  603. * blade or if the user changes the selected blade/chiplet.
  604. * Return 0 if context correct placed, otherwise 1
  605. */
  606. void gru_check_context_placement(struct gru_thread_state *gts)
  607. {
  608. struct gru_state *gru;
  609. int blade_id, chiplet_id;
  610. /*
  611. * If the current task is the context owner, verify that the
  612. * context is correctly placed. This test is skipped for non-owner
  613. * references. Pthread apps use non-owner references to the CBRs.
  614. */
  615. gru = gts->ts_gru;
  616. if (!gru || gts->ts_tgid_owner != current->tgid)
  617. return;
  618. blade_id = gts->ts_user_blade_id;
  619. if (blade_id < 0)
  620. blade_id = uv_numa_blade_id();
  621. chiplet_id = gts->ts_user_chiplet_id;
  622. if (gru->gs_blade_id != blade_id ||
  623. (chiplet_id >= 0 && chiplet_id != gru->gs_chiplet_id)) {
  624. STAT(check_context_unload);
  625. gru_unload_context(gts, 1);
  626. } else if (gru_retarget_intr(gts)) {
  627. STAT(check_context_retarget_intr);
  628. }
  629. }
  630. /*
  631. * Insufficient GRU resources available on the local blade. Steal a context from
  632. * a process. This is a hack until a _real_ resource scheduler is written....
  633. */
  634. #define next_ctxnum(n) ((n) < GRU_NUM_CCH - 2 ? (n) + 1 : 0)
  635. #define next_gru(b, g) (((g) < &(b)->bs_grus[GRU_CHIPLETS_PER_BLADE - 1]) ? \
  636. ((g)+1) : &(b)->bs_grus[0])
  637. static int is_gts_stealable(struct gru_thread_state *gts,
  638. struct gru_blade_state *bs)
  639. {
  640. if (is_kernel_context(gts))
  641. return down_write_trylock(&bs->bs_kgts_sema);
  642. else
  643. return mutex_trylock(&gts->ts_ctxlock);
  644. }
  645. static void gts_stolen(struct gru_thread_state *gts,
  646. struct gru_blade_state *bs)
  647. {
  648. if (is_kernel_context(gts)) {
  649. up_write(&bs->bs_kgts_sema);
  650. STAT(steal_kernel_context);
  651. } else {
  652. mutex_unlock(&gts->ts_ctxlock);
  653. STAT(steal_user_context);
  654. }
  655. }
  656. void gru_steal_context(struct gru_thread_state *gts)
  657. {
  658. struct gru_blade_state *blade;
  659. struct gru_state *gru, *gru0;
  660. struct gru_thread_state *ngts = NULL;
  661. int ctxnum, ctxnum0, flag = 0, cbr, dsr;
  662. int blade_id = gts->ts_user_blade_id;
  663. int chiplet_id = gts->ts_user_chiplet_id;
  664. if (blade_id < 0)
  665. blade_id = uv_numa_blade_id();
  666. cbr = gts->ts_cbr_au_count;
  667. dsr = gts->ts_dsr_au_count;
  668. blade = gru_base[blade_id];
  669. spin_lock(&blade->bs_lock);
  670. ctxnum = next_ctxnum(blade->bs_lru_ctxnum);
  671. gru = blade->bs_lru_gru;
  672. if (ctxnum == 0)
  673. gru = next_gru(blade, gru);
  674. blade->bs_lru_gru = gru;
  675. blade->bs_lru_ctxnum = ctxnum;
  676. ctxnum0 = ctxnum;
  677. gru0 = gru;
  678. while (1) {
  679. if (chiplet_id < 0 || chiplet_id == gru->gs_chiplet_id) {
  680. if (check_gru_resources(gru, cbr, dsr, GRU_NUM_CCH))
  681. break;
  682. spin_lock(&gru->gs_lock);
  683. for (; ctxnum < GRU_NUM_CCH; ctxnum++) {
  684. if (flag && gru == gru0 && ctxnum == ctxnum0)
  685. break;
  686. ngts = gru->gs_gts[ctxnum];
  687. /*
  688. * We are grabbing locks out of order, so trylock is
  689. * needed. GTSs are usually not locked, so the odds of
  690. * success are high. If trylock fails, try to steal a
  691. * different GSEG.
  692. */
  693. if (ngts && is_gts_stealable(ngts, blade))
  694. break;
  695. ngts = NULL;
  696. }
  697. spin_unlock(&gru->gs_lock);
  698. if (ngts || (flag && gru == gru0 && ctxnum == ctxnum0))
  699. break;
  700. }
  701. if (flag && gru == gru0)
  702. break;
  703. flag = 1;
  704. ctxnum = 0;
  705. gru = next_gru(blade, gru);
  706. }
  707. spin_unlock(&blade->bs_lock);
  708. if (ngts) {
  709. gts->ustats.context_stolen++;
  710. ngts->ts_steal_jiffies = jiffies;
  711. gru_unload_context(ngts, is_kernel_context(ngts) ? 0 : 1);
  712. gts_stolen(ngts, blade);
  713. } else {
  714. STAT(steal_context_failed);
  715. }
  716. gru_dbg(grudev,
  717. "stole gid %d, ctxnum %d from gts %p. Need cb %d, ds %d;"
  718. " avail cb %ld, ds %ld\n",
  719. gru->gs_gid, ctxnum, ngts, cbr, dsr, hweight64(gru->gs_cbr_map),
  720. hweight64(gru->gs_dsr_map));
  721. }
  722. /*
  723. * Assign a gru context.
  724. */
  725. static int gru_assign_context_number(struct gru_state *gru)
  726. {
  727. int ctxnum;
  728. ctxnum = find_first_zero_bit(&gru->gs_context_map, GRU_NUM_CCH);
  729. __set_bit(ctxnum, &gru->gs_context_map);
  730. return ctxnum;
  731. }
  732. /*
  733. * Scan the GRUs on the local blade & assign a GRU context.
  734. */
  735. struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts)
  736. {
  737. struct gru_state *gru, *grux;
  738. int i, max_active_contexts;
  739. int blade_id = gts->ts_user_blade_id;
  740. int chiplet_id = gts->ts_user_chiplet_id;
  741. if (blade_id < 0)
  742. blade_id = uv_numa_blade_id();
  743. again:
  744. gru = NULL;
  745. max_active_contexts = GRU_NUM_CCH;
  746. for_each_gru_on_blade(grux, blade_id, i) {
  747. if (chiplet_id >= 0 && chiplet_id != grux->gs_chiplet_id)
  748. continue;
  749. if (check_gru_resources(grux, gts->ts_cbr_au_count,
  750. gts->ts_dsr_au_count,
  751. max_active_contexts)) {
  752. gru = grux;
  753. max_active_contexts = grux->gs_active_contexts;
  754. if (max_active_contexts == 0)
  755. break;
  756. }
  757. }
  758. if (gru) {
  759. spin_lock(&gru->gs_lock);
  760. if (!check_gru_resources(gru, gts->ts_cbr_au_count,
  761. gts->ts_dsr_au_count, GRU_NUM_CCH)) {
  762. spin_unlock(&gru->gs_lock);
  763. goto again;
  764. }
  765. reserve_gru_resources(gru, gts);
  766. gts->ts_gru = gru;
  767. gts->ts_blade = gru->gs_blade_id;
  768. gts->ts_ctxnum = gru_assign_context_number(gru);
  769. atomic_inc(&gts->ts_refcnt);
  770. gru->gs_gts[gts->ts_ctxnum] = gts;
  771. spin_unlock(&gru->gs_lock);
  772. STAT(assign_context);
  773. gru_dbg(grudev,
  774. "gseg %p, gts %p, gid %d, ctx %d, cbr %d, dsr %d\n",
  775. gseg_virtual_address(gts->ts_gru, gts->ts_ctxnum), gts,
  776. gts->ts_gru->gs_gid, gts->ts_ctxnum,
  777. gts->ts_cbr_au_count, gts->ts_dsr_au_count);
  778. } else {
  779. gru_dbg(grudev, "failed to allocate a GTS %s\n", "");
  780. STAT(assign_context_failed);
  781. }
  782. return gru;
  783. }
  784. /*
  785. * gru_nopage
  786. *
  787. * Map the user's GRU segment
  788. *
  789. * Note: gru segments alway mmaped on GRU_GSEG_PAGESIZE boundaries.
  790. */
  791. int gru_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
  792. {
  793. struct gru_thread_state *gts;
  794. unsigned long paddr, vaddr;
  795. vaddr = (unsigned long)vmf->virtual_address;
  796. gru_dbg(grudev, "vma %p, vaddr 0x%lx (0x%lx)\n",
  797. vma, vaddr, GSEG_BASE(vaddr));
  798. STAT(nopfn);
  799. /* The following check ensures vaddr is a valid address in the VMA */
  800. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  801. if (!gts)
  802. return VM_FAULT_SIGBUS;
  803. again:
  804. mutex_lock(&gts->ts_ctxlock);
  805. preempt_disable();
  806. gru_check_context_placement(gts);
  807. if (!gts->ts_gru) {
  808. STAT(load_user_context);
  809. if (!gru_assign_gru_context(gts)) {
  810. preempt_enable();
  811. mutex_unlock(&gts->ts_ctxlock);
  812. set_current_state(TASK_INTERRUPTIBLE);
  813. schedule_timeout(GRU_ASSIGN_DELAY); /* true hack ZZZ */
  814. if (gts->ts_steal_jiffies + GRU_STEAL_DELAY < jiffies)
  815. gru_steal_context(gts);
  816. goto again;
  817. }
  818. gru_load_context(gts);
  819. paddr = gseg_physical_address(gts->ts_gru, gts->ts_ctxnum);
  820. remap_pfn_range(vma, vaddr & ~(GRU_GSEG_PAGESIZE - 1),
  821. paddr >> PAGE_SHIFT, GRU_GSEG_PAGESIZE,
  822. vma->vm_page_prot);
  823. }
  824. preempt_enable();
  825. mutex_unlock(&gts->ts_ctxlock);
  826. return VM_FAULT_NOPAGE;
  827. }