cpcihp_zt5550.c 8.2 KB

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  1. /*
  2. * cpcihp_zt5550.c
  3. *
  4. * Intel/Ziatech ZT5550 CompactPCI Host Controller driver
  5. *
  6. * Copyright 2002 SOMA Networks, Inc.
  7. * Copyright 2001 Intel San Luis Obispo
  8. * Copyright 2000,2001 MontaVista Software Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
  16. * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
  17. * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
  18. * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  21. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  22. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  23. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  24. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. *
  26. * You should have received a copy of the GNU General Public License along
  27. * with this program; if not, write to the Free Software Foundation, Inc.,
  28. * 675 Mass Ave, Cambridge, MA 02139, USA.
  29. *
  30. * Send feedback to <scottm@somanetworks.com>
  31. */
  32. #include <linux/config.h>
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/init.h>
  36. #include <linux/errno.h>
  37. #include <linux/pci.h>
  38. #include "cpci_hotplug.h"
  39. #include "cpcihp_zt5550.h"
  40. #define DRIVER_VERSION "0.2"
  41. #define DRIVER_AUTHOR "Scott Murray <scottm@somanetworks.com>"
  42. #define DRIVER_DESC "ZT5550 CompactPCI Hot Plug Driver"
  43. #define MY_NAME "cpcihp_zt5550"
  44. #define dbg(format, arg...) \
  45. do { \
  46. if(debug) \
  47. printk (KERN_DEBUG "%s: " format "\n", \
  48. MY_NAME , ## arg); \
  49. } while(0)
  50. #define err(format, arg...) printk(KERN_ERR "%s: " format "\n", MY_NAME , ## arg)
  51. #define info(format, arg...) printk(KERN_INFO "%s: " format "\n", MY_NAME , ## arg)
  52. #define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n", MY_NAME , ## arg)
  53. /* local variables */
  54. static int debug;
  55. static int poll;
  56. static struct cpci_hp_controller_ops zt5550_hpc_ops;
  57. static struct cpci_hp_controller zt5550_hpc;
  58. /* Primary cPCI bus bridge device */
  59. static struct pci_dev *bus0_dev;
  60. static struct pci_bus *bus0;
  61. /* Host controller device */
  62. static struct pci_dev *hc_dev;
  63. /* Host controller register addresses */
  64. static void __iomem *hc_registers;
  65. static void __iomem *csr_hc_index;
  66. static void __iomem *csr_hc_data;
  67. static void __iomem *csr_int_status;
  68. static void __iomem *csr_int_mask;
  69. static int zt5550_hc_config(struct pci_dev *pdev)
  70. {
  71. int ret;
  72. /* Since we know that no boards exist with two HC chips, treat it as an error */
  73. if(hc_dev) {
  74. err("too many host controller devices?");
  75. return -EBUSY;
  76. }
  77. ret = pci_enable_device(pdev);
  78. if(ret) {
  79. err("cannot enable %s\n", pci_name(pdev));
  80. return ret;
  81. }
  82. hc_dev = pdev;
  83. dbg("hc_dev = %p", hc_dev);
  84. dbg("pci resource start %lx", pci_resource_start(hc_dev, 1));
  85. dbg("pci resource len %lx", pci_resource_len(hc_dev, 1));
  86. if(!request_mem_region(pci_resource_start(hc_dev, 1),
  87. pci_resource_len(hc_dev, 1), MY_NAME)) {
  88. err("cannot reserve MMIO region");
  89. ret = -ENOMEM;
  90. goto exit_disable_device;
  91. }
  92. hc_registers =
  93. ioremap(pci_resource_start(hc_dev, 1), pci_resource_len(hc_dev, 1));
  94. if(!hc_registers) {
  95. err("cannot remap MMIO region %lx @ %lx",
  96. pci_resource_len(hc_dev, 1), pci_resource_start(hc_dev, 1));
  97. ret = -ENODEV;
  98. goto exit_release_region;
  99. }
  100. csr_hc_index = hc_registers + CSR_HCINDEX;
  101. csr_hc_data = hc_registers + CSR_HCDATA;
  102. csr_int_status = hc_registers + CSR_INTSTAT;
  103. csr_int_mask = hc_registers + CSR_INTMASK;
  104. /*
  105. * Disable host control, fault and serial interrupts
  106. */
  107. dbg("disabling host control, fault and serial interrupts");
  108. writeb((u8) HC_INT_MASK_REG, csr_hc_index);
  109. writeb((u8) ALL_INDEXED_INTS_MASK, csr_hc_data);
  110. dbg("disabled host control, fault and serial interrupts");
  111. /*
  112. * Disable timer0, timer1 and ENUM interrupts
  113. */
  114. dbg("disabling timer0, timer1 and ENUM interrupts");
  115. writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask);
  116. dbg("disabled timer0, timer1 and ENUM interrupts");
  117. return 0;
  118. exit_release_region:
  119. release_mem_region(pci_resource_start(hc_dev, 1),
  120. pci_resource_len(hc_dev, 1));
  121. exit_disable_device:
  122. pci_disable_device(hc_dev);
  123. return ret;
  124. }
  125. static int zt5550_hc_cleanup(void)
  126. {
  127. if(!hc_dev)
  128. return -ENODEV;
  129. iounmap(hc_registers);
  130. release_mem_region(pci_resource_start(hc_dev, 1),
  131. pci_resource_len(hc_dev, 1));
  132. pci_disable_device(hc_dev);
  133. return 0;
  134. }
  135. static int zt5550_hc_query_enum(void)
  136. {
  137. u8 value;
  138. value = inb_p(ENUM_PORT);
  139. return ((value & ENUM_MASK) == ENUM_MASK);
  140. }
  141. static int zt5550_hc_check_irq(void *dev_id)
  142. {
  143. int ret;
  144. u8 reg;
  145. ret = 0;
  146. if(dev_id == zt5550_hpc.dev_id) {
  147. reg = readb(csr_int_status);
  148. if(reg)
  149. ret = 1;
  150. }
  151. return ret;
  152. }
  153. static int zt5550_hc_enable_irq(void)
  154. {
  155. u8 reg;
  156. if(hc_dev == NULL) {
  157. return -ENODEV;
  158. }
  159. reg = readb(csr_int_mask);
  160. reg = reg & ~ENUM_INT_MASK;
  161. writeb(reg, csr_int_mask);
  162. return 0;
  163. }
  164. static int zt5550_hc_disable_irq(void)
  165. {
  166. u8 reg;
  167. if(hc_dev == NULL) {
  168. return -ENODEV;
  169. }
  170. reg = readb(csr_int_mask);
  171. reg = reg | ENUM_INT_MASK;
  172. writeb(reg, csr_int_mask);
  173. return 0;
  174. }
  175. static int zt5550_hc_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
  176. {
  177. int status;
  178. status = zt5550_hc_config(pdev);
  179. if(status != 0) {
  180. return status;
  181. }
  182. dbg("returned from zt5550_hc_config");
  183. memset(&zt5550_hpc, 0, sizeof (struct cpci_hp_controller));
  184. zt5550_hpc_ops.query_enum = zt5550_hc_query_enum;
  185. zt5550_hpc.ops = &zt5550_hpc_ops;
  186. if(!poll) {
  187. zt5550_hpc.irq = hc_dev->irq;
  188. zt5550_hpc.irq_flags = SA_SHIRQ;
  189. zt5550_hpc.dev_id = hc_dev;
  190. zt5550_hpc_ops.enable_irq = zt5550_hc_enable_irq;
  191. zt5550_hpc_ops.disable_irq = zt5550_hc_disable_irq;
  192. zt5550_hpc_ops.check_irq = zt5550_hc_check_irq;
  193. } else {
  194. info("using ENUM# polling mode");
  195. }
  196. status = cpci_hp_register_controller(&zt5550_hpc);
  197. if(status != 0) {
  198. err("could not register cPCI hotplug controller");
  199. goto init_hc_error;
  200. }
  201. dbg("registered controller");
  202. /* Look for first device matching cPCI bus's bridge vendor and device IDs */
  203. if(!(bus0_dev = pci_get_device(PCI_VENDOR_ID_DEC,
  204. PCI_DEVICE_ID_DEC_21154, NULL))) {
  205. status = -ENODEV;
  206. goto init_register_error;
  207. }
  208. bus0 = bus0_dev->subordinate;
  209. pci_dev_put(bus0_dev);
  210. status = cpci_hp_register_bus(bus0, 0x0a, 0x0f);
  211. if(status != 0) {
  212. err("could not register cPCI hotplug bus");
  213. goto init_register_error;
  214. }
  215. dbg("registered bus");
  216. status = cpci_hp_start();
  217. if(status != 0) {
  218. err("could not started cPCI hotplug system");
  219. cpci_hp_unregister_bus(bus0);
  220. goto init_register_error;
  221. }
  222. dbg("started cpci hp system");
  223. return 0;
  224. init_register_error:
  225. cpci_hp_unregister_controller(&zt5550_hpc);
  226. init_hc_error:
  227. err("status = %d", status);
  228. zt5550_hc_cleanup();
  229. return status;
  230. }
  231. static void __devexit zt5550_hc_remove_one(struct pci_dev *pdev)
  232. {
  233. cpci_hp_stop();
  234. cpci_hp_unregister_bus(bus0);
  235. cpci_hp_unregister_controller(&zt5550_hpc);
  236. zt5550_hc_cleanup();
  237. }
  238. static struct pci_device_id zt5550_hc_pci_tbl[] = {
  239. { PCI_VENDOR_ID_ZIATECH, PCI_DEVICE_ID_ZIATECH_5550_HC, PCI_ANY_ID, PCI_ANY_ID, },
  240. { 0, }
  241. };
  242. MODULE_DEVICE_TABLE(pci, zt5550_hc_pci_tbl);
  243. static struct pci_driver zt5550_hc_driver = {
  244. .name = "zt5550_hc",
  245. .id_table = zt5550_hc_pci_tbl,
  246. .probe = zt5550_hc_init_one,
  247. .remove = __devexit_p(zt5550_hc_remove_one),
  248. };
  249. static int __init zt5550_init(void)
  250. {
  251. struct resource* r;
  252. info(DRIVER_DESC " version: " DRIVER_VERSION);
  253. r = request_region(ENUM_PORT, 1, "#ENUM hotswap signal register");
  254. if(!r)
  255. return -EBUSY;
  256. return pci_register_driver(&zt5550_hc_driver);
  257. }
  258. static void __exit
  259. zt5550_exit(void)
  260. {
  261. pci_unregister_driver(&zt5550_hc_driver);
  262. release_region(ENUM_PORT, 1);
  263. }
  264. module_init(zt5550_init);
  265. module_exit(zt5550_exit);
  266. MODULE_AUTHOR(DRIVER_AUTHOR);
  267. MODULE_DESCRIPTION(DRIVER_DESC);
  268. MODULE_LICENSE("GPL");
  269. module_param(debug, bool, 0644);
  270. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  271. module_param(poll, bool, 0644);
  272. MODULE_PARM_DESC(poll, "#ENUM polling mode enabled or not");