omap-usb-tll.c 13 KB

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  1. /**
  2. * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
  5. * Author: Keshava Munegowda <keshava_mgowda@ti.com>
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 of
  9. * the License as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/types.h>
  22. #include <linux/slab.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/clk.h>
  26. #include <linux/io.h>
  27. #include <linux/err.h>
  28. #include <linux/pm_runtime.h>
  29. #include <linux/platform_data/usb-omap.h>
  30. #define USBTLL_DRIVER_NAME "usbhs_tll"
  31. /* TLL Register Set */
  32. #define OMAP_USBTLL_REVISION (0x00)
  33. #define OMAP_USBTLL_SYSCONFIG (0x10)
  34. #define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
  35. #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
  36. #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
  37. #define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
  38. #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
  39. #define OMAP_USBTLL_SYSSTATUS (0x14)
  40. #define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
  41. #define OMAP_USBTLL_IRQSTATUS (0x18)
  42. #define OMAP_USBTLL_IRQENABLE (0x1C)
  43. #define OMAP_TLL_SHARED_CONF (0x30)
  44. #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
  45. #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
  46. #define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
  47. #define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
  48. #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
  49. #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
  50. #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
  51. #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
  52. #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
  53. #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
  54. #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
  55. #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
  56. #define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
  57. #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
  58. #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
  59. #define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
  60. #define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
  61. #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
  62. #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
  63. #define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
  64. #define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
  65. #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
  66. #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
  67. #define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
  68. #define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
  69. #define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
  70. #define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
  71. #define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
  72. #define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
  73. #define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
  74. #define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
  75. #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
  76. #define OMAP_REV2_TLL_CHANNEL_COUNT 2
  77. #define OMAP_TLL_CHANNEL_COUNT 3
  78. #define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
  79. #define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
  80. #define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
  81. /* Values of USBTLL_REVISION - Note: these are not given in the TRM */
  82. #define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */
  83. #define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */
  84. #define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */
  85. #define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
  86. /* only PHY and UNUSED modes don't need TLL */
  87. #define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
  88. (x) != OMAP_EHCI_PORT_MODE_PHY)
  89. struct usbtll_omap {
  90. int nch; /* num. of channels */
  91. struct usbhs_omap_platform_data *pdata;
  92. struct clk **ch_clk;
  93. /* secure the register updates */
  94. spinlock_t lock;
  95. };
  96. /*-------------------------------------------------------------------------*/
  97. static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
  98. static struct device *tll_dev;
  99. /*-------------------------------------------------------------------------*/
  100. static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
  101. {
  102. __raw_writel(val, base + reg);
  103. }
  104. static inline u32 usbtll_read(void __iomem *base, u32 reg)
  105. {
  106. return __raw_readl(base + reg);
  107. }
  108. static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
  109. {
  110. __raw_writeb(val, base + reg);
  111. }
  112. static inline u8 usbtll_readb(void __iomem *base, u8 reg)
  113. {
  114. return __raw_readb(base + reg);
  115. }
  116. /*-------------------------------------------------------------------------*/
  117. static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
  118. {
  119. switch (pmode) {
  120. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  121. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  122. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  123. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  124. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  125. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  126. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  127. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  128. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  129. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  130. return true;
  131. default:
  132. return false;
  133. }
  134. }
  135. /*
  136. * convert the port-mode enum to a value we can use in the FSLSMODE
  137. * field of USBTLL_CHANNEL_CONF
  138. */
  139. static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
  140. {
  141. switch (mode) {
  142. case OMAP_USBHS_PORT_MODE_UNUSED:
  143. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  144. return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
  145. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  146. return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
  147. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  148. return OMAP_TLL_FSLSMODE_3PIN_PHY;
  149. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  150. return OMAP_TLL_FSLSMODE_4PIN_PHY;
  151. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  152. return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
  153. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  154. return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
  155. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  156. return OMAP_TLL_FSLSMODE_3PIN_TLL;
  157. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  158. return OMAP_TLL_FSLSMODE_4PIN_TLL;
  159. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  160. return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
  161. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  162. return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
  163. default:
  164. pr_warn("Invalid port mode, using default\n");
  165. return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
  166. }
  167. }
  168. /**
  169. * usbtll_omap_probe - initialize TI-based HCDs
  170. *
  171. * Allocates basic resources for this USB host controller.
  172. */
  173. static int usbtll_omap_probe(struct platform_device *pdev)
  174. {
  175. struct device *dev = &pdev->dev;
  176. struct usbhs_omap_platform_data *pdata = dev->platform_data;
  177. void __iomem *base;
  178. struct resource *res;
  179. struct usbtll_omap *tll;
  180. unsigned reg;
  181. unsigned long flags;
  182. int ret = 0;
  183. int i, ver;
  184. bool needs_tll;
  185. dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
  186. tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL);
  187. if (!tll) {
  188. dev_err(dev, "Memory allocation failed\n");
  189. return -ENOMEM;
  190. }
  191. if (!pdata) {
  192. dev_err(dev, "Platform data missing\n");
  193. return -ENODEV;
  194. }
  195. spin_lock_init(&tll->lock);
  196. tll->pdata = pdata;
  197. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  198. base = devm_request_and_ioremap(dev, res);
  199. if (!base) {
  200. ret = -EADDRNOTAVAIL;
  201. dev_err(dev, "Resource request/ioremap failed:%d\n", ret);
  202. return ret;
  203. }
  204. platform_set_drvdata(pdev, tll);
  205. pm_runtime_enable(dev);
  206. pm_runtime_get_sync(dev);
  207. spin_lock_irqsave(&tll->lock, flags);
  208. ver = usbtll_read(base, OMAP_USBTLL_REVISION);
  209. switch (ver) {
  210. case OMAP_USBTLL_REV1:
  211. tll->nch = OMAP_TLL_CHANNEL_COUNT;
  212. break;
  213. case OMAP_USBTLL_REV2:
  214. case OMAP_USBTLL_REV3:
  215. tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
  216. break;
  217. default:
  218. tll->nch = OMAP_TLL_CHANNEL_COUNT;
  219. dev_dbg(dev,
  220. "USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
  221. ver, tll->nch);
  222. break;
  223. }
  224. spin_unlock_irqrestore(&tll->lock, flags);
  225. tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk * [tll->nch]),
  226. GFP_KERNEL);
  227. if (!tll->ch_clk) {
  228. ret = -ENOMEM;
  229. dev_err(dev, "Couldn't allocate memory for channel clocks\n");
  230. goto err_clk_alloc;
  231. }
  232. for (i = 0; i < tll->nch; i++) {
  233. char clkname[] = "usb_tll_hs_usb_chx_clk";
  234. snprintf(clkname, sizeof(clkname),
  235. "usb_tll_hs_usb_ch%d_clk", i);
  236. tll->ch_clk[i] = clk_get(dev, clkname);
  237. if (IS_ERR(tll->ch_clk[i]))
  238. dev_dbg(dev, "can't get clock : %s\n", clkname);
  239. }
  240. spin_lock_irqsave(&tll->lock, flags);
  241. needs_tll = false;
  242. for (i = 0; i < tll->nch; i++)
  243. needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);
  244. if (needs_tll) {
  245. /* Program Common TLL register */
  246. reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
  247. reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
  248. | OMAP_TLL_SHARED_CONF_USB_DIVRATION);
  249. reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
  250. reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
  251. usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
  252. /* Enable channels now */
  253. for (i = 0; i < tll->nch; i++) {
  254. reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
  255. if (is_ohci_port(pdata->port_mode[i])) {
  256. reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
  257. << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
  258. reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
  259. } else if (pdata->port_mode[i] ==
  260. OMAP_EHCI_PORT_MODE_TLL) {
  261. /*
  262. * Disable AutoIdle, BitStuffing
  263. * and use SDR Mode
  264. */
  265. reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
  266. | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
  267. | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
  268. } else {
  269. continue;
  270. }
  271. reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
  272. usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
  273. usbtll_writeb(base,
  274. OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
  275. 0xbe);
  276. }
  277. }
  278. spin_unlock_irqrestore(&tll->lock, flags);
  279. pm_runtime_put_sync(dev);
  280. /* only after this can omap_tll_enable/disable work */
  281. tll_dev = dev;
  282. return 0;
  283. err_clk_alloc:
  284. pm_runtime_put_sync(dev);
  285. pm_runtime_disable(dev);
  286. return ret;
  287. }
  288. /**
  289. * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
  290. * @pdev: USB Host Controller being removed
  291. *
  292. * Reverses the effect of usbtll_omap_probe().
  293. */
  294. static int usbtll_omap_remove(struct platform_device *pdev)
  295. {
  296. struct usbtll_omap *tll = platform_get_drvdata(pdev);
  297. int i;
  298. tll_dev = NULL;
  299. for (i = 0; i < tll->nch; i++)
  300. if (!IS_ERR(tll->ch_clk[i]))
  301. clk_put(tll->ch_clk[i]);
  302. pm_runtime_disable(&pdev->dev);
  303. return 0;
  304. }
  305. static int usbtll_runtime_resume(struct device *dev)
  306. {
  307. struct usbtll_omap *tll = dev_get_drvdata(dev);
  308. struct usbhs_omap_platform_data *pdata = tll->pdata;
  309. unsigned long flags;
  310. int i;
  311. dev_dbg(dev, "usbtll_runtime_resume\n");
  312. spin_lock_irqsave(&tll->lock, flags);
  313. for (i = 0; i < tll->nch; i++) {
  314. if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
  315. int r;
  316. if (IS_ERR(tll->ch_clk[i]))
  317. continue;
  318. r = clk_enable(tll->ch_clk[i]);
  319. if (r) {
  320. dev_err(dev,
  321. "Error enabling ch %d clock: %d\n", i, r);
  322. }
  323. }
  324. }
  325. spin_unlock_irqrestore(&tll->lock, flags);
  326. return 0;
  327. }
  328. static int usbtll_runtime_suspend(struct device *dev)
  329. {
  330. struct usbtll_omap *tll = dev_get_drvdata(dev);
  331. struct usbhs_omap_platform_data *pdata = tll->pdata;
  332. unsigned long flags;
  333. int i;
  334. dev_dbg(dev, "usbtll_runtime_suspend\n");
  335. spin_lock_irqsave(&tll->lock, flags);
  336. for (i = 0; i < tll->nch; i++) {
  337. if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
  338. if (!IS_ERR(tll->ch_clk[i]))
  339. clk_disable(tll->ch_clk[i]);
  340. }
  341. }
  342. spin_unlock_irqrestore(&tll->lock, flags);
  343. return 0;
  344. }
  345. static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
  346. SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
  347. usbtll_runtime_resume,
  348. NULL)
  349. };
  350. static struct platform_driver usbtll_omap_driver = {
  351. .driver = {
  352. .name = (char *)usbtll_driver_name,
  353. .owner = THIS_MODULE,
  354. .pm = &usbtllomap_dev_pm_ops,
  355. },
  356. .probe = usbtll_omap_probe,
  357. .remove = usbtll_omap_remove,
  358. };
  359. int omap_tll_enable(void)
  360. {
  361. if (!tll_dev) {
  362. pr_err("%s: OMAP USB TLL not initialized\n", __func__);
  363. return -ENODEV;
  364. }
  365. return pm_runtime_get_sync(tll_dev);
  366. }
  367. EXPORT_SYMBOL_GPL(omap_tll_enable);
  368. int omap_tll_disable(void)
  369. {
  370. if (!tll_dev) {
  371. pr_err("%s: OMAP USB TLL not initialized\n", __func__);
  372. return -ENODEV;
  373. }
  374. return pm_runtime_put_sync(tll_dev);
  375. }
  376. EXPORT_SYMBOL_GPL(omap_tll_disable);
  377. MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
  378. MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
  379. MODULE_LICENSE("GPL v2");
  380. MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
  381. static int __init omap_usbtll_drvinit(void)
  382. {
  383. return platform_driver_register(&usbtll_omap_driver);
  384. }
  385. /*
  386. * init before usbhs core driver;
  387. * The usbtll driver should be initialized before
  388. * the usbhs core driver probe function is called.
  389. */
  390. fs_initcall(omap_usbtll_drvinit);
  391. static void __exit omap_usbtll_drvexit(void)
  392. {
  393. platform_driver_unregister(&usbtll_omap_driver);
  394. }
  395. module_exit(omap_usbtll_drvexit);