vt8500.dtsi 2.9 KB

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  1. /*
  2. * vt8500.dtsi - Device tree file for VIA VT8500 SoC
  3. *
  4. * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
  5. *
  6. * Licensed under GPLv2 or later
  7. */
  8. /include/ "skeleton.dtsi"
  9. / {
  10. compatible = "via,vt8500";
  11. cpus {
  12. #address-cells = <0>;
  13. #size-cells = <0>;
  14. cpu {
  15. device_type = "cpu";
  16. compatible = "arm,arm926ej-s";
  17. };
  18. };
  19. soc {
  20. #address-cells = <1>;
  21. #size-cells = <1>;
  22. compatible = "simple-bus";
  23. ranges;
  24. interrupt-parent = <&intc>;
  25. intc: interrupt-controller@d8140000 {
  26. compatible = "via,vt8500-intc";
  27. interrupt-controller;
  28. reg = <0xd8140000 0x10000>;
  29. #interrupt-cells = <1>;
  30. };
  31. pinctrl: pinctrl@d8110000 {
  32. compatible = "via,vt8500-pinctrl";
  33. reg = <0xd8110000 0x10000>;
  34. interrupt-controller;
  35. #interrupt-cells = <2>;
  36. gpio-controller;
  37. #gpio-cells = <2>;
  38. };
  39. pmc@d8130000 {
  40. compatible = "via,vt8500-pmc";
  41. reg = <0xd8130000 0x1000>;
  42. clocks {
  43. #address-cells = <1>;
  44. #size-cells = <0>;
  45. ref24: ref24M {
  46. #clock-cells = <0>;
  47. compatible = "fixed-clock";
  48. clock-frequency = <24000000>;
  49. };
  50. clkuart0: uart0 {
  51. #clock-cells = <0>;
  52. compatible = "via,vt8500-device-clock";
  53. clocks = <&ref24>;
  54. enable-reg = <0x250>;
  55. enable-bit = <1>;
  56. };
  57. clkuart1: uart1 {
  58. #clock-cells = <0>;
  59. compatible = "via,vt8500-device-clock";
  60. clocks = <&ref24>;
  61. enable-reg = <0x250>;
  62. enable-bit = <2>;
  63. };
  64. clkuart2: uart2 {
  65. #clock-cells = <0>;
  66. compatible = "via,vt8500-device-clock";
  67. clocks = <&ref24>;
  68. enable-reg = <0x250>;
  69. enable-bit = <3>;
  70. };
  71. clkuart3: uart3 {
  72. #clock-cells = <0>;
  73. compatible = "via,vt8500-device-clock";
  74. clocks = <&ref24>;
  75. enable-reg = <0x250>;
  76. enable-bit = <4>;
  77. };
  78. };
  79. };
  80. timer@d8130100 {
  81. compatible = "via,vt8500-timer";
  82. reg = <0xd8130100 0x28>;
  83. interrupts = <36>;
  84. };
  85. ehci@d8007900 {
  86. compatible = "via,vt8500-ehci";
  87. reg = <0xd8007900 0x200>;
  88. interrupts = <43>;
  89. };
  90. uhci@d8007b00 {
  91. compatible = "platform-uhci";
  92. reg = <0xd8007b00 0x200>;
  93. interrupts = <43>;
  94. };
  95. fb: fb@d8050800 {
  96. compatible = "via,vt8500-fb";
  97. reg = <0xd800e400 0x400>;
  98. interrupts = <12>;
  99. };
  100. ge_rops@d8050400 {
  101. compatible = "wm,prizm-ge-rops";
  102. reg = <0xd8050400 0x100>;
  103. };
  104. uart@d8200000 {
  105. compatible = "via,vt8500-uart";
  106. reg = <0xd8200000 0x1040>;
  107. interrupts = <32>;
  108. clocks = <&clkuart0>;
  109. };
  110. uart@d82b0000 {
  111. compatible = "via,vt8500-uart";
  112. reg = <0xd82b0000 0x1040>;
  113. interrupts = <33>;
  114. clocks = <&clkuart1>;
  115. };
  116. uart@d8210000 {
  117. compatible = "via,vt8500-uart";
  118. reg = <0xd8210000 0x1040>;
  119. interrupts = <47>;
  120. clocks = <&clkuart2>;
  121. };
  122. uart@d82c0000 {
  123. compatible = "via,vt8500-uart";
  124. reg = <0xd82c0000 0x1040>;
  125. interrupts = <50>;
  126. clocks = <&clkuart3>;
  127. };
  128. rtc@d8100000 {
  129. compatible = "via,vt8500-rtc";
  130. reg = <0xd8100000 0x10000>;
  131. interrupts = <48>;
  132. };
  133. };
  134. };