iq31244-pci.c 2.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990
  1. /*
  2. * arch/arm/mach-iop32x/iq31244-pci.c
  3. *
  4. * PCI support for the Intel IQ31244 reference board
  5. *
  6. * Author: Rory Bolt <rorybolt@pacbell.net>
  7. * Copyright (C) 2002 Rory Bolt
  8. * Copyright (C) 2004 Intel Corp.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/pci.h>
  16. #include <linux/init.h>
  17. #include <linux/string.h>
  18. #include <linux/slab.h>
  19. #include <asm/hardware.h>
  20. #include <asm/irq.h>
  21. #include <asm/mach/pci.h>
  22. #include <asm/mach-types.h>
  23. /*
  24. * The following macro is used to lookup irqs in a standard table
  25. * format for those systems that do not already have PCI
  26. * interrupts properly routed. We assume 1 <= pin <= 4
  27. */
  28. #define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
  29. ({ int _ctl_ = -1; \
  30. unsigned int _idsel = idsel - minid; \
  31. if (_idsel <= maxid) \
  32. _ctl_ = pci_irq_table[_idsel][pin-1]; \
  33. _ctl_; })
  34. #define INTA IRQ_IQ31244_INTA
  35. #define INTB IRQ_IQ31244_INTB
  36. #define INTC IRQ_IQ31244_INTC
  37. #define INTD IRQ_IQ31244_INTD
  38. #define INTE IRQ_IQ31244_I82546
  39. static inline int __init
  40. iq31244_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
  41. {
  42. static int pci_irq_table[][4] = {
  43. /*
  44. * PCI IDSEL/INTPIN->INTLINE
  45. * A B C D
  46. */
  47. #ifdef CONFIG_ARCH_EP80219
  48. {INTB, INTB, INTB, INTB}, /* CFlash */
  49. {INTE, INTE, INTE, INTE}, /* 82551 Pro 100 */
  50. {INTD, INTD, INTD, INTD}, /* PCI-X Slot */
  51. {INTC, INTC, INTC, INTC}, /* SATA */
  52. #else
  53. {INTB, INTB, INTB, INTB}, /* CFlash */
  54. {INTC, INTC, INTC, INTC}, /* SATA */
  55. {INTD, INTD, INTD, INTD}, /* PCI-X Slot */
  56. {INTE, INTE, INTE, INTE}, /* 82546 GigE */
  57. #endif // CONFIG_ARCH_EP80219
  58. };
  59. BUG_ON(pin < 1 || pin > 4);
  60. return PCI_IRQ_TABLE_LOOKUP(0, 7);
  61. }
  62. static struct hw_pci iq31244_pci __initdata = {
  63. .swizzle = pci_std_swizzle,
  64. .nr_controllers = 1,
  65. .setup = iop3xx_pci_setup,
  66. .scan = iop3xx_pci_scan_bus,
  67. .preinit = iop3xx_pci_preinit,
  68. .map_irq = iq31244_map_irq
  69. };
  70. static int __init iq31244_pci_init(void)
  71. {
  72. if (machine_is_iq31244())
  73. pci_common_init(&iq31244_pci);
  74. return 0;
  75. }
  76. subsys_initcall(iq31244_pci_init);