cx88-dvb.c 22 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #ifdef HAVE_MT352
  34. # include "mt352.h"
  35. # include "mt352_priv.h"
  36. # ifdef HAVE_VP3054_I2C
  37. # include "cx88-vp3054-i2c.h"
  38. # endif
  39. #endif
  40. #ifdef HAVE_ZL10353
  41. # include "zl10353.h"
  42. #endif
  43. #ifdef HAVE_CX22702
  44. # include "cx22702.h"
  45. #endif
  46. #ifdef HAVE_OR51132
  47. # include "or51132.h"
  48. #endif
  49. #ifdef HAVE_LGDT330X
  50. # include "lgdt330x.h"
  51. # include "fe_lgh06xf.h"
  52. #endif
  53. #ifdef HAVE_NXT200X
  54. # include "nxt200x.h"
  55. #endif
  56. #ifdef HAVE_CX24123
  57. # include "cx24123.h"
  58. #endif
  59. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  60. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  61. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  62. MODULE_LICENSE("GPL");
  63. static unsigned int debug = 0;
  64. module_param(debug, int, 0644);
  65. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  66. #define dprintk(level,fmt, arg...) if (debug >= level) \
  67. printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
  68. /* ------------------------------------------------------------------ */
  69. static int dvb_buf_setup(struct videobuf_queue *q,
  70. unsigned int *count, unsigned int *size)
  71. {
  72. struct cx8802_dev *dev = q->priv_data;
  73. dev->ts_packet_size = 188 * 4;
  74. dev->ts_packet_count = 32;
  75. *size = dev->ts_packet_size * dev->ts_packet_count;
  76. *count = 32;
  77. return 0;
  78. }
  79. static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  80. enum v4l2_field field)
  81. {
  82. struct cx8802_dev *dev = q->priv_data;
  83. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  84. }
  85. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  86. {
  87. struct cx8802_dev *dev = q->priv_data;
  88. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  89. }
  90. static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  91. {
  92. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  93. }
  94. static struct videobuf_queue_ops dvb_qops = {
  95. .buf_setup = dvb_buf_setup,
  96. .buf_prepare = dvb_buf_prepare,
  97. .buf_queue = dvb_buf_queue,
  98. .buf_release = dvb_buf_release,
  99. };
  100. /* ------------------------------------------------------------------ */
  101. #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
  102. static int zarlink_pll_set(struct dvb_frontend *fe,
  103. struct dvb_frontend_parameters *params,
  104. u8 *pllbuf)
  105. {
  106. struct cx8802_dev *dev = fe->dvb->priv;
  107. pllbuf[0] = dev->core->pll_addr << 1;
  108. dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
  109. params->frequency,
  110. params->u.ofdm.bandwidth);
  111. return 0;
  112. }
  113. #endif
  114. #ifdef HAVE_MT352
  115. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  116. {
  117. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  118. static u8 reset [] = { RESET, 0x80 };
  119. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  120. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  121. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  122. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  123. mt352_write(fe, clock_config, sizeof(clock_config));
  124. udelay(200);
  125. mt352_write(fe, reset, sizeof(reset));
  126. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  127. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  128. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  129. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  130. return 0;
  131. }
  132. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  133. {
  134. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  135. static u8 reset [] = { RESET, 0x80 };
  136. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  137. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  138. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  139. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  140. mt352_write(fe, clock_config, sizeof(clock_config));
  141. udelay(200);
  142. mt352_write(fe, reset, sizeof(reset));
  143. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  144. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  145. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  146. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  147. return 0;
  148. }
  149. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  150. {
  151. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  152. static u8 reset [] = { 0x50, 0x80 };
  153. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  154. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  155. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  156. static u8 dntv_extra[] = { 0xB5, 0x7A };
  157. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  158. mt352_write(fe, clock_config, sizeof(clock_config));
  159. udelay(2000);
  160. mt352_write(fe, reset, sizeof(reset));
  161. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  162. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  163. udelay(2000);
  164. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  165. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  166. return 0;
  167. }
  168. static struct mt352_config dvico_fusionhdtv = {
  169. .demod_address = 0x0F,
  170. .demod_init = dvico_fusionhdtv_demod_init,
  171. .pll_set = zarlink_pll_set,
  172. };
  173. static struct mt352_config dntv_live_dvbt_config = {
  174. .demod_address = 0x0f,
  175. .demod_init = dntv_live_dvbt_demod_init,
  176. .pll_set = zarlink_pll_set,
  177. };
  178. static struct mt352_config dvico_fusionhdtv_dual = {
  179. .demod_address = 0x0F,
  180. .demod_init = dvico_dual_demod_init,
  181. .pll_set = zarlink_pll_set,
  182. };
  183. #ifdef HAVE_VP3054_I2C
  184. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  185. {
  186. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  187. static u8 reset [] = { 0x50, 0x80 };
  188. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  189. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  190. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  191. static u8 dntv_extra[] = { 0xB5, 0x7A };
  192. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  193. mt352_write(fe, clock_config, sizeof(clock_config));
  194. udelay(2000);
  195. mt352_write(fe, reset, sizeof(reset));
  196. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  197. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  198. udelay(2000);
  199. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  200. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  201. return 0;
  202. }
  203. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  204. {
  205. struct cx8802_dev *dev= fe->dvb->priv;
  206. /* this message is to set up ATC and ALC */
  207. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  208. struct i2c_msg msg =
  209. { .addr = dev->core->pll_addr, .flags = 0,
  210. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  211. int err;
  212. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  213. if (err < 0)
  214. return err;
  215. else
  216. return -EREMOTEIO;
  217. }
  218. return 0;
  219. }
  220. static int dntv_live_dvbt_pro_pll_set(struct dvb_frontend* fe,
  221. struct dvb_frontend_parameters* params,
  222. u8* pllbuf)
  223. {
  224. struct cx8802_dev *dev= fe->dvb->priv;
  225. struct i2c_msg msg =
  226. { .addr = dev->core->pll_addr, .flags = 0,
  227. .buf = pllbuf+1, .len = 4 };
  228. int err;
  229. /* Switch PLL to DVB mode */
  230. err = philips_fmd1216_pll_init(fe);
  231. if (err)
  232. return err;
  233. /* Tune PLL */
  234. pllbuf[0] = dev->core->pll_addr << 1;
  235. dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
  236. params->frequency,
  237. params->u.ofdm.bandwidth);
  238. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  239. printk(KERN_WARNING "cx88-dvb: %s error "
  240. "(addr %02x <- %02x, err = %i)\n",
  241. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  242. if (err < 0)
  243. return err;
  244. else
  245. return -EREMOTEIO;
  246. }
  247. return 0;
  248. }
  249. static struct mt352_config dntv_live_dvbt_pro_config = {
  250. .demod_address = 0x0f,
  251. .no_tuner = 1,
  252. .demod_init = dntv_live_dvbt_pro_demod_init,
  253. .pll_set = dntv_live_dvbt_pro_pll_set,
  254. };
  255. #endif
  256. #endif
  257. #ifdef HAVE_ZL10353
  258. static int dvico_hybrid_tune_pll(struct dvb_frontend *fe,
  259. struct dvb_frontend_parameters *params,
  260. u8 *pllbuf)
  261. {
  262. struct cx8802_dev *dev= fe->dvb->priv;
  263. struct i2c_msg msg =
  264. { .addr = dev->core->pll_addr, .flags = 0,
  265. .buf = pllbuf + 1, .len = 4 };
  266. int err;
  267. pllbuf[0] = dev->core->pll_addr << 1;
  268. dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
  269. params->frequency,
  270. params->u.ofdm.bandwidth);
  271. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  272. printk(KERN_WARNING "cx88-dvb: %s error "
  273. "(addr %02x <- %02x, err = %i)\n",
  274. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  275. if (err < 0)
  276. return err;
  277. else
  278. return -EREMOTEIO;
  279. }
  280. return 0;
  281. }
  282. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  283. .demod_address = 0x0F,
  284. .pll_set = dvico_hybrid_tune_pll,
  285. };
  286. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  287. .demod_address = 0x0F,
  288. .pll_set = zarlink_pll_set,
  289. };
  290. #endif
  291. #ifdef HAVE_CX22702
  292. static struct cx22702_config connexant_refboard_config = {
  293. .demod_address = 0x43,
  294. .output_mode = CX22702_SERIAL_OUTPUT,
  295. .pll_address = 0x60,
  296. .pll_desc = &dvb_pll_thomson_dtt7579,
  297. };
  298. static struct cx22702_config hauppauge_novat_config = {
  299. .demod_address = 0x43,
  300. .output_mode = CX22702_SERIAL_OUTPUT,
  301. .pll_address = 0x61,
  302. .pll_desc = &dvb_pll_thomson_dtt759x,
  303. };
  304. static struct cx22702_config hauppauge_hvr1100_config = {
  305. .demod_address = 0x63,
  306. .output_mode = CX22702_SERIAL_OUTPUT,
  307. .pll_address = 0x61,
  308. .pll_desc = &dvb_pll_fmd1216me,
  309. };
  310. #endif
  311. #ifdef HAVE_OR51132
  312. static int or51132_set_ts_param(struct dvb_frontend* fe,
  313. int is_punctured)
  314. {
  315. struct cx8802_dev *dev= fe->dvb->priv;
  316. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  317. return 0;
  318. }
  319. static struct or51132_config pchdtv_hd3000 = {
  320. .demod_address = 0x15,
  321. .pll_address = 0x61,
  322. .pll_desc = &dvb_pll_thomson_dtt761x,
  323. .set_ts_params = or51132_set_ts_param,
  324. };
  325. #endif
  326. #ifdef HAVE_LGDT330X
  327. static int lgdt3302_pll_set(struct dvb_frontend* fe,
  328. struct dvb_frontend_parameters* params)
  329. {
  330. /* FIXME make this routine use the tuner-simple code.
  331. * It could probably be shared with a number of ATSC
  332. * frontends. Many share the same tuner with analog TV. */
  333. struct cx8802_dev *dev= fe->dvb->priv;
  334. struct cx88_core *core = dev->core;
  335. u8 buf[4];
  336. struct i2c_msg msg =
  337. { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
  338. int err;
  339. dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
  340. dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  341. __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
  342. if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
  343. printk(KERN_WARNING "cx88-dvb: %s error "
  344. "(addr %02x <- %02x, err = %i)\n",
  345. __FUNCTION__, buf[0], buf[1], err);
  346. if (err < 0)
  347. return err;
  348. else
  349. return -EREMOTEIO;
  350. }
  351. return 0;
  352. }
  353. static int lgdt3303_pll_set(struct dvb_frontend* fe,
  354. struct dvb_frontend_parameters* params)
  355. {
  356. struct cx8802_dev *dev= fe->dvb->priv;
  357. struct cx88_core *core = dev->core;
  358. /* Put the analog decoder in standby to keep it quiet */
  359. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  360. return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
  361. }
  362. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  363. {
  364. struct cx8802_dev *dev= fe->dvb->priv;
  365. struct cx88_core *core = dev->core;
  366. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  367. if (index == 0)
  368. cx_clear(MO_GP0_IO, 8);
  369. else
  370. cx_set(MO_GP0_IO, 8);
  371. return 0;
  372. }
  373. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  374. {
  375. struct cx8802_dev *dev= fe->dvb->priv;
  376. if (is_punctured)
  377. dev->ts_gen_cntrl |= 0x04;
  378. else
  379. dev->ts_gen_cntrl &= ~0x04;
  380. return 0;
  381. }
  382. static struct lgdt330x_config fusionhdtv_3_gold = {
  383. .demod_address = 0x0e,
  384. .demod_chip = LGDT3302,
  385. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  386. .pll_set = lgdt3302_pll_set,
  387. .set_ts_params = lgdt330x_set_ts_param,
  388. };
  389. static struct lgdt330x_config fusionhdtv_5_gold = {
  390. .demod_address = 0x0e,
  391. .demod_chip = LGDT3303,
  392. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  393. .pll_set = lgdt3303_pll_set,
  394. .set_ts_params = lgdt330x_set_ts_param,
  395. };
  396. static struct lgdt330x_config pchdtv_hd5500 = {
  397. .demod_address = 0x59,
  398. .demod_chip = LGDT3303,
  399. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  400. .pll_set = lgdt3303_pll_set,
  401. .set_ts_params = lgdt330x_set_ts_param,
  402. };
  403. #endif
  404. #ifdef HAVE_NXT200X
  405. static int nxt200x_set_ts_param(struct dvb_frontend* fe,
  406. int is_punctured)
  407. {
  408. struct cx8802_dev *dev= fe->dvb->priv;
  409. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  410. return 0;
  411. }
  412. static int nxt200x_set_pll_input(u8* buf, int input)
  413. {
  414. if (input)
  415. buf[3] |= 0x08;
  416. else
  417. buf[3] &= ~0x08;
  418. return 0;
  419. }
  420. static struct nxt200x_config ati_hdtvwonder = {
  421. .demod_address = 0x0a,
  422. .pll_address = 0x61,
  423. .pll_desc = &dvb_pll_tuv1236d,
  424. .set_pll_input = nxt200x_set_pll_input,
  425. .set_ts_params = nxt200x_set_ts_param,
  426. };
  427. #endif
  428. #ifdef HAVE_CX24123
  429. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  430. int is_punctured)
  431. {
  432. struct cx8802_dev *dev= fe->dvb->priv;
  433. dev->ts_gen_cntrl = 0x2;
  434. return 0;
  435. }
  436. static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on)
  437. {
  438. struct cx8802_dev *dev= fe->dvb->priv;
  439. struct cx88_core *core = dev->core;
  440. if (on)
  441. cx_write(MO_GP0_IO, 0x000006f9);
  442. else
  443. cx_write(MO_GP0_IO, 0x000006fB);
  444. }
  445. static struct cx24123_config hauppauge_novas_config = {
  446. .demod_address = 0x55,
  447. .use_isl6421 = 1,
  448. .set_ts_params = cx24123_set_ts_param,
  449. };
  450. static struct cx24123_config kworld_dvbs_100_config = {
  451. .demod_address = 0x15,
  452. .use_isl6421 = 0,
  453. .set_ts_params = cx24123_set_ts_param,
  454. .enable_lnb_voltage = cx24123_enable_lnb_voltage,
  455. };
  456. #endif
  457. static int dvb_register(struct cx8802_dev *dev)
  458. {
  459. /* init struct videobuf_dvb */
  460. dev->dvb.name = dev->core->name;
  461. dev->ts_gen_cntrl = 0x0c;
  462. /* init frontend */
  463. switch (dev->core->board) {
  464. #ifdef HAVE_CX22702
  465. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  466. dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
  467. &dev->core->i2c_adap);
  468. break;
  469. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  470. case CX88_BOARD_CONEXANT_DVB_T1:
  471. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  472. case CX88_BOARD_WINFAST_DTV1000:
  473. dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
  474. &dev->core->i2c_adap);
  475. break;
  476. case CX88_BOARD_HAUPPAUGE_HVR1100:
  477. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  478. dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
  479. &dev->core->i2c_adap);
  480. break;
  481. #endif
  482. #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
  483. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  484. dev->core->pll_addr = 0x60;
  485. dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
  486. #ifdef HAVE_MT352
  487. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  488. &dev->core->i2c_adap);
  489. if (dev->dvb.frontend != NULL)
  490. break;
  491. #endif
  492. #ifdef HAVE_ZL10353
  493. /* ZL10353 replaces MT352 on later cards */
  494. dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
  495. &dev->core->i2c_adap);
  496. #endif
  497. break;
  498. #endif /* HAVE_MT352 || HAVE_ZL10353 */
  499. #ifdef HAVE_MT352
  500. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  501. dev->core->pll_addr = 0x61;
  502. dev->core->pll_desc = &dvb_pll_lg_z201;
  503. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  504. &dev->core->i2c_adap);
  505. break;
  506. case CX88_BOARD_KWORLD_DVB_T:
  507. case CX88_BOARD_DNTV_LIVE_DVB_T:
  508. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  509. dev->core->pll_addr = 0x61;
  510. dev->core->pll_desc = &dvb_pll_unknown_1;
  511. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
  512. &dev->core->i2c_adap);
  513. break;
  514. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  515. #ifdef HAVE_VP3054_I2C
  516. dev->core->pll_addr = 0x61;
  517. dev->core->pll_desc = &dvb_pll_fmd1216me;
  518. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
  519. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  520. #else
  521. printk("%s: built without vp3054 support\n", dev->core->name);
  522. #endif
  523. break;
  524. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  525. /* The tin box says DEE1601, but it seems to be DTT7579
  526. * compatible, with a slightly different MT352 AGC gain. */
  527. dev->core->pll_addr = 0x61;
  528. dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
  529. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
  530. &dev->core->i2c_adap);
  531. break;
  532. #endif
  533. #ifdef HAVE_ZL10353
  534. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  535. dev->core->pll_addr = 0x61;
  536. dev->core->pll_desc = &dvb_pll_thomson_fe6600;
  537. dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
  538. &dev->core->i2c_adap);
  539. break;
  540. #endif
  541. #ifdef HAVE_OR51132
  542. case CX88_BOARD_PCHDTV_HD3000:
  543. dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
  544. &dev->core->i2c_adap);
  545. break;
  546. #endif
  547. #ifdef HAVE_LGDT330X
  548. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  549. dev->ts_gen_cntrl = 0x08;
  550. {
  551. /* Do a hardware reset of chip before using it. */
  552. struct cx88_core *core = dev->core;
  553. cx_clear(MO_GP0_IO, 1);
  554. mdelay(100);
  555. cx_set(MO_GP0_IO, 1);
  556. mdelay(200);
  557. /* Select RF connector callback */
  558. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  559. dev->core->pll_addr = 0x61;
  560. dev->core->pll_desc = &dvb_pll_microtune_4042;
  561. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  562. &dev->core->i2c_adap);
  563. }
  564. break;
  565. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  566. dev->ts_gen_cntrl = 0x08;
  567. {
  568. /* Do a hardware reset of chip before using it. */
  569. struct cx88_core *core = dev->core;
  570. cx_clear(MO_GP0_IO, 1);
  571. mdelay(100);
  572. cx_set(MO_GP0_IO, 9);
  573. mdelay(200);
  574. dev->core->pll_addr = 0x61;
  575. dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
  576. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  577. &dev->core->i2c_adap);
  578. }
  579. break;
  580. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  581. dev->ts_gen_cntrl = 0x08;
  582. {
  583. /* Do a hardware reset of chip before using it. */
  584. struct cx88_core *core = dev->core;
  585. cx_clear(MO_GP0_IO, 1);
  586. mdelay(100);
  587. cx_set(MO_GP0_IO, 1);
  588. mdelay(200);
  589. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
  590. &dev->core->i2c_adap);
  591. }
  592. break;
  593. case CX88_BOARD_PCHDTV_HD5500:
  594. dev->ts_gen_cntrl = 0x08;
  595. {
  596. /* Do a hardware reset of chip before using it. */
  597. struct cx88_core *core = dev->core;
  598. cx_clear(MO_GP0_IO, 1);
  599. mdelay(100);
  600. cx_set(MO_GP0_IO, 1);
  601. mdelay(200);
  602. dev->dvb.frontend = lgdt330x_attach(&pchdtv_hd5500,
  603. &dev->core->i2c_adap);
  604. }
  605. break;
  606. #endif
  607. #ifdef HAVE_NXT200X
  608. case CX88_BOARD_ATI_HDTVWONDER:
  609. dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
  610. &dev->core->i2c_adap);
  611. break;
  612. #endif
  613. #ifdef HAVE_CX24123
  614. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  615. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  616. dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
  617. &dev->core->i2c_adap);
  618. break;
  619. case CX88_BOARD_KWORLD_DVBS_100:
  620. dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
  621. &dev->core->i2c_adap);
  622. break;
  623. #endif
  624. default:
  625. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  626. dev->core->name);
  627. break;
  628. }
  629. if (NULL == dev->dvb.frontend) {
  630. printk("%s: frontend initialization failed\n",dev->core->name);
  631. return -1;
  632. }
  633. if (dev->core->pll_desc) {
  634. dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
  635. dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
  636. }
  637. /* Put the analog decoder in standby to keep it quiet */
  638. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  639. /* register everything */
  640. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  641. }
  642. /* ----------------------------------------------------------- */
  643. static int __devinit dvb_probe(struct pci_dev *pci_dev,
  644. const struct pci_device_id *pci_id)
  645. {
  646. struct cx8802_dev *dev;
  647. struct cx88_core *core;
  648. int err;
  649. /* general setup */
  650. core = cx88_core_get(pci_dev);
  651. if (NULL == core)
  652. return -EINVAL;
  653. err = -ENODEV;
  654. if (!cx88_boards[core->board].dvb)
  655. goto fail_core;
  656. err = -ENOMEM;
  657. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  658. if (NULL == dev)
  659. goto fail_core;
  660. dev->pci = pci_dev;
  661. dev->core = core;
  662. err = cx8802_init_common(dev);
  663. if (0 != err)
  664. goto fail_free;
  665. #ifdef HAVE_VP3054_I2C
  666. err = vp3054_i2c_probe(dev);
  667. if (0 != err)
  668. goto fail_free;
  669. #endif
  670. /* dvb stuff */
  671. printk("%s/2: cx2388x based dvb card\n", core->name);
  672. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  673. dev->pci, &dev->slock,
  674. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  675. V4L2_FIELD_TOP,
  676. sizeof(struct cx88_buffer),
  677. dev);
  678. err = dvb_register(dev);
  679. if (0 != err)
  680. goto fail_fini;
  681. /* Maintain a reference to cx88-video can query the 8802 device. */
  682. core->dvbdev = dev;
  683. return 0;
  684. fail_fini:
  685. cx8802_fini_common(dev);
  686. fail_free:
  687. kfree(dev);
  688. fail_core:
  689. cx88_core_put(core,pci_dev);
  690. return err;
  691. }
  692. static void __devexit dvb_remove(struct pci_dev *pci_dev)
  693. {
  694. struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
  695. /* Destroy any 8802 reference. */
  696. dev->core->dvbdev = NULL;
  697. /* dvb */
  698. videobuf_dvb_unregister(&dev->dvb);
  699. #ifdef HAVE_VP3054_I2C
  700. vp3054_i2c_remove(dev);
  701. #endif
  702. /* common */
  703. cx8802_fini_common(dev);
  704. cx88_core_put(dev->core,dev->pci);
  705. kfree(dev);
  706. }
  707. static struct pci_device_id cx8802_pci_tbl[] = {
  708. {
  709. .vendor = 0x14f1,
  710. .device = 0x8802,
  711. .subvendor = PCI_ANY_ID,
  712. .subdevice = PCI_ANY_ID,
  713. },{
  714. /* --- end of list --- */
  715. }
  716. };
  717. MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
  718. static struct pci_driver dvb_pci_driver = {
  719. .name = "cx88-dvb",
  720. .id_table = cx8802_pci_tbl,
  721. .probe = dvb_probe,
  722. .remove = __devexit_p(dvb_remove),
  723. .suspend = cx8802_suspend_common,
  724. .resume = cx8802_resume_common,
  725. };
  726. static int dvb_init(void)
  727. {
  728. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  729. (CX88_VERSION_CODE >> 16) & 0xff,
  730. (CX88_VERSION_CODE >> 8) & 0xff,
  731. CX88_VERSION_CODE & 0xff);
  732. #ifdef SNAPSHOT
  733. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  734. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  735. #endif
  736. return pci_register_driver(&dvb_pci_driver);
  737. }
  738. static void dvb_fini(void)
  739. {
  740. pci_unregister_driver(&dvb_pci_driver);
  741. }
  742. module_init(dvb_init);
  743. module_exit(dvb_fini);
  744. /*
  745. * Local variables:
  746. * c-basic-offset: 8
  747. * compile-command: "make DVB=1"
  748. * End:
  749. */