cs4231.c 58 KB

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  1. /*
  2. * Driver for CS4231 sound chips found on Sparcs.
  3. * Copyright (C) 2002 David S. Miller <davem@redhat.com>
  4. *
  5. * Based entirely upon drivers/sbus/audio/cs4231.c which is:
  6. * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
  7. * and also sound/isa/cs423x/cs4231_lib.c which is:
  8. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/slab.h>
  13. #include <linux/delay.h>
  14. #include <linux/init.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/irq.h>
  18. #include <linux/io.h>
  19. #include <sound/driver.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/info.h>
  23. #include <sound/control.h>
  24. #include <sound/timer.h>
  25. #include <sound/initval.h>
  26. #include <sound/pcm_params.h>
  27. #ifdef CONFIG_SBUS
  28. #define SBUS_SUPPORT
  29. #include <asm/sbus.h>
  30. #endif
  31. #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  32. #define EBUS_SUPPORT
  33. #include <linux/pci.h>
  34. #include <asm/ebus.h>
  35. #endif
  36. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  37. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  38. /* Enable this card */
  39. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  40. module_param_array(index, int, NULL, 0444);
  41. MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  42. module_param_array(id, charp, NULL, 0444);
  43. MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  44. module_param_array(enable, bool, NULL, 0444);
  45. MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  46. MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  47. MODULE_DESCRIPTION("Sun CS4231");
  48. MODULE_LICENSE("GPL");
  49. MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
  50. #ifdef SBUS_SUPPORT
  51. struct sbus_dma_info {
  52. spinlock_t lock; /* DMA access lock */
  53. int dir;
  54. void __iomem *regs;
  55. };
  56. #endif
  57. struct snd_cs4231;
  58. struct cs4231_dma_control {
  59. void (*prepare)(struct cs4231_dma_control *dma_cont,
  60. int dir);
  61. void (*enable)(struct cs4231_dma_control *dma_cont, int on);
  62. int (*request)(struct cs4231_dma_control *dma_cont,
  63. dma_addr_t bus_addr, size_t len);
  64. unsigned int (*address)(struct cs4231_dma_control *dma_cont);
  65. void (*preallocate)(struct snd_cs4231 *chip,
  66. struct snd_pcm *pcm);
  67. #ifdef EBUS_SUPPORT
  68. struct ebus_dma_info ebus_info;
  69. #endif
  70. #ifdef SBUS_SUPPORT
  71. struct sbus_dma_info sbus_info;
  72. #endif
  73. };
  74. struct snd_cs4231 {
  75. spinlock_t lock; /* registers access lock */
  76. void __iomem *port;
  77. struct cs4231_dma_control p_dma;
  78. struct cs4231_dma_control c_dma;
  79. u32 flags;
  80. #define CS4231_FLAG_EBUS 0x00000001
  81. #define CS4231_FLAG_PLAYBACK 0x00000002
  82. #define CS4231_FLAG_CAPTURE 0x00000004
  83. struct snd_card *card;
  84. struct snd_pcm *pcm;
  85. struct snd_pcm_substream *playback_substream;
  86. unsigned int p_periods_sent;
  87. struct snd_pcm_substream *capture_substream;
  88. unsigned int c_periods_sent;
  89. struct snd_timer *timer;
  90. unsigned short mode;
  91. #define CS4231_MODE_NONE 0x0000
  92. #define CS4231_MODE_PLAY 0x0001
  93. #define CS4231_MODE_RECORD 0x0002
  94. #define CS4231_MODE_TIMER 0x0004
  95. #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
  96. CS4231_MODE_TIMER)
  97. unsigned char image[32]; /* registers image */
  98. int mce_bit;
  99. int calibrate_mute;
  100. struct mutex mce_mutex; /* mutex for mce register */
  101. struct mutex open_mutex; /* mutex for ALSA open/close */
  102. union {
  103. #ifdef SBUS_SUPPORT
  104. struct sbus_dev *sdev;
  105. #endif
  106. #ifdef EBUS_SUPPORT
  107. struct pci_dev *pdev;
  108. #endif
  109. } dev_u;
  110. unsigned int irq[2];
  111. unsigned int regs_size;
  112. struct snd_cs4231 *next;
  113. };
  114. static struct snd_cs4231 *cs4231_list;
  115. /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
  116. * now.... -DaveM
  117. */
  118. /* IO ports */
  119. #include <sound/cs4231-regs.h>
  120. /* XXX offsets are different than PC ISA chips... */
  121. #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
  122. /* SBUS DMA register defines. */
  123. #define APCCSR 0x10UL /* APC DMA CSR */
  124. #define APCCVA 0x20UL /* APC Capture DMA Address */
  125. #define APCCC 0x24UL /* APC Capture Count */
  126. #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
  127. #define APCCNC 0x2cUL /* APC Capture Next Count */
  128. #define APCPVA 0x30UL /* APC Play DMA Address */
  129. #define APCPC 0x34UL /* APC Play Count */
  130. #define APCPNVA 0x38UL /* APC Play DMA Next Address */
  131. #define APCPNC 0x3cUL /* APC Play Next Count */
  132. /* Defines for SBUS DMA-routines */
  133. #define APCVA 0x0UL /* APC DMA Address */
  134. #define APCC 0x4UL /* APC Count */
  135. #define APCNVA 0x8UL /* APC DMA Next Address */
  136. #define APCNC 0xcUL /* APC Next Count */
  137. #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
  138. #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
  139. /* APCCSR bits */
  140. #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
  141. #define APC_PLAY_INT 0x400000 /* Playback interrupt */
  142. #define APC_CAPT_INT 0x200000 /* Capture interrupt */
  143. #define APC_GENL_INT 0x100000 /* General interrupt */
  144. #define APC_XINT_ENA 0x80000 /* General ext int. enable */
  145. #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
  146. #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
  147. #define APC_XINT_GENL 0x10000 /* Error ext intr */
  148. #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
  149. #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
  150. #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
  151. #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
  152. #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
  153. #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
  154. #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
  155. #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
  156. #define APC_PPAUSE 0x80 /* Pause the play DMA */
  157. #define APC_CPAUSE 0x40 /* Pause the capture DMA */
  158. #define APC_CDC_RESET 0x20 /* CODEC RESET */
  159. #define APC_PDMA_READY 0x08 /* Play DMA Go */
  160. #define APC_CDMA_READY 0x04 /* Capture DMA Go */
  161. #define APC_CHIP_RESET 0x01 /* Reset the chip */
  162. /* EBUS DMA register offsets */
  163. #define EBDMA_CSR 0x00UL /* Control/Status */
  164. #define EBDMA_ADDR 0x04UL /* DMA Address */
  165. #define EBDMA_COUNT 0x08UL /* DMA Count */
  166. /*
  167. * Some variables
  168. */
  169. static unsigned char freq_bits[14] = {
  170. /* 5510 */ 0x00 | CS4231_XTAL2,
  171. /* 6620 */ 0x0E | CS4231_XTAL2,
  172. /* 8000 */ 0x00 | CS4231_XTAL1,
  173. /* 9600 */ 0x0E | CS4231_XTAL1,
  174. /* 11025 */ 0x02 | CS4231_XTAL2,
  175. /* 16000 */ 0x02 | CS4231_XTAL1,
  176. /* 18900 */ 0x04 | CS4231_XTAL2,
  177. /* 22050 */ 0x06 | CS4231_XTAL2,
  178. /* 27042 */ 0x04 | CS4231_XTAL1,
  179. /* 32000 */ 0x06 | CS4231_XTAL1,
  180. /* 33075 */ 0x0C | CS4231_XTAL2,
  181. /* 37800 */ 0x08 | CS4231_XTAL2,
  182. /* 44100 */ 0x0A | CS4231_XTAL2,
  183. /* 48000 */ 0x0C | CS4231_XTAL1
  184. };
  185. static unsigned int rates[14] = {
  186. 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
  187. 27042, 32000, 33075, 37800, 44100, 48000
  188. };
  189. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  190. .count = ARRAY_SIZE(rates),
  191. .list = rates,
  192. };
  193. static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
  194. {
  195. return snd_pcm_hw_constraint_list(runtime, 0,
  196. SNDRV_PCM_HW_PARAM_RATE,
  197. &hw_constraints_rates);
  198. }
  199. static unsigned char snd_cs4231_original_image[32] =
  200. {
  201. 0x00, /* 00/00 - lic */
  202. 0x00, /* 01/01 - ric */
  203. 0x9f, /* 02/02 - la1ic */
  204. 0x9f, /* 03/03 - ra1ic */
  205. 0x9f, /* 04/04 - la2ic */
  206. 0x9f, /* 05/05 - ra2ic */
  207. 0xbf, /* 06/06 - loc */
  208. 0xbf, /* 07/07 - roc */
  209. 0x20, /* 08/08 - pdfr */
  210. CS4231_AUTOCALIB, /* 09/09 - ic */
  211. 0x00, /* 0a/10 - pc */
  212. 0x00, /* 0b/11 - ti */
  213. CS4231_MODE2, /* 0c/12 - mi */
  214. 0x00, /* 0d/13 - lbc */
  215. 0x00, /* 0e/14 - pbru */
  216. 0x00, /* 0f/15 - pbrl */
  217. 0x80, /* 10/16 - afei */
  218. 0x01, /* 11/17 - afeii */
  219. 0x9f, /* 12/18 - llic */
  220. 0x9f, /* 13/19 - rlic */
  221. 0x00, /* 14/20 - tlb */
  222. 0x00, /* 15/21 - thb */
  223. 0x00, /* 16/22 - la3mic/reserved */
  224. 0x00, /* 17/23 - ra3mic/reserved */
  225. 0x00, /* 18/24 - afs */
  226. 0x00, /* 19/25 - lamoc/version */
  227. 0x00, /* 1a/26 - mioc */
  228. 0x00, /* 1b/27 - ramoc/reserved */
  229. 0x20, /* 1c/28 - cdfr */
  230. 0x00, /* 1d/29 - res4 */
  231. 0x00, /* 1e/30 - cbru */
  232. 0x00, /* 1f/31 - cbrl */
  233. };
  234. static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
  235. {
  236. #ifdef EBUS_SUPPORT
  237. if (cp->flags & CS4231_FLAG_EBUS)
  238. return readb(reg_addr);
  239. else
  240. #endif
  241. #ifdef SBUS_SUPPORT
  242. return sbus_readb(reg_addr);
  243. #endif
  244. }
  245. static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
  246. void __iomem *reg_addr)
  247. {
  248. #ifdef EBUS_SUPPORT
  249. if (cp->flags & CS4231_FLAG_EBUS)
  250. return writeb(val, reg_addr);
  251. else
  252. #endif
  253. #ifdef SBUS_SUPPORT
  254. return sbus_writeb(val, reg_addr);
  255. #endif
  256. }
  257. /*
  258. * Basic I/O functions
  259. */
  260. static void snd_cs4231_ready(struct snd_cs4231 *chip)
  261. {
  262. int timeout;
  263. for (timeout = 250; timeout > 0; timeout--) {
  264. int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  265. if ((val & CS4231_INIT) == 0)
  266. break;
  267. udelay(100);
  268. }
  269. }
  270. static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
  271. unsigned char value)
  272. {
  273. snd_cs4231_ready(chip);
  274. #ifdef CONFIG_SND_DEBUG
  275. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  276. snd_printdd("out: auto calibration time out - reg = 0x%x, "
  277. "value = 0x%x\n",
  278. reg, value);
  279. #endif
  280. __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
  281. wmb();
  282. __cs4231_writeb(chip, value, CS4231U(chip, REG));
  283. mb();
  284. }
  285. static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
  286. unsigned char mask, unsigned char value)
  287. {
  288. unsigned char tmp = (chip->image[reg] & mask) | value;
  289. chip->image[reg] = tmp;
  290. if (!chip->calibrate_mute)
  291. snd_cs4231_dout(chip, reg, tmp);
  292. }
  293. static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
  294. unsigned char value)
  295. {
  296. snd_cs4231_dout(chip, reg, value);
  297. chip->image[reg] = value;
  298. mb();
  299. }
  300. static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
  301. {
  302. snd_cs4231_ready(chip);
  303. #ifdef CONFIG_SND_DEBUG
  304. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  305. snd_printdd("in: auto calibration time out - reg = 0x%x\n",
  306. reg);
  307. #endif
  308. __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
  309. mb();
  310. return __cs4231_readb(chip, CS4231U(chip, REG));
  311. }
  312. /*
  313. * CS4231 detection / MCE routines
  314. */
  315. static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
  316. {
  317. int timeout;
  318. /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
  319. for (timeout = 5; timeout > 0; timeout--)
  320. __cs4231_readb(chip, CS4231U(chip, REGSEL));
  321. /* end of cleanup sequence */
  322. for (timeout = 500; timeout > 0; timeout--) {
  323. int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  324. if ((val & CS4231_INIT) == 0)
  325. break;
  326. msleep(1);
  327. }
  328. }
  329. static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
  330. {
  331. unsigned long flags;
  332. int timeout;
  333. spin_lock_irqsave(&chip->lock, flags);
  334. snd_cs4231_ready(chip);
  335. #ifdef CONFIG_SND_DEBUG
  336. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  337. snd_printdd("mce_up - auto calibration time out (0)\n");
  338. #endif
  339. chip->mce_bit |= CS4231_MCE;
  340. timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  341. if (timeout == 0x80)
  342. snd_printdd("mce_up [%p]: serious init problem - "
  343. "codec still busy\n",
  344. chip->port);
  345. if (!(timeout & CS4231_MCE))
  346. __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
  347. CS4231U(chip, REGSEL));
  348. spin_unlock_irqrestore(&chip->lock, flags);
  349. }
  350. static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
  351. {
  352. unsigned long flags;
  353. int timeout;
  354. spin_lock_irqsave(&chip->lock, flags);
  355. snd_cs4231_busy_wait(chip);
  356. #ifdef CONFIG_SND_DEBUG
  357. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  358. snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
  359. CS4231U(chip, REGSEL));
  360. #endif
  361. chip->mce_bit &= ~CS4231_MCE;
  362. timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  363. __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
  364. CS4231U(chip, REGSEL));
  365. if (timeout == 0x80)
  366. snd_printdd("mce_down [%p]: serious init problem - "
  367. "codec still busy\n",
  368. chip->port);
  369. if ((timeout & CS4231_MCE) == 0) {
  370. spin_unlock_irqrestore(&chip->lock, flags);
  371. return;
  372. }
  373. snd_cs4231_busy_wait(chip);
  374. /* calibration process */
  375. snd_cs4231_ready(chip);
  376. snd_cs4231_ready(chip);
  377. timeout = snd_cs4231_in(chip, CS4231_TEST_INIT);
  378. if ((timeout & CS4231_CALIB_IN_PROGRESS) == 0) {
  379. snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
  380. spin_unlock_irqrestore(&chip->lock, flags);
  381. return;
  382. }
  383. /* in 10ms increments, check condition, up to 250ms */
  384. timeout = 25;
  385. while (snd_cs4231_in(chip, CS4231_TEST_INIT) &
  386. CS4231_CALIB_IN_PROGRESS) {
  387. spin_unlock_irqrestore(&chip->lock, flags);
  388. if (--timeout < 0) {
  389. snd_printk("mce_down - "
  390. "auto calibration time out (2)\n");
  391. return;
  392. }
  393. msleep(10);
  394. spin_lock_irqsave(&chip->lock, flags);
  395. }
  396. /* in 10ms increments, check condition, up to 100ms */
  397. timeout = 10;
  398. while (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) {
  399. spin_unlock_irqrestore(&chip->lock, flags);
  400. if (--timeout < 0) {
  401. snd_printk("mce_down - "
  402. "auto calibration time out (3)\n");
  403. return;
  404. }
  405. msleep(10);
  406. spin_lock_irqsave(&chip->lock, flags);
  407. }
  408. spin_unlock_irqrestore(&chip->lock, flags);
  409. }
  410. static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
  411. struct snd_pcm_substream *substream,
  412. unsigned int *periods_sent)
  413. {
  414. struct snd_pcm_runtime *runtime = substream->runtime;
  415. while (1) {
  416. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  417. unsigned int offset = period_size * (*periods_sent);
  418. BUG_ON(period_size >= (1 << 24));
  419. if (dma_cont->request(dma_cont,
  420. runtime->dma_addr + offset, period_size))
  421. return;
  422. (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
  423. }
  424. }
  425. static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
  426. unsigned int what, int on)
  427. {
  428. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  429. struct cs4231_dma_control *dma_cont;
  430. if (what & CS4231_PLAYBACK_ENABLE) {
  431. dma_cont = &chip->p_dma;
  432. if (on) {
  433. dma_cont->prepare(dma_cont, 0);
  434. dma_cont->enable(dma_cont, 1);
  435. snd_cs4231_advance_dma(dma_cont,
  436. chip->playback_substream,
  437. &chip->p_periods_sent);
  438. } else {
  439. dma_cont->enable(dma_cont, 0);
  440. }
  441. }
  442. if (what & CS4231_RECORD_ENABLE) {
  443. dma_cont = &chip->c_dma;
  444. if (on) {
  445. dma_cont->prepare(dma_cont, 1);
  446. dma_cont->enable(dma_cont, 1);
  447. snd_cs4231_advance_dma(dma_cont,
  448. chip->capture_substream,
  449. &chip->c_periods_sent);
  450. } else {
  451. dma_cont->enable(dma_cont, 0);
  452. }
  453. }
  454. }
  455. static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
  456. {
  457. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  458. int result = 0;
  459. switch (cmd) {
  460. case SNDRV_PCM_TRIGGER_START:
  461. case SNDRV_PCM_TRIGGER_STOP:
  462. {
  463. unsigned int what = 0;
  464. struct snd_pcm_substream *s;
  465. unsigned long flags;
  466. snd_pcm_group_for_each_entry(s, substream) {
  467. if (s == chip->playback_substream) {
  468. what |= CS4231_PLAYBACK_ENABLE;
  469. snd_pcm_trigger_done(s, substream);
  470. } else if (s == chip->capture_substream) {
  471. what |= CS4231_RECORD_ENABLE;
  472. snd_pcm_trigger_done(s, substream);
  473. }
  474. }
  475. spin_lock_irqsave(&chip->lock, flags);
  476. if (cmd == SNDRV_PCM_TRIGGER_START) {
  477. cs4231_dma_trigger(substream, what, 1);
  478. chip->image[CS4231_IFACE_CTRL] |= what;
  479. } else {
  480. cs4231_dma_trigger(substream, what, 0);
  481. chip->image[CS4231_IFACE_CTRL] &= ~what;
  482. }
  483. snd_cs4231_out(chip, CS4231_IFACE_CTRL,
  484. chip->image[CS4231_IFACE_CTRL]);
  485. spin_unlock_irqrestore(&chip->lock, flags);
  486. break;
  487. }
  488. default:
  489. result = -EINVAL;
  490. break;
  491. }
  492. return result;
  493. }
  494. /*
  495. * CODEC I/O
  496. */
  497. static unsigned char snd_cs4231_get_rate(unsigned int rate)
  498. {
  499. int i;
  500. for (i = 0; i < 14; i++)
  501. if (rate == rates[i])
  502. return freq_bits[i];
  503. return freq_bits[13];
  504. }
  505. static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
  506. int channels)
  507. {
  508. unsigned char rformat;
  509. rformat = CS4231_LINEAR_8;
  510. switch (format) {
  511. case SNDRV_PCM_FORMAT_MU_LAW:
  512. rformat = CS4231_ULAW_8;
  513. break;
  514. case SNDRV_PCM_FORMAT_A_LAW:
  515. rformat = CS4231_ALAW_8;
  516. break;
  517. case SNDRV_PCM_FORMAT_S16_LE:
  518. rformat = CS4231_LINEAR_16;
  519. break;
  520. case SNDRV_PCM_FORMAT_S16_BE:
  521. rformat = CS4231_LINEAR_16_BIG;
  522. break;
  523. case SNDRV_PCM_FORMAT_IMA_ADPCM:
  524. rformat = CS4231_ADPCM_16;
  525. break;
  526. }
  527. if (channels > 1)
  528. rformat |= CS4231_STEREO;
  529. return rformat;
  530. }
  531. static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
  532. {
  533. unsigned long flags;
  534. mute = mute ? 1 : 0;
  535. spin_lock_irqsave(&chip->lock, flags);
  536. if (chip->calibrate_mute == mute) {
  537. spin_unlock_irqrestore(&chip->lock, flags);
  538. return;
  539. }
  540. if (!mute) {
  541. snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
  542. chip->image[CS4231_LEFT_INPUT]);
  543. snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
  544. chip->image[CS4231_RIGHT_INPUT]);
  545. snd_cs4231_dout(chip, CS4231_LOOPBACK,
  546. chip->image[CS4231_LOOPBACK]);
  547. }
  548. snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
  549. mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
  550. snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
  551. mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
  552. snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
  553. mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
  554. snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
  555. mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
  556. snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
  557. mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
  558. snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
  559. mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
  560. snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
  561. mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
  562. snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
  563. mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
  564. snd_cs4231_dout(chip, CS4231_MONO_CTRL,
  565. mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
  566. chip->calibrate_mute = mute;
  567. spin_unlock_irqrestore(&chip->lock, flags);
  568. }
  569. static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
  570. struct snd_pcm_hw_params *params,
  571. unsigned char pdfr)
  572. {
  573. unsigned long flags;
  574. mutex_lock(&chip->mce_mutex);
  575. snd_cs4231_calibrate_mute(chip, 1);
  576. snd_cs4231_mce_up(chip);
  577. spin_lock_irqsave(&chip->lock, flags);
  578. snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
  579. (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
  580. (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
  581. pdfr);
  582. spin_unlock_irqrestore(&chip->lock, flags);
  583. snd_cs4231_mce_down(chip);
  584. snd_cs4231_calibrate_mute(chip, 0);
  585. mutex_unlock(&chip->mce_mutex);
  586. }
  587. static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
  588. struct snd_pcm_hw_params *params,
  589. unsigned char cdfr)
  590. {
  591. unsigned long flags;
  592. mutex_lock(&chip->mce_mutex);
  593. snd_cs4231_calibrate_mute(chip, 1);
  594. snd_cs4231_mce_up(chip);
  595. spin_lock_irqsave(&chip->lock, flags);
  596. if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
  597. snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
  598. ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
  599. (cdfr & 0x0f));
  600. spin_unlock_irqrestore(&chip->lock, flags);
  601. snd_cs4231_mce_down(chip);
  602. snd_cs4231_mce_up(chip);
  603. spin_lock_irqsave(&chip->lock, flags);
  604. }
  605. snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
  606. spin_unlock_irqrestore(&chip->lock, flags);
  607. snd_cs4231_mce_down(chip);
  608. snd_cs4231_calibrate_mute(chip, 0);
  609. mutex_unlock(&chip->mce_mutex);
  610. }
  611. /*
  612. * Timer interface
  613. */
  614. static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
  615. {
  616. struct snd_cs4231 *chip = snd_timer_chip(timer);
  617. return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
  618. }
  619. static int snd_cs4231_timer_start(struct snd_timer *timer)
  620. {
  621. unsigned long flags;
  622. unsigned int ticks;
  623. struct snd_cs4231 *chip = snd_timer_chip(timer);
  624. spin_lock_irqsave(&chip->lock, flags);
  625. ticks = timer->sticks;
  626. if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
  627. (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
  628. (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
  629. snd_cs4231_out(chip, CS4231_TIMER_HIGH,
  630. chip->image[CS4231_TIMER_HIGH] =
  631. (unsigned char) (ticks >> 8));
  632. snd_cs4231_out(chip, CS4231_TIMER_LOW,
  633. chip->image[CS4231_TIMER_LOW] =
  634. (unsigned char) ticks);
  635. snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
  636. chip->image[CS4231_ALT_FEATURE_1] |
  637. CS4231_TIMER_ENABLE);
  638. }
  639. spin_unlock_irqrestore(&chip->lock, flags);
  640. return 0;
  641. }
  642. static int snd_cs4231_timer_stop(struct snd_timer *timer)
  643. {
  644. unsigned long flags;
  645. struct snd_cs4231 *chip = snd_timer_chip(timer);
  646. spin_lock_irqsave(&chip->lock, flags);
  647. chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
  648. snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
  649. chip->image[CS4231_ALT_FEATURE_1]);
  650. spin_unlock_irqrestore(&chip->lock, flags);
  651. return 0;
  652. }
  653. static void __init snd_cs4231_init(struct snd_cs4231 *chip)
  654. {
  655. unsigned long flags;
  656. snd_cs4231_mce_down(chip);
  657. #ifdef SNDRV_DEBUG_MCE
  658. snd_printdd("init: (1)\n");
  659. #endif
  660. snd_cs4231_mce_up(chip);
  661. spin_lock_irqsave(&chip->lock, flags);
  662. chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
  663. CS4231_PLAYBACK_PIO |
  664. CS4231_RECORD_ENABLE |
  665. CS4231_RECORD_PIO |
  666. CS4231_CALIB_MODE);
  667. chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
  668. snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
  669. spin_unlock_irqrestore(&chip->lock, flags);
  670. snd_cs4231_mce_down(chip);
  671. #ifdef SNDRV_DEBUG_MCE
  672. snd_printdd("init: (2)\n");
  673. #endif
  674. snd_cs4231_mce_up(chip);
  675. spin_lock_irqsave(&chip->lock, flags);
  676. snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
  677. chip->image[CS4231_ALT_FEATURE_1]);
  678. spin_unlock_irqrestore(&chip->lock, flags);
  679. snd_cs4231_mce_down(chip);
  680. #ifdef SNDRV_DEBUG_MCE
  681. snd_printdd("init: (3) - afei = 0x%x\n",
  682. chip->image[CS4231_ALT_FEATURE_1]);
  683. #endif
  684. spin_lock_irqsave(&chip->lock, flags);
  685. snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
  686. chip->image[CS4231_ALT_FEATURE_2]);
  687. spin_unlock_irqrestore(&chip->lock, flags);
  688. snd_cs4231_mce_up(chip);
  689. spin_lock_irqsave(&chip->lock, flags);
  690. snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
  691. chip->image[CS4231_PLAYBK_FORMAT]);
  692. spin_unlock_irqrestore(&chip->lock, flags);
  693. snd_cs4231_mce_down(chip);
  694. #ifdef SNDRV_DEBUG_MCE
  695. snd_printdd("init: (4)\n");
  696. #endif
  697. snd_cs4231_mce_up(chip);
  698. spin_lock_irqsave(&chip->lock, flags);
  699. snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
  700. spin_unlock_irqrestore(&chip->lock, flags);
  701. snd_cs4231_mce_down(chip);
  702. #ifdef SNDRV_DEBUG_MCE
  703. snd_printdd("init: (5)\n");
  704. #endif
  705. }
  706. static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
  707. {
  708. unsigned long flags;
  709. mutex_lock(&chip->open_mutex);
  710. if ((chip->mode & mode)) {
  711. mutex_unlock(&chip->open_mutex);
  712. return -EAGAIN;
  713. }
  714. if (chip->mode & CS4231_MODE_OPEN) {
  715. chip->mode |= mode;
  716. mutex_unlock(&chip->open_mutex);
  717. return 0;
  718. }
  719. /* ok. now enable and ack CODEC IRQ */
  720. spin_lock_irqsave(&chip->lock, flags);
  721. snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
  722. CS4231_RECORD_IRQ |
  723. CS4231_TIMER_IRQ);
  724. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  725. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  726. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  727. snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
  728. CS4231_RECORD_IRQ |
  729. CS4231_TIMER_IRQ);
  730. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  731. spin_unlock_irqrestore(&chip->lock, flags);
  732. chip->mode = mode;
  733. mutex_unlock(&chip->open_mutex);
  734. return 0;
  735. }
  736. static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
  737. {
  738. unsigned long flags;
  739. mutex_lock(&chip->open_mutex);
  740. chip->mode &= ~mode;
  741. if (chip->mode & CS4231_MODE_OPEN) {
  742. mutex_unlock(&chip->open_mutex);
  743. return;
  744. }
  745. snd_cs4231_calibrate_mute(chip, 1);
  746. /* disable IRQ */
  747. spin_lock_irqsave(&chip->lock, flags);
  748. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  749. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  750. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  751. /* now disable record & playback */
  752. if (chip->image[CS4231_IFACE_CTRL] &
  753. (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
  754. CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
  755. spin_unlock_irqrestore(&chip->lock, flags);
  756. snd_cs4231_mce_up(chip);
  757. spin_lock_irqsave(&chip->lock, flags);
  758. chip->image[CS4231_IFACE_CTRL] &=
  759. ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
  760. CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
  761. snd_cs4231_out(chip, CS4231_IFACE_CTRL,
  762. chip->image[CS4231_IFACE_CTRL]);
  763. spin_unlock_irqrestore(&chip->lock, flags);
  764. snd_cs4231_mce_down(chip);
  765. spin_lock_irqsave(&chip->lock, flags);
  766. }
  767. /* clear IRQ again */
  768. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  769. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  770. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  771. spin_unlock_irqrestore(&chip->lock, flags);
  772. snd_cs4231_calibrate_mute(chip, 0);
  773. chip->mode = 0;
  774. mutex_unlock(&chip->open_mutex);
  775. }
  776. /*
  777. * timer open/close
  778. */
  779. static int snd_cs4231_timer_open(struct snd_timer *timer)
  780. {
  781. struct snd_cs4231 *chip = snd_timer_chip(timer);
  782. snd_cs4231_open(chip, CS4231_MODE_TIMER);
  783. return 0;
  784. }
  785. static int snd_cs4231_timer_close(struct snd_timer *timer)
  786. {
  787. struct snd_cs4231 *chip = snd_timer_chip(timer);
  788. snd_cs4231_close(chip, CS4231_MODE_TIMER);
  789. return 0;
  790. }
  791. static struct snd_timer_hardware snd_cs4231_timer_table = {
  792. .flags = SNDRV_TIMER_HW_AUTO,
  793. .resolution = 9945,
  794. .ticks = 65535,
  795. .open = snd_cs4231_timer_open,
  796. .close = snd_cs4231_timer_close,
  797. .c_resolution = snd_cs4231_timer_resolution,
  798. .start = snd_cs4231_timer_start,
  799. .stop = snd_cs4231_timer_stop,
  800. };
  801. /*
  802. * ok.. exported functions..
  803. */
  804. static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
  805. struct snd_pcm_hw_params *hw_params)
  806. {
  807. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  808. unsigned char new_pdfr;
  809. int err;
  810. err = snd_pcm_lib_malloc_pages(substream,
  811. params_buffer_bytes(hw_params));
  812. if (err < 0)
  813. return err;
  814. new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
  815. params_channels(hw_params)) |
  816. snd_cs4231_get_rate(params_rate(hw_params));
  817. snd_cs4231_playback_format(chip, hw_params, new_pdfr);
  818. return 0;
  819. }
  820. static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
  821. {
  822. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  823. struct snd_pcm_runtime *runtime = substream->runtime;
  824. unsigned long flags;
  825. spin_lock_irqsave(&chip->lock, flags);
  826. chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
  827. CS4231_PLAYBACK_PIO);
  828. BUG_ON(runtime->period_size > 0xffff + 1);
  829. chip->p_periods_sent = 0;
  830. spin_unlock_irqrestore(&chip->lock, flags);
  831. return 0;
  832. }
  833. static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
  834. struct snd_pcm_hw_params *hw_params)
  835. {
  836. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  837. unsigned char new_cdfr;
  838. int err;
  839. err = snd_pcm_lib_malloc_pages(substream,
  840. params_buffer_bytes(hw_params));
  841. if (err < 0)
  842. return err;
  843. new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
  844. params_channels(hw_params)) |
  845. snd_cs4231_get_rate(params_rate(hw_params));
  846. snd_cs4231_capture_format(chip, hw_params, new_cdfr);
  847. return 0;
  848. }
  849. static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
  850. {
  851. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  852. unsigned long flags;
  853. spin_lock_irqsave(&chip->lock, flags);
  854. chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
  855. CS4231_RECORD_PIO);
  856. chip->c_periods_sent = 0;
  857. spin_unlock_irqrestore(&chip->lock, flags);
  858. return 0;
  859. }
  860. static void snd_cs4231_overrange(struct snd_cs4231 *chip)
  861. {
  862. unsigned long flags;
  863. unsigned char res;
  864. spin_lock_irqsave(&chip->lock, flags);
  865. res = snd_cs4231_in(chip, CS4231_TEST_INIT);
  866. spin_unlock_irqrestore(&chip->lock, flags);
  867. /* detect overrange only above 0dB; may be user selectable? */
  868. if (res & (0x08 | 0x02))
  869. chip->capture_substream->runtime->overrange++;
  870. }
  871. static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
  872. {
  873. if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
  874. snd_pcm_period_elapsed(chip->playback_substream);
  875. snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
  876. &chip->p_periods_sent);
  877. }
  878. }
  879. static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
  880. {
  881. if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
  882. snd_pcm_period_elapsed(chip->capture_substream);
  883. snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
  884. &chip->c_periods_sent);
  885. }
  886. }
  887. static snd_pcm_uframes_t snd_cs4231_playback_pointer(
  888. struct snd_pcm_substream *substream)
  889. {
  890. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  891. struct cs4231_dma_control *dma_cont = &chip->p_dma;
  892. size_t ptr;
  893. if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
  894. return 0;
  895. ptr = dma_cont->address(dma_cont);
  896. if (ptr != 0)
  897. ptr -= substream->runtime->dma_addr;
  898. return bytes_to_frames(substream->runtime, ptr);
  899. }
  900. static snd_pcm_uframes_t snd_cs4231_capture_pointer(
  901. struct snd_pcm_substream *substream)
  902. {
  903. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  904. struct cs4231_dma_control *dma_cont = &chip->c_dma;
  905. size_t ptr;
  906. if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
  907. return 0;
  908. ptr = dma_cont->address(dma_cont);
  909. if (ptr != 0)
  910. ptr -= substream->runtime->dma_addr;
  911. return bytes_to_frames(substream->runtime, ptr);
  912. }
  913. static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
  914. {
  915. unsigned long flags;
  916. int i;
  917. int id = 0;
  918. int vers = 0;
  919. unsigned char *ptr;
  920. for (i = 0; i < 50; i++) {
  921. mb();
  922. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  923. msleep(2);
  924. else {
  925. spin_lock_irqsave(&chip->lock, flags);
  926. snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
  927. id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
  928. vers = snd_cs4231_in(chip, CS4231_VERSION);
  929. spin_unlock_irqrestore(&chip->lock, flags);
  930. if (id == 0x0a)
  931. break; /* this is valid value */
  932. }
  933. }
  934. snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
  935. if (id != 0x0a)
  936. return -ENODEV; /* no valid device found */
  937. spin_lock_irqsave(&chip->lock, flags);
  938. /* clear any pendings IRQ */
  939. __cs4231_readb(chip, CS4231U(chip, STATUS));
  940. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
  941. mb();
  942. spin_unlock_irqrestore(&chip->lock, flags);
  943. chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
  944. chip->image[CS4231_IFACE_CTRL] =
  945. chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
  946. chip->image[CS4231_ALT_FEATURE_1] = 0x80;
  947. chip->image[CS4231_ALT_FEATURE_2] = 0x01;
  948. if (vers & 0x20)
  949. chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
  950. ptr = (unsigned char *) &chip->image;
  951. snd_cs4231_mce_down(chip);
  952. spin_lock_irqsave(&chip->lock, flags);
  953. for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
  954. snd_cs4231_out(chip, i, *ptr++);
  955. spin_unlock_irqrestore(&chip->lock, flags);
  956. snd_cs4231_mce_up(chip);
  957. snd_cs4231_mce_down(chip);
  958. mdelay(2);
  959. return 0; /* all things are ok.. */
  960. }
  961. static struct snd_pcm_hardware snd_cs4231_playback = {
  962. .info = SNDRV_PCM_INFO_MMAP |
  963. SNDRV_PCM_INFO_INTERLEAVED |
  964. SNDRV_PCM_INFO_MMAP_VALID |
  965. SNDRV_PCM_INFO_SYNC_START,
  966. .formats = SNDRV_PCM_FMTBIT_MU_LAW |
  967. SNDRV_PCM_FMTBIT_A_LAW |
  968. SNDRV_PCM_FMTBIT_IMA_ADPCM |
  969. SNDRV_PCM_FMTBIT_U8 |
  970. SNDRV_PCM_FMTBIT_S16_LE |
  971. SNDRV_PCM_FMTBIT_S16_BE,
  972. .rates = SNDRV_PCM_RATE_KNOT |
  973. SNDRV_PCM_RATE_8000_48000,
  974. .rate_min = 5510,
  975. .rate_max = 48000,
  976. .channels_min = 1,
  977. .channels_max = 2,
  978. .buffer_bytes_max = 32 * 1024,
  979. .period_bytes_min = 64,
  980. .period_bytes_max = 32 * 1024,
  981. .periods_min = 1,
  982. .periods_max = 1024,
  983. };
  984. static struct snd_pcm_hardware snd_cs4231_capture = {
  985. .info = SNDRV_PCM_INFO_MMAP |
  986. SNDRV_PCM_INFO_INTERLEAVED |
  987. SNDRV_PCM_INFO_MMAP_VALID |
  988. SNDRV_PCM_INFO_SYNC_START,
  989. .formats = SNDRV_PCM_FMTBIT_MU_LAW |
  990. SNDRV_PCM_FMTBIT_A_LAW |
  991. SNDRV_PCM_FMTBIT_IMA_ADPCM |
  992. SNDRV_PCM_FMTBIT_U8 |
  993. SNDRV_PCM_FMTBIT_S16_LE |
  994. SNDRV_PCM_FMTBIT_S16_BE,
  995. .rates = SNDRV_PCM_RATE_KNOT |
  996. SNDRV_PCM_RATE_8000_48000,
  997. .rate_min = 5510,
  998. .rate_max = 48000,
  999. .channels_min = 1,
  1000. .channels_max = 2,
  1001. .buffer_bytes_max = 32 * 1024,
  1002. .period_bytes_min = 64,
  1003. .period_bytes_max = 32 * 1024,
  1004. .periods_min = 1,
  1005. .periods_max = 1024,
  1006. };
  1007. static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
  1008. {
  1009. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1010. struct snd_pcm_runtime *runtime = substream->runtime;
  1011. int err;
  1012. runtime->hw = snd_cs4231_playback;
  1013. err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
  1014. if (err < 0) {
  1015. snd_free_pages(runtime->dma_area, runtime->dma_bytes);
  1016. return err;
  1017. }
  1018. chip->playback_substream = substream;
  1019. chip->p_periods_sent = 0;
  1020. snd_pcm_set_sync(substream);
  1021. snd_cs4231_xrate(runtime);
  1022. return 0;
  1023. }
  1024. static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
  1025. {
  1026. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1027. struct snd_pcm_runtime *runtime = substream->runtime;
  1028. int err;
  1029. runtime->hw = snd_cs4231_capture;
  1030. err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
  1031. if (err < 0) {
  1032. snd_free_pages(runtime->dma_area, runtime->dma_bytes);
  1033. return err;
  1034. }
  1035. chip->capture_substream = substream;
  1036. chip->c_periods_sent = 0;
  1037. snd_pcm_set_sync(substream);
  1038. snd_cs4231_xrate(runtime);
  1039. return 0;
  1040. }
  1041. static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
  1042. {
  1043. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1044. snd_cs4231_close(chip, CS4231_MODE_PLAY);
  1045. chip->playback_substream = NULL;
  1046. return 0;
  1047. }
  1048. static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
  1049. {
  1050. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1051. snd_cs4231_close(chip, CS4231_MODE_RECORD);
  1052. chip->capture_substream = NULL;
  1053. return 0;
  1054. }
  1055. /* XXX We can do some power-management, in particular on EBUS using
  1056. * XXX the audio AUXIO register...
  1057. */
  1058. static struct snd_pcm_ops snd_cs4231_playback_ops = {
  1059. .open = snd_cs4231_playback_open,
  1060. .close = snd_cs4231_playback_close,
  1061. .ioctl = snd_pcm_lib_ioctl,
  1062. .hw_params = snd_cs4231_playback_hw_params,
  1063. .hw_free = snd_pcm_lib_free_pages,
  1064. .prepare = snd_cs4231_playback_prepare,
  1065. .trigger = snd_cs4231_trigger,
  1066. .pointer = snd_cs4231_playback_pointer,
  1067. };
  1068. static struct snd_pcm_ops snd_cs4231_capture_ops = {
  1069. .open = snd_cs4231_capture_open,
  1070. .close = snd_cs4231_capture_close,
  1071. .ioctl = snd_pcm_lib_ioctl,
  1072. .hw_params = snd_cs4231_capture_hw_params,
  1073. .hw_free = snd_pcm_lib_free_pages,
  1074. .prepare = snd_cs4231_capture_prepare,
  1075. .trigger = snd_cs4231_trigger,
  1076. .pointer = snd_cs4231_capture_pointer,
  1077. };
  1078. static int __init snd_cs4231_pcm(struct snd_card *card)
  1079. {
  1080. struct snd_cs4231 *chip = card->private_data;
  1081. struct snd_pcm *pcm;
  1082. int err;
  1083. err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
  1084. if (err < 0)
  1085. return err;
  1086. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1087. &snd_cs4231_playback_ops);
  1088. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1089. &snd_cs4231_capture_ops);
  1090. /* global setup */
  1091. pcm->private_data = chip;
  1092. pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
  1093. strcpy(pcm->name, "CS4231");
  1094. chip->p_dma.preallocate(chip, pcm);
  1095. chip->pcm = pcm;
  1096. return 0;
  1097. }
  1098. static int __init snd_cs4231_timer(struct snd_card *card)
  1099. {
  1100. struct snd_cs4231 *chip = card->private_data;
  1101. struct snd_timer *timer;
  1102. struct snd_timer_id tid;
  1103. int err;
  1104. /* Timer initialization */
  1105. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1106. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1107. tid.card = card->number;
  1108. tid.device = 0;
  1109. tid.subdevice = 0;
  1110. err = snd_timer_new(card, "CS4231", &tid, &timer);
  1111. if (err < 0)
  1112. return err;
  1113. strcpy(timer->name, "CS4231");
  1114. timer->private_data = chip;
  1115. timer->hw = snd_cs4231_timer_table;
  1116. chip->timer = timer;
  1117. return 0;
  1118. }
  1119. /*
  1120. * MIXER part
  1121. */
  1122. static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
  1123. struct snd_ctl_elem_info *uinfo)
  1124. {
  1125. static char *texts[4] = {
  1126. "Line", "CD", "Mic", "Mix"
  1127. };
  1128. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1129. uinfo->count = 2;
  1130. uinfo->value.enumerated.items = 4;
  1131. if (uinfo->value.enumerated.item > 3)
  1132. uinfo->value.enumerated.item = 3;
  1133. strcpy(uinfo->value.enumerated.name,
  1134. texts[uinfo->value.enumerated.item]);
  1135. return 0;
  1136. }
  1137. static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
  1138. struct snd_ctl_elem_value *ucontrol)
  1139. {
  1140. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1141. unsigned long flags;
  1142. spin_lock_irqsave(&chip->lock, flags);
  1143. ucontrol->value.enumerated.item[0] =
  1144. (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
  1145. ucontrol->value.enumerated.item[1] =
  1146. (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
  1147. spin_unlock_irqrestore(&chip->lock, flags);
  1148. return 0;
  1149. }
  1150. static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
  1151. struct snd_ctl_elem_value *ucontrol)
  1152. {
  1153. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1154. unsigned long flags;
  1155. unsigned short left, right;
  1156. int change;
  1157. if (ucontrol->value.enumerated.item[0] > 3 ||
  1158. ucontrol->value.enumerated.item[1] > 3)
  1159. return -EINVAL;
  1160. left = ucontrol->value.enumerated.item[0] << 6;
  1161. right = ucontrol->value.enumerated.item[1] << 6;
  1162. spin_lock_irqsave(&chip->lock, flags);
  1163. left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
  1164. right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
  1165. change = left != chip->image[CS4231_LEFT_INPUT] ||
  1166. right != chip->image[CS4231_RIGHT_INPUT];
  1167. snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
  1168. snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
  1169. spin_unlock_irqrestore(&chip->lock, flags);
  1170. return change;
  1171. }
  1172. static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
  1173. struct snd_ctl_elem_info *uinfo)
  1174. {
  1175. int mask = (kcontrol->private_value >> 16) & 0xff;
  1176. uinfo->type = (mask == 1) ?
  1177. SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1178. uinfo->count = 1;
  1179. uinfo->value.integer.min = 0;
  1180. uinfo->value.integer.max = mask;
  1181. return 0;
  1182. }
  1183. static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
  1184. struct snd_ctl_elem_value *ucontrol)
  1185. {
  1186. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1187. unsigned long flags;
  1188. int reg = kcontrol->private_value & 0xff;
  1189. int shift = (kcontrol->private_value >> 8) & 0xff;
  1190. int mask = (kcontrol->private_value >> 16) & 0xff;
  1191. int invert = (kcontrol->private_value >> 24) & 0xff;
  1192. spin_lock_irqsave(&chip->lock, flags);
  1193. ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
  1194. spin_unlock_irqrestore(&chip->lock, flags);
  1195. if (invert)
  1196. ucontrol->value.integer.value[0] =
  1197. (mask - ucontrol->value.integer.value[0]);
  1198. return 0;
  1199. }
  1200. static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
  1201. struct snd_ctl_elem_value *ucontrol)
  1202. {
  1203. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1204. unsigned long flags;
  1205. int reg = kcontrol->private_value & 0xff;
  1206. int shift = (kcontrol->private_value >> 8) & 0xff;
  1207. int mask = (kcontrol->private_value >> 16) & 0xff;
  1208. int invert = (kcontrol->private_value >> 24) & 0xff;
  1209. int change;
  1210. unsigned short val;
  1211. val = (ucontrol->value.integer.value[0] & mask);
  1212. if (invert)
  1213. val = mask - val;
  1214. val <<= shift;
  1215. spin_lock_irqsave(&chip->lock, flags);
  1216. val = (chip->image[reg] & ~(mask << shift)) | val;
  1217. change = val != chip->image[reg];
  1218. snd_cs4231_out(chip, reg, val);
  1219. spin_unlock_irqrestore(&chip->lock, flags);
  1220. return change;
  1221. }
  1222. static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
  1223. struct snd_ctl_elem_info *uinfo)
  1224. {
  1225. int mask = (kcontrol->private_value >> 24) & 0xff;
  1226. uinfo->type = mask == 1 ?
  1227. SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1228. uinfo->count = 2;
  1229. uinfo->value.integer.min = 0;
  1230. uinfo->value.integer.max = mask;
  1231. return 0;
  1232. }
  1233. static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
  1234. struct snd_ctl_elem_value *ucontrol)
  1235. {
  1236. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1237. unsigned long flags;
  1238. int left_reg = kcontrol->private_value & 0xff;
  1239. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1240. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1241. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1242. int mask = (kcontrol->private_value >> 24) & 0xff;
  1243. int invert = (kcontrol->private_value >> 22) & 1;
  1244. spin_lock_irqsave(&chip->lock, flags);
  1245. ucontrol->value.integer.value[0] =
  1246. (chip->image[left_reg] >> shift_left) & mask;
  1247. ucontrol->value.integer.value[1] =
  1248. (chip->image[right_reg] >> shift_right) & mask;
  1249. spin_unlock_irqrestore(&chip->lock, flags);
  1250. if (invert) {
  1251. ucontrol->value.integer.value[0] =
  1252. (mask - ucontrol->value.integer.value[0]);
  1253. ucontrol->value.integer.value[1] =
  1254. (mask - ucontrol->value.integer.value[1]);
  1255. }
  1256. return 0;
  1257. }
  1258. static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
  1259. struct snd_ctl_elem_value *ucontrol)
  1260. {
  1261. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1262. unsigned long flags;
  1263. int left_reg = kcontrol->private_value & 0xff;
  1264. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1265. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1266. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1267. int mask = (kcontrol->private_value >> 24) & 0xff;
  1268. int invert = (kcontrol->private_value >> 22) & 1;
  1269. int change;
  1270. unsigned short val1, val2;
  1271. val1 = ucontrol->value.integer.value[0] & mask;
  1272. val2 = ucontrol->value.integer.value[1] & mask;
  1273. if (invert) {
  1274. val1 = mask - val1;
  1275. val2 = mask - val2;
  1276. }
  1277. val1 <<= shift_left;
  1278. val2 <<= shift_right;
  1279. spin_lock_irqsave(&chip->lock, flags);
  1280. val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
  1281. val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
  1282. change = val1 != chip->image[left_reg];
  1283. change |= val2 != chip->image[right_reg];
  1284. snd_cs4231_out(chip, left_reg, val1);
  1285. snd_cs4231_out(chip, right_reg, val2);
  1286. spin_unlock_irqrestore(&chip->lock, flags);
  1287. return change;
  1288. }
  1289. #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
  1290. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
  1291. .info = snd_cs4231_info_single, \
  1292. .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
  1293. .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
  1294. #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
  1295. shift_right, mask, invert) \
  1296. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
  1297. .info = snd_cs4231_info_double, \
  1298. .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
  1299. .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
  1300. ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
  1301. static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
  1302. CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
  1303. CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
  1304. CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
  1305. CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
  1306. CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
  1307. CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
  1308. CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
  1309. CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
  1310. CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
  1311. CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  1312. CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
  1313. CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
  1314. CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
  1315. CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  1316. CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
  1317. CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
  1318. CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
  1319. CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
  1320. CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
  1321. CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
  1322. CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
  1323. 15, 0),
  1324. {
  1325. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1326. .name = "Capture Source",
  1327. .info = snd_cs4231_info_mux,
  1328. .get = snd_cs4231_get_mux,
  1329. .put = snd_cs4231_put_mux,
  1330. },
  1331. CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
  1332. 1, 0),
  1333. CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
  1334. CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
  1335. /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
  1336. CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
  1337. CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
  1338. };
  1339. static int __init snd_cs4231_mixer(struct snd_card *card)
  1340. {
  1341. struct snd_cs4231 *chip = card->private_data;
  1342. int err, idx;
  1343. snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
  1344. strcpy(card->mixername, chip->pcm->name);
  1345. for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
  1346. err = snd_ctl_add(card,
  1347. snd_ctl_new1(&snd_cs4231_controls[idx], chip));
  1348. if (err < 0)
  1349. return err;
  1350. }
  1351. return 0;
  1352. }
  1353. static int dev;
  1354. static int __init cs4231_attach_begin(struct snd_card **rcard)
  1355. {
  1356. struct snd_card *card;
  1357. struct snd_cs4231 *chip;
  1358. *rcard = NULL;
  1359. if (dev >= SNDRV_CARDS)
  1360. return -ENODEV;
  1361. if (!enable[dev]) {
  1362. dev++;
  1363. return -ENOENT;
  1364. }
  1365. card = snd_card_new(index[dev], id[dev], THIS_MODULE,
  1366. sizeof(struct snd_cs4231));
  1367. if (card == NULL)
  1368. return -ENOMEM;
  1369. strcpy(card->driver, "CS4231");
  1370. strcpy(card->shortname, "Sun CS4231");
  1371. chip = card->private_data;
  1372. chip->card = card;
  1373. *rcard = card;
  1374. return 0;
  1375. }
  1376. static int __init cs4231_attach_finish(struct snd_card *card)
  1377. {
  1378. struct snd_cs4231 *chip = card->private_data;
  1379. int err;
  1380. err = snd_cs4231_pcm(card);
  1381. if (err < 0)
  1382. goto out_err;
  1383. err = snd_cs4231_mixer(card);
  1384. if (err < 0)
  1385. goto out_err;
  1386. err = snd_cs4231_timer(card);
  1387. if (err < 0)
  1388. goto out_err;
  1389. err = snd_card_register(card);
  1390. if (err < 0)
  1391. goto out_err;
  1392. chip->next = cs4231_list;
  1393. cs4231_list = chip;
  1394. dev++;
  1395. return 0;
  1396. out_err:
  1397. snd_card_free(card);
  1398. return err;
  1399. }
  1400. #ifdef SBUS_SUPPORT
  1401. static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
  1402. {
  1403. unsigned long flags;
  1404. unsigned char status;
  1405. u32 csr;
  1406. struct snd_cs4231 *chip = dev_id;
  1407. /*This is IRQ is not raised by the cs4231*/
  1408. if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
  1409. return IRQ_NONE;
  1410. /* ACK the APC interrupt. */
  1411. csr = sbus_readl(chip->port + APCCSR);
  1412. sbus_writel(csr, chip->port + APCCSR);
  1413. if ((csr & APC_PDMA_READY) &&
  1414. (csr & APC_PLAY_INT) &&
  1415. (csr & APC_XINT_PNVA) &&
  1416. !(csr & APC_XINT_EMPT))
  1417. snd_cs4231_play_callback(chip);
  1418. if ((csr & APC_CDMA_READY) &&
  1419. (csr & APC_CAPT_INT) &&
  1420. (csr & APC_XINT_CNVA) &&
  1421. !(csr & APC_XINT_EMPT))
  1422. snd_cs4231_capture_callback(chip);
  1423. status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
  1424. if (status & CS4231_TIMER_IRQ) {
  1425. if (chip->timer)
  1426. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  1427. }
  1428. if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
  1429. snd_cs4231_overrange(chip);
  1430. /* ACK the CS4231 interrupt. */
  1431. spin_lock_irqsave(&chip->lock, flags);
  1432. snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
  1433. spin_unlock_irqrestore(&chip->lock, flags);
  1434. return IRQ_HANDLED;
  1435. }
  1436. /*
  1437. * SBUS DMA routines
  1438. */
  1439. static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
  1440. dma_addr_t bus_addr, size_t len)
  1441. {
  1442. unsigned long flags;
  1443. u32 test, csr;
  1444. int err;
  1445. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1446. if (len >= (1 << 24))
  1447. return -EINVAL;
  1448. spin_lock_irqsave(&base->lock, flags);
  1449. csr = sbus_readl(base->regs + APCCSR);
  1450. err = -EINVAL;
  1451. test = APC_CDMA_READY;
  1452. if (base->dir == APC_PLAY)
  1453. test = APC_PDMA_READY;
  1454. if (!(csr & test))
  1455. goto out;
  1456. err = -EBUSY;
  1457. test = APC_XINT_CNVA;
  1458. if (base->dir == APC_PLAY)
  1459. test = APC_XINT_PNVA;
  1460. if (!(csr & test))
  1461. goto out;
  1462. err = 0;
  1463. sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
  1464. sbus_writel(len, base->regs + base->dir + APCNC);
  1465. out:
  1466. spin_unlock_irqrestore(&base->lock, flags);
  1467. return err;
  1468. }
  1469. static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
  1470. {
  1471. unsigned long flags;
  1472. u32 csr, test;
  1473. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1474. spin_lock_irqsave(&base->lock, flags);
  1475. csr = sbus_readl(base->regs + APCCSR);
  1476. test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
  1477. APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
  1478. APC_XINT_PENA;
  1479. if (base->dir == APC_RECORD)
  1480. test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
  1481. APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
  1482. csr |= test;
  1483. sbus_writel(csr, base->regs + APCCSR);
  1484. spin_unlock_irqrestore(&base->lock, flags);
  1485. }
  1486. static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
  1487. {
  1488. unsigned long flags;
  1489. u32 csr, shift;
  1490. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1491. spin_lock_irqsave(&base->lock, flags);
  1492. if (!on) {
  1493. sbus_writel(0, base->regs + base->dir + APCNC);
  1494. sbus_writel(0, base->regs + base->dir + APCNVA);
  1495. if (base->dir == APC_PLAY) {
  1496. sbus_writel(0, base->regs + base->dir + APCC);
  1497. sbus_writel(0, base->regs + base->dir + APCVA);
  1498. }
  1499. udelay(1200);
  1500. }
  1501. csr = sbus_readl(base->regs + APCCSR);
  1502. shift = 0;
  1503. if (base->dir == APC_PLAY)
  1504. shift = 1;
  1505. if (on)
  1506. csr &= ~(APC_CPAUSE << shift);
  1507. else
  1508. csr |= (APC_CPAUSE << shift);
  1509. sbus_writel(csr, base->regs + APCCSR);
  1510. if (on)
  1511. csr |= (APC_CDMA_READY << shift);
  1512. else
  1513. csr &= ~(APC_CDMA_READY << shift);
  1514. sbus_writel(csr, base->regs + APCCSR);
  1515. spin_unlock_irqrestore(&base->lock, flags);
  1516. }
  1517. static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
  1518. {
  1519. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1520. return sbus_readl(base->regs + base->dir + APCVA);
  1521. }
  1522. static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
  1523. {
  1524. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
  1525. snd_dma_sbus_data(chip->dev_u.sdev),
  1526. 64 * 1024, 128 * 1024);
  1527. }
  1528. /*
  1529. * Init and exit routines
  1530. */
  1531. static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
  1532. {
  1533. if (chip->irq[0])
  1534. free_irq(chip->irq[0], chip);
  1535. if (chip->port)
  1536. sbus_iounmap(chip->port, chip->regs_size);
  1537. return 0;
  1538. }
  1539. static int snd_cs4231_sbus_dev_free(struct snd_device *device)
  1540. {
  1541. struct snd_cs4231 *cp = device->device_data;
  1542. return snd_cs4231_sbus_free(cp);
  1543. }
  1544. static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
  1545. .dev_free = snd_cs4231_sbus_dev_free,
  1546. };
  1547. static int __init snd_cs4231_sbus_create(struct snd_card *card,
  1548. struct sbus_dev *sdev,
  1549. int dev)
  1550. {
  1551. struct snd_cs4231 *chip = card->private_data;
  1552. int err;
  1553. spin_lock_init(&chip->lock);
  1554. spin_lock_init(&chip->c_dma.sbus_info.lock);
  1555. spin_lock_init(&chip->p_dma.sbus_info.lock);
  1556. mutex_init(&chip->mce_mutex);
  1557. mutex_init(&chip->open_mutex);
  1558. chip->dev_u.sdev = sdev;
  1559. chip->regs_size = sdev->reg_addrs[0].reg_size;
  1560. memcpy(&chip->image, &snd_cs4231_original_image,
  1561. sizeof(snd_cs4231_original_image));
  1562. chip->port = sbus_ioremap(&sdev->resource[0], 0,
  1563. chip->regs_size, "cs4231");
  1564. if (!chip->port) {
  1565. snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
  1566. return -EIO;
  1567. }
  1568. chip->c_dma.sbus_info.regs = chip->port;
  1569. chip->p_dma.sbus_info.regs = chip->port;
  1570. chip->c_dma.sbus_info.dir = APC_RECORD;
  1571. chip->p_dma.sbus_info.dir = APC_PLAY;
  1572. chip->p_dma.prepare = sbus_dma_prepare;
  1573. chip->p_dma.enable = sbus_dma_enable;
  1574. chip->p_dma.request = sbus_dma_request;
  1575. chip->p_dma.address = sbus_dma_addr;
  1576. chip->p_dma.preallocate = sbus_dma_preallocate;
  1577. chip->c_dma.prepare = sbus_dma_prepare;
  1578. chip->c_dma.enable = sbus_dma_enable;
  1579. chip->c_dma.request = sbus_dma_request;
  1580. chip->c_dma.address = sbus_dma_addr;
  1581. chip->c_dma.preallocate = sbus_dma_preallocate;
  1582. if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
  1583. IRQF_SHARED, "cs4231", chip)) {
  1584. snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
  1585. dev, sdev->irqs[0]);
  1586. snd_cs4231_sbus_free(chip);
  1587. return -EBUSY;
  1588. }
  1589. chip->irq[0] = sdev->irqs[0];
  1590. if (snd_cs4231_probe(chip) < 0) {
  1591. snd_cs4231_sbus_free(chip);
  1592. return -ENODEV;
  1593. }
  1594. snd_cs4231_init(chip);
  1595. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  1596. chip, &snd_cs4231_sbus_dev_ops)) < 0) {
  1597. snd_cs4231_sbus_free(chip);
  1598. return err;
  1599. }
  1600. return 0;
  1601. }
  1602. static int __init cs4231_sbus_attach(struct sbus_dev *sdev)
  1603. {
  1604. struct resource *rp = &sdev->resource[0];
  1605. struct snd_card *card;
  1606. int err;
  1607. err = cs4231_attach_begin(&card);
  1608. if (err)
  1609. return err;
  1610. sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
  1611. card->shortname,
  1612. rp->flags & 0xffL,
  1613. (unsigned long long)rp->start,
  1614. sdev->irqs[0]);
  1615. err = snd_cs4231_sbus_create(card, sdev, dev);
  1616. if (err < 0) {
  1617. snd_card_free(card);
  1618. return err;
  1619. }
  1620. return cs4231_attach_finish(card);
  1621. }
  1622. #endif
  1623. #ifdef EBUS_SUPPORT
  1624. static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
  1625. void *cookie)
  1626. {
  1627. struct snd_cs4231 *chip = cookie;
  1628. snd_cs4231_play_callback(chip);
  1629. }
  1630. static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
  1631. int event, void *cookie)
  1632. {
  1633. struct snd_cs4231 *chip = cookie;
  1634. snd_cs4231_capture_callback(chip);
  1635. }
  1636. /*
  1637. * EBUS DMA wrappers
  1638. */
  1639. static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
  1640. dma_addr_t bus_addr, size_t len)
  1641. {
  1642. return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
  1643. }
  1644. static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
  1645. {
  1646. ebus_dma_enable(&dma_cont->ebus_info, on);
  1647. }
  1648. static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
  1649. {
  1650. ebus_dma_prepare(&dma_cont->ebus_info, dir);
  1651. }
  1652. static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
  1653. {
  1654. return ebus_dma_addr(&dma_cont->ebus_info);
  1655. }
  1656. static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
  1657. {
  1658. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1659. snd_dma_pci_data(chip->dev_u.pdev),
  1660. 64*1024, 128*1024);
  1661. }
  1662. /*
  1663. * Init and exit routines
  1664. */
  1665. static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
  1666. {
  1667. if (chip->c_dma.ebus_info.regs) {
  1668. ebus_dma_unregister(&chip->c_dma.ebus_info);
  1669. iounmap(chip->c_dma.ebus_info.regs);
  1670. }
  1671. if (chip->p_dma.ebus_info.regs) {
  1672. ebus_dma_unregister(&chip->p_dma.ebus_info);
  1673. iounmap(chip->p_dma.ebus_info.regs);
  1674. }
  1675. if (chip->port)
  1676. iounmap(chip->port);
  1677. return 0;
  1678. }
  1679. static int snd_cs4231_ebus_dev_free(struct snd_device *device)
  1680. {
  1681. struct snd_cs4231 *cp = device->device_data;
  1682. return snd_cs4231_ebus_free(cp);
  1683. }
  1684. static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
  1685. .dev_free = snd_cs4231_ebus_dev_free,
  1686. };
  1687. static int __init snd_cs4231_ebus_create(struct snd_card *card,
  1688. struct linux_ebus_device *edev,
  1689. int dev)
  1690. {
  1691. struct snd_cs4231 *chip = card->private_data;
  1692. int err;
  1693. spin_lock_init(&chip->lock);
  1694. spin_lock_init(&chip->c_dma.ebus_info.lock);
  1695. spin_lock_init(&chip->p_dma.ebus_info.lock);
  1696. mutex_init(&chip->mce_mutex);
  1697. mutex_init(&chip->open_mutex);
  1698. chip->flags |= CS4231_FLAG_EBUS;
  1699. chip->dev_u.pdev = edev->bus->self;
  1700. memcpy(&chip->image, &snd_cs4231_original_image,
  1701. sizeof(snd_cs4231_original_image));
  1702. strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
  1703. chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
  1704. chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
  1705. chip->c_dma.ebus_info.client_cookie = chip;
  1706. chip->c_dma.ebus_info.irq = edev->irqs[0];
  1707. strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
  1708. chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
  1709. chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
  1710. chip->p_dma.ebus_info.client_cookie = chip;
  1711. chip->p_dma.ebus_info.irq = edev->irqs[1];
  1712. chip->p_dma.prepare = _ebus_dma_prepare;
  1713. chip->p_dma.enable = _ebus_dma_enable;
  1714. chip->p_dma.request = _ebus_dma_request;
  1715. chip->p_dma.address = _ebus_dma_addr;
  1716. chip->p_dma.preallocate = _ebus_dma_preallocate;
  1717. chip->c_dma.prepare = _ebus_dma_prepare;
  1718. chip->c_dma.enable = _ebus_dma_enable;
  1719. chip->c_dma.request = _ebus_dma_request;
  1720. chip->c_dma.address = _ebus_dma_addr;
  1721. chip->c_dma.preallocate = _ebus_dma_preallocate;
  1722. chip->port = ioremap(edev->resource[0].start, 0x10);
  1723. chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10);
  1724. chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10);
  1725. if (!chip->port || !chip->p_dma.ebus_info.regs ||
  1726. !chip->c_dma.ebus_info.regs) {
  1727. snd_cs4231_ebus_free(chip);
  1728. snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
  1729. return -EIO;
  1730. }
  1731. if (ebus_dma_register(&chip->c_dma.ebus_info)) {
  1732. snd_cs4231_ebus_free(chip);
  1733. snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
  1734. dev);
  1735. return -EBUSY;
  1736. }
  1737. if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
  1738. snd_cs4231_ebus_free(chip);
  1739. snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
  1740. dev);
  1741. return -EBUSY;
  1742. }
  1743. if (ebus_dma_register(&chip->p_dma.ebus_info)) {
  1744. snd_cs4231_ebus_free(chip);
  1745. snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
  1746. dev);
  1747. return -EBUSY;
  1748. }
  1749. if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
  1750. snd_cs4231_ebus_free(chip);
  1751. snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
  1752. return -EBUSY;
  1753. }
  1754. if (snd_cs4231_probe(chip) < 0) {
  1755. snd_cs4231_ebus_free(chip);
  1756. return -ENODEV;
  1757. }
  1758. snd_cs4231_init(chip);
  1759. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  1760. chip, &snd_cs4231_ebus_dev_ops)) < 0) {
  1761. snd_cs4231_ebus_free(chip);
  1762. return err;
  1763. }
  1764. return 0;
  1765. }
  1766. static int __init cs4231_ebus_attach(struct linux_ebus_device *edev)
  1767. {
  1768. struct snd_card *card;
  1769. int err;
  1770. err = cs4231_attach_begin(&card);
  1771. if (err)
  1772. return err;
  1773. sprintf(card->longname, "%s at 0x%lx, irq %d",
  1774. card->shortname,
  1775. edev->resource[0].start,
  1776. edev->irqs[0]);
  1777. err = snd_cs4231_ebus_create(card, edev, dev);
  1778. if (err < 0) {
  1779. snd_card_free(card);
  1780. return err;
  1781. }
  1782. return cs4231_attach_finish(card);
  1783. }
  1784. #endif
  1785. static int __init cs4231_init(void)
  1786. {
  1787. #ifdef SBUS_SUPPORT
  1788. struct sbus_bus *sbus;
  1789. struct sbus_dev *sdev;
  1790. #endif
  1791. #ifdef EBUS_SUPPORT
  1792. struct linux_ebus *ebus;
  1793. struct linux_ebus_device *edev;
  1794. #endif
  1795. int found;
  1796. found = 0;
  1797. #ifdef SBUS_SUPPORT
  1798. for_all_sbusdev(sdev, sbus) {
  1799. if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
  1800. if (cs4231_sbus_attach(sdev) == 0)
  1801. found++;
  1802. }
  1803. }
  1804. #endif
  1805. #ifdef EBUS_SUPPORT
  1806. for_each_ebus(ebus) {
  1807. for_each_ebusdev(edev, ebus) {
  1808. int match = 0;
  1809. if (!strcmp(edev->prom_node->name, "SUNW,CS4231")) {
  1810. match = 1;
  1811. } else if (!strcmp(edev->prom_node->name, "audio")) {
  1812. const char *compat;
  1813. compat = of_get_property(edev->prom_node,
  1814. "compatible", NULL);
  1815. if (compat && !strcmp(compat, "SUNW,CS4231"))
  1816. match = 1;
  1817. }
  1818. if (match &&
  1819. cs4231_ebus_attach(edev) == 0)
  1820. found++;
  1821. }
  1822. }
  1823. #endif
  1824. return (found > 0) ? 0 : -EIO;
  1825. }
  1826. static void __exit cs4231_exit(void)
  1827. {
  1828. struct snd_cs4231 *p = cs4231_list;
  1829. while (p != NULL) {
  1830. struct snd_cs4231 *next = p->next;
  1831. snd_card_free(p->card);
  1832. p = next;
  1833. }
  1834. cs4231_list = NULL;
  1835. }
  1836. module_init(cs4231_init);
  1837. module_exit(cs4231_exit);