iwl3945-base.c 180 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  79. .sw_crypto = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /*************** STATION TABLE MANAGEMENT ****
  83. * mac80211 should be examined to determine if sta_info is duplicating
  84. * the functionality provided here
  85. */
  86. /**************************************************************/
  87. #if 0 /* temporary disable till we add real remove station */
  88. /**
  89. * iwl3945_remove_station - Remove driver's knowledge of station.
  90. *
  91. * NOTE: This does not remove station from device's station table.
  92. */
  93. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  94. {
  95. int index = IWL_INVALID_STATION;
  96. int i;
  97. unsigned long flags;
  98. spin_lock_irqsave(&priv->sta_lock, flags);
  99. if (is_ap)
  100. index = IWL_AP_ID;
  101. else if (is_broadcast_ether_addr(addr))
  102. index = priv->hw_params.bcast_sta_id;
  103. else
  104. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  105. if (priv->stations_39[i].used &&
  106. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  107. addr)) {
  108. index = i;
  109. break;
  110. }
  111. if (unlikely(index == IWL_INVALID_STATION))
  112. goto out;
  113. if (priv->stations_39[index].used) {
  114. priv->stations_39[index].used = 0;
  115. priv->num_stations--;
  116. }
  117. BUG_ON(priv->num_stations < 0);
  118. out:
  119. spin_unlock_irqrestore(&priv->sta_lock, flags);
  120. return 0;
  121. }
  122. #endif
  123. /**
  124. * iwl3945_clear_stations_table - Clear the driver's station table
  125. *
  126. * NOTE: This does not clear or otherwise alter the device's station table.
  127. */
  128. static void iwl3945_clear_stations_table(struct iwl_priv *priv)
  129. {
  130. unsigned long flags;
  131. spin_lock_irqsave(&priv->sta_lock, flags);
  132. priv->num_stations = 0;
  133. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  134. spin_unlock_irqrestore(&priv->sta_lock, flags);
  135. }
  136. /**
  137. * iwl3945_add_station - Add station to station tables in driver and device
  138. */
  139. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  140. {
  141. int i;
  142. int index = IWL_INVALID_STATION;
  143. struct iwl3945_station_entry *station;
  144. unsigned long flags_spin;
  145. u8 rate;
  146. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  147. if (is_ap)
  148. index = IWL_AP_ID;
  149. else if (is_broadcast_ether_addr(addr))
  150. index = priv->hw_params.bcast_sta_id;
  151. else
  152. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  153. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  154. addr)) {
  155. index = i;
  156. break;
  157. }
  158. if (!priv->stations_39[i].used &&
  159. index == IWL_INVALID_STATION)
  160. index = i;
  161. }
  162. /* These two conditions has the same outcome but keep them separate
  163. since they have different meaning */
  164. if (unlikely(index == IWL_INVALID_STATION)) {
  165. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  166. return index;
  167. }
  168. if (priv->stations_39[index].used &&
  169. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  170. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  171. return index;
  172. }
  173. IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
  174. station = &priv->stations_39[index];
  175. station->used = 1;
  176. priv->num_stations++;
  177. /* Set up the REPLY_ADD_STA command to send to device */
  178. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  179. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  180. station->sta.mode = 0;
  181. station->sta.sta.sta_id = index;
  182. station->sta.station_flags = 0;
  183. if (priv->band == IEEE80211_BAND_5GHZ)
  184. rate = IWL_RATE_6M_PLCP;
  185. else
  186. rate = IWL_RATE_1M_PLCP;
  187. /* Turn on both antennas for the station... */
  188. station->sta.rate_n_flags =
  189. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  190. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  191. /* Add station to device's station table */
  192. iwl3945_send_add_station(priv, &station->sta, flags);
  193. return index;
  194. }
  195. int iwl3945_send_statistics_request(struct iwl_priv *priv)
  196. {
  197. u32 val = 0;
  198. struct iwl_host_cmd cmd = {
  199. .id = REPLY_STATISTICS_CMD,
  200. .len = sizeof(val),
  201. .data = &val,
  202. };
  203. return iwl_send_cmd_sync(priv, &cmd);
  204. }
  205. /**
  206. * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
  207. * @band: 2.4 or 5 GHz band
  208. * @channel: Any channel valid for the requested band
  209. * In addition to setting the staging RXON, priv->band is also set.
  210. *
  211. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  212. * in the staging RXON flag structure based on the band
  213. */
  214. static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
  215. enum ieee80211_band band,
  216. u16 channel)
  217. {
  218. if (!iwl_get_channel_info(priv, band, channel)) {
  219. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  220. channel, band);
  221. return -EINVAL;
  222. }
  223. if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
  224. (priv->band == band))
  225. return 0;
  226. priv->staging39_rxon.channel = cpu_to_le16(channel);
  227. if (band == IEEE80211_BAND_5GHZ)
  228. priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  229. else
  230. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  231. priv->band = band;
  232. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  233. return 0;
  234. }
  235. /**
  236. * iwl3945_check_rxon_cmd - validate RXON structure is valid
  237. *
  238. * NOTE: This is really only useful during development and can eventually
  239. * be #ifdef'd out once the driver is stable and folks aren't actively
  240. * making changes
  241. */
  242. static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
  243. {
  244. int error = 0;
  245. int counter = 1;
  246. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  247. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  248. error |= le32_to_cpu(rxon->flags &
  249. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  250. RXON_FLG_RADAR_DETECT_MSK));
  251. if (error)
  252. IWL_WARN(priv, "check 24G fields %d | %d\n",
  253. counter++, error);
  254. } else {
  255. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  256. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  257. if (error)
  258. IWL_WARN(priv, "check 52 fields %d | %d\n",
  259. counter++, error);
  260. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  261. if (error)
  262. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  263. counter++, error);
  264. }
  265. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  266. if (error)
  267. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  268. /* make sure basic rates 6Mbps and 1Mbps are supported */
  269. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  270. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  271. if (error)
  272. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  273. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  274. if (error)
  275. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  276. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  277. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  278. if (error)
  279. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  280. counter++, error);
  281. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  282. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  283. if (error)
  284. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  285. counter++, error);
  286. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  287. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  288. if (error)
  289. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  290. counter++, error);
  291. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  292. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  293. RXON_FLG_ANT_A_MSK)) == 0);
  294. if (error)
  295. IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
  296. if (error)
  297. IWL_WARN(priv, "Tuning to channel %d\n",
  298. le16_to_cpu(rxon->channel));
  299. if (error) {
  300. IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
  301. return -1;
  302. }
  303. return 0;
  304. }
  305. /**
  306. * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  307. * @priv: staging_rxon is compared to active_rxon
  308. *
  309. * If the RXON structure is changing enough to require a new tune,
  310. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  311. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  312. */
  313. static int iwl3945_full_rxon_required(struct iwl_priv *priv)
  314. {
  315. /* These items are only settable from the full RXON command */
  316. if (!(iwl3945_is_associated(priv)) ||
  317. compare_ether_addr(priv->staging39_rxon.bssid_addr,
  318. priv->active39_rxon.bssid_addr) ||
  319. compare_ether_addr(priv->staging39_rxon.node_addr,
  320. priv->active39_rxon.node_addr) ||
  321. compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
  322. priv->active39_rxon.wlap_bssid_addr) ||
  323. (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
  324. (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
  325. (priv->staging39_rxon.air_propagation !=
  326. priv->active39_rxon.air_propagation) ||
  327. (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
  328. return 1;
  329. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  330. * be updated with the RXON_ASSOC command -- however only some
  331. * flag transitions are allowed using RXON_ASSOC */
  332. /* Check if we are not switching bands */
  333. if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  334. (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
  335. return 1;
  336. /* Check if we are switching association toggle */
  337. if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  338. (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  339. return 1;
  340. return 0;
  341. }
  342. static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
  343. {
  344. int rc = 0;
  345. struct iwl_rx_packet *res = NULL;
  346. struct iwl3945_rxon_assoc_cmd rxon_assoc;
  347. struct iwl_host_cmd cmd = {
  348. .id = REPLY_RXON_ASSOC,
  349. .len = sizeof(rxon_assoc),
  350. .meta.flags = CMD_WANT_SKB,
  351. .data = &rxon_assoc,
  352. };
  353. const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
  354. const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
  355. if ((rxon1->flags == rxon2->flags) &&
  356. (rxon1->filter_flags == rxon2->filter_flags) &&
  357. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  358. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  359. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  360. return 0;
  361. }
  362. rxon_assoc.flags = priv->staging39_rxon.flags;
  363. rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
  364. rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
  365. rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
  366. rxon_assoc.reserved = 0;
  367. rc = iwl_send_cmd_sync(priv, &cmd);
  368. if (rc)
  369. return rc;
  370. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  371. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  372. IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
  373. rc = -EIO;
  374. }
  375. priv->alloc_rxb_skb--;
  376. dev_kfree_skb_any(cmd.meta.u.skb);
  377. return rc;
  378. }
  379. /**
  380. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  381. * @priv: eeprom and antenna fields are used to determine antenna flags
  382. *
  383. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  384. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  385. *
  386. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  387. * IWL_ANTENNA_MAIN - Force MAIN antenna
  388. * IWL_ANTENNA_AUX - Force AUX antenna
  389. */
  390. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  391. {
  392. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  393. switch (iwl3945_mod_params.antenna) {
  394. case IWL_ANTENNA_DIVERSITY:
  395. return 0;
  396. case IWL_ANTENNA_MAIN:
  397. if (eeprom->antenna_switch_type)
  398. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  399. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  400. case IWL_ANTENNA_AUX:
  401. if (eeprom->antenna_switch_type)
  402. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  403. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  404. }
  405. /* bad antenna selector value */
  406. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  407. iwl3945_mod_params.antenna);
  408. return 0; /* "diversity" is default if error */
  409. }
  410. /**
  411. * iwl3945_commit_rxon - commit staging_rxon to hardware
  412. *
  413. * The RXON command in staging_rxon is committed to the hardware and
  414. * the active_rxon structure is updated with the new data. This
  415. * function correctly transitions out of the RXON_ASSOC_MSK state if
  416. * a HW tune is required based on the RXON structure changes.
  417. */
  418. static int iwl3945_commit_rxon(struct iwl_priv *priv)
  419. {
  420. /* cast away the const for active_rxon in this function */
  421. struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
  422. int rc = 0;
  423. if (!iwl_is_alive(priv))
  424. return -1;
  425. /* always get timestamp with Rx frame */
  426. priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  427. /* select antenna */
  428. priv->staging39_rxon.flags &=
  429. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  430. priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
  431. rc = iwl3945_check_rxon_cmd(priv);
  432. if (rc) {
  433. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  434. return -EINVAL;
  435. }
  436. /* If we don't need to send a full RXON, we can use
  437. * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
  438. * and other flags for the current radio configuration. */
  439. if (!iwl3945_full_rxon_required(priv)) {
  440. rc = iwl3945_send_rxon_assoc(priv);
  441. if (rc) {
  442. IWL_ERR(priv, "Error setting RXON_ASSOC "
  443. "configuration (%d).\n", rc);
  444. return rc;
  445. }
  446. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  447. return 0;
  448. }
  449. /* If we are currently associated and the new config requires
  450. * an RXON_ASSOC and the new config wants the associated mask enabled,
  451. * we must clear the associated from the active configuration
  452. * before we apply the new config */
  453. if (iwl3945_is_associated(priv) &&
  454. (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  455. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  456. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  457. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  458. sizeof(struct iwl3945_rxon_cmd),
  459. &priv->active39_rxon);
  460. /* If the mask clearing failed then we set
  461. * active_rxon back to what it was previously */
  462. if (rc) {
  463. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  464. IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
  465. "configuration (%d).\n", rc);
  466. return rc;
  467. }
  468. }
  469. IWL_DEBUG_INFO("Sending RXON\n"
  470. "* with%s RXON_FILTER_ASSOC_MSK\n"
  471. "* channel = %d\n"
  472. "* bssid = %pM\n",
  473. ((priv->staging39_rxon.filter_flags &
  474. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  475. le16_to_cpu(priv->staging39_rxon.channel),
  476. priv->staging_rxon.bssid_addr);
  477. /* Apply the new configuration */
  478. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  479. sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
  480. if (rc) {
  481. IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
  482. return rc;
  483. }
  484. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  485. iwl3945_clear_stations_table(priv);
  486. /* If we issue a new RXON command which required a tune then we must
  487. * send a new TXPOWER command or we won't be able to Tx any frames */
  488. rc = priv->cfg->ops->lib->send_tx_power(priv);
  489. if (rc) {
  490. IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
  491. return rc;
  492. }
  493. /* Add the broadcast address so we can send broadcast frames */
  494. if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
  495. IWL_INVALID_STATION) {
  496. IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
  497. return -EIO;
  498. }
  499. /* If we have set the ASSOC_MSK and we are in BSS mode then
  500. * add the IWL_AP_ID to the station rate table */
  501. if (iwl3945_is_associated(priv) &&
  502. (priv->iw_mode == NL80211_IFTYPE_STATION))
  503. if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
  504. == IWL_INVALID_STATION) {
  505. IWL_ERR(priv, "Error adding AP address for transmit\n");
  506. return -EIO;
  507. }
  508. /* Init the hardware's rate fallback order based on the band */
  509. rc = iwl3945_init_hw_rate_table(priv);
  510. if (rc) {
  511. IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
  512. return -EIO;
  513. }
  514. return 0;
  515. }
  516. static int iwl3945_send_bt_config(struct iwl_priv *priv)
  517. {
  518. struct iwl_bt_cmd bt_cmd = {
  519. .flags = 3,
  520. .lead_time = 0xAA,
  521. .max_kill = 1,
  522. .kill_ack_mask = 0,
  523. .kill_cts_mask = 0,
  524. };
  525. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  526. sizeof(bt_cmd), &bt_cmd);
  527. }
  528. static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
  529. struct iwl_cmd *cmd, struct sk_buff *skb)
  530. {
  531. struct iwl_rx_packet *res = NULL;
  532. if (!skb) {
  533. IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
  534. return 1;
  535. }
  536. res = (struct iwl_rx_packet *)skb->data;
  537. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  538. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  539. res->hdr.flags);
  540. return 1;
  541. }
  542. switch (res->u.add_sta.status) {
  543. case ADD_STA_SUCCESS_MSK:
  544. break;
  545. default:
  546. break;
  547. }
  548. /* We didn't cache the SKB; let the caller free it */
  549. return 1;
  550. }
  551. int iwl3945_send_add_station(struct iwl_priv *priv,
  552. struct iwl3945_addsta_cmd *sta, u8 flags)
  553. {
  554. struct iwl_rx_packet *res = NULL;
  555. int rc = 0;
  556. struct iwl_host_cmd cmd = {
  557. .id = REPLY_ADD_STA,
  558. .len = sizeof(struct iwl3945_addsta_cmd),
  559. .meta.flags = flags,
  560. .data = sta,
  561. };
  562. if (flags & CMD_ASYNC)
  563. cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
  564. else
  565. cmd.meta.flags |= CMD_WANT_SKB;
  566. rc = iwl_send_cmd(priv, &cmd);
  567. if (rc || (flags & CMD_ASYNC))
  568. return rc;
  569. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  570. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  571. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  572. res->hdr.flags);
  573. rc = -EIO;
  574. }
  575. if (rc == 0) {
  576. switch (res->u.add_sta.status) {
  577. case ADD_STA_SUCCESS_MSK:
  578. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  579. break;
  580. default:
  581. rc = -EIO;
  582. IWL_WARN(priv, "REPLY_ADD_STA failed\n");
  583. break;
  584. }
  585. }
  586. priv->alloc_rxb_skb--;
  587. dev_kfree_skb_any(cmd.meta.u.skb);
  588. return rc;
  589. }
  590. static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
  591. struct ieee80211_key_conf *keyconf,
  592. u8 sta_id)
  593. {
  594. unsigned long flags;
  595. __le16 key_flags = 0;
  596. switch (keyconf->alg) {
  597. case ALG_CCMP:
  598. key_flags |= STA_KEY_FLG_CCMP;
  599. key_flags |= cpu_to_le16(
  600. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  601. key_flags &= ~STA_KEY_FLG_INVALID;
  602. break;
  603. case ALG_TKIP:
  604. case ALG_WEP:
  605. default:
  606. return -EINVAL;
  607. }
  608. spin_lock_irqsave(&priv->sta_lock, flags);
  609. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  610. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  611. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  612. keyconf->keylen);
  613. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  614. keyconf->keylen);
  615. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  616. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  617. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  618. spin_unlock_irqrestore(&priv->sta_lock, flags);
  619. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  620. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  621. return 0;
  622. }
  623. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  624. {
  625. unsigned long flags;
  626. spin_lock_irqsave(&priv->sta_lock, flags);
  627. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  628. memset(&priv->stations_39[sta_id].sta.key, 0,
  629. sizeof(struct iwl4965_keyinfo));
  630. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  631. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  632. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  633. spin_unlock_irqrestore(&priv->sta_lock, flags);
  634. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  635. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  636. return 0;
  637. }
  638. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  639. {
  640. struct list_head *element;
  641. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  642. priv->frames_count);
  643. while (!list_empty(&priv->free_frames)) {
  644. element = priv->free_frames.next;
  645. list_del(element);
  646. kfree(list_entry(element, struct iwl3945_frame, list));
  647. priv->frames_count--;
  648. }
  649. if (priv->frames_count) {
  650. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  651. priv->frames_count);
  652. priv->frames_count = 0;
  653. }
  654. }
  655. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  656. {
  657. struct iwl3945_frame *frame;
  658. struct list_head *element;
  659. if (list_empty(&priv->free_frames)) {
  660. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  661. if (!frame) {
  662. IWL_ERR(priv, "Could not allocate frame!\n");
  663. return NULL;
  664. }
  665. priv->frames_count++;
  666. return frame;
  667. }
  668. element = priv->free_frames.next;
  669. list_del(element);
  670. return list_entry(element, struct iwl3945_frame, list);
  671. }
  672. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  673. {
  674. memset(frame, 0, sizeof(*frame));
  675. list_add(&frame->list, &priv->free_frames);
  676. }
  677. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  678. struct ieee80211_hdr *hdr,
  679. int left)
  680. {
  681. if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
  682. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  683. (priv->iw_mode != NL80211_IFTYPE_AP)))
  684. return 0;
  685. if (priv->ibss_beacon->len > left)
  686. return 0;
  687. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  688. return priv->ibss_beacon->len;
  689. }
  690. static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
  691. {
  692. u8 i;
  693. int rate_mask;
  694. /* Set rate mask*/
  695. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  696. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  697. else
  698. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  699. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  700. i = iwl3945_rates[i].next_ieee) {
  701. if (rate_mask & (1 << i))
  702. return iwl3945_rates[i].plcp;
  703. }
  704. /* No valid rate was found. Assign the lowest one */
  705. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  706. return IWL_RATE_1M_PLCP;
  707. else
  708. return IWL_RATE_6M_PLCP;
  709. }
  710. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  711. {
  712. struct iwl3945_frame *frame;
  713. unsigned int frame_size;
  714. int rc;
  715. u8 rate;
  716. frame = iwl3945_get_free_frame(priv);
  717. if (!frame) {
  718. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  719. "command.\n");
  720. return -ENOMEM;
  721. }
  722. rate = iwl3945_rate_get_lowest_plcp(priv);
  723. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  724. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  725. &frame->u.cmd[0]);
  726. iwl3945_free_frame(priv, frame);
  727. return rc;
  728. }
  729. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  730. {
  731. if (priv->shared_virt)
  732. pci_free_consistent(priv->pci_dev,
  733. sizeof(struct iwl3945_shared),
  734. priv->shared_virt,
  735. priv->shared_phys);
  736. }
  737. /*
  738. * QoS support
  739. */
  740. static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
  741. struct iwl_qosparam_cmd *qos)
  742. {
  743. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  744. sizeof(struct iwl_qosparam_cmd), qos);
  745. }
  746. static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
  747. {
  748. unsigned long flags;
  749. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  750. return;
  751. spin_lock_irqsave(&priv->lock, flags);
  752. priv->qos_data.def_qos_parm.qos_flags = 0;
  753. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  754. !priv->qos_data.qos_cap.q_AP.txop_request)
  755. priv->qos_data.def_qos_parm.qos_flags |=
  756. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  757. if (priv->qos_data.qos_active)
  758. priv->qos_data.def_qos_parm.qos_flags |=
  759. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  760. spin_unlock_irqrestore(&priv->lock, flags);
  761. if (force || iwl3945_is_associated(priv)) {
  762. IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
  763. priv->qos_data.qos_active);
  764. iwl3945_send_qos_params_command(priv,
  765. &(priv->qos_data.def_qos_parm));
  766. }
  767. }
  768. /*
  769. * Power management (not Tx power!) functions
  770. */
  771. #define MSEC_TO_USEC 1024
  772. /* default power management (not Tx power) table values */
  773. /* for TIM 0-10 */
  774. static struct iwl_power_vec_entry range_0[IWL_POWER_MAX] = {
  775. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  776. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  777. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  778. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  779. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  780. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  781. };
  782. /* for TIM > 10 */
  783. static struct iwl_power_vec_entry range_1[IWL_POWER_MAX] = {
  784. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  785. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  786. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  787. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  788. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  789. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  790. };
  791. int iwl3945_power_init_handle(struct iwl_priv *priv)
  792. {
  793. int rc = 0, i;
  794. struct iwl_power_mgr *pow_data;
  795. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX;
  796. u16 pci_pm;
  797. IWL_DEBUG_POWER("Initialize power \n");
  798. pow_data = &priv->power_data;
  799. memset(pow_data, 0, sizeof(*pow_data));
  800. pow_data->dtim_period = 1;
  801. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  802. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  803. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  804. if (rc != 0)
  805. return 0;
  806. else {
  807. struct iwl_powertable_cmd *cmd;
  808. IWL_DEBUG_POWER("adjust power command flags\n");
  809. for (i = 0; i < IWL_POWER_MAX; i++) {
  810. cmd = &pow_data->pwr_range_0[i].cmd;
  811. if (pci_pm & 0x1)
  812. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  813. else
  814. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  815. }
  816. }
  817. return rc;
  818. }
  819. static int iwl3945_update_power_cmd(struct iwl_priv *priv,
  820. struct iwl_powertable_cmd *cmd, u32 mode)
  821. {
  822. struct iwl_power_mgr *pow_data;
  823. struct iwl_power_vec_entry *range;
  824. u32 max_sleep = 0;
  825. int i;
  826. u8 period = 0;
  827. bool skip;
  828. if (mode > IWL_POWER_INDEX_5) {
  829. IWL_DEBUG_POWER("Error invalid power mode \n");
  830. return -EINVAL;
  831. }
  832. pow_data = &priv->power_data;
  833. if (pow_data->dtim_period < 10)
  834. range = &pow_data->pwr_range_0[0];
  835. else
  836. range = &pow_data->pwr_range_1[1];
  837. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
  838. if (period == 0) {
  839. period = 1;
  840. skip = false;
  841. } else {
  842. skip = !!range[mode].no_dtim;
  843. }
  844. if (skip) {
  845. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  846. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  847. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  848. } else {
  849. max_sleep = period;
  850. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  851. }
  852. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  853. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  854. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  855. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  856. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  857. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  858. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  859. le32_to_cpu(cmd->sleep_interval[0]),
  860. le32_to_cpu(cmd->sleep_interval[1]),
  861. le32_to_cpu(cmd->sleep_interval[2]),
  862. le32_to_cpu(cmd->sleep_interval[3]),
  863. le32_to_cpu(cmd->sleep_interval[4]));
  864. return 0;
  865. }
  866. static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
  867. {
  868. u32 uninitialized_var(final_mode);
  869. int rc;
  870. struct iwl_powertable_cmd cmd;
  871. /* If on battery, set to 3,
  872. * if plugged into AC power, set to CAM ("continuously aware mode"),
  873. * else user level */
  874. switch (mode) {
  875. case IWL39_POWER_BATTERY:
  876. final_mode = IWL_POWER_INDEX_3;
  877. break;
  878. case IWL39_POWER_AC:
  879. final_mode = IWL_POWER_MODE_CAM;
  880. break;
  881. default:
  882. final_mode = mode;
  883. break;
  884. }
  885. iwl3945_update_power_cmd(priv, &cmd, final_mode);
  886. /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
  887. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
  888. sizeof(struct iwl3945_powertable_cmd), &cmd);
  889. if (final_mode == IWL_POWER_MODE_CAM)
  890. clear_bit(STATUS_POWER_PMI, &priv->status);
  891. else
  892. set_bit(STATUS_POWER_PMI, &priv->status);
  893. return rc;
  894. }
  895. #define MAX_UCODE_BEACON_INTERVAL 1024
  896. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  897. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  898. {
  899. u16 new_val = 0;
  900. u16 beacon_factor = 0;
  901. beacon_factor =
  902. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  903. / MAX_UCODE_BEACON_INTERVAL;
  904. new_val = beacon_val / beacon_factor;
  905. return cpu_to_le16(new_val);
  906. }
  907. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  908. {
  909. u64 interval_tm_unit;
  910. u64 tsf, result;
  911. unsigned long flags;
  912. struct ieee80211_conf *conf = NULL;
  913. u16 beacon_int = 0;
  914. conf = ieee80211_get_hw_conf(priv->hw);
  915. spin_lock_irqsave(&priv->lock, flags);
  916. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  917. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  918. tsf = priv->timestamp;
  919. beacon_int = priv->beacon_int;
  920. spin_unlock_irqrestore(&priv->lock, flags);
  921. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  922. if (beacon_int == 0) {
  923. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  924. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  925. } else {
  926. priv->rxon_timing.beacon_interval =
  927. cpu_to_le16(beacon_int);
  928. priv->rxon_timing.beacon_interval =
  929. iwl3945_adjust_beacon_interval(
  930. le16_to_cpu(priv->rxon_timing.beacon_interval));
  931. }
  932. priv->rxon_timing.atim_window = 0;
  933. } else {
  934. priv->rxon_timing.beacon_interval =
  935. iwl3945_adjust_beacon_interval(conf->beacon_int);
  936. /* TODO: we need to get atim_window from upper stack
  937. * for now we set to 0 */
  938. priv->rxon_timing.atim_window = 0;
  939. }
  940. interval_tm_unit =
  941. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  942. result = do_div(tsf, interval_tm_unit);
  943. priv->rxon_timing.beacon_init_val =
  944. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  945. IWL_DEBUG_ASSOC
  946. ("beacon interval %d beacon timer %d beacon tim %d\n",
  947. le16_to_cpu(priv->rxon_timing.beacon_interval),
  948. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  949. le16_to_cpu(priv->rxon_timing.atim_window));
  950. }
  951. static int iwl3945_scan_initiate(struct iwl_priv *priv)
  952. {
  953. if (!iwl_is_ready_rf(priv)) {
  954. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  955. return -EIO;
  956. }
  957. if (test_bit(STATUS_SCANNING, &priv->status)) {
  958. IWL_DEBUG_SCAN("Scan already in progress.\n");
  959. return -EAGAIN;
  960. }
  961. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  962. IWL_DEBUG_SCAN("Scan request while abort pending. "
  963. "Queuing.\n");
  964. return -EAGAIN;
  965. }
  966. IWL_DEBUG_INFO("Starting scan...\n");
  967. if (priv->cfg->sku & IWL_SKU_G)
  968. priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
  969. if (priv->cfg->sku & IWL_SKU_A)
  970. priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
  971. set_bit(STATUS_SCANNING, &priv->status);
  972. priv->scan_start = jiffies;
  973. priv->scan_pass_start = priv->scan_start;
  974. queue_work(priv->workqueue, &priv->request_scan);
  975. return 0;
  976. }
  977. static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  978. {
  979. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  980. if (hw_decrypt)
  981. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  982. else
  983. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  984. return 0;
  985. }
  986. static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
  987. enum ieee80211_band band)
  988. {
  989. if (band == IEEE80211_BAND_5GHZ) {
  990. priv->staging39_rxon.flags &=
  991. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  992. | RXON_FLG_CCK_MSK);
  993. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  994. } else {
  995. /* Copied from iwl3945_bg_post_associate() */
  996. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  997. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  998. else
  999. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1000. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1001. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1002. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1003. priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1004. priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1005. }
  1006. }
  1007. /*
  1008. * initialize rxon structure with default values from eeprom
  1009. */
  1010. static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
  1011. int mode)
  1012. {
  1013. const struct iwl_channel_info *ch_info;
  1014. memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
  1015. switch (mode) {
  1016. case NL80211_IFTYPE_AP:
  1017. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
  1018. break;
  1019. case NL80211_IFTYPE_STATION:
  1020. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1021. priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1022. break;
  1023. case NL80211_IFTYPE_ADHOC:
  1024. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1025. priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1026. priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1027. RXON_FILTER_ACCEPT_GRP_MSK;
  1028. break;
  1029. case NL80211_IFTYPE_MONITOR:
  1030. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1031. priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1032. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1033. break;
  1034. default:
  1035. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  1036. break;
  1037. }
  1038. #if 0
  1039. /* TODO: Figure out when short_preamble would be set and cache from
  1040. * that */
  1041. if (!hw_to_local(priv->hw)->short_preamble)
  1042. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1043. else
  1044. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1045. #endif
  1046. ch_info = iwl_get_channel_info(priv, priv->band,
  1047. le16_to_cpu(priv->active39_rxon.channel));
  1048. if (!ch_info)
  1049. ch_info = &priv->channel_info[0];
  1050. /*
  1051. * in some case A channels are all non IBSS
  1052. * in this case force B/G channel
  1053. */
  1054. if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
  1055. ch_info = &priv->channel_info[0];
  1056. priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
  1057. if (is_channel_a_band(ch_info))
  1058. priv->band = IEEE80211_BAND_5GHZ;
  1059. else
  1060. priv->band = IEEE80211_BAND_2GHZ;
  1061. iwl3945_set_flags_for_phymode(priv, priv->band);
  1062. priv->staging39_rxon.ofdm_basic_rates =
  1063. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1064. priv->staging39_rxon.cck_basic_rates =
  1065. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1066. }
  1067. static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
  1068. {
  1069. if (mode == NL80211_IFTYPE_ADHOC) {
  1070. const struct iwl_channel_info *ch_info;
  1071. ch_info = iwl_get_channel_info(priv,
  1072. priv->band,
  1073. le16_to_cpu(priv->staging39_rxon.channel));
  1074. if (!ch_info || !is_channel_ibss(ch_info)) {
  1075. IWL_ERR(priv, "channel %d not IBSS channel\n",
  1076. le16_to_cpu(priv->staging39_rxon.channel));
  1077. return -EINVAL;
  1078. }
  1079. }
  1080. iwl3945_connection_init_rx_config(priv, mode);
  1081. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1082. iwl3945_clear_stations_table(priv);
  1083. /* don't commit rxon if rf-kill is on*/
  1084. if (!iwl_is_ready_rf(priv))
  1085. return -EAGAIN;
  1086. cancel_delayed_work(&priv->scan_check);
  1087. if (iwl_scan_cancel_timeout(priv, 100)) {
  1088. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1089. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1090. return -EAGAIN;
  1091. }
  1092. iwl3945_commit_rxon(priv);
  1093. return 0;
  1094. }
  1095. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1096. struct ieee80211_tx_info *info,
  1097. struct iwl_cmd *cmd,
  1098. struct sk_buff *skb_frag,
  1099. int last_frag)
  1100. {
  1101. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1102. struct iwl3945_hw_key *keyinfo =
  1103. &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
  1104. switch (keyinfo->alg) {
  1105. case ALG_CCMP:
  1106. tx->sec_ctl = TX_CMD_SEC_CCM;
  1107. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  1108. IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
  1109. break;
  1110. case ALG_TKIP:
  1111. #if 0
  1112. tx->sec_ctl = TX_CMD_SEC_TKIP;
  1113. if (last_frag)
  1114. memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
  1115. 8);
  1116. else
  1117. memset(tx->tkip_mic.byte, 0, 8);
  1118. #endif
  1119. break;
  1120. case ALG_WEP:
  1121. tx->sec_ctl = TX_CMD_SEC_WEP |
  1122. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1123. if (keyinfo->keylen == 13)
  1124. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  1125. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  1126. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1127. "with key %d\n", info->control.hw_key->hw_key_idx);
  1128. break;
  1129. default:
  1130. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  1131. break;
  1132. }
  1133. }
  1134. /*
  1135. * handle build REPLY_TX command notification.
  1136. */
  1137. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  1138. struct iwl_cmd *cmd,
  1139. struct ieee80211_tx_info *info,
  1140. struct ieee80211_hdr *hdr, u8 std_id)
  1141. {
  1142. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1143. __le32 tx_flags = tx->tx_flags;
  1144. __le16 fc = hdr->frame_control;
  1145. u8 rc_flags = info->control.rates[0].flags;
  1146. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1147. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  1148. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1149. if (ieee80211_is_mgmt(fc))
  1150. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1151. if (ieee80211_is_probe_resp(fc) &&
  1152. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1153. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1154. } else {
  1155. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1156. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1157. }
  1158. tx->sta_id = std_id;
  1159. if (ieee80211_has_morefrags(fc))
  1160. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1161. if (ieee80211_is_data_qos(fc)) {
  1162. u8 *qc = ieee80211_get_qos_ctl(hdr);
  1163. tx->tid_tspec = qc[0] & 0xf;
  1164. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1165. } else {
  1166. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1167. }
  1168. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  1169. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1170. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1171. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  1172. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1173. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1174. }
  1175. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1176. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1177. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1178. if (ieee80211_is_mgmt(fc)) {
  1179. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  1180. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  1181. else
  1182. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  1183. } else {
  1184. tx->timeout.pm_frame_timeout = 0;
  1185. #ifdef CONFIG_IWL3945_LEDS
  1186. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  1187. #endif
  1188. }
  1189. tx->driver_txop = 0;
  1190. tx->tx_flags = tx_flags;
  1191. tx->next_frame_len = 0;
  1192. }
  1193. /**
  1194. * iwl3945_get_sta_id - Find station's index within station table
  1195. */
  1196. static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  1197. {
  1198. int sta_id;
  1199. u16 fc = le16_to_cpu(hdr->frame_control);
  1200. /* If this frame is broadcast or management, use broadcast station id */
  1201. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1202. is_multicast_ether_addr(hdr->addr1))
  1203. return priv->hw_params.bcast_sta_id;
  1204. switch (priv->iw_mode) {
  1205. /* If we are a client station in a BSS network, use the special
  1206. * AP station entry (that's the only station we communicate with) */
  1207. case NL80211_IFTYPE_STATION:
  1208. return IWL_AP_ID;
  1209. /* If we are an AP, then find the station, or use BCAST */
  1210. case NL80211_IFTYPE_AP:
  1211. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1212. if (sta_id != IWL_INVALID_STATION)
  1213. return sta_id;
  1214. return priv->hw_params.bcast_sta_id;
  1215. /* If this frame is going out to an IBSS network, find the station,
  1216. * or create a new station table entry */
  1217. case NL80211_IFTYPE_ADHOC: {
  1218. /* Create new station table entry */
  1219. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1220. if (sta_id != IWL_INVALID_STATION)
  1221. return sta_id;
  1222. sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  1223. if (sta_id != IWL_INVALID_STATION)
  1224. return sta_id;
  1225. IWL_DEBUG_DROP("Station %pM not in station map. "
  1226. "Defaulting to broadcast...\n",
  1227. hdr->addr1);
  1228. iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1229. return priv->hw_params.bcast_sta_id;
  1230. }
  1231. /* If we are in monitor mode, use BCAST. This is required for
  1232. * packet injection. */
  1233. case NL80211_IFTYPE_MONITOR:
  1234. return priv->hw_params.bcast_sta_id;
  1235. default:
  1236. IWL_WARN(priv, "Unknown mode of operation: %d\n",
  1237. priv->iw_mode);
  1238. return priv->hw_params.bcast_sta_id;
  1239. }
  1240. }
  1241. /*
  1242. * start REPLY_TX command process
  1243. */
  1244. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  1245. {
  1246. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1247. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1248. struct iwl3945_tx_cmd *tx;
  1249. struct iwl_tx_queue *txq = NULL;
  1250. struct iwl_queue *q = NULL;
  1251. struct iwl_cmd *out_cmd = NULL;
  1252. dma_addr_t phys_addr;
  1253. dma_addr_t txcmd_phys;
  1254. int txq_id = skb_get_queue_mapping(skb);
  1255. u16 len, idx, len_org, hdr_len;
  1256. u8 id;
  1257. u8 unicast;
  1258. u8 sta_id;
  1259. u8 tid = 0;
  1260. u16 seq_number = 0;
  1261. __le16 fc;
  1262. u8 wait_write_ptr = 0;
  1263. u8 *qc = NULL;
  1264. unsigned long flags;
  1265. int rc;
  1266. spin_lock_irqsave(&priv->lock, flags);
  1267. if (iwl_is_rfkill(priv)) {
  1268. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1269. goto drop_unlock;
  1270. }
  1271. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1272. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  1273. goto drop_unlock;
  1274. }
  1275. unicast = !is_multicast_ether_addr(hdr->addr1);
  1276. id = 0;
  1277. fc = hdr->frame_control;
  1278. #ifdef CONFIG_IWLWIFI_DEBUG
  1279. if (ieee80211_is_auth(fc))
  1280. IWL_DEBUG_TX("Sending AUTH frame\n");
  1281. else if (ieee80211_is_assoc_req(fc))
  1282. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1283. else if (ieee80211_is_reassoc_req(fc))
  1284. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1285. #endif
  1286. /* drop all data frame if we are not associated */
  1287. if (ieee80211_is_data(fc) &&
  1288. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  1289. (!iwl3945_is_associated(priv) ||
  1290. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  1291. IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
  1292. goto drop_unlock;
  1293. }
  1294. spin_unlock_irqrestore(&priv->lock, flags);
  1295. hdr_len = ieee80211_hdrlen(fc);
  1296. /* Find (or create) index into station table for destination station */
  1297. sta_id = iwl3945_get_sta_id(priv, hdr);
  1298. if (sta_id == IWL_INVALID_STATION) {
  1299. IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
  1300. hdr->addr1);
  1301. goto drop;
  1302. }
  1303. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1304. if (ieee80211_is_data_qos(fc)) {
  1305. qc = ieee80211_get_qos_ctl(hdr);
  1306. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  1307. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  1308. IEEE80211_SCTL_SEQ;
  1309. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1310. (hdr->seq_ctrl &
  1311. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1312. seq_number += 0x10;
  1313. }
  1314. /* Descriptor for chosen Tx queue */
  1315. txq = &priv->txq[txq_id];
  1316. q = &txq->q;
  1317. spin_lock_irqsave(&priv->lock, flags);
  1318. idx = get_cmd_index(q, q->write_ptr, 0);
  1319. /* Set up driver data for this TFD */
  1320. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  1321. txq->txb[q->write_ptr].skb[0] = skb;
  1322. /* Init first empty entry in queue's array of Tx/cmd buffers */
  1323. out_cmd = txq->cmd[idx];
  1324. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  1325. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1326. memset(tx, 0, sizeof(*tx));
  1327. /*
  1328. * Set up the Tx-command (not MAC!) header.
  1329. * Store the chosen Tx queue and TFD index within the sequence field;
  1330. * after Tx, uCode's Tx response will return this value so driver can
  1331. * locate the frame within the tx queue and do post-tx processing.
  1332. */
  1333. out_cmd->hdr.cmd = REPLY_TX;
  1334. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  1335. INDEX_TO_SEQ(q->write_ptr)));
  1336. /* Copy MAC header from skb into command buffer */
  1337. memcpy(tx->hdr, hdr, hdr_len);
  1338. /*
  1339. * Use the first empty entry in this queue's command buffer array
  1340. * to contain the Tx command and MAC header concatenated together
  1341. * (payload data will be in another buffer).
  1342. * Size of this varies, due to varying MAC header length.
  1343. * If end is not dword aligned, we'll have 2 extra bytes at the end
  1344. * of the MAC header (device reads on dword boundaries).
  1345. * We'll tell device about this padding later.
  1346. */
  1347. len = sizeof(struct iwl3945_tx_cmd) +
  1348. sizeof(struct iwl_cmd_header) + hdr_len;
  1349. len_org = len;
  1350. len = (len + 3) & ~3;
  1351. if (len_org != len)
  1352. len_org = 1;
  1353. else
  1354. len_org = 0;
  1355. /* Physical address of this Tx command's header (not MAC header!),
  1356. * within command buffer array. */
  1357. txcmd_phys = pci_map_single(priv->pci_dev,
  1358. out_cmd, sizeof(struct iwl_cmd),
  1359. PCI_DMA_TODEVICE);
  1360. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  1361. pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
  1362. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1363. * first entry */
  1364. txcmd_phys += offsetof(struct iwl_cmd, hdr);
  1365. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1366. * first entry */
  1367. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1368. txcmd_phys, len, 1, 0);
  1369. if (info->control.hw_key)
  1370. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
  1371. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  1372. * if any (802.11 null frames have no payload). */
  1373. len = skb->len - hdr_len;
  1374. if (len) {
  1375. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  1376. len, PCI_DMA_TODEVICE);
  1377. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1378. phys_addr, len,
  1379. 0, U32_PAD(len));
  1380. }
  1381. /* Total # bytes to be transmitted */
  1382. len = (u16)skb->len;
  1383. tx->len = cpu_to_le16(len);
  1384. /* TODO need this for burst mode later on */
  1385. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  1386. /* set is_hcca to 0; it probably will never be implemented */
  1387. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  1388. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  1389. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  1390. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  1391. txq->need_update = 1;
  1392. if (qc)
  1393. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  1394. } else {
  1395. wait_write_ptr = 1;
  1396. txq->need_update = 0;
  1397. }
  1398. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  1399. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  1400. ieee80211_hdrlen(fc));
  1401. /* Tell device the write index *just past* this latest filled TFD */
  1402. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  1403. rc = iwl_txq_update_write_ptr(priv, txq);
  1404. spin_unlock_irqrestore(&priv->lock, flags);
  1405. if (rc)
  1406. return rc;
  1407. if ((iwl_queue_space(q) < q->high_mark)
  1408. && priv->mac80211_registered) {
  1409. if (wait_write_ptr) {
  1410. spin_lock_irqsave(&priv->lock, flags);
  1411. txq->need_update = 1;
  1412. iwl_txq_update_write_ptr(priv, txq);
  1413. spin_unlock_irqrestore(&priv->lock, flags);
  1414. }
  1415. ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
  1416. }
  1417. return 0;
  1418. drop_unlock:
  1419. spin_unlock_irqrestore(&priv->lock, flags);
  1420. drop:
  1421. return -1;
  1422. }
  1423. static void iwl3945_set_rate(struct iwl_priv *priv)
  1424. {
  1425. const struct ieee80211_supported_band *sband = NULL;
  1426. struct ieee80211_rate *rate;
  1427. int i;
  1428. sband = iwl_get_hw_mode(priv, priv->band);
  1429. if (!sband) {
  1430. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1431. return;
  1432. }
  1433. priv->active_rate = 0;
  1434. priv->active_rate_basic = 0;
  1435. IWL_DEBUG_RATE("Setting rates for %s GHz\n",
  1436. sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
  1437. for (i = 0; i < sband->n_bitrates; i++) {
  1438. rate = &sband->bitrates[i];
  1439. if ((rate->hw_value < IWL_RATE_COUNT) &&
  1440. !(rate->flags & IEEE80211_CHAN_DISABLED)) {
  1441. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
  1442. rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
  1443. priv->active_rate |= (1 << rate->hw_value);
  1444. }
  1445. }
  1446. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  1447. priv->active_rate, priv->active_rate_basic);
  1448. /*
  1449. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1450. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1451. * OFDM
  1452. */
  1453. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1454. priv->staging39_rxon.cck_basic_rates =
  1455. ((priv->active_rate_basic &
  1456. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1457. else
  1458. priv->staging39_rxon.cck_basic_rates =
  1459. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1460. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1461. priv->staging39_rxon.ofdm_basic_rates =
  1462. ((priv->active_rate_basic &
  1463. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1464. IWL_FIRST_OFDM_RATE) & 0xFF;
  1465. else
  1466. priv->staging39_rxon.ofdm_basic_rates =
  1467. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1468. }
  1469. static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  1470. {
  1471. unsigned long flags;
  1472. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  1473. return;
  1474. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  1475. disable_radio ? "OFF" : "ON");
  1476. if (disable_radio) {
  1477. iwl_scan_cancel(priv);
  1478. /* FIXME: This is a workaround for AP */
  1479. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  1480. spin_lock_irqsave(&priv->lock, flags);
  1481. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1482. CSR_UCODE_SW_BIT_RFKILL);
  1483. spin_unlock_irqrestore(&priv->lock, flags);
  1484. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  1485. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1486. }
  1487. return;
  1488. }
  1489. spin_lock_irqsave(&priv->lock, flags);
  1490. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1491. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1492. spin_unlock_irqrestore(&priv->lock, flags);
  1493. /* wake up ucode */
  1494. msleep(10);
  1495. spin_lock_irqsave(&priv->lock, flags);
  1496. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  1497. if (!iwl_grab_nic_access(priv))
  1498. iwl_release_nic_access(priv);
  1499. spin_unlock_irqrestore(&priv->lock, flags);
  1500. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  1501. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  1502. "disabled by HW switch\n");
  1503. return;
  1504. }
  1505. if (priv->is_open)
  1506. queue_work(priv->workqueue, &priv->restart);
  1507. return;
  1508. }
  1509. void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  1510. u32 decrypt_res, struct ieee80211_rx_status *stats)
  1511. {
  1512. u16 fc =
  1513. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  1514. if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  1515. return;
  1516. if (!(fc & IEEE80211_FCTL_PROTECTED))
  1517. return;
  1518. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  1519. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  1520. case RX_RES_STATUS_SEC_TYPE_TKIP:
  1521. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1522. RX_RES_STATUS_BAD_ICV_MIC)
  1523. stats->flag |= RX_FLAG_MMIC_ERROR;
  1524. case RX_RES_STATUS_SEC_TYPE_WEP:
  1525. case RX_RES_STATUS_SEC_TYPE_CCMP:
  1526. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1527. RX_RES_STATUS_DECRYPT_OK) {
  1528. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  1529. stats->flag |= RX_FLAG_DECRYPTED;
  1530. }
  1531. break;
  1532. default:
  1533. break;
  1534. }
  1535. }
  1536. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  1537. #include "iwl-spectrum.h"
  1538. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  1539. #define BEACON_TIME_MASK_HIGH 0xFF000000
  1540. #define TIME_UNIT 1024
  1541. /*
  1542. * extended beacon time format
  1543. * time in usec will be changed into a 32-bit value in 8:24 format
  1544. * the high 1 byte is the beacon counts
  1545. * the lower 3 bytes is the time in usec within one beacon interval
  1546. */
  1547. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  1548. {
  1549. u32 quot;
  1550. u32 rem;
  1551. u32 interval = beacon_interval * 1024;
  1552. if (!interval || !usec)
  1553. return 0;
  1554. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  1555. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  1556. return (quot << 24) + rem;
  1557. }
  1558. /* base is usually what we get from ucode with each received frame,
  1559. * the same as HW timer counter counting down
  1560. */
  1561. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  1562. {
  1563. u32 base_low = base & BEACON_TIME_MASK_LOW;
  1564. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  1565. u32 interval = beacon_interval * TIME_UNIT;
  1566. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  1567. (addon & BEACON_TIME_MASK_HIGH);
  1568. if (base_low > addon_low)
  1569. res += base_low - addon_low;
  1570. else if (base_low < addon_low) {
  1571. res += interval + base_low - addon_low;
  1572. res += (1 << 24);
  1573. } else
  1574. res += (1 << 24);
  1575. return cpu_to_le32(res);
  1576. }
  1577. static int iwl3945_get_measurement(struct iwl_priv *priv,
  1578. struct ieee80211_measurement_params *params,
  1579. u8 type)
  1580. {
  1581. struct iwl_spectrum_cmd spectrum;
  1582. struct iwl_rx_packet *res;
  1583. struct iwl_host_cmd cmd = {
  1584. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  1585. .data = (void *)&spectrum,
  1586. .meta.flags = CMD_WANT_SKB,
  1587. };
  1588. u32 add_time = le64_to_cpu(params->start_time);
  1589. int rc;
  1590. int spectrum_resp_status;
  1591. int duration = le16_to_cpu(params->duration);
  1592. if (iwl3945_is_associated(priv))
  1593. add_time =
  1594. iwl3945_usecs_to_beacons(
  1595. le64_to_cpu(params->start_time) - priv->last_tsf,
  1596. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1597. memset(&spectrum, 0, sizeof(spectrum));
  1598. spectrum.channel_count = cpu_to_le16(1);
  1599. spectrum.flags =
  1600. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  1601. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  1602. cmd.len = sizeof(spectrum);
  1603. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  1604. if (iwl3945_is_associated(priv))
  1605. spectrum.start_time =
  1606. iwl3945_add_beacon_time(priv->last_beacon_time,
  1607. add_time,
  1608. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1609. else
  1610. spectrum.start_time = 0;
  1611. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  1612. spectrum.channels[0].channel = params->channel;
  1613. spectrum.channels[0].type = type;
  1614. if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1615. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  1616. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  1617. rc = iwl_send_cmd_sync(priv, &cmd);
  1618. if (rc)
  1619. return rc;
  1620. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1621. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1622. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  1623. rc = -EIO;
  1624. }
  1625. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  1626. switch (spectrum_resp_status) {
  1627. case 0: /* Command will be handled */
  1628. if (res->u.spectrum.id != 0xff) {
  1629. IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
  1630. res->u.spectrum.id);
  1631. priv->measurement_status &= ~MEASUREMENT_READY;
  1632. }
  1633. priv->measurement_status |= MEASUREMENT_ACTIVE;
  1634. rc = 0;
  1635. break;
  1636. case 1: /* Command will not be handled */
  1637. rc = -EAGAIN;
  1638. break;
  1639. }
  1640. dev_kfree_skb_any(cmd.meta.u.skb);
  1641. return rc;
  1642. }
  1643. #endif
  1644. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  1645. struct iwl_rx_mem_buffer *rxb)
  1646. {
  1647. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1648. struct iwl_alive_resp *palive;
  1649. struct delayed_work *pwork;
  1650. palive = &pkt->u.alive_frame;
  1651. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  1652. "0x%01X 0x%01X\n",
  1653. palive->is_valid, palive->ver_type,
  1654. palive->ver_subtype);
  1655. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  1656. IWL_DEBUG_INFO("Initialization Alive received.\n");
  1657. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  1658. sizeof(struct iwl_alive_resp));
  1659. pwork = &priv->init_alive_start;
  1660. } else {
  1661. IWL_DEBUG_INFO("Runtime Alive received.\n");
  1662. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  1663. sizeof(struct iwl_alive_resp));
  1664. pwork = &priv->alive_start;
  1665. iwl3945_disable_events(priv);
  1666. }
  1667. /* We delay the ALIVE response by 5ms to
  1668. * give the HW RF Kill time to activate... */
  1669. if (palive->is_valid == UCODE_VALID_OK)
  1670. queue_delayed_work(priv->workqueue, pwork,
  1671. msecs_to_jiffies(5));
  1672. else
  1673. IWL_WARN(priv, "uCode did not respond OK.\n");
  1674. }
  1675. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  1676. struct iwl_rx_mem_buffer *rxb)
  1677. {
  1678. #ifdef CONFIG_IWLWIFI_DEBUG
  1679. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1680. #endif
  1681. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  1682. return;
  1683. }
  1684. static void iwl3945_rx_reply_error(struct iwl_priv *priv,
  1685. struct iwl_rx_mem_buffer *rxb)
  1686. {
  1687. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1688. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1689. "seq 0x%04X ser 0x%08X\n",
  1690. le32_to_cpu(pkt->u.err_resp.error_type),
  1691. get_cmd_string(pkt->u.err_resp.cmd_id),
  1692. pkt->u.err_resp.cmd_id,
  1693. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1694. le32_to_cpu(pkt->u.err_resp.error_info));
  1695. }
  1696. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1697. static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  1698. {
  1699. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1700. struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
  1701. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  1702. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  1703. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  1704. rxon->channel = csa->channel;
  1705. priv->staging39_rxon.channel = csa->channel;
  1706. }
  1707. static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
  1708. struct iwl_rx_mem_buffer *rxb)
  1709. {
  1710. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  1711. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1712. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  1713. if (!report->state) {
  1714. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  1715. "Spectrum Measure Notification: Start\n");
  1716. return;
  1717. }
  1718. memcpy(&priv->measure_report, report, sizeof(*report));
  1719. priv->measurement_status |= MEASUREMENT_READY;
  1720. #endif
  1721. }
  1722. static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
  1723. struct iwl_rx_mem_buffer *rxb)
  1724. {
  1725. #ifdef CONFIG_IWLWIFI_DEBUG
  1726. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1727. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1728. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  1729. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1730. #endif
  1731. }
  1732. static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1733. struct iwl_rx_mem_buffer *rxb)
  1734. {
  1735. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1736. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  1737. "notification for %s:\n",
  1738. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  1739. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
  1740. le32_to_cpu(pkt->len));
  1741. }
  1742. static void iwl3945_bg_beacon_update(struct work_struct *work)
  1743. {
  1744. struct iwl_priv *priv =
  1745. container_of(work, struct iwl_priv, beacon_update);
  1746. struct sk_buff *beacon;
  1747. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  1748. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  1749. if (!beacon) {
  1750. IWL_ERR(priv, "update beacon failed\n");
  1751. return;
  1752. }
  1753. mutex_lock(&priv->mutex);
  1754. /* new beacon skb is allocated every time; dispose previous.*/
  1755. if (priv->ibss_beacon)
  1756. dev_kfree_skb(priv->ibss_beacon);
  1757. priv->ibss_beacon = beacon;
  1758. mutex_unlock(&priv->mutex);
  1759. iwl3945_send_beacon_cmd(priv);
  1760. }
  1761. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  1762. struct iwl_rx_mem_buffer *rxb)
  1763. {
  1764. #ifdef CONFIG_IWLWIFI_DEBUG
  1765. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1766. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  1767. u8 rate = beacon->beacon_notify_hdr.rate;
  1768. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  1769. "tsf %d %d rate %d\n",
  1770. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  1771. beacon->beacon_notify_hdr.failure_frame,
  1772. le32_to_cpu(beacon->ibss_mgr_status),
  1773. le32_to_cpu(beacon->high_tsf),
  1774. le32_to_cpu(beacon->low_tsf), rate);
  1775. #endif
  1776. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  1777. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  1778. queue_work(priv->workqueue, &priv->beacon_update);
  1779. }
  1780. /* Service response to REPLY_SCAN_CMD (0x80) */
  1781. static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
  1782. struct iwl_rx_mem_buffer *rxb)
  1783. {
  1784. #ifdef CONFIG_IWLWIFI_DEBUG
  1785. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1786. struct iwl_scanreq_notification *notif =
  1787. (struct iwl_scanreq_notification *)pkt->u.raw;
  1788. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  1789. #endif
  1790. }
  1791. /* Service SCAN_START_NOTIFICATION (0x82) */
  1792. static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
  1793. struct iwl_rx_mem_buffer *rxb)
  1794. {
  1795. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1796. struct iwl_scanstart_notification *notif =
  1797. (struct iwl_scanstart_notification *)pkt->u.raw;
  1798. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1799. IWL_DEBUG_SCAN("Scan start: "
  1800. "%d [802.11%s] "
  1801. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  1802. notif->channel,
  1803. notif->band ? "bg" : "a",
  1804. notif->tsf_high,
  1805. notif->tsf_low, notif->status, notif->beacon_timer);
  1806. }
  1807. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  1808. static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
  1809. struct iwl_rx_mem_buffer *rxb)
  1810. {
  1811. #ifdef CONFIG_IWLWIFI_DEBUG
  1812. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1813. struct iwl_scanresults_notification *notif =
  1814. (struct iwl_scanresults_notification *)pkt->u.raw;
  1815. #endif
  1816. IWL_DEBUG_SCAN("Scan ch.res: "
  1817. "%d [802.11%s] "
  1818. "(TSF: 0x%08X:%08X) - %d "
  1819. "elapsed=%lu usec (%dms since last)\n",
  1820. notif->channel,
  1821. notif->band ? "bg" : "a",
  1822. le32_to_cpu(notif->tsf_high),
  1823. le32_to_cpu(notif->tsf_low),
  1824. le32_to_cpu(notif->statistics[0]),
  1825. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  1826. jiffies_to_msecs(elapsed_jiffies
  1827. (priv->last_scan_jiffies, jiffies)));
  1828. priv->last_scan_jiffies = jiffies;
  1829. priv->next_scan_jiffies = 0;
  1830. }
  1831. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  1832. static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
  1833. struct iwl_rx_mem_buffer *rxb)
  1834. {
  1835. #ifdef CONFIG_IWLWIFI_DEBUG
  1836. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1837. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1838. #endif
  1839. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1840. scan_notif->scanned_channels,
  1841. scan_notif->tsf_low,
  1842. scan_notif->tsf_high, scan_notif->status);
  1843. /* The HW is no longer scanning */
  1844. clear_bit(STATUS_SCAN_HW, &priv->status);
  1845. /* The scan completion notification came in, so kill that timer... */
  1846. cancel_delayed_work(&priv->scan_check);
  1847. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  1848. (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
  1849. "2.4" : "5.2",
  1850. jiffies_to_msecs(elapsed_jiffies
  1851. (priv->scan_pass_start, jiffies)));
  1852. /* Remove this scanned band from the list of pending
  1853. * bands to scan, band G precedes A in order of scanning
  1854. * as seen in iwl3945_bg_request_scan */
  1855. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
  1856. priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
  1857. else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
  1858. priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
  1859. /* If a request to abort was given, or the scan did not succeed
  1860. * then we reset the scan state machine and terminate,
  1861. * re-queuing another scan if one has been requested */
  1862. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1863. IWL_DEBUG_INFO("Aborted scan completed.\n");
  1864. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1865. } else {
  1866. /* If there are more bands on this scan pass reschedule */
  1867. if (priv->scan_bands > 0)
  1868. goto reschedule;
  1869. }
  1870. priv->last_scan_jiffies = jiffies;
  1871. priv->next_scan_jiffies = 0;
  1872. IWL_DEBUG_INFO("Setting scan to off\n");
  1873. clear_bit(STATUS_SCANNING, &priv->status);
  1874. IWL_DEBUG_INFO("Scan took %dms\n",
  1875. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  1876. queue_work(priv->workqueue, &priv->scan_completed);
  1877. return;
  1878. reschedule:
  1879. priv->scan_pass_start = jiffies;
  1880. queue_work(priv->workqueue, &priv->request_scan);
  1881. }
  1882. /* Handle notification from uCode that card's power state is changing
  1883. * due to software, hardware, or critical temperature RFKILL */
  1884. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  1885. struct iwl_rx_mem_buffer *rxb)
  1886. {
  1887. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1888. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  1889. unsigned long status = priv->status;
  1890. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  1891. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  1892. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  1893. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1894. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  1895. if (flags & HW_CARD_DISABLED)
  1896. set_bit(STATUS_RF_KILL_HW, &priv->status);
  1897. else
  1898. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  1899. if (flags & SW_CARD_DISABLED)
  1900. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1901. else
  1902. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1903. iwl_scan_cancel(priv);
  1904. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  1905. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  1906. (test_bit(STATUS_RF_KILL_SW, &status) !=
  1907. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  1908. queue_work(priv->workqueue, &priv->rf_kill);
  1909. else
  1910. wake_up_interruptible(&priv->wait_command_queue);
  1911. }
  1912. /**
  1913. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  1914. *
  1915. * Setup the RX handlers for each of the reply types sent from the uCode
  1916. * to the host.
  1917. *
  1918. * This function chains into the hardware specific files for them to setup
  1919. * any hardware specific handlers as well.
  1920. */
  1921. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  1922. {
  1923. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  1924. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  1925. priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
  1926. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
  1927. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  1928. iwl3945_rx_spectrum_measure_notif;
  1929. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
  1930. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  1931. iwl3945_rx_pm_debug_statistics_notif;
  1932. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  1933. /*
  1934. * The same handler is used for both the REPLY to a discrete
  1935. * statistics request from the host as well as for the periodic
  1936. * statistics notifications (after received beacons) from the uCode.
  1937. */
  1938. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  1939. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  1940. priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
  1941. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
  1942. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  1943. iwl3945_rx_scan_results_notif;
  1944. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  1945. iwl3945_rx_scan_complete_notif;
  1946. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  1947. /* Set up hardware specific Rx handlers */
  1948. iwl3945_hw_rx_handler_setup(priv);
  1949. }
  1950. /**
  1951. * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
  1952. * When FW advances 'R' index, all entries between old and new 'R' index
  1953. * need to be reclaimed.
  1954. */
  1955. static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
  1956. int txq_id, int index)
  1957. {
  1958. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  1959. struct iwl_queue *q = &txq->q;
  1960. int nfreed = 0;
  1961. if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
  1962. IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
  1963. "is out of range [0-%d] %d %d.\n", txq_id,
  1964. index, q->n_bd, q->write_ptr, q->read_ptr);
  1965. return;
  1966. }
  1967. for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
  1968. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  1969. if (nfreed > 1) {
  1970. IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
  1971. q->write_ptr, q->read_ptr);
  1972. queue_work(priv->workqueue, &priv->restart);
  1973. break;
  1974. }
  1975. nfreed++;
  1976. }
  1977. }
  1978. /**
  1979. * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  1980. * @rxb: Rx buffer to reclaim
  1981. *
  1982. * If an Rx buffer has an async callback associated with it the callback
  1983. * will be executed. The attached skb (if present) will only be freed
  1984. * if the callback returns 1
  1985. */
  1986. static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
  1987. struct iwl_rx_mem_buffer *rxb)
  1988. {
  1989. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1990. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  1991. int txq_id = SEQ_TO_QUEUE(sequence);
  1992. int index = SEQ_TO_INDEX(sequence);
  1993. int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  1994. int cmd_index;
  1995. struct iwl_cmd *cmd;
  1996. if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
  1997. "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
  1998. txq_id, sequence,
  1999. priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
  2000. priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
  2001. iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
  2002. return;
  2003. }
  2004. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  2005. cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  2006. /* Input error checking is done when commands are added to queue. */
  2007. if (cmd->meta.flags & CMD_WANT_SKB) {
  2008. cmd->meta.source->u.skb = rxb->skb;
  2009. rxb->skb = NULL;
  2010. } else if (cmd->meta.u.callback &&
  2011. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  2012. rxb->skb = NULL;
  2013. iwl3945_cmd_queue_reclaim(priv, txq_id, index);
  2014. if (!(cmd->meta.flags & CMD_ASYNC)) {
  2015. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2016. wake_up_interruptible(&priv->wait_command_queue);
  2017. }
  2018. }
  2019. /************************** RX-FUNCTIONS ****************************/
  2020. /*
  2021. * Rx theory of operation
  2022. *
  2023. * The host allocates 32 DMA target addresses and passes the host address
  2024. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  2025. * 0 to 31
  2026. *
  2027. * Rx Queue Indexes
  2028. * The host/firmware share two index registers for managing the Rx buffers.
  2029. *
  2030. * The READ index maps to the first position that the firmware may be writing
  2031. * to -- the driver can read up to (but not including) this position and get
  2032. * good data.
  2033. * The READ index is managed by the firmware once the card is enabled.
  2034. *
  2035. * The WRITE index maps to the last position the driver has read from -- the
  2036. * position preceding WRITE is the last slot the firmware can place a packet.
  2037. *
  2038. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2039. * WRITE = READ.
  2040. *
  2041. * During initialization, the host sets up the READ queue position to the first
  2042. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  2043. *
  2044. * When the firmware places a packet in a buffer, it will advance the READ index
  2045. * and fire the RX interrupt. The driver can then query the READ index and
  2046. * process as many packets as possible, moving the WRITE index forward as it
  2047. * resets the Rx queue buffers with new memory.
  2048. *
  2049. * The management in the driver is as follows:
  2050. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2051. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2052. * to replenish the iwl->rxq->rx_free.
  2053. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  2054. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  2055. * 'processed' and 'read' driver indexes as well)
  2056. * + A received packet is processed and handed to the kernel network stack,
  2057. * detached from the iwl->rxq. The driver 'processed' index is updated.
  2058. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2059. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2060. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  2061. * were enough free buffers and RX_STALLED is set it is cleared.
  2062. *
  2063. *
  2064. * Driver sequence:
  2065. *
  2066. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2067. * iwl3945_rx_queue_restock
  2068. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  2069. * queue, updates firmware pointers, and updates
  2070. * the WRITE index. If insufficient rx_free buffers
  2071. * are available, schedules iwl3945_rx_replenish
  2072. *
  2073. * -- enable interrupts --
  2074. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  2075. * READ INDEX, detaching the SKB from the pool.
  2076. * Moves the packet buffer from queue to rx_used.
  2077. * Calls iwl3945_rx_queue_restock to refill any empty
  2078. * slots.
  2079. * ...
  2080. *
  2081. */
  2082. /**
  2083. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  2084. */
  2085. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  2086. dma_addr_t dma_addr)
  2087. {
  2088. return cpu_to_le32((u32)dma_addr);
  2089. }
  2090. /**
  2091. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  2092. *
  2093. * If there are slots in the RX queue that need to be restocked,
  2094. * and we have free pre-allocated buffers, fill the ranks as much
  2095. * as we can, pulling from rx_free.
  2096. *
  2097. * This moves the 'write' index forward to catch up with 'processed', and
  2098. * also updates the memory address in the firmware to reference the new
  2099. * target buffer.
  2100. */
  2101. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  2102. {
  2103. struct iwl_rx_queue *rxq = &priv->rxq;
  2104. struct list_head *element;
  2105. struct iwl_rx_mem_buffer *rxb;
  2106. unsigned long flags;
  2107. int write, rc;
  2108. spin_lock_irqsave(&rxq->lock, flags);
  2109. write = rxq->write & ~0x7;
  2110. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  2111. /* Get next free Rx buffer, remove from free list */
  2112. element = rxq->rx_free.next;
  2113. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2114. list_del(element);
  2115. /* Point to Rx buffer via next RBD in circular buffer */
  2116. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  2117. rxq->queue[rxq->write] = rxb;
  2118. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  2119. rxq->free_count--;
  2120. }
  2121. spin_unlock_irqrestore(&rxq->lock, flags);
  2122. /* If the pre-allocated buffer pool is dropping low, schedule to
  2123. * refill it */
  2124. if (rxq->free_count <= RX_LOW_WATERMARK)
  2125. queue_work(priv->workqueue, &priv->rx_replenish);
  2126. /* If we've added more space for the firmware to place data, tell it.
  2127. * Increment device's write pointer in multiples of 8. */
  2128. if ((write != (rxq->write & ~0x7))
  2129. || (abs(rxq->write - rxq->read) > 7)) {
  2130. spin_lock_irqsave(&rxq->lock, flags);
  2131. rxq->need_update = 1;
  2132. spin_unlock_irqrestore(&rxq->lock, flags);
  2133. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  2134. if (rc)
  2135. return rc;
  2136. }
  2137. return 0;
  2138. }
  2139. /**
  2140. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  2141. *
  2142. * When moving to rx_free an SKB is allocated for the slot.
  2143. *
  2144. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  2145. * This is called as a scheduled work item (except for during initialization)
  2146. */
  2147. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  2148. {
  2149. struct iwl_rx_queue *rxq = &priv->rxq;
  2150. struct list_head *element;
  2151. struct iwl_rx_mem_buffer *rxb;
  2152. unsigned long flags;
  2153. spin_lock_irqsave(&rxq->lock, flags);
  2154. while (!list_empty(&rxq->rx_used)) {
  2155. element = rxq->rx_used.next;
  2156. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2157. /* Alloc a new receive buffer */
  2158. rxb->skb =
  2159. alloc_skb(priv->hw_params.rx_buf_size,
  2160. __GFP_NOWARN | GFP_ATOMIC);
  2161. if (!rxb->skb) {
  2162. if (net_ratelimit())
  2163. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  2164. /* We don't reschedule replenish work here -- we will
  2165. * call the restock method and if it still needs
  2166. * more buffers it will schedule replenish */
  2167. break;
  2168. }
  2169. /* If radiotap head is required, reserve some headroom here.
  2170. * The physical head count is a variable rx_stats->phy_count.
  2171. * We reserve 4 bytes here. Plus these extra bytes, the
  2172. * headroom of the physical head should be enough for the
  2173. * radiotap head that iwl3945 supported. See iwl3945_rt.
  2174. */
  2175. skb_reserve(rxb->skb, 4);
  2176. priv->alloc_rxb_skb++;
  2177. list_del(element);
  2178. /* Get physical address of RB/SKB */
  2179. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  2180. rxb->skb->data,
  2181. priv->hw_params.rx_buf_size,
  2182. PCI_DMA_FROMDEVICE);
  2183. list_add_tail(&rxb->list, &rxq->rx_free);
  2184. rxq->free_count++;
  2185. }
  2186. spin_unlock_irqrestore(&rxq->lock, flags);
  2187. }
  2188. /*
  2189. * this should be called while priv->lock is locked
  2190. */
  2191. static void __iwl3945_rx_replenish(void *data)
  2192. {
  2193. struct iwl_priv *priv = data;
  2194. iwl3945_rx_allocate(priv);
  2195. iwl3945_rx_queue_restock(priv);
  2196. }
  2197. void iwl3945_rx_replenish(void *data)
  2198. {
  2199. struct iwl_priv *priv = data;
  2200. unsigned long flags;
  2201. iwl3945_rx_allocate(priv);
  2202. spin_lock_irqsave(&priv->lock, flags);
  2203. iwl3945_rx_queue_restock(priv);
  2204. spin_unlock_irqrestore(&priv->lock, flags);
  2205. }
  2206. /* Convert linear signal-to-noise ratio into dB */
  2207. static u8 ratio2dB[100] = {
  2208. /* 0 1 2 3 4 5 6 7 8 9 */
  2209. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  2210. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  2211. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  2212. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  2213. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  2214. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  2215. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  2216. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  2217. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  2218. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  2219. };
  2220. /* Calculates a relative dB value from a ratio of linear
  2221. * (i.e. not dB) signal levels.
  2222. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  2223. int iwl3945_calc_db_from_ratio(int sig_ratio)
  2224. {
  2225. /* 1000:1 or higher just report as 60 dB */
  2226. if (sig_ratio >= 1000)
  2227. return 60;
  2228. /* 100:1 or higher, divide by 10 and use table,
  2229. * add 20 dB to make up for divide by 10 */
  2230. if (sig_ratio >= 100)
  2231. return 20 + (int)ratio2dB[sig_ratio/10];
  2232. /* We shouldn't see this */
  2233. if (sig_ratio < 1)
  2234. return 0;
  2235. /* Use table for ratios 1:1 - 99:1 */
  2236. return (int)ratio2dB[sig_ratio];
  2237. }
  2238. #define PERFECT_RSSI (-20) /* dBm */
  2239. #define WORST_RSSI (-95) /* dBm */
  2240. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  2241. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  2242. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  2243. * about formulas used below. */
  2244. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  2245. {
  2246. int sig_qual;
  2247. int degradation = PERFECT_RSSI - rssi_dbm;
  2248. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  2249. * as indicator; formula is (signal dbm - noise dbm).
  2250. * SNR at or above 40 is a great signal (100%).
  2251. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  2252. * Weakest usable signal is usually 10 - 15 dB SNR. */
  2253. if (noise_dbm) {
  2254. if (rssi_dbm - noise_dbm >= 40)
  2255. return 100;
  2256. else if (rssi_dbm < noise_dbm)
  2257. return 0;
  2258. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  2259. /* Else use just the signal level.
  2260. * This formula is a least squares fit of data points collected and
  2261. * compared with a reference system that had a percentage (%) display
  2262. * for signal quality. */
  2263. } else
  2264. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  2265. (15 * RSSI_RANGE + 62 * degradation)) /
  2266. (RSSI_RANGE * RSSI_RANGE);
  2267. if (sig_qual > 100)
  2268. sig_qual = 100;
  2269. else if (sig_qual < 1)
  2270. sig_qual = 0;
  2271. return sig_qual;
  2272. }
  2273. /**
  2274. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  2275. *
  2276. * Uses the priv->rx_handlers callback function array to invoke
  2277. * the appropriate handlers, including command responses,
  2278. * frame-received notifications, and other notifications.
  2279. */
  2280. static void iwl3945_rx_handle(struct iwl_priv *priv)
  2281. {
  2282. struct iwl_rx_mem_buffer *rxb;
  2283. struct iwl_rx_packet *pkt;
  2284. struct iwl_rx_queue *rxq = &priv->rxq;
  2285. u32 r, i;
  2286. int reclaim;
  2287. unsigned long flags;
  2288. u8 fill_rx = 0;
  2289. u32 count = 8;
  2290. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  2291. * buffer that the driver may process (last buffer filled by ucode). */
  2292. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  2293. i = rxq->read;
  2294. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  2295. fill_rx = 1;
  2296. /* Rx interrupt, but nothing sent from uCode */
  2297. if (i == r)
  2298. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  2299. while (i != r) {
  2300. rxb = rxq->queue[i];
  2301. /* If an RXB doesn't have a Rx queue slot associated with it,
  2302. * then a bug has been introduced in the queue refilling
  2303. * routines -- catch it here */
  2304. BUG_ON(rxb == NULL);
  2305. rxq->queue[i] = NULL;
  2306. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
  2307. priv->hw_params.rx_buf_size,
  2308. PCI_DMA_FROMDEVICE);
  2309. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2310. /* Reclaim a command buffer only if this packet is a response
  2311. * to a (driver-originated) command.
  2312. * If the packet (e.g. Rx frame) originated from uCode,
  2313. * there is no command buffer to reclaim.
  2314. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  2315. * but apparently a few don't get set; catch them here. */
  2316. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  2317. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  2318. (pkt->hdr.cmd != REPLY_TX);
  2319. /* Based on type of command response or notification,
  2320. * handle those that need handling via function in
  2321. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  2322. if (priv->rx_handlers[pkt->hdr.cmd]) {
  2323. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2324. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  2325. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  2326. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  2327. } else {
  2328. /* No handling needed */
  2329. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2330. "r %d i %d No handler needed for %s, 0x%02x\n",
  2331. r, i, get_cmd_string(pkt->hdr.cmd),
  2332. pkt->hdr.cmd);
  2333. }
  2334. if (reclaim) {
  2335. /* Invoke any callbacks, transfer the skb to caller, and
  2336. * fire off the (possibly) blocking iwl_send_cmd()
  2337. * as we reclaim the driver command queue */
  2338. if (rxb && rxb->skb)
  2339. iwl3945_tx_cmd_complete(priv, rxb);
  2340. else
  2341. IWL_WARN(priv, "Claim null rxb?\n");
  2342. }
  2343. /* For now we just don't re-use anything. We can tweak this
  2344. * later to try and re-use notification packets and SKBs that
  2345. * fail to Rx correctly */
  2346. if (rxb->skb != NULL) {
  2347. priv->alloc_rxb_skb--;
  2348. dev_kfree_skb_any(rxb->skb);
  2349. rxb->skb = NULL;
  2350. }
  2351. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  2352. priv->hw_params.rx_buf_size,
  2353. PCI_DMA_FROMDEVICE);
  2354. spin_lock_irqsave(&rxq->lock, flags);
  2355. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  2356. spin_unlock_irqrestore(&rxq->lock, flags);
  2357. i = (i + 1) & RX_QUEUE_MASK;
  2358. /* If there are a lot of unused frames,
  2359. * restock the Rx queue so ucode won't assert. */
  2360. if (fill_rx) {
  2361. count++;
  2362. if (count >= 8) {
  2363. priv->rxq.read = i;
  2364. __iwl3945_rx_replenish(priv);
  2365. count = 0;
  2366. }
  2367. }
  2368. }
  2369. /* Backtrack one entry */
  2370. priv->rxq.read = i;
  2371. iwl3945_rx_queue_restock(priv);
  2372. }
  2373. #ifdef CONFIG_IWLWIFI_DEBUG
  2374. static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
  2375. struct iwl3945_rxon_cmd *rxon)
  2376. {
  2377. IWL_DEBUG_RADIO("RX CONFIG:\n");
  2378. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  2379. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  2380. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  2381. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  2382. le32_to_cpu(rxon->filter_flags));
  2383. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  2384. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  2385. rxon->ofdm_basic_rates);
  2386. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  2387. IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  2388. IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  2389. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  2390. }
  2391. #endif
  2392. static void iwl3945_enable_interrupts(struct iwl_priv *priv)
  2393. {
  2394. IWL_DEBUG_ISR("Enabling interrupts\n");
  2395. set_bit(STATUS_INT_ENABLED, &priv->status);
  2396. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  2397. }
  2398. /* call this function to flush any scheduled tasklet */
  2399. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  2400. {
  2401. /* wait to make sure we flush pending tasklet*/
  2402. synchronize_irq(priv->pci_dev->irq);
  2403. tasklet_kill(&priv->irq_tasklet);
  2404. }
  2405. static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
  2406. {
  2407. clear_bit(STATUS_INT_ENABLED, &priv->status);
  2408. /* disable interrupts from uCode/NIC to host */
  2409. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2410. /* acknowledge/clear/reset any interrupts still pending
  2411. * from uCode or flow handler (Rx/Tx DMA) */
  2412. iwl_write32(priv, CSR_INT, 0xffffffff);
  2413. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  2414. IWL_DEBUG_ISR("Disabled interrupts\n");
  2415. }
  2416. static const char *desc_lookup(int i)
  2417. {
  2418. switch (i) {
  2419. case 1:
  2420. return "FAIL";
  2421. case 2:
  2422. return "BAD_PARAM";
  2423. case 3:
  2424. return "BAD_CHECKSUM";
  2425. case 4:
  2426. return "NMI_INTERRUPT";
  2427. case 5:
  2428. return "SYSASSERT";
  2429. case 6:
  2430. return "FATAL_ERROR";
  2431. }
  2432. return "UNKNOWN";
  2433. }
  2434. #define ERROR_START_OFFSET (1 * sizeof(u32))
  2435. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  2436. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  2437. {
  2438. u32 i;
  2439. u32 desc, time, count, base, data1;
  2440. u32 blink1, blink2, ilink1, ilink2;
  2441. int rc;
  2442. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  2443. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2444. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  2445. return;
  2446. }
  2447. rc = iwl_grab_nic_access(priv);
  2448. if (rc) {
  2449. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2450. return;
  2451. }
  2452. count = iwl_read_targ_mem(priv, base);
  2453. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  2454. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  2455. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  2456. priv->status, count);
  2457. }
  2458. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  2459. "ilink1 nmiPC Line\n");
  2460. for (i = ERROR_START_OFFSET;
  2461. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  2462. i += ERROR_ELEM_SIZE) {
  2463. desc = iwl_read_targ_mem(priv, base + i);
  2464. time =
  2465. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  2466. blink1 =
  2467. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  2468. blink2 =
  2469. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  2470. ilink1 =
  2471. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  2472. ilink2 =
  2473. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  2474. data1 =
  2475. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  2476. IWL_ERR(priv,
  2477. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  2478. desc_lookup(desc), desc, time, blink1, blink2,
  2479. ilink1, ilink2, data1);
  2480. }
  2481. iwl_release_nic_access(priv);
  2482. }
  2483. #define EVENT_START_OFFSET (6 * sizeof(u32))
  2484. /**
  2485. * iwl3945_print_event_log - Dump error event log to syslog
  2486. *
  2487. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  2488. */
  2489. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  2490. u32 num_events, u32 mode)
  2491. {
  2492. u32 i;
  2493. u32 base; /* SRAM byte address of event log header */
  2494. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  2495. u32 ptr; /* SRAM byte address of log data */
  2496. u32 ev, time, data; /* event log data */
  2497. if (num_events == 0)
  2498. return;
  2499. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2500. if (mode == 0)
  2501. event_size = 2 * sizeof(u32);
  2502. else
  2503. event_size = 3 * sizeof(u32);
  2504. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  2505. /* "time" is actually "data" for mode 0 (no timestamp).
  2506. * place event id # at far right for easier visual parsing. */
  2507. for (i = 0; i < num_events; i++) {
  2508. ev = iwl_read_targ_mem(priv, ptr);
  2509. ptr += sizeof(u32);
  2510. time = iwl_read_targ_mem(priv, ptr);
  2511. ptr += sizeof(u32);
  2512. if (mode == 0) {
  2513. /* data, ev */
  2514. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  2515. } else {
  2516. data = iwl_read_targ_mem(priv, ptr);
  2517. ptr += sizeof(u32);
  2518. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  2519. }
  2520. }
  2521. }
  2522. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  2523. {
  2524. int rc;
  2525. u32 base; /* SRAM byte address of event log header */
  2526. u32 capacity; /* event log capacity in # entries */
  2527. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  2528. u32 num_wraps; /* # times uCode wrapped to top of log */
  2529. u32 next_entry; /* index of next entry to be written by uCode */
  2530. u32 size; /* # entries that we'll print */
  2531. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2532. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2533. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  2534. return;
  2535. }
  2536. rc = iwl_grab_nic_access(priv);
  2537. if (rc) {
  2538. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2539. return;
  2540. }
  2541. /* event log header */
  2542. capacity = iwl_read_targ_mem(priv, base);
  2543. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  2544. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  2545. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  2546. size = num_wraps ? capacity : next_entry;
  2547. /* bail out if nothing in log */
  2548. if (size == 0) {
  2549. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  2550. iwl_release_nic_access(priv);
  2551. return;
  2552. }
  2553. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  2554. size, num_wraps);
  2555. /* if uCode has wrapped back to top of log, start at the oldest entry,
  2556. * i.e the next one that uCode would fill. */
  2557. if (num_wraps)
  2558. iwl3945_print_event_log(priv, next_entry,
  2559. capacity - next_entry, mode);
  2560. /* (then/else) start at top of log */
  2561. iwl3945_print_event_log(priv, 0, next_entry, mode);
  2562. iwl_release_nic_access(priv);
  2563. }
  2564. /**
  2565. * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
  2566. */
  2567. static void iwl3945_irq_handle_error(struct iwl_priv *priv)
  2568. {
  2569. /* Set the FW error flag -- cleared on iwl3945_down */
  2570. set_bit(STATUS_FW_ERROR, &priv->status);
  2571. /* Cancel currently queued command. */
  2572. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2573. #ifdef CONFIG_IWLWIFI_DEBUG
  2574. if (priv->debug_level & IWL_DL_FW_ERRORS) {
  2575. iwl3945_dump_nic_error_log(priv);
  2576. iwl3945_dump_nic_event_log(priv);
  2577. iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
  2578. }
  2579. #endif
  2580. wake_up_interruptible(&priv->wait_command_queue);
  2581. /* Keep the restart process from trying to send host
  2582. * commands by clearing the INIT status bit */
  2583. clear_bit(STATUS_READY, &priv->status);
  2584. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2585. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  2586. "Restarting adapter due to uCode error.\n");
  2587. if (iwl3945_is_associated(priv)) {
  2588. memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
  2589. sizeof(priv->recovery39_rxon));
  2590. priv->error_recovering = 1;
  2591. }
  2592. queue_work(priv->workqueue, &priv->restart);
  2593. }
  2594. }
  2595. static void iwl3945_error_recovery(struct iwl_priv *priv)
  2596. {
  2597. unsigned long flags;
  2598. memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
  2599. sizeof(priv->staging39_rxon));
  2600. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2601. iwl3945_commit_rxon(priv);
  2602. iwl3945_add_station(priv, priv->bssid, 1, 0);
  2603. spin_lock_irqsave(&priv->lock, flags);
  2604. priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
  2605. priv->error_recovering = 0;
  2606. spin_unlock_irqrestore(&priv->lock, flags);
  2607. }
  2608. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  2609. {
  2610. u32 inta, handled = 0;
  2611. u32 inta_fh;
  2612. unsigned long flags;
  2613. #ifdef CONFIG_IWLWIFI_DEBUG
  2614. u32 inta_mask;
  2615. #endif
  2616. spin_lock_irqsave(&priv->lock, flags);
  2617. /* Ack/clear/reset pending uCode interrupts.
  2618. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  2619. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  2620. inta = iwl_read32(priv, CSR_INT);
  2621. iwl_write32(priv, CSR_INT, inta);
  2622. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  2623. * Any new interrupts that happen after this, either while we're
  2624. * in this tasklet, or later, will show up in next ISR/tasklet. */
  2625. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2626. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  2627. #ifdef CONFIG_IWLWIFI_DEBUG
  2628. if (priv->debug_level & IWL_DL_ISR) {
  2629. /* just for debug */
  2630. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  2631. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2632. inta, inta_mask, inta_fh);
  2633. }
  2634. #endif
  2635. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  2636. * atomic, make sure that inta covers all the interrupts that
  2637. * we've discovered, even if FH interrupt came in just after
  2638. * reading CSR_INT. */
  2639. if (inta_fh & CSR39_FH_INT_RX_MASK)
  2640. inta |= CSR_INT_BIT_FH_RX;
  2641. if (inta_fh & CSR39_FH_INT_TX_MASK)
  2642. inta |= CSR_INT_BIT_FH_TX;
  2643. /* Now service all interrupt bits discovered above. */
  2644. if (inta & CSR_INT_BIT_HW_ERR) {
  2645. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  2646. /* Tell the device to stop sending interrupts */
  2647. iwl3945_disable_interrupts(priv);
  2648. iwl3945_irq_handle_error(priv);
  2649. handled |= CSR_INT_BIT_HW_ERR;
  2650. spin_unlock_irqrestore(&priv->lock, flags);
  2651. return;
  2652. }
  2653. #ifdef CONFIG_IWLWIFI_DEBUG
  2654. if (priv->debug_level & (IWL_DL_ISR)) {
  2655. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  2656. if (inta & CSR_INT_BIT_SCD)
  2657. IWL_DEBUG_ISR("Scheduler finished to transmit "
  2658. "the frame/frames.\n");
  2659. /* Alive notification via Rx interrupt will do the real work */
  2660. if (inta & CSR_INT_BIT_ALIVE)
  2661. IWL_DEBUG_ISR("Alive interrupt\n");
  2662. }
  2663. #endif
  2664. /* Safely ignore these bits for debug checks below */
  2665. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  2666. /* Error detected by uCode */
  2667. if (inta & CSR_INT_BIT_SW_ERR) {
  2668. IWL_ERR(priv, "Microcode SW error detected. "
  2669. "Restarting 0x%X.\n", inta);
  2670. iwl3945_irq_handle_error(priv);
  2671. handled |= CSR_INT_BIT_SW_ERR;
  2672. }
  2673. /* uCode wakes up after power-down sleep */
  2674. if (inta & CSR_INT_BIT_WAKEUP) {
  2675. IWL_DEBUG_ISR("Wakeup interrupt\n");
  2676. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  2677. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  2678. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  2679. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  2680. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  2681. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  2682. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  2683. handled |= CSR_INT_BIT_WAKEUP;
  2684. }
  2685. /* All uCode command responses, including Tx command responses,
  2686. * Rx "responses" (frame-received notification), and other
  2687. * notifications from uCode come through here*/
  2688. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  2689. iwl3945_rx_handle(priv);
  2690. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  2691. }
  2692. if (inta & CSR_INT_BIT_FH_TX) {
  2693. IWL_DEBUG_ISR("Tx interrupt\n");
  2694. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  2695. if (!iwl_grab_nic_access(priv)) {
  2696. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  2697. (FH39_SRVC_CHNL), 0x0);
  2698. iwl_release_nic_access(priv);
  2699. }
  2700. handled |= CSR_INT_BIT_FH_TX;
  2701. }
  2702. if (inta & ~handled)
  2703. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  2704. if (inta & ~CSR_INI_SET_MASK) {
  2705. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  2706. inta & ~CSR_INI_SET_MASK);
  2707. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  2708. }
  2709. /* Re-enable all interrupts */
  2710. /* only Re-enable if disabled by irq */
  2711. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  2712. iwl3945_enable_interrupts(priv);
  2713. #ifdef CONFIG_IWLWIFI_DEBUG
  2714. if (priv->debug_level & (IWL_DL_ISR)) {
  2715. inta = iwl_read32(priv, CSR_INT);
  2716. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  2717. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2718. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  2719. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  2720. }
  2721. #endif
  2722. spin_unlock_irqrestore(&priv->lock, flags);
  2723. }
  2724. static irqreturn_t iwl3945_isr(int irq, void *data)
  2725. {
  2726. struct iwl_priv *priv = data;
  2727. u32 inta, inta_mask;
  2728. u32 inta_fh;
  2729. if (!priv)
  2730. return IRQ_NONE;
  2731. spin_lock(&priv->lock);
  2732. /* Disable (but don't clear!) interrupts here to avoid
  2733. * back-to-back ISRs and sporadic interrupts from our NIC.
  2734. * If we have something to service, the tasklet will re-enable ints.
  2735. * If we *don't* have something, we'll re-enable before leaving here. */
  2736. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  2737. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2738. /* Discover which interrupts are active/pending */
  2739. inta = iwl_read32(priv, CSR_INT);
  2740. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2741. /* Ignore interrupt if there's nothing in NIC to service.
  2742. * This may be due to IRQ shared with another device,
  2743. * or due to sporadic interrupts thrown from our NIC. */
  2744. if (!inta && !inta_fh) {
  2745. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  2746. goto none;
  2747. }
  2748. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  2749. /* Hardware disappeared */
  2750. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  2751. goto unplugged;
  2752. }
  2753. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2754. inta, inta_mask, inta_fh);
  2755. inta &= ~CSR_INT_BIT_SCD;
  2756. /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
  2757. if (likely(inta || inta_fh))
  2758. tasklet_schedule(&priv->irq_tasklet);
  2759. unplugged:
  2760. spin_unlock(&priv->lock);
  2761. return IRQ_HANDLED;
  2762. none:
  2763. /* re-enable interrupts here since we don't have anything to service. */
  2764. /* only Re-enable if disabled by irq */
  2765. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  2766. iwl3945_enable_interrupts(priv);
  2767. spin_unlock(&priv->lock);
  2768. return IRQ_NONE;
  2769. }
  2770. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  2771. enum ieee80211_band band,
  2772. u8 is_active, u8 n_probes,
  2773. struct iwl3945_scan_channel *scan_ch)
  2774. {
  2775. const struct ieee80211_channel *channels = NULL;
  2776. const struct ieee80211_supported_band *sband;
  2777. const struct iwl_channel_info *ch_info;
  2778. u16 passive_dwell = 0;
  2779. u16 active_dwell = 0;
  2780. int added, i;
  2781. sband = iwl_get_hw_mode(priv, band);
  2782. if (!sband)
  2783. return 0;
  2784. channels = sband->channels;
  2785. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  2786. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  2787. if (passive_dwell <= active_dwell)
  2788. passive_dwell = active_dwell + 1;
  2789. for (i = 0, added = 0; i < sband->n_channels; i++) {
  2790. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  2791. continue;
  2792. scan_ch->channel = channels[i].hw_value;
  2793. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  2794. if (!is_channel_valid(ch_info)) {
  2795. IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
  2796. scan_ch->channel);
  2797. continue;
  2798. }
  2799. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  2800. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  2801. /* If passive , set up for auto-switch
  2802. * and use long active_dwell time.
  2803. */
  2804. if (!is_active || is_channel_passive(ch_info) ||
  2805. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  2806. scan_ch->type = 0; /* passive */
  2807. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  2808. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  2809. } else {
  2810. scan_ch->type = 1; /* active */
  2811. }
  2812. /* Set direct probe bits. These may be used both for active
  2813. * scan channels (probes gets sent right away),
  2814. * or for passive channels (probes get se sent only after
  2815. * hearing clear Rx packet).*/
  2816. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  2817. if (n_probes)
  2818. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  2819. } else {
  2820. /* uCode v1 does not allow setting direct probe bits on
  2821. * passive channel. */
  2822. if ((scan_ch->type & 1) && n_probes)
  2823. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  2824. }
  2825. /* Set txpower levels to defaults */
  2826. scan_ch->tpc.dsp_atten = 110;
  2827. /* scan_pwr_info->tpc.dsp_atten; */
  2828. /*scan_pwr_info->tpc.tx_gain; */
  2829. if (band == IEEE80211_BAND_5GHZ)
  2830. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  2831. else {
  2832. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  2833. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  2834. * power level:
  2835. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  2836. */
  2837. }
  2838. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  2839. scan_ch->channel,
  2840. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  2841. (scan_ch->type & 1) ?
  2842. active_dwell : passive_dwell);
  2843. scan_ch++;
  2844. added++;
  2845. }
  2846. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  2847. return added;
  2848. }
  2849. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  2850. struct ieee80211_rate *rates)
  2851. {
  2852. int i;
  2853. for (i = 0; i < IWL_RATE_COUNT; i++) {
  2854. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  2855. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  2856. rates[i].hw_value_short = i;
  2857. rates[i].flags = 0;
  2858. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  2859. /*
  2860. * If CCK != 1M then set short preamble rate flag.
  2861. */
  2862. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  2863. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  2864. }
  2865. }
  2866. }
  2867. /******************************************************************************
  2868. *
  2869. * uCode download functions
  2870. *
  2871. ******************************************************************************/
  2872. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  2873. {
  2874. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  2875. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  2876. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  2877. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  2878. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  2879. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  2880. }
  2881. /**
  2882. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  2883. * looking at all data.
  2884. */
  2885. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  2886. {
  2887. u32 val;
  2888. u32 save_len = len;
  2889. int rc = 0;
  2890. u32 errcnt;
  2891. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  2892. rc = iwl_grab_nic_access(priv);
  2893. if (rc)
  2894. return rc;
  2895. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  2896. IWL39_RTC_INST_LOWER_BOUND);
  2897. errcnt = 0;
  2898. for (; len > 0; len -= sizeof(u32), image++) {
  2899. /* read data comes through single port, auto-incr addr */
  2900. /* NOTE: Use the debugless read so we don't flood kernel log
  2901. * if IWL_DL_IO is set */
  2902. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  2903. if (val != le32_to_cpu(*image)) {
  2904. IWL_ERR(priv, "uCode INST section is invalid at "
  2905. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  2906. save_len - len, val, le32_to_cpu(*image));
  2907. rc = -EIO;
  2908. errcnt++;
  2909. if (errcnt >= 20)
  2910. break;
  2911. }
  2912. }
  2913. iwl_release_nic_access(priv);
  2914. if (!errcnt)
  2915. IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
  2916. return rc;
  2917. }
  2918. /**
  2919. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  2920. * using sample data 100 bytes apart. If these sample points are good,
  2921. * it's a pretty good bet that everything between them is good, too.
  2922. */
  2923. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  2924. {
  2925. u32 val;
  2926. int rc = 0;
  2927. u32 errcnt = 0;
  2928. u32 i;
  2929. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  2930. rc = iwl_grab_nic_access(priv);
  2931. if (rc)
  2932. return rc;
  2933. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  2934. /* read data comes through single port, auto-incr addr */
  2935. /* NOTE: Use the debugless read so we don't flood kernel log
  2936. * if IWL_DL_IO is set */
  2937. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  2938. i + IWL39_RTC_INST_LOWER_BOUND);
  2939. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  2940. if (val != le32_to_cpu(*image)) {
  2941. #if 0 /* Enable this if you want to see details */
  2942. IWL_ERR(priv, "uCode INST section is invalid at "
  2943. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  2944. i, val, *image);
  2945. #endif
  2946. rc = -EIO;
  2947. errcnt++;
  2948. if (errcnt >= 3)
  2949. break;
  2950. }
  2951. }
  2952. iwl_release_nic_access(priv);
  2953. return rc;
  2954. }
  2955. /**
  2956. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  2957. * and verify its contents
  2958. */
  2959. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  2960. {
  2961. __le32 *image;
  2962. u32 len;
  2963. int rc = 0;
  2964. /* Try bootstrap */
  2965. image = (__le32 *)priv->ucode_boot.v_addr;
  2966. len = priv->ucode_boot.len;
  2967. rc = iwl3945_verify_inst_sparse(priv, image, len);
  2968. if (rc == 0) {
  2969. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  2970. return 0;
  2971. }
  2972. /* Try initialize */
  2973. image = (__le32 *)priv->ucode_init.v_addr;
  2974. len = priv->ucode_init.len;
  2975. rc = iwl3945_verify_inst_sparse(priv, image, len);
  2976. if (rc == 0) {
  2977. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  2978. return 0;
  2979. }
  2980. /* Try runtime/protocol */
  2981. image = (__le32 *)priv->ucode_code.v_addr;
  2982. len = priv->ucode_code.len;
  2983. rc = iwl3945_verify_inst_sparse(priv, image, len);
  2984. if (rc == 0) {
  2985. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  2986. return 0;
  2987. }
  2988. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  2989. /* Since nothing seems to match, show first several data entries in
  2990. * instruction SRAM, so maybe visual inspection will give a clue.
  2991. * Selection of bootstrap image (vs. other images) is arbitrary. */
  2992. image = (__le32 *)priv->ucode_boot.v_addr;
  2993. len = priv->ucode_boot.len;
  2994. rc = iwl3945_verify_inst_full(priv, image, len);
  2995. return rc;
  2996. }
  2997. static void iwl3945_nic_start(struct iwl_priv *priv)
  2998. {
  2999. /* Remove all resets to allow NIC to operate */
  3000. iwl_write32(priv, CSR_RESET, 0);
  3001. }
  3002. /**
  3003. * iwl3945_read_ucode - Read uCode images from disk file.
  3004. *
  3005. * Copy into buffers for card to fetch via bus-mastering
  3006. */
  3007. static int iwl3945_read_ucode(struct iwl_priv *priv)
  3008. {
  3009. struct iwl_ucode *ucode;
  3010. int ret = -EINVAL, index;
  3011. const struct firmware *ucode_raw;
  3012. /* firmware file name contains uCode/driver compatibility version */
  3013. const char *name_pre = priv->cfg->fw_name_pre;
  3014. const unsigned int api_max = priv->cfg->ucode_api_max;
  3015. const unsigned int api_min = priv->cfg->ucode_api_min;
  3016. char buf[25];
  3017. u8 *src;
  3018. size_t len;
  3019. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  3020. /* Ask kernel firmware_class module to get the boot firmware off disk.
  3021. * request_firmware() is synchronous, file is in memory on return. */
  3022. for (index = api_max; index >= api_min; index--) {
  3023. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  3024. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  3025. if (ret < 0) {
  3026. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  3027. buf, ret);
  3028. if (ret == -ENOENT)
  3029. continue;
  3030. else
  3031. goto error;
  3032. } else {
  3033. if (index < api_max)
  3034. IWL_ERR(priv, "Loaded firmware %s, "
  3035. "which is deprecated. "
  3036. " Please use API v%u instead.\n",
  3037. buf, api_max);
  3038. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  3039. buf, ucode_raw->size);
  3040. break;
  3041. }
  3042. }
  3043. if (ret < 0)
  3044. goto error;
  3045. /* Make sure that we got at least our header! */
  3046. if (ucode_raw->size < sizeof(*ucode)) {
  3047. IWL_ERR(priv, "File size way too small!\n");
  3048. ret = -EINVAL;
  3049. goto err_release;
  3050. }
  3051. /* Data from ucode file: header followed by uCode images */
  3052. ucode = (void *)ucode_raw->data;
  3053. priv->ucode_ver = le32_to_cpu(ucode->ver);
  3054. api_ver = IWL_UCODE_API(priv->ucode_ver);
  3055. inst_size = le32_to_cpu(ucode->inst_size);
  3056. data_size = le32_to_cpu(ucode->data_size);
  3057. init_size = le32_to_cpu(ucode->init_size);
  3058. init_data_size = le32_to_cpu(ucode->init_data_size);
  3059. boot_size = le32_to_cpu(ucode->boot_size);
  3060. /* api_ver should match the api version forming part of the
  3061. * firmware filename ... but we don't check for that and only rely
  3062. * on the API version read from firware header from here on forward */
  3063. if (api_ver < api_min || api_ver > api_max) {
  3064. IWL_ERR(priv, "Driver unable to support your firmware API. "
  3065. "Driver supports v%u, firmware is v%u.\n",
  3066. api_max, api_ver);
  3067. priv->ucode_ver = 0;
  3068. ret = -EINVAL;
  3069. goto err_release;
  3070. }
  3071. if (api_ver != api_max)
  3072. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  3073. "got %u. New firmware can be obtained "
  3074. "from http://www.intellinuxwireless.org.\n",
  3075. api_max, api_ver);
  3076. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  3077. IWL_UCODE_MAJOR(priv->ucode_ver),
  3078. IWL_UCODE_MINOR(priv->ucode_ver),
  3079. IWL_UCODE_API(priv->ucode_ver),
  3080. IWL_UCODE_SERIAL(priv->ucode_ver));
  3081. IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
  3082. priv->ucode_ver);
  3083. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  3084. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
  3085. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
  3086. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
  3087. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  3088. /* Verify size of file vs. image size info in file's header */
  3089. if (ucode_raw->size < sizeof(*ucode) +
  3090. inst_size + data_size + init_size +
  3091. init_data_size + boot_size) {
  3092. IWL_DEBUG_INFO("uCode file size %d too small\n",
  3093. (int)ucode_raw->size);
  3094. ret = -EINVAL;
  3095. goto err_release;
  3096. }
  3097. /* Verify that uCode images will fit in card's SRAM */
  3098. if (inst_size > IWL39_MAX_INST_SIZE) {
  3099. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  3100. inst_size);
  3101. ret = -EINVAL;
  3102. goto err_release;
  3103. }
  3104. if (data_size > IWL39_MAX_DATA_SIZE) {
  3105. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  3106. data_size);
  3107. ret = -EINVAL;
  3108. goto err_release;
  3109. }
  3110. if (init_size > IWL39_MAX_INST_SIZE) {
  3111. IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
  3112. init_size);
  3113. ret = -EINVAL;
  3114. goto err_release;
  3115. }
  3116. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  3117. IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
  3118. init_data_size);
  3119. ret = -EINVAL;
  3120. goto err_release;
  3121. }
  3122. if (boot_size > IWL39_MAX_BSM_SIZE) {
  3123. IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
  3124. boot_size);
  3125. ret = -EINVAL;
  3126. goto err_release;
  3127. }
  3128. /* Allocate ucode buffers for card's bus-master loading ... */
  3129. /* Runtime instructions and 2 copies of data:
  3130. * 1) unmodified from disk
  3131. * 2) backup cache for save/restore during power-downs */
  3132. priv->ucode_code.len = inst_size;
  3133. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  3134. priv->ucode_data.len = data_size;
  3135. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  3136. priv->ucode_data_backup.len = data_size;
  3137. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3138. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  3139. !priv->ucode_data_backup.v_addr)
  3140. goto err_pci_alloc;
  3141. /* Initialization instructions and data */
  3142. if (init_size && init_data_size) {
  3143. priv->ucode_init.len = init_size;
  3144. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  3145. priv->ucode_init_data.len = init_data_size;
  3146. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3147. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  3148. goto err_pci_alloc;
  3149. }
  3150. /* Bootstrap (instructions only, no data) */
  3151. if (boot_size) {
  3152. priv->ucode_boot.len = boot_size;
  3153. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3154. if (!priv->ucode_boot.v_addr)
  3155. goto err_pci_alloc;
  3156. }
  3157. /* Copy images into buffers for card's bus-master reads ... */
  3158. /* Runtime instructions (first block of data in file) */
  3159. src = &ucode->data[0];
  3160. len = priv->ucode_code.len;
  3161. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  3162. memcpy(priv->ucode_code.v_addr, src, len);
  3163. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  3164. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  3165. /* Runtime data (2nd block)
  3166. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  3167. src = &ucode->data[inst_size];
  3168. len = priv->ucode_data.len;
  3169. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  3170. memcpy(priv->ucode_data.v_addr, src, len);
  3171. memcpy(priv->ucode_data_backup.v_addr, src, len);
  3172. /* Initialization instructions (3rd block) */
  3173. if (init_size) {
  3174. src = &ucode->data[inst_size + data_size];
  3175. len = priv->ucode_init.len;
  3176. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  3177. len);
  3178. memcpy(priv->ucode_init.v_addr, src, len);
  3179. }
  3180. /* Initialization data (4th block) */
  3181. if (init_data_size) {
  3182. src = &ucode->data[inst_size + data_size + init_size];
  3183. len = priv->ucode_init_data.len;
  3184. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  3185. (int)len);
  3186. memcpy(priv->ucode_init_data.v_addr, src, len);
  3187. }
  3188. /* Bootstrap instructions (5th block) */
  3189. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  3190. len = priv->ucode_boot.len;
  3191. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  3192. (int)len);
  3193. memcpy(priv->ucode_boot.v_addr, src, len);
  3194. /* We have our copies now, allow OS release its copies */
  3195. release_firmware(ucode_raw);
  3196. return 0;
  3197. err_pci_alloc:
  3198. IWL_ERR(priv, "failed to allocate pci memory\n");
  3199. ret = -ENOMEM;
  3200. iwl3945_dealloc_ucode_pci(priv);
  3201. err_release:
  3202. release_firmware(ucode_raw);
  3203. error:
  3204. return ret;
  3205. }
  3206. /**
  3207. * iwl3945_set_ucode_ptrs - Set uCode address location
  3208. *
  3209. * Tell initialization uCode where to find runtime uCode.
  3210. *
  3211. * BSM registers initially contain pointers to initialization uCode.
  3212. * We need to replace them to load runtime uCode inst and data,
  3213. * and to save runtime data when powering down.
  3214. */
  3215. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  3216. {
  3217. dma_addr_t pinst;
  3218. dma_addr_t pdata;
  3219. int rc = 0;
  3220. unsigned long flags;
  3221. /* bits 31:0 for 3945 */
  3222. pinst = priv->ucode_code.p_addr;
  3223. pdata = priv->ucode_data_backup.p_addr;
  3224. spin_lock_irqsave(&priv->lock, flags);
  3225. rc = iwl_grab_nic_access(priv);
  3226. if (rc) {
  3227. spin_unlock_irqrestore(&priv->lock, flags);
  3228. return rc;
  3229. }
  3230. /* Tell bootstrap uCode where to find image to load */
  3231. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  3232. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  3233. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  3234. priv->ucode_data.len);
  3235. /* Inst byte count must be last to set up, bit 31 signals uCode
  3236. * that all new ptr/size info is in place */
  3237. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  3238. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  3239. iwl_release_nic_access(priv);
  3240. spin_unlock_irqrestore(&priv->lock, flags);
  3241. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  3242. return rc;
  3243. }
  3244. /**
  3245. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  3246. *
  3247. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  3248. *
  3249. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  3250. */
  3251. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  3252. {
  3253. /* Check alive response for "valid" sign from uCode */
  3254. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  3255. /* We had an error bringing up the hardware, so take it
  3256. * all the way back down so we can try again */
  3257. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  3258. goto restart;
  3259. }
  3260. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  3261. * This is a paranoid check, because we would not have gotten the
  3262. * "initialize" alive if code weren't properly loaded. */
  3263. if (iwl3945_verify_ucode(priv)) {
  3264. /* Runtime instruction load was bad;
  3265. * take it all the way back down so we can try again */
  3266. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  3267. goto restart;
  3268. }
  3269. /* Send pointers to protocol/runtime uCode image ... init code will
  3270. * load and launch runtime uCode, which will send us another "Alive"
  3271. * notification. */
  3272. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3273. if (iwl3945_set_ucode_ptrs(priv)) {
  3274. /* Runtime instruction load won't happen;
  3275. * take it all the way back down so we can try again */
  3276. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  3277. goto restart;
  3278. }
  3279. return;
  3280. restart:
  3281. queue_work(priv->workqueue, &priv->restart);
  3282. }
  3283. /* temporary */
  3284. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
  3285. struct sk_buff *skb);
  3286. /**
  3287. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  3288. * from protocol/runtime uCode (initialization uCode's
  3289. * Alive gets handled by iwl3945_init_alive_start()).
  3290. */
  3291. static void iwl3945_alive_start(struct iwl_priv *priv)
  3292. {
  3293. int rc = 0;
  3294. int thermal_spin = 0;
  3295. u32 rfkill;
  3296. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3297. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  3298. /* We had an error bringing up the hardware, so take it
  3299. * all the way back down so we can try again */
  3300. IWL_DEBUG_INFO("Alive failed.\n");
  3301. goto restart;
  3302. }
  3303. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  3304. * This is a paranoid check, because we would not have gotten the
  3305. * "runtime" alive if code weren't properly loaded. */
  3306. if (iwl3945_verify_ucode(priv)) {
  3307. /* Runtime instruction load was bad;
  3308. * take it all the way back down so we can try again */
  3309. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  3310. goto restart;
  3311. }
  3312. iwl3945_clear_stations_table(priv);
  3313. rc = iwl_grab_nic_access(priv);
  3314. if (rc) {
  3315. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  3316. return;
  3317. }
  3318. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  3319. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  3320. iwl_release_nic_access(priv);
  3321. if (rfkill & 0x1) {
  3322. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3323. /* if RFKILL is not on, then wait for thermal
  3324. * sensor in adapter to kick in */
  3325. while (iwl3945_hw_get_temperature(priv) == 0) {
  3326. thermal_spin++;
  3327. udelay(10);
  3328. }
  3329. if (thermal_spin)
  3330. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  3331. thermal_spin * 10);
  3332. } else
  3333. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3334. /* After the ALIVE response, we can send commands to 3945 uCode */
  3335. set_bit(STATUS_ALIVE, &priv->status);
  3336. /* Clear out the uCode error bit if it is set */
  3337. clear_bit(STATUS_FW_ERROR, &priv->status);
  3338. if (iwl_is_rfkill(priv))
  3339. return;
  3340. ieee80211_wake_queues(priv->hw);
  3341. priv->active_rate = priv->rates_mask;
  3342. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  3343. iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  3344. if (iwl3945_is_associated(priv)) {
  3345. struct iwl3945_rxon_cmd *active_rxon =
  3346. (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
  3347. memcpy(&priv->staging39_rxon, &priv->active39_rxon,
  3348. sizeof(priv->staging39_rxon));
  3349. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3350. } else {
  3351. /* Initialize our rx_config data */
  3352. iwl3945_connection_init_rx_config(priv, priv->iw_mode);
  3353. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  3354. }
  3355. /* Configure Bluetooth device coexistence support */
  3356. iwl3945_send_bt_config(priv);
  3357. /* Configure the adapter for unassociated operation */
  3358. iwl3945_commit_rxon(priv);
  3359. iwl3945_reg_txpower_periodic(priv);
  3360. iwl3945_led_register(priv);
  3361. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  3362. set_bit(STATUS_READY, &priv->status);
  3363. wake_up_interruptible(&priv->wait_command_queue);
  3364. if (priv->error_recovering)
  3365. iwl3945_error_recovery(priv);
  3366. /* reassociate for ADHOC mode */
  3367. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  3368. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  3369. priv->vif);
  3370. if (beacon)
  3371. iwl3945_mac_beacon_update(priv->hw, beacon);
  3372. }
  3373. return;
  3374. restart:
  3375. queue_work(priv->workqueue, &priv->restart);
  3376. }
  3377. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  3378. static void __iwl3945_down(struct iwl_priv *priv)
  3379. {
  3380. unsigned long flags;
  3381. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  3382. struct ieee80211_conf *conf = NULL;
  3383. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  3384. conf = ieee80211_get_hw_conf(priv->hw);
  3385. if (!exit_pending)
  3386. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3387. iwl3945_led_unregister(priv);
  3388. iwl3945_clear_stations_table(priv);
  3389. /* Unblock any waiting calls */
  3390. wake_up_interruptible_all(&priv->wait_command_queue);
  3391. /* Wipe out the EXIT_PENDING status bit if we are not actually
  3392. * exiting the module */
  3393. if (!exit_pending)
  3394. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  3395. /* stop and reset the on-board processor */
  3396. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3397. /* tell the device to stop sending interrupts */
  3398. spin_lock_irqsave(&priv->lock, flags);
  3399. iwl3945_disable_interrupts(priv);
  3400. spin_unlock_irqrestore(&priv->lock, flags);
  3401. iwl_synchronize_irq(priv);
  3402. if (priv->mac80211_registered)
  3403. ieee80211_stop_queues(priv->hw);
  3404. /* If we have not previously called iwl3945_init() then
  3405. * clear all bits but the RF Kill and SUSPEND bits and return */
  3406. if (!iwl_is_init(priv)) {
  3407. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  3408. STATUS_RF_KILL_HW |
  3409. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  3410. STATUS_RF_KILL_SW |
  3411. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  3412. STATUS_GEO_CONFIGURED |
  3413. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  3414. STATUS_IN_SUSPEND |
  3415. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  3416. STATUS_EXIT_PENDING;
  3417. goto exit;
  3418. }
  3419. /* ...otherwise clear out all the status bits but the RF Kill and
  3420. * SUSPEND bits and continue taking the NIC down. */
  3421. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  3422. STATUS_RF_KILL_HW |
  3423. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  3424. STATUS_RF_KILL_SW |
  3425. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  3426. STATUS_GEO_CONFIGURED |
  3427. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  3428. STATUS_IN_SUSPEND |
  3429. test_bit(STATUS_FW_ERROR, &priv->status) <<
  3430. STATUS_FW_ERROR |
  3431. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  3432. STATUS_EXIT_PENDING;
  3433. priv->cfg->ops->lib->apm_ops.reset(priv);
  3434. spin_lock_irqsave(&priv->lock, flags);
  3435. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3436. spin_unlock_irqrestore(&priv->lock, flags);
  3437. iwl3945_hw_txq_ctx_stop(priv);
  3438. iwl3945_hw_rxq_stop(priv);
  3439. spin_lock_irqsave(&priv->lock, flags);
  3440. if (!iwl_grab_nic_access(priv)) {
  3441. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  3442. APMG_CLK_VAL_DMA_CLK_RQT);
  3443. iwl_release_nic_access(priv);
  3444. }
  3445. spin_unlock_irqrestore(&priv->lock, flags);
  3446. udelay(5);
  3447. if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
  3448. priv->cfg->ops->lib->apm_ops.stop(priv);
  3449. else
  3450. priv->cfg->ops->lib->apm_ops.reset(priv);
  3451. exit:
  3452. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  3453. if (priv->ibss_beacon)
  3454. dev_kfree_skb(priv->ibss_beacon);
  3455. priv->ibss_beacon = NULL;
  3456. /* clear out any free frames */
  3457. iwl3945_clear_free_frames(priv);
  3458. }
  3459. static void iwl3945_down(struct iwl_priv *priv)
  3460. {
  3461. mutex_lock(&priv->mutex);
  3462. __iwl3945_down(priv);
  3463. mutex_unlock(&priv->mutex);
  3464. iwl3945_cancel_deferred_work(priv);
  3465. }
  3466. #define MAX_HW_RESTARTS 5
  3467. static int __iwl3945_up(struct iwl_priv *priv)
  3468. {
  3469. int rc, i;
  3470. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3471. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  3472. return -EIO;
  3473. }
  3474. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  3475. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  3476. "parameter)\n");
  3477. return -ENODEV;
  3478. }
  3479. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  3480. IWL_ERR(priv, "ucode not available for device bring up\n");
  3481. return -EIO;
  3482. }
  3483. /* If platform's RF_KILL switch is NOT set to KILL */
  3484. if (iwl_read32(priv, CSR_GP_CNTRL) &
  3485. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  3486. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3487. else {
  3488. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3489. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  3490. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  3491. return -ENODEV;
  3492. }
  3493. }
  3494. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  3495. rc = iwl3945_hw_nic_init(priv);
  3496. if (rc) {
  3497. IWL_ERR(priv, "Unable to int nic\n");
  3498. return rc;
  3499. }
  3500. /* make sure rfkill handshake bits are cleared */
  3501. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  3502. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3503. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3504. /* clear (again), then enable host interrupts */
  3505. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  3506. iwl3945_enable_interrupts(priv);
  3507. /* really make sure rfkill handshake bits are cleared */
  3508. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  3509. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  3510. /* Copy original ucode data image from disk into backup cache.
  3511. * This will be used to initialize the on-board processor's
  3512. * data SRAM for a clean start when the runtime program first loads. */
  3513. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  3514. priv->ucode_data.len);
  3515. /* We return success when we resume from suspend and rf_kill is on. */
  3516. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  3517. return 0;
  3518. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  3519. iwl3945_clear_stations_table(priv);
  3520. /* load bootstrap state machine,
  3521. * load bootstrap program into processor's memory,
  3522. * prepare to load the "initialize" uCode */
  3523. priv->cfg->ops->lib->load_ucode(priv);
  3524. if (rc) {
  3525. IWL_ERR(priv,
  3526. "Unable to set up bootstrap uCode: %d\n", rc);
  3527. continue;
  3528. }
  3529. /* start card; "initialize" will load runtime ucode */
  3530. iwl3945_nic_start(priv);
  3531. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  3532. return 0;
  3533. }
  3534. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3535. __iwl3945_down(priv);
  3536. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  3537. /* tried to restart and config the device for as long as our
  3538. * patience could withstand */
  3539. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  3540. return -EIO;
  3541. }
  3542. /*****************************************************************************
  3543. *
  3544. * Workqueue callbacks
  3545. *
  3546. *****************************************************************************/
  3547. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  3548. {
  3549. struct iwl_priv *priv =
  3550. container_of(data, struct iwl_priv, init_alive_start.work);
  3551. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3552. return;
  3553. mutex_lock(&priv->mutex);
  3554. iwl3945_init_alive_start(priv);
  3555. mutex_unlock(&priv->mutex);
  3556. }
  3557. static void iwl3945_bg_alive_start(struct work_struct *data)
  3558. {
  3559. struct iwl_priv *priv =
  3560. container_of(data, struct iwl_priv, alive_start.work);
  3561. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3562. return;
  3563. mutex_lock(&priv->mutex);
  3564. iwl3945_alive_start(priv);
  3565. mutex_unlock(&priv->mutex);
  3566. }
  3567. static void iwl3945_rfkill_poll(struct work_struct *data)
  3568. {
  3569. struct iwl_priv *priv =
  3570. container_of(data, struct iwl_priv, rfkill_poll.work);
  3571. unsigned long status = priv->status;
  3572. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  3573. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3574. else
  3575. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3576. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  3577. queue_work(priv->workqueue, &priv->rf_kill);
  3578. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3579. round_jiffies_relative(2 * HZ));
  3580. }
  3581. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  3582. static void iwl3945_bg_request_scan(struct work_struct *data)
  3583. {
  3584. struct iwl_priv *priv =
  3585. container_of(data, struct iwl_priv, request_scan);
  3586. struct iwl_host_cmd cmd = {
  3587. .id = REPLY_SCAN_CMD,
  3588. .len = sizeof(struct iwl3945_scan_cmd),
  3589. .meta.flags = CMD_SIZE_HUGE,
  3590. };
  3591. int rc = 0;
  3592. struct iwl3945_scan_cmd *scan;
  3593. struct ieee80211_conf *conf = NULL;
  3594. u8 n_probes = 2;
  3595. enum ieee80211_band band;
  3596. DECLARE_SSID_BUF(ssid);
  3597. conf = ieee80211_get_hw_conf(priv->hw);
  3598. mutex_lock(&priv->mutex);
  3599. if (!iwl_is_ready(priv)) {
  3600. IWL_WARN(priv, "request scan called when driver not ready.\n");
  3601. goto done;
  3602. }
  3603. /* Make sure the scan wasn't canceled before this queued work
  3604. * was given the chance to run... */
  3605. if (!test_bit(STATUS_SCANNING, &priv->status))
  3606. goto done;
  3607. /* This should never be called or scheduled if there is currently
  3608. * a scan active in the hardware. */
  3609. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  3610. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  3611. "Ignoring second request.\n");
  3612. rc = -EIO;
  3613. goto done;
  3614. }
  3615. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3616. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  3617. goto done;
  3618. }
  3619. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3620. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  3621. goto done;
  3622. }
  3623. if (iwl_is_rfkill(priv)) {
  3624. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  3625. goto done;
  3626. }
  3627. if (!test_bit(STATUS_READY, &priv->status)) {
  3628. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  3629. goto done;
  3630. }
  3631. if (!priv->scan_bands) {
  3632. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  3633. goto done;
  3634. }
  3635. if (!priv->scan) {
  3636. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  3637. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  3638. if (!priv->scan) {
  3639. rc = -ENOMEM;
  3640. goto done;
  3641. }
  3642. }
  3643. scan = priv->scan;
  3644. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  3645. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  3646. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  3647. if (iwl3945_is_associated(priv)) {
  3648. u16 interval = 0;
  3649. u32 extra;
  3650. u32 suspend_time = 100;
  3651. u32 scan_suspend_time = 100;
  3652. unsigned long flags;
  3653. IWL_DEBUG_INFO("Scanning while associated...\n");
  3654. spin_lock_irqsave(&priv->lock, flags);
  3655. interval = priv->beacon_int;
  3656. spin_unlock_irqrestore(&priv->lock, flags);
  3657. scan->suspend_time = 0;
  3658. scan->max_out_time = cpu_to_le32(200 * 1024);
  3659. if (!interval)
  3660. interval = suspend_time;
  3661. /*
  3662. * suspend time format:
  3663. * 0-19: beacon interval in usec (time before exec.)
  3664. * 20-23: 0
  3665. * 24-31: number of beacons (suspend between channels)
  3666. */
  3667. extra = (suspend_time / interval) << 24;
  3668. scan_suspend_time = 0xFF0FFFFF &
  3669. (extra | ((suspend_time % interval) * 1024));
  3670. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  3671. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  3672. scan_suspend_time, interval);
  3673. }
  3674. /* We should add the ability for user to lock to PASSIVE ONLY */
  3675. if (priv->one_direct_scan) {
  3676. IWL_DEBUG_SCAN
  3677. ("Kicking off one direct scan for '%s'\n",
  3678. print_ssid(ssid, priv->direct_ssid,
  3679. priv->direct_ssid_len));
  3680. scan->direct_scan[0].id = WLAN_EID_SSID;
  3681. scan->direct_scan[0].len = priv->direct_ssid_len;
  3682. memcpy(scan->direct_scan[0].ssid,
  3683. priv->direct_ssid, priv->direct_ssid_len);
  3684. n_probes++;
  3685. } else
  3686. IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
  3687. /* We don't build a direct scan probe request; the uCode will do
  3688. * that based on the direct_mask added to each channel entry */
  3689. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  3690. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  3691. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  3692. /* flags + rate selection */
  3693. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  3694. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  3695. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  3696. scan->good_CRC_th = 0;
  3697. band = IEEE80211_BAND_2GHZ;
  3698. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  3699. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  3700. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  3701. band = IEEE80211_BAND_5GHZ;
  3702. } else {
  3703. IWL_WARN(priv, "Invalid scan band count\n");
  3704. goto done;
  3705. }
  3706. scan->tx_cmd.len = cpu_to_le16(
  3707. iwl_fill_probe_req(priv, band,
  3708. (struct ieee80211_mgmt *)scan->data,
  3709. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  3710. /* select Rx antennas */
  3711. scan->flags |= iwl3945_get_antenna_flags(priv);
  3712. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  3713. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  3714. scan->channel_count =
  3715. iwl3945_get_channels_for_scan(priv, band, 1, /* active */
  3716. n_probes,
  3717. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  3718. if (scan->channel_count == 0) {
  3719. IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
  3720. goto done;
  3721. }
  3722. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  3723. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  3724. cmd.data = scan;
  3725. scan->len = cpu_to_le16(cmd.len);
  3726. set_bit(STATUS_SCAN_HW, &priv->status);
  3727. rc = iwl_send_cmd_sync(priv, &cmd);
  3728. if (rc)
  3729. goto done;
  3730. queue_delayed_work(priv->workqueue, &priv->scan_check,
  3731. IWL_SCAN_CHECK_WATCHDOG);
  3732. mutex_unlock(&priv->mutex);
  3733. return;
  3734. done:
  3735. /* can not perform scan make sure we clear scanning
  3736. * bits from status so next scan request can be performed.
  3737. * if we dont clear scanning status bit here all next scan
  3738. * will fail
  3739. */
  3740. clear_bit(STATUS_SCAN_HW, &priv->status);
  3741. clear_bit(STATUS_SCANNING, &priv->status);
  3742. /* inform mac80211 scan aborted */
  3743. queue_work(priv->workqueue, &priv->scan_completed);
  3744. mutex_unlock(&priv->mutex);
  3745. }
  3746. static void iwl3945_bg_up(struct work_struct *data)
  3747. {
  3748. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  3749. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3750. return;
  3751. mutex_lock(&priv->mutex);
  3752. __iwl3945_up(priv);
  3753. mutex_unlock(&priv->mutex);
  3754. iwl_rfkill_set_hw_state(priv);
  3755. }
  3756. static void iwl3945_bg_restart(struct work_struct *data)
  3757. {
  3758. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  3759. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3760. return;
  3761. iwl3945_down(priv);
  3762. queue_work(priv->workqueue, &priv->up);
  3763. }
  3764. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  3765. {
  3766. struct iwl_priv *priv =
  3767. container_of(data, struct iwl_priv, rx_replenish);
  3768. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3769. return;
  3770. mutex_lock(&priv->mutex);
  3771. iwl3945_rx_replenish(priv);
  3772. mutex_unlock(&priv->mutex);
  3773. }
  3774. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  3775. static void iwl3945_post_associate(struct iwl_priv *priv)
  3776. {
  3777. int rc = 0;
  3778. struct ieee80211_conf *conf = NULL;
  3779. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  3780. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  3781. return;
  3782. }
  3783. IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
  3784. priv->assoc_id, priv->active39_rxon.bssid_addr);
  3785. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3786. return;
  3787. if (!priv->vif || !priv->is_open)
  3788. return;
  3789. iwl_scan_cancel_timeout(priv, 200);
  3790. conf = ieee80211_get_hw_conf(priv->hw);
  3791. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3792. iwl3945_commit_rxon(priv);
  3793. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  3794. iwl3945_setup_rxon_timing(priv);
  3795. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  3796. sizeof(priv->rxon_timing), &priv->rxon_timing);
  3797. if (rc)
  3798. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  3799. "Attempting to continue.\n");
  3800. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  3801. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  3802. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  3803. priv->assoc_id, priv->beacon_int);
  3804. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  3805. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3806. else
  3807. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3808. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  3809. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  3810. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3811. else
  3812. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3813. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  3814. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3815. }
  3816. iwl3945_commit_rxon(priv);
  3817. switch (priv->iw_mode) {
  3818. case NL80211_IFTYPE_STATION:
  3819. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  3820. break;
  3821. case NL80211_IFTYPE_ADHOC:
  3822. priv->assoc_id = 1;
  3823. iwl3945_add_station(priv, priv->bssid, 0, 0);
  3824. iwl3945_sync_sta(priv, IWL_STA_ID,
  3825. (priv->band == IEEE80211_BAND_5GHZ) ?
  3826. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  3827. CMD_ASYNC);
  3828. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  3829. iwl3945_send_beacon_cmd(priv);
  3830. break;
  3831. default:
  3832. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  3833. __func__, priv->iw_mode);
  3834. break;
  3835. }
  3836. iwl3945_activate_qos(priv, 0);
  3837. /* we have just associated, don't start scan too early */
  3838. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  3839. }
  3840. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
  3841. /*****************************************************************************
  3842. *
  3843. * mac80211 entry point functions
  3844. *
  3845. *****************************************************************************/
  3846. #define UCODE_READY_TIMEOUT (2 * HZ)
  3847. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  3848. {
  3849. struct iwl_priv *priv = hw->priv;
  3850. int ret;
  3851. IWL_DEBUG_MAC80211("enter\n");
  3852. /* we should be verifying the device is ready to be opened */
  3853. mutex_lock(&priv->mutex);
  3854. memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
  3855. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  3856. * ucode filename and max sizes are card-specific. */
  3857. if (!priv->ucode_code.len) {
  3858. ret = iwl3945_read_ucode(priv);
  3859. if (ret) {
  3860. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  3861. mutex_unlock(&priv->mutex);
  3862. goto out_release_irq;
  3863. }
  3864. }
  3865. ret = __iwl3945_up(priv);
  3866. mutex_unlock(&priv->mutex);
  3867. iwl_rfkill_set_hw_state(priv);
  3868. if (ret)
  3869. goto out_release_irq;
  3870. IWL_DEBUG_INFO("Start UP work.\n");
  3871. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  3872. return 0;
  3873. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  3874. * mac80211 will not be run successfully. */
  3875. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  3876. test_bit(STATUS_READY, &priv->status),
  3877. UCODE_READY_TIMEOUT);
  3878. if (!ret) {
  3879. if (!test_bit(STATUS_READY, &priv->status)) {
  3880. IWL_ERR(priv,
  3881. "Wait for START_ALIVE timeout after %dms.\n",
  3882. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  3883. ret = -ETIMEDOUT;
  3884. goto out_release_irq;
  3885. }
  3886. }
  3887. /* ucode is running and will send rfkill notifications,
  3888. * no need to poll the killswitch state anymore */
  3889. cancel_delayed_work(&priv->rfkill_poll);
  3890. priv->is_open = 1;
  3891. IWL_DEBUG_MAC80211("leave\n");
  3892. return 0;
  3893. out_release_irq:
  3894. priv->is_open = 0;
  3895. IWL_DEBUG_MAC80211("leave - failed\n");
  3896. return ret;
  3897. }
  3898. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  3899. {
  3900. struct iwl_priv *priv = hw->priv;
  3901. IWL_DEBUG_MAC80211("enter\n");
  3902. if (!priv->is_open) {
  3903. IWL_DEBUG_MAC80211("leave - skip\n");
  3904. return;
  3905. }
  3906. priv->is_open = 0;
  3907. if (iwl_is_ready_rf(priv)) {
  3908. /* stop mac, cancel any scan request and clear
  3909. * RXON_FILTER_ASSOC_MSK BIT
  3910. */
  3911. mutex_lock(&priv->mutex);
  3912. iwl_scan_cancel_timeout(priv, 100);
  3913. mutex_unlock(&priv->mutex);
  3914. }
  3915. iwl3945_down(priv);
  3916. flush_workqueue(priv->workqueue);
  3917. /* start polling the killswitch state again */
  3918. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3919. round_jiffies_relative(2 * HZ));
  3920. IWL_DEBUG_MAC80211("leave\n");
  3921. }
  3922. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  3923. {
  3924. struct iwl_priv *priv = hw->priv;
  3925. IWL_DEBUG_MAC80211("enter\n");
  3926. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  3927. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  3928. if (iwl3945_tx_skb(priv, skb))
  3929. dev_kfree_skb_any(skb);
  3930. IWL_DEBUG_MAC80211("leave\n");
  3931. return NETDEV_TX_OK;
  3932. }
  3933. static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
  3934. struct ieee80211_if_init_conf *conf)
  3935. {
  3936. struct iwl_priv *priv = hw->priv;
  3937. unsigned long flags;
  3938. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  3939. if (priv->vif) {
  3940. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  3941. return -EOPNOTSUPP;
  3942. }
  3943. spin_lock_irqsave(&priv->lock, flags);
  3944. priv->vif = conf->vif;
  3945. priv->iw_mode = conf->type;
  3946. spin_unlock_irqrestore(&priv->lock, flags);
  3947. mutex_lock(&priv->mutex);
  3948. if (conf->mac_addr) {
  3949. IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
  3950. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  3951. }
  3952. if (iwl_is_ready(priv))
  3953. iwl3945_set_mode(priv, conf->type);
  3954. mutex_unlock(&priv->mutex);
  3955. IWL_DEBUG_MAC80211("leave\n");
  3956. return 0;
  3957. }
  3958. /**
  3959. * iwl3945_mac_config - mac80211 config callback
  3960. *
  3961. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  3962. * be set inappropriately and the driver currently sets the hardware up to
  3963. * use it whenever needed.
  3964. */
  3965. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
  3966. {
  3967. struct iwl_priv *priv = hw->priv;
  3968. const struct iwl_channel_info *ch_info;
  3969. struct ieee80211_conf *conf = &hw->conf;
  3970. unsigned long flags;
  3971. int ret = 0;
  3972. mutex_lock(&priv->mutex);
  3973. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  3974. if (!iwl_is_ready(priv)) {
  3975. IWL_DEBUG_MAC80211("leave - not ready\n");
  3976. ret = -EIO;
  3977. goto out;
  3978. }
  3979. if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
  3980. test_bit(STATUS_SCANNING, &priv->status))) {
  3981. IWL_DEBUG_MAC80211("leave - scanning\n");
  3982. set_bit(STATUS_CONF_PENDING, &priv->status);
  3983. mutex_unlock(&priv->mutex);
  3984. return 0;
  3985. }
  3986. spin_lock_irqsave(&priv->lock, flags);
  3987. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  3988. conf->channel->hw_value);
  3989. if (!is_channel_valid(ch_info)) {
  3990. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
  3991. conf->channel->hw_value, conf->channel->band);
  3992. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  3993. spin_unlock_irqrestore(&priv->lock, flags);
  3994. ret = -EINVAL;
  3995. goto out;
  3996. }
  3997. iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
  3998. iwl3945_set_flags_for_phymode(priv, conf->channel->band);
  3999. /* The list of supported rates and rate mask can be different
  4000. * for each phymode; since the phymode may have changed, reset
  4001. * the rate mask to what mac80211 lists */
  4002. iwl3945_set_rate(priv);
  4003. spin_unlock_irqrestore(&priv->lock, flags);
  4004. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  4005. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  4006. iwl3945_hw_channel_switch(priv, conf->channel);
  4007. goto out;
  4008. }
  4009. #endif
  4010. iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
  4011. if (!conf->radio_enabled) {
  4012. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  4013. goto out;
  4014. }
  4015. if (iwl_is_rfkill(priv)) {
  4016. IWL_DEBUG_MAC80211("leave - RF kill\n");
  4017. ret = -EIO;
  4018. goto out;
  4019. }
  4020. iwl3945_set_rate(priv);
  4021. if (memcmp(&priv->active39_rxon,
  4022. &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
  4023. iwl3945_commit_rxon(priv);
  4024. else
  4025. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  4026. IWL_DEBUG_MAC80211("leave\n");
  4027. out:
  4028. clear_bit(STATUS_CONF_PENDING, &priv->status);
  4029. mutex_unlock(&priv->mutex);
  4030. return ret;
  4031. }
  4032. static void iwl3945_config_ap(struct iwl_priv *priv)
  4033. {
  4034. int rc = 0;
  4035. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4036. return;
  4037. /* The following should be done only at AP bring up */
  4038. if (!(iwl3945_is_associated(priv))) {
  4039. /* RXON - unassoc (to set timing command) */
  4040. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4041. iwl3945_commit_rxon(priv);
  4042. /* RXON Timing */
  4043. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4044. iwl3945_setup_rxon_timing(priv);
  4045. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4046. sizeof(priv->rxon_timing),
  4047. &priv->rxon_timing);
  4048. if (rc)
  4049. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4050. "Attempting to continue.\n");
  4051. /* FIXME: what should be the assoc_id for AP? */
  4052. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4053. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4054. priv->staging39_rxon.flags |=
  4055. RXON_FLG_SHORT_PREAMBLE_MSK;
  4056. else
  4057. priv->staging39_rxon.flags &=
  4058. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4059. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4060. if (priv->assoc_capability &
  4061. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4062. priv->staging39_rxon.flags |=
  4063. RXON_FLG_SHORT_SLOT_MSK;
  4064. else
  4065. priv->staging39_rxon.flags &=
  4066. ~RXON_FLG_SHORT_SLOT_MSK;
  4067. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4068. priv->staging39_rxon.flags &=
  4069. ~RXON_FLG_SHORT_SLOT_MSK;
  4070. }
  4071. /* restore RXON assoc */
  4072. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4073. iwl3945_commit_rxon(priv);
  4074. iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
  4075. }
  4076. iwl3945_send_beacon_cmd(priv);
  4077. /* FIXME - we need to add code here to detect a totally new
  4078. * configuration, reset the AP, unassoc, rxon timing, assoc,
  4079. * clear sta table, add BCAST sta... */
  4080. }
  4081. static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
  4082. struct ieee80211_vif *vif,
  4083. struct ieee80211_if_conf *conf)
  4084. {
  4085. struct iwl_priv *priv = hw->priv;
  4086. int rc;
  4087. if (conf == NULL)
  4088. return -EIO;
  4089. if (priv->vif != vif) {
  4090. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  4091. return 0;
  4092. }
  4093. /* handle this temporarily here */
  4094. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  4095. conf->changed & IEEE80211_IFCC_BEACON) {
  4096. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  4097. if (!beacon)
  4098. return -ENOMEM;
  4099. mutex_lock(&priv->mutex);
  4100. rc = iwl3945_mac_beacon_update(hw, beacon);
  4101. mutex_unlock(&priv->mutex);
  4102. if (rc)
  4103. return rc;
  4104. }
  4105. if (!iwl_is_alive(priv))
  4106. return -EAGAIN;
  4107. mutex_lock(&priv->mutex);
  4108. if (conf->bssid)
  4109. IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
  4110. /*
  4111. * very dubious code was here; the probe filtering flag is never set:
  4112. *
  4113. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  4114. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  4115. */
  4116. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4117. if (!conf->bssid) {
  4118. conf->bssid = priv->mac_addr;
  4119. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  4120. IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
  4121. conf->bssid);
  4122. }
  4123. if (priv->ibss_beacon)
  4124. dev_kfree_skb(priv->ibss_beacon);
  4125. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  4126. }
  4127. if (iwl_is_rfkill(priv))
  4128. goto done;
  4129. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  4130. !is_multicast_ether_addr(conf->bssid)) {
  4131. /* If there is currently a HW scan going on in the background
  4132. * then we need to cancel it else the RXON below will fail. */
  4133. if (iwl_scan_cancel_timeout(priv, 100)) {
  4134. IWL_WARN(priv, "Aborted scan still in progress "
  4135. "after 100ms\n");
  4136. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  4137. mutex_unlock(&priv->mutex);
  4138. return -EAGAIN;
  4139. }
  4140. memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  4141. /* TODO: Audit driver for usage of these members and see
  4142. * if mac80211 deprecates them (priv->bssid looks like it
  4143. * shouldn't be there, but I haven't scanned the IBSS code
  4144. * to verify) - jpk */
  4145. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  4146. if (priv->iw_mode == NL80211_IFTYPE_AP)
  4147. iwl3945_config_ap(priv);
  4148. else {
  4149. rc = iwl3945_commit_rxon(priv);
  4150. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  4151. iwl3945_add_station(priv,
  4152. priv->active39_rxon.bssid_addr, 1, 0);
  4153. }
  4154. } else {
  4155. iwl_scan_cancel_timeout(priv, 100);
  4156. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4157. iwl3945_commit_rxon(priv);
  4158. }
  4159. done:
  4160. IWL_DEBUG_MAC80211("leave\n");
  4161. mutex_unlock(&priv->mutex);
  4162. return 0;
  4163. }
  4164. static void iwl3945_configure_filter(struct ieee80211_hw *hw,
  4165. unsigned int changed_flags,
  4166. unsigned int *total_flags,
  4167. int mc_count, struct dev_addr_list *mc_list)
  4168. {
  4169. struct iwl_priv *priv = hw->priv;
  4170. __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
  4171. IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
  4172. changed_flags, *total_flags);
  4173. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  4174. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  4175. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  4176. else
  4177. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  4178. }
  4179. if (changed_flags & FIF_ALLMULTI) {
  4180. if (*total_flags & FIF_ALLMULTI)
  4181. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  4182. else
  4183. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  4184. }
  4185. if (changed_flags & FIF_CONTROL) {
  4186. if (*total_flags & FIF_CONTROL)
  4187. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  4188. else
  4189. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  4190. }
  4191. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  4192. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  4193. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  4194. else
  4195. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  4196. }
  4197. /* We avoid iwl_commit_rxon here to commit the new filter flags
  4198. * since mac80211 will call ieee80211_hw_config immediately.
  4199. * (mc_list is not supported at this time). Otherwise, we need to
  4200. * queue a background iwl_commit_rxon work.
  4201. */
  4202. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  4203. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  4204. }
  4205. static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
  4206. struct ieee80211_if_init_conf *conf)
  4207. {
  4208. struct iwl_priv *priv = hw->priv;
  4209. IWL_DEBUG_MAC80211("enter\n");
  4210. mutex_lock(&priv->mutex);
  4211. if (iwl_is_ready_rf(priv)) {
  4212. iwl_scan_cancel_timeout(priv, 100);
  4213. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4214. iwl3945_commit_rxon(priv);
  4215. }
  4216. if (priv->vif == conf->vif) {
  4217. priv->vif = NULL;
  4218. memset(priv->bssid, 0, ETH_ALEN);
  4219. }
  4220. mutex_unlock(&priv->mutex);
  4221. IWL_DEBUG_MAC80211("leave\n");
  4222. }
  4223. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  4224. static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
  4225. struct ieee80211_vif *vif,
  4226. struct ieee80211_bss_conf *bss_conf,
  4227. u32 changes)
  4228. {
  4229. struct iwl_priv *priv = hw->priv;
  4230. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  4231. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4232. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  4233. bss_conf->use_short_preamble);
  4234. if (bss_conf->use_short_preamble)
  4235. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4236. else
  4237. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4238. }
  4239. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4240. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  4241. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  4242. priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4243. else
  4244. priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4245. }
  4246. if (changes & BSS_CHANGED_ASSOC) {
  4247. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4248. /* This should never happen as this function should
  4249. * never be called from interrupt context. */
  4250. if (WARN_ON_ONCE(in_interrupt()))
  4251. return;
  4252. if (bss_conf->assoc) {
  4253. priv->assoc_id = bss_conf->aid;
  4254. priv->beacon_int = bss_conf->beacon_int;
  4255. priv->timestamp = bss_conf->timestamp;
  4256. priv->assoc_capability = bss_conf->assoc_capability;
  4257. priv->power_data.dtim_period = bss_conf->dtim_period;
  4258. priv->next_scan_jiffies = jiffies +
  4259. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  4260. mutex_lock(&priv->mutex);
  4261. iwl3945_post_associate(priv);
  4262. mutex_unlock(&priv->mutex);
  4263. } else {
  4264. priv->assoc_id = 0;
  4265. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  4266. }
  4267. } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
  4268. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  4269. iwl3945_send_rxon_assoc(priv);
  4270. }
  4271. }
  4272. static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  4273. {
  4274. int rc = 0;
  4275. unsigned long flags;
  4276. struct iwl_priv *priv = hw->priv;
  4277. DECLARE_SSID_BUF(ssid_buf);
  4278. IWL_DEBUG_MAC80211("enter\n");
  4279. mutex_lock(&priv->mutex);
  4280. spin_lock_irqsave(&priv->lock, flags);
  4281. if (!iwl_is_ready_rf(priv)) {
  4282. rc = -EIO;
  4283. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  4284. goto out_unlock;
  4285. }
  4286. /* we don't schedule scan within next_scan_jiffies period */
  4287. if (priv->next_scan_jiffies &&
  4288. time_after(priv->next_scan_jiffies, jiffies)) {
  4289. rc = -EAGAIN;
  4290. goto out_unlock;
  4291. }
  4292. /* if we just finished scan ask for delay for a broadcast scan */
  4293. if ((len == 0) && priv->last_scan_jiffies &&
  4294. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  4295. jiffies)) {
  4296. rc = -EAGAIN;
  4297. goto out_unlock;
  4298. }
  4299. if (len) {
  4300. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  4301. print_ssid(ssid_buf, ssid, len), (int)len);
  4302. priv->one_direct_scan = 1;
  4303. priv->direct_ssid_len = (u8)
  4304. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  4305. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  4306. } else
  4307. priv->one_direct_scan = 0;
  4308. rc = iwl3945_scan_initiate(priv);
  4309. IWL_DEBUG_MAC80211("leave\n");
  4310. out_unlock:
  4311. spin_unlock_irqrestore(&priv->lock, flags);
  4312. mutex_unlock(&priv->mutex);
  4313. return rc;
  4314. }
  4315. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  4316. struct ieee80211_vif *vif,
  4317. struct ieee80211_sta *sta,
  4318. struct ieee80211_key_conf *key)
  4319. {
  4320. struct iwl_priv *priv = hw->priv;
  4321. const u8 *addr;
  4322. int ret;
  4323. u8 sta_id;
  4324. IWL_DEBUG_MAC80211("enter\n");
  4325. if (iwl3945_mod_params.sw_crypto) {
  4326. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  4327. return -EOPNOTSUPP;
  4328. }
  4329. addr = sta ? sta->addr : iwl_bcast_addr;
  4330. sta_id = iwl3945_hw_find_station(priv, addr);
  4331. if (sta_id == IWL_INVALID_STATION) {
  4332. IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
  4333. addr);
  4334. return -EINVAL;
  4335. }
  4336. mutex_lock(&priv->mutex);
  4337. iwl_scan_cancel_timeout(priv, 100);
  4338. switch (cmd) {
  4339. case SET_KEY:
  4340. ret = iwl3945_update_sta_key_info(priv, key, sta_id);
  4341. if (!ret) {
  4342. iwl3945_set_rxon_hwcrypto(priv, 1);
  4343. iwl3945_commit_rxon(priv);
  4344. key->hw_key_idx = sta_id;
  4345. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  4346. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  4347. }
  4348. break;
  4349. case DISABLE_KEY:
  4350. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  4351. if (!ret) {
  4352. iwl3945_set_rxon_hwcrypto(priv, 0);
  4353. iwl3945_commit_rxon(priv);
  4354. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  4355. }
  4356. break;
  4357. default:
  4358. ret = -EINVAL;
  4359. }
  4360. IWL_DEBUG_MAC80211("leave\n");
  4361. mutex_unlock(&priv->mutex);
  4362. return ret;
  4363. }
  4364. static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  4365. const struct ieee80211_tx_queue_params *params)
  4366. {
  4367. struct iwl_priv *priv = hw->priv;
  4368. unsigned long flags;
  4369. int q;
  4370. IWL_DEBUG_MAC80211("enter\n");
  4371. if (!iwl_is_ready_rf(priv)) {
  4372. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  4373. return -EIO;
  4374. }
  4375. if (queue >= AC_NUM) {
  4376. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  4377. return 0;
  4378. }
  4379. q = AC_NUM - 1 - queue;
  4380. spin_lock_irqsave(&priv->lock, flags);
  4381. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  4382. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  4383. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  4384. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  4385. cpu_to_le16((params->txop * 32));
  4386. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  4387. priv->qos_data.qos_active = 1;
  4388. spin_unlock_irqrestore(&priv->lock, flags);
  4389. mutex_lock(&priv->mutex);
  4390. if (priv->iw_mode == NL80211_IFTYPE_AP)
  4391. iwl3945_activate_qos(priv, 1);
  4392. else if (priv->assoc_id && iwl3945_is_associated(priv))
  4393. iwl3945_activate_qos(priv, 0);
  4394. mutex_unlock(&priv->mutex);
  4395. IWL_DEBUG_MAC80211("leave\n");
  4396. return 0;
  4397. }
  4398. static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
  4399. struct ieee80211_tx_queue_stats *stats)
  4400. {
  4401. struct iwl_priv *priv = hw->priv;
  4402. int i, avail;
  4403. struct iwl_tx_queue *txq;
  4404. struct iwl_queue *q;
  4405. unsigned long flags;
  4406. IWL_DEBUG_MAC80211("enter\n");
  4407. if (!iwl_is_ready_rf(priv)) {
  4408. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  4409. return -EIO;
  4410. }
  4411. spin_lock_irqsave(&priv->lock, flags);
  4412. for (i = 0; i < AC_NUM; i++) {
  4413. txq = &priv->txq[i];
  4414. q = &txq->q;
  4415. avail = iwl_queue_space(q);
  4416. stats[i].len = q->n_window - avail;
  4417. stats[i].limit = q->n_window - q->high_mark;
  4418. stats[i].count = q->n_window;
  4419. }
  4420. spin_unlock_irqrestore(&priv->lock, flags);
  4421. IWL_DEBUG_MAC80211("leave\n");
  4422. return 0;
  4423. }
  4424. static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
  4425. {
  4426. struct iwl_priv *priv = hw->priv;
  4427. unsigned long flags;
  4428. mutex_lock(&priv->mutex);
  4429. IWL_DEBUG_MAC80211("enter\n");
  4430. iwl_reset_qos(priv);
  4431. spin_lock_irqsave(&priv->lock, flags);
  4432. priv->assoc_id = 0;
  4433. priv->assoc_capability = 0;
  4434. /* new association get rid of ibss beacon skb */
  4435. if (priv->ibss_beacon)
  4436. dev_kfree_skb(priv->ibss_beacon);
  4437. priv->ibss_beacon = NULL;
  4438. priv->beacon_int = priv->hw->conf.beacon_int;
  4439. priv->timestamp = 0;
  4440. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  4441. priv->beacon_int = 0;
  4442. spin_unlock_irqrestore(&priv->lock, flags);
  4443. if (!iwl_is_ready_rf(priv)) {
  4444. IWL_DEBUG_MAC80211("leave - not ready\n");
  4445. mutex_unlock(&priv->mutex);
  4446. return;
  4447. }
  4448. /* we are restarting association process
  4449. * clear RXON_FILTER_ASSOC_MSK bit
  4450. */
  4451. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  4452. iwl_scan_cancel_timeout(priv, 100);
  4453. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4454. iwl3945_commit_rxon(priv);
  4455. }
  4456. /* Per mac80211.h: This is only used in IBSS mode... */
  4457. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  4458. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  4459. mutex_unlock(&priv->mutex);
  4460. return;
  4461. }
  4462. iwl3945_set_rate(priv);
  4463. mutex_unlock(&priv->mutex);
  4464. IWL_DEBUG_MAC80211("leave\n");
  4465. }
  4466. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  4467. {
  4468. struct iwl_priv *priv = hw->priv;
  4469. unsigned long flags;
  4470. IWL_DEBUG_MAC80211("enter\n");
  4471. if (!iwl_is_ready_rf(priv)) {
  4472. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  4473. return -EIO;
  4474. }
  4475. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  4476. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  4477. return -EIO;
  4478. }
  4479. spin_lock_irqsave(&priv->lock, flags);
  4480. if (priv->ibss_beacon)
  4481. dev_kfree_skb(priv->ibss_beacon);
  4482. priv->ibss_beacon = skb;
  4483. priv->assoc_id = 0;
  4484. IWL_DEBUG_MAC80211("leave\n");
  4485. spin_unlock_irqrestore(&priv->lock, flags);
  4486. iwl_reset_qos(priv);
  4487. iwl3945_post_associate(priv);
  4488. return 0;
  4489. }
  4490. /*****************************************************************************
  4491. *
  4492. * sysfs attributes
  4493. *
  4494. *****************************************************************************/
  4495. #ifdef CONFIG_IWLWIFI_DEBUG
  4496. /*
  4497. * The following adds a new attribute to the sysfs representation
  4498. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  4499. * used for controlling the debug level.
  4500. *
  4501. * See the level definitions in iwl for details.
  4502. */
  4503. static ssize_t show_debug_level(struct device *d,
  4504. struct device_attribute *attr, char *buf)
  4505. {
  4506. struct iwl_priv *priv = d->driver_data;
  4507. return sprintf(buf, "0x%08X\n", priv->debug_level);
  4508. }
  4509. static ssize_t store_debug_level(struct device *d,
  4510. struct device_attribute *attr,
  4511. const char *buf, size_t count)
  4512. {
  4513. struct iwl_priv *priv = d->driver_data;
  4514. unsigned long val;
  4515. int ret;
  4516. ret = strict_strtoul(buf, 0, &val);
  4517. if (ret)
  4518. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  4519. else
  4520. priv->debug_level = val;
  4521. return strnlen(buf, count);
  4522. }
  4523. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  4524. show_debug_level, store_debug_level);
  4525. #endif /* CONFIG_IWLWIFI_DEBUG */
  4526. static ssize_t show_temperature(struct device *d,
  4527. struct device_attribute *attr, char *buf)
  4528. {
  4529. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4530. if (!iwl_is_alive(priv))
  4531. return -EAGAIN;
  4532. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  4533. }
  4534. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  4535. static ssize_t show_tx_power(struct device *d,
  4536. struct device_attribute *attr, char *buf)
  4537. {
  4538. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4539. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  4540. }
  4541. static ssize_t store_tx_power(struct device *d,
  4542. struct device_attribute *attr,
  4543. const char *buf, size_t count)
  4544. {
  4545. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4546. char *p = (char *)buf;
  4547. u32 val;
  4548. val = simple_strtoul(p, &p, 10);
  4549. if (p == buf)
  4550. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  4551. else
  4552. iwl3945_hw_reg_set_txpower(priv, val);
  4553. return count;
  4554. }
  4555. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  4556. static ssize_t show_flags(struct device *d,
  4557. struct device_attribute *attr, char *buf)
  4558. {
  4559. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4560. return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
  4561. }
  4562. static ssize_t store_flags(struct device *d,
  4563. struct device_attribute *attr,
  4564. const char *buf, size_t count)
  4565. {
  4566. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4567. u32 flags = simple_strtoul(buf, NULL, 0);
  4568. mutex_lock(&priv->mutex);
  4569. if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
  4570. /* Cancel any currently running scans... */
  4571. if (iwl_scan_cancel_timeout(priv, 100))
  4572. IWL_WARN(priv, "Could not cancel scan.\n");
  4573. else {
  4574. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  4575. flags);
  4576. priv->staging39_rxon.flags = cpu_to_le32(flags);
  4577. iwl3945_commit_rxon(priv);
  4578. }
  4579. }
  4580. mutex_unlock(&priv->mutex);
  4581. return count;
  4582. }
  4583. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  4584. static ssize_t show_filter_flags(struct device *d,
  4585. struct device_attribute *attr, char *buf)
  4586. {
  4587. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4588. return sprintf(buf, "0x%04X\n",
  4589. le32_to_cpu(priv->active39_rxon.filter_flags));
  4590. }
  4591. static ssize_t store_filter_flags(struct device *d,
  4592. struct device_attribute *attr,
  4593. const char *buf, size_t count)
  4594. {
  4595. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4596. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  4597. mutex_lock(&priv->mutex);
  4598. if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
  4599. /* Cancel any currently running scans... */
  4600. if (iwl_scan_cancel_timeout(priv, 100))
  4601. IWL_WARN(priv, "Could not cancel scan.\n");
  4602. else {
  4603. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  4604. "0x%04X\n", filter_flags);
  4605. priv->staging39_rxon.filter_flags =
  4606. cpu_to_le32(filter_flags);
  4607. iwl3945_commit_rxon(priv);
  4608. }
  4609. }
  4610. mutex_unlock(&priv->mutex);
  4611. return count;
  4612. }
  4613. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  4614. store_filter_flags);
  4615. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  4616. static ssize_t show_measurement(struct device *d,
  4617. struct device_attribute *attr, char *buf)
  4618. {
  4619. struct iwl_priv *priv = dev_get_drvdata(d);
  4620. struct iwl_spectrum_notification measure_report;
  4621. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  4622. u8 *data = (u8 *)&measure_report;
  4623. unsigned long flags;
  4624. spin_lock_irqsave(&priv->lock, flags);
  4625. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  4626. spin_unlock_irqrestore(&priv->lock, flags);
  4627. return 0;
  4628. }
  4629. memcpy(&measure_report, &priv->measure_report, size);
  4630. priv->measurement_status = 0;
  4631. spin_unlock_irqrestore(&priv->lock, flags);
  4632. while (size && (PAGE_SIZE - len)) {
  4633. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  4634. PAGE_SIZE - len, 1);
  4635. len = strlen(buf);
  4636. if (PAGE_SIZE - len)
  4637. buf[len++] = '\n';
  4638. ofs += 16;
  4639. size -= min(size, 16U);
  4640. }
  4641. return len;
  4642. }
  4643. static ssize_t store_measurement(struct device *d,
  4644. struct device_attribute *attr,
  4645. const char *buf, size_t count)
  4646. {
  4647. struct iwl_priv *priv = dev_get_drvdata(d);
  4648. struct ieee80211_measurement_params params = {
  4649. .channel = le16_to_cpu(priv->active39_rxon.channel),
  4650. .start_time = cpu_to_le64(priv->last_tsf),
  4651. .duration = cpu_to_le16(1),
  4652. };
  4653. u8 type = IWL_MEASURE_BASIC;
  4654. u8 buffer[32];
  4655. u8 channel;
  4656. if (count) {
  4657. char *p = buffer;
  4658. strncpy(buffer, buf, min(sizeof(buffer), count));
  4659. channel = simple_strtoul(p, NULL, 0);
  4660. if (channel)
  4661. params.channel = channel;
  4662. p = buffer;
  4663. while (*p && *p != ' ')
  4664. p++;
  4665. if (*p)
  4666. type = simple_strtoul(p + 1, NULL, 0);
  4667. }
  4668. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  4669. "channel %d (for '%s')\n", type, params.channel, buf);
  4670. iwl3945_get_measurement(priv, &params, type);
  4671. return count;
  4672. }
  4673. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  4674. show_measurement, store_measurement);
  4675. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  4676. static ssize_t store_retry_rate(struct device *d,
  4677. struct device_attribute *attr,
  4678. const char *buf, size_t count)
  4679. {
  4680. struct iwl_priv *priv = dev_get_drvdata(d);
  4681. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  4682. if (priv->retry_rate <= 0)
  4683. priv->retry_rate = 1;
  4684. return count;
  4685. }
  4686. static ssize_t show_retry_rate(struct device *d,
  4687. struct device_attribute *attr, char *buf)
  4688. {
  4689. struct iwl_priv *priv = dev_get_drvdata(d);
  4690. return sprintf(buf, "%d", priv->retry_rate);
  4691. }
  4692. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  4693. store_retry_rate);
  4694. static ssize_t store_power_level(struct device *d,
  4695. struct device_attribute *attr,
  4696. const char *buf, size_t count)
  4697. {
  4698. struct iwl_priv *priv = dev_get_drvdata(d);
  4699. int rc;
  4700. int mode;
  4701. mode = simple_strtoul(buf, NULL, 0);
  4702. mutex_lock(&priv->mutex);
  4703. if (!iwl_is_ready(priv)) {
  4704. rc = -EAGAIN;
  4705. goto out;
  4706. }
  4707. if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
  4708. (mode == IWL39_POWER_AC))
  4709. mode = IWL39_POWER_AC;
  4710. else
  4711. mode |= IWL_POWER_ENABLED;
  4712. if (mode != priv->power_mode) {
  4713. rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  4714. if (rc) {
  4715. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  4716. goto out;
  4717. }
  4718. priv->power_mode = mode;
  4719. }
  4720. rc = count;
  4721. out:
  4722. mutex_unlock(&priv->mutex);
  4723. return rc;
  4724. }
  4725. #define MAX_WX_STRING 80
  4726. /* Values are in microsecond */
  4727. static const s32 timeout_duration[] = {
  4728. 350000,
  4729. 250000,
  4730. 75000,
  4731. 37000,
  4732. 25000,
  4733. };
  4734. static const s32 period_duration[] = {
  4735. 400000,
  4736. 700000,
  4737. 1000000,
  4738. 1000000,
  4739. 1000000
  4740. };
  4741. static ssize_t show_power_level(struct device *d,
  4742. struct device_attribute *attr, char *buf)
  4743. {
  4744. struct iwl_priv *priv = dev_get_drvdata(d);
  4745. int level = IWL_POWER_LEVEL(priv->power_mode);
  4746. char *p = buf;
  4747. p += sprintf(p, "%d ", level);
  4748. switch (level) {
  4749. case IWL_POWER_MODE_CAM:
  4750. case IWL39_POWER_AC:
  4751. p += sprintf(p, "(AC)");
  4752. break;
  4753. case IWL39_POWER_BATTERY:
  4754. p += sprintf(p, "(BATTERY)");
  4755. break;
  4756. default:
  4757. p += sprintf(p,
  4758. "(Timeout %dms, Period %dms)",
  4759. timeout_duration[level - 1] / 1000,
  4760. period_duration[level - 1] / 1000);
  4761. }
  4762. if (!(priv->power_mode & IWL_POWER_ENABLED))
  4763. p += sprintf(p, " OFF\n");
  4764. else
  4765. p += sprintf(p, " \n");
  4766. return p - buf + 1;
  4767. }
  4768. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  4769. store_power_level);
  4770. static ssize_t show_channels(struct device *d,
  4771. struct device_attribute *attr, char *buf)
  4772. {
  4773. /* all this shit doesn't belong into sysfs anyway */
  4774. return 0;
  4775. }
  4776. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  4777. static ssize_t show_statistics(struct device *d,
  4778. struct device_attribute *attr, char *buf)
  4779. {
  4780. struct iwl_priv *priv = dev_get_drvdata(d);
  4781. u32 size = sizeof(struct iwl3945_notif_statistics);
  4782. u32 len = 0, ofs = 0;
  4783. u8 *data = (u8 *)&priv->statistics_39;
  4784. int rc = 0;
  4785. if (!iwl_is_alive(priv))
  4786. return -EAGAIN;
  4787. mutex_lock(&priv->mutex);
  4788. rc = iwl3945_send_statistics_request(priv);
  4789. mutex_unlock(&priv->mutex);
  4790. if (rc) {
  4791. len = sprintf(buf,
  4792. "Error sending statistics request: 0x%08X\n", rc);
  4793. return len;
  4794. }
  4795. while (size && (PAGE_SIZE - len)) {
  4796. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  4797. PAGE_SIZE - len, 1);
  4798. len = strlen(buf);
  4799. if (PAGE_SIZE - len)
  4800. buf[len++] = '\n';
  4801. ofs += 16;
  4802. size -= min(size, 16U);
  4803. }
  4804. return len;
  4805. }
  4806. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  4807. static ssize_t show_antenna(struct device *d,
  4808. struct device_attribute *attr, char *buf)
  4809. {
  4810. struct iwl_priv *priv = dev_get_drvdata(d);
  4811. if (!iwl_is_alive(priv))
  4812. return -EAGAIN;
  4813. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  4814. }
  4815. static ssize_t store_antenna(struct device *d,
  4816. struct device_attribute *attr,
  4817. const char *buf, size_t count)
  4818. {
  4819. int ant;
  4820. struct iwl_priv *priv = dev_get_drvdata(d);
  4821. if (count == 0)
  4822. return 0;
  4823. if (sscanf(buf, "%1i", &ant) != 1) {
  4824. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  4825. return count;
  4826. }
  4827. if ((ant >= 0) && (ant <= 2)) {
  4828. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  4829. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  4830. } else
  4831. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  4832. return count;
  4833. }
  4834. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  4835. static ssize_t show_status(struct device *d,
  4836. struct device_attribute *attr, char *buf)
  4837. {
  4838. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4839. if (!iwl_is_alive(priv))
  4840. return -EAGAIN;
  4841. return sprintf(buf, "0x%08x\n", (int)priv->status);
  4842. }
  4843. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  4844. static ssize_t dump_error_log(struct device *d,
  4845. struct device_attribute *attr,
  4846. const char *buf, size_t count)
  4847. {
  4848. char *p = (char *)buf;
  4849. if (p[0] == '1')
  4850. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  4851. return strnlen(buf, count);
  4852. }
  4853. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  4854. static ssize_t dump_event_log(struct device *d,
  4855. struct device_attribute *attr,
  4856. const char *buf, size_t count)
  4857. {
  4858. char *p = (char *)buf;
  4859. if (p[0] == '1')
  4860. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  4861. return strnlen(buf, count);
  4862. }
  4863. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  4864. /*****************************************************************************
  4865. *
  4866. * driver setup and tear down
  4867. *
  4868. *****************************************************************************/
  4869. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  4870. {
  4871. priv->workqueue = create_workqueue(DRV_NAME);
  4872. init_waitqueue_head(&priv->wait_command_queue);
  4873. INIT_WORK(&priv->up, iwl3945_bg_up);
  4874. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  4875. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  4876. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  4877. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  4878. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  4879. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  4880. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  4881. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  4882. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  4883. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  4884. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  4885. iwl3945_hw_setup_deferred_work(priv);
  4886. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  4887. iwl3945_irq_tasklet, (unsigned long)priv);
  4888. }
  4889. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  4890. {
  4891. iwl3945_hw_cancel_deferred_work(priv);
  4892. cancel_delayed_work_sync(&priv->init_alive_start);
  4893. cancel_delayed_work(&priv->scan_check);
  4894. cancel_delayed_work(&priv->alive_start);
  4895. cancel_work_sync(&priv->beacon_update);
  4896. }
  4897. static struct attribute *iwl3945_sysfs_entries[] = {
  4898. &dev_attr_antenna.attr,
  4899. &dev_attr_channels.attr,
  4900. &dev_attr_dump_errors.attr,
  4901. &dev_attr_dump_events.attr,
  4902. &dev_attr_flags.attr,
  4903. &dev_attr_filter_flags.attr,
  4904. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  4905. &dev_attr_measurement.attr,
  4906. #endif
  4907. &dev_attr_power_level.attr,
  4908. &dev_attr_retry_rate.attr,
  4909. &dev_attr_statistics.attr,
  4910. &dev_attr_status.attr,
  4911. &dev_attr_temperature.attr,
  4912. &dev_attr_tx_power.attr,
  4913. #ifdef CONFIG_IWLWIFI_DEBUG
  4914. &dev_attr_debug_level.attr,
  4915. #endif
  4916. NULL
  4917. };
  4918. static struct attribute_group iwl3945_attribute_group = {
  4919. .name = NULL, /* put in device directory */
  4920. .attrs = iwl3945_sysfs_entries,
  4921. };
  4922. static struct ieee80211_ops iwl3945_hw_ops = {
  4923. .tx = iwl3945_mac_tx,
  4924. .start = iwl3945_mac_start,
  4925. .stop = iwl3945_mac_stop,
  4926. .add_interface = iwl3945_mac_add_interface,
  4927. .remove_interface = iwl3945_mac_remove_interface,
  4928. .config = iwl3945_mac_config,
  4929. .config_interface = iwl3945_mac_config_interface,
  4930. .configure_filter = iwl3945_configure_filter,
  4931. .set_key = iwl3945_mac_set_key,
  4932. .get_tx_stats = iwl3945_mac_get_tx_stats,
  4933. .conf_tx = iwl3945_mac_conf_tx,
  4934. .reset_tsf = iwl3945_mac_reset_tsf,
  4935. .bss_info_changed = iwl3945_bss_info_changed,
  4936. .hw_scan = iwl3945_mac_hw_scan
  4937. };
  4938. static int iwl3945_init_drv(struct iwl_priv *priv)
  4939. {
  4940. int ret;
  4941. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  4942. priv->retry_rate = 1;
  4943. priv->ibss_beacon = NULL;
  4944. spin_lock_init(&priv->lock);
  4945. spin_lock_init(&priv->power_data.lock);
  4946. spin_lock_init(&priv->sta_lock);
  4947. spin_lock_init(&priv->hcmd_lock);
  4948. INIT_LIST_HEAD(&priv->free_frames);
  4949. mutex_init(&priv->mutex);
  4950. /* Clear the driver's (not device's) station table */
  4951. iwl3945_clear_stations_table(priv);
  4952. priv->data_retry_limit = -1;
  4953. priv->ieee_channels = NULL;
  4954. priv->ieee_rates = NULL;
  4955. priv->band = IEEE80211_BAND_2GHZ;
  4956. priv->iw_mode = NL80211_IFTYPE_STATION;
  4957. iwl_reset_qos(priv);
  4958. priv->qos_data.qos_active = 0;
  4959. priv->qos_data.qos_cap.val = 0;
  4960. priv->rates_mask = IWL_RATES_MASK;
  4961. /* If power management is turned on, default to AC mode */
  4962. priv->power_mode = IWL39_POWER_AC;
  4963. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  4964. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  4965. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  4966. eeprom->version);
  4967. ret = -EINVAL;
  4968. goto err;
  4969. }
  4970. ret = iwl_init_channel_map(priv);
  4971. if (ret) {
  4972. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  4973. goto err;
  4974. }
  4975. /* Set up txpower settings in driver for all channels */
  4976. if (iwl3945_txpower_set_from_eeprom(priv)) {
  4977. ret = -EIO;
  4978. goto err_free_channel_map;
  4979. }
  4980. ret = iwlcore_init_geos(priv);
  4981. if (ret) {
  4982. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  4983. goto err_free_channel_map;
  4984. }
  4985. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  4986. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4987. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4988. &priv->bands[IEEE80211_BAND_2GHZ];
  4989. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4990. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4991. &priv->bands[IEEE80211_BAND_5GHZ];
  4992. return 0;
  4993. err_free_channel_map:
  4994. iwl_free_channel_map(priv);
  4995. err:
  4996. return ret;
  4997. }
  4998. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  4999. {
  5000. int err = 0;
  5001. struct iwl_priv *priv;
  5002. struct ieee80211_hw *hw;
  5003. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  5004. struct iwl3945_eeprom *eeprom;
  5005. unsigned long flags;
  5006. /***********************
  5007. * 1. Allocating HW data
  5008. * ********************/
  5009. /* mac80211 allocates memory for this device instance, including
  5010. * space for this driver's private structure */
  5011. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  5012. if (hw == NULL) {
  5013. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  5014. err = -ENOMEM;
  5015. goto out;
  5016. }
  5017. priv = hw->priv;
  5018. SET_IEEE80211_DEV(hw, &pdev->dev);
  5019. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  5020. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  5021. IWL_ERR(priv,
  5022. "invalid queues_num, should be between %d and %d\n",
  5023. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  5024. err = -EINVAL;
  5025. goto out;
  5026. }
  5027. /*
  5028. * Disabling hardware scan means that mac80211 will perform scans
  5029. * "the hard way", rather than using device's scan.
  5030. */
  5031. if (iwl3945_mod_params.disable_hw_scan) {
  5032. IWL_DEBUG_INFO("Disabling hw_scan\n");
  5033. iwl3945_hw_ops.hw_scan = NULL;
  5034. }
  5035. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  5036. priv->cfg = cfg;
  5037. priv->pci_dev = pdev;
  5038. #ifdef CONFIG_IWLWIFI_DEBUG
  5039. priv->debug_level = iwl3945_mod_params.debug;
  5040. atomic_set(&priv->restrict_refcnt, 0);
  5041. #endif
  5042. hw->rate_control_algorithm = "iwl-3945-rs";
  5043. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  5044. /* Tell mac80211 our characteristics */
  5045. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  5046. IEEE80211_HW_NOISE_DBM;
  5047. hw->wiphy->interface_modes =
  5048. BIT(NL80211_IFTYPE_STATION) |
  5049. BIT(NL80211_IFTYPE_ADHOC);
  5050. hw->wiphy->custom_regulatory = true;
  5051. /* 4 EDCA QOS priorities */
  5052. hw->queues = 4;
  5053. /***************************
  5054. * 2. Initializing PCI bus
  5055. * *************************/
  5056. if (pci_enable_device(pdev)) {
  5057. err = -ENODEV;
  5058. goto out_ieee80211_free_hw;
  5059. }
  5060. pci_set_master(pdev);
  5061. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  5062. if (!err)
  5063. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  5064. if (err) {
  5065. IWL_WARN(priv, "No suitable DMA available.\n");
  5066. goto out_pci_disable_device;
  5067. }
  5068. pci_set_drvdata(pdev, priv);
  5069. err = pci_request_regions(pdev, DRV_NAME);
  5070. if (err)
  5071. goto out_pci_disable_device;
  5072. /***********************
  5073. * 3. Read REV Register
  5074. * ********************/
  5075. priv->hw_base = pci_iomap(pdev, 0, 0);
  5076. if (!priv->hw_base) {
  5077. err = -ENODEV;
  5078. goto out_pci_release_regions;
  5079. }
  5080. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  5081. (unsigned long long) pci_resource_len(pdev, 0));
  5082. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  5083. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  5084. * PCI Tx retries from interfering with C3 CPU state */
  5085. pci_write_config_byte(pdev, 0x41, 0x00);
  5086. /* amp init */
  5087. err = priv->cfg->ops->lib->apm_ops.init(priv);
  5088. if (err < 0) {
  5089. IWL_DEBUG_INFO("Failed to init APMG\n");
  5090. goto out_iounmap;
  5091. }
  5092. /***********************
  5093. * 4. Read EEPROM
  5094. * ********************/
  5095. /* Read the EEPROM */
  5096. err = iwl_eeprom_init(priv);
  5097. if (err) {
  5098. IWL_ERR(priv, "Unable to init EEPROM\n");
  5099. goto out_remove_sysfs;
  5100. }
  5101. /* MAC Address location in EEPROM same for 3945/4965 */
  5102. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  5103. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  5104. IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
  5105. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5106. /***********************
  5107. * 5. Setup HW Constants
  5108. * ********************/
  5109. /* Device-specific setup */
  5110. if (iwl3945_hw_set_hw_params(priv)) {
  5111. IWL_ERR(priv, "failed to set hw settings\n");
  5112. goto out_iounmap;
  5113. }
  5114. /***********************
  5115. * 6. Setup priv
  5116. * ********************/
  5117. err = iwl3945_init_drv(priv);
  5118. if (err) {
  5119. IWL_ERR(priv, "initializing driver failed\n");
  5120. goto out_free_geos;
  5121. }
  5122. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  5123. priv->cfg->name);
  5124. /***********************************
  5125. * 7. Initialize Module Parameters
  5126. * **********************************/
  5127. /* Initialize module parameter values here */
  5128. /* Disable radio (SW RF KILL) via parameter when loading driver */
  5129. if (iwl3945_mod_params.disable) {
  5130. set_bit(STATUS_RF_KILL_SW, &priv->status);
  5131. IWL_DEBUG_INFO("Radio disabled.\n");
  5132. }
  5133. /***********************
  5134. * 8. Setup Services
  5135. * ********************/
  5136. spin_lock_irqsave(&priv->lock, flags);
  5137. iwl3945_disable_interrupts(priv);
  5138. spin_unlock_irqrestore(&priv->lock, flags);
  5139. pci_enable_msi(priv->pci_dev);
  5140. err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
  5141. DRV_NAME, priv);
  5142. if (err) {
  5143. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  5144. goto out_disable_msi;
  5145. }
  5146. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5147. if (err) {
  5148. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  5149. goto out_release_irq;
  5150. }
  5151. iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  5152. iwl3945_setup_deferred_work(priv);
  5153. iwl3945_setup_rx_handlers(priv);
  5154. /*********************************
  5155. * 9. Setup and Register mac80211
  5156. * *******************************/
  5157. err = ieee80211_register_hw(priv->hw);
  5158. if (err) {
  5159. IWL_ERR(priv, "Failed to register network device: %d\n", err);
  5160. goto out_remove_sysfs;
  5161. }
  5162. priv->hw->conf.beacon_int = 100;
  5163. priv->mac80211_registered = 1;
  5164. err = iwl_rfkill_init(priv);
  5165. if (err)
  5166. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  5167. "Ignoring error: %d\n", err);
  5168. /* Start monitoring the killswitch */
  5169. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  5170. 2 * HZ);
  5171. return 0;
  5172. out_remove_sysfs:
  5173. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5174. out_free_geos:
  5175. iwlcore_free_geos(priv);
  5176. out_release_irq:
  5177. free_irq(priv->pci_dev->irq, priv);
  5178. destroy_workqueue(priv->workqueue);
  5179. priv->workqueue = NULL;
  5180. iwl3945_unset_hw_params(priv);
  5181. out_disable_msi:
  5182. pci_disable_msi(priv->pci_dev);
  5183. out_iounmap:
  5184. pci_iounmap(pdev, priv->hw_base);
  5185. out_pci_release_regions:
  5186. pci_release_regions(pdev);
  5187. out_pci_disable_device:
  5188. pci_disable_device(pdev);
  5189. pci_set_drvdata(pdev, NULL);
  5190. out_ieee80211_free_hw:
  5191. ieee80211_free_hw(priv->hw);
  5192. out:
  5193. return err;
  5194. }
  5195. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  5196. {
  5197. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5198. unsigned long flags;
  5199. if (!priv)
  5200. return;
  5201. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  5202. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5203. if (priv->mac80211_registered) {
  5204. ieee80211_unregister_hw(priv->hw);
  5205. priv->mac80211_registered = 0;
  5206. } else {
  5207. iwl3945_down(priv);
  5208. }
  5209. /* make sure we flush any pending irq or
  5210. * tasklet for the driver
  5211. */
  5212. spin_lock_irqsave(&priv->lock, flags);
  5213. iwl3945_disable_interrupts(priv);
  5214. spin_unlock_irqrestore(&priv->lock, flags);
  5215. iwl_synchronize_irq(priv);
  5216. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5217. iwl_rfkill_unregister(priv);
  5218. cancel_delayed_work(&priv->rfkill_poll);
  5219. iwl3945_dealloc_ucode_pci(priv);
  5220. if (priv->rxq.bd)
  5221. iwl_rx_queue_free(priv, &priv->rxq);
  5222. iwl3945_hw_txq_ctx_free(priv);
  5223. iwl3945_unset_hw_params(priv);
  5224. iwl3945_clear_stations_table(priv);
  5225. /*netif_stop_queue(dev); */
  5226. flush_workqueue(priv->workqueue);
  5227. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  5228. * priv->workqueue... so we can't take down the workqueue
  5229. * until now... */
  5230. destroy_workqueue(priv->workqueue);
  5231. priv->workqueue = NULL;
  5232. free_irq(pdev->irq, priv);
  5233. pci_disable_msi(pdev);
  5234. pci_iounmap(pdev, priv->hw_base);
  5235. pci_release_regions(pdev);
  5236. pci_disable_device(pdev);
  5237. pci_set_drvdata(pdev, NULL);
  5238. iwl_free_channel_map(priv);
  5239. iwlcore_free_geos(priv);
  5240. kfree(priv->scan);
  5241. if (priv->ibss_beacon)
  5242. dev_kfree_skb(priv->ibss_beacon);
  5243. ieee80211_free_hw(priv->hw);
  5244. }
  5245. #ifdef CONFIG_PM
  5246. static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  5247. {
  5248. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5249. if (priv->is_open) {
  5250. set_bit(STATUS_IN_SUSPEND, &priv->status);
  5251. iwl3945_mac_stop(priv->hw);
  5252. priv->is_open = 1;
  5253. }
  5254. pci_save_state(pdev);
  5255. pci_disable_device(pdev);
  5256. pci_set_power_state(pdev, PCI_D3hot);
  5257. return 0;
  5258. }
  5259. static int iwl3945_pci_resume(struct pci_dev *pdev)
  5260. {
  5261. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5262. pci_set_power_state(pdev, PCI_D0);
  5263. pci_enable_device(pdev);
  5264. pci_restore_state(pdev);
  5265. if (priv->is_open)
  5266. iwl3945_mac_start(priv->hw);
  5267. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  5268. return 0;
  5269. }
  5270. #endif /* CONFIG_PM */
  5271. /*****************************************************************************
  5272. *
  5273. * driver and module entry point
  5274. *
  5275. *****************************************************************************/
  5276. static struct pci_driver iwl3945_driver = {
  5277. .name = DRV_NAME,
  5278. .id_table = iwl3945_hw_card_ids,
  5279. .probe = iwl3945_pci_probe,
  5280. .remove = __devexit_p(iwl3945_pci_remove),
  5281. #ifdef CONFIG_PM
  5282. .suspend = iwl3945_pci_suspend,
  5283. .resume = iwl3945_pci_resume,
  5284. #endif
  5285. };
  5286. static int __init iwl3945_init(void)
  5287. {
  5288. int ret;
  5289. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  5290. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  5291. ret = iwl3945_rate_control_register();
  5292. if (ret) {
  5293. printk(KERN_ERR DRV_NAME
  5294. "Unable to register rate control algorithm: %d\n", ret);
  5295. return ret;
  5296. }
  5297. ret = pci_register_driver(&iwl3945_driver);
  5298. if (ret) {
  5299. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  5300. goto error_register;
  5301. }
  5302. return ret;
  5303. error_register:
  5304. iwl3945_rate_control_unregister();
  5305. return ret;
  5306. }
  5307. static void __exit iwl3945_exit(void)
  5308. {
  5309. pci_unregister_driver(&iwl3945_driver);
  5310. iwl3945_rate_control_unregister();
  5311. }
  5312. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  5313. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  5314. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  5315. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  5316. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  5317. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  5318. MODULE_PARM_DESC(swcrypto,
  5319. "using software crypto (default 1 [software])\n");
  5320. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  5321. MODULE_PARM_DESC(debug, "debug output mask");
  5322. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  5323. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  5324. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  5325. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  5326. module_exit(iwl3945_exit);
  5327. module_init(iwl3945_init);