pn544_hci.c 26 KB

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  1. /*
  2. * HCI based Driver for NXP PN544 NFC Chip
  3. *
  4. * Copyright (C) 2012 Intel Corporation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the
  17. * Free Software Foundation, Inc.,
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. */
  20. #include <linux/crc-ccitt.h>
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/gpio.h>
  27. #include <linux/i2c.h>
  28. #include <linux/nfc.h>
  29. #include <net/nfc/hci.h>
  30. #include <net/nfc/llc.h>
  31. #include <linux/nfc/pn544.h>
  32. #define DRIVER_DESC "HCI NFC driver for PN544"
  33. #define PN544_HCI_DRIVER_NAME "pn544_hci"
  34. /* Timing restrictions (ms) */
  35. #define PN544_HCI_RESETVEN_TIME 30
  36. static struct i2c_device_id pn544_hci_id_table[] = {
  37. {"pn544", 0},
  38. {}
  39. };
  40. MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table);
  41. #define HCI_MODE 0
  42. #define FW_MODE 1
  43. /* framing in HCI mode */
  44. #define PN544_HCI_LLC_LEN 1
  45. #define PN544_HCI_LLC_CRC 2
  46. #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)
  47. #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC)
  48. #define PN544_HCI_LLC_MAX_PAYLOAD 29
  49. #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \
  50. PN544_HCI_LLC_MAX_PAYLOAD)
  51. enum pn544_state {
  52. PN544_ST_COLD,
  53. PN544_ST_FW_READY,
  54. PN544_ST_READY,
  55. };
  56. #define FULL_VERSION_LEN 11
  57. /* Proprietary commands */
  58. #define PN544_WRITE 0x3f
  59. /* Proprietary gates, events, commands and registers */
  60. /* NFC_HCI_RF_READER_A_GATE additional registers and commands */
  61. #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10
  62. #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12
  63. #define PN544_MIFARE_CMD 0x21
  64. /* Commands that apply to all RF readers */
  65. #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30
  66. #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32
  67. /* NFC_HCI_ID_MGMT_GATE additional registers */
  68. #define PN544_ID_MGMT_FULL_VERSION_SW 0x10
  69. #define PN544_RF_READER_ISO15693_GATE 0x12
  70. #define PN544_RF_READER_F_GATE 0x14
  71. #define PN544_FELICA_ID 0x04
  72. #define PN544_FELICA_RAW 0x20
  73. #define PN544_RF_READER_JEWEL_GATE 0x15
  74. #define PN544_JEWEL_RAW_CMD 0x23
  75. #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30
  76. #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31
  77. #define PN544_SYS_MGMT_GATE 0x90
  78. #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02
  79. #define PN544_POLLING_LOOP_MGMT_GATE 0x94
  80. #define PN544_DEP_MODE 0x01
  81. #define PN544_DEP_ATR_REQ 0x02
  82. #define PN544_DEP_ATR_RES 0x03
  83. #define PN544_DEP_MERGE 0x0D
  84. #define PN544_PL_RDPHASES 0x06
  85. #define PN544_PL_EMULATION 0x07
  86. #define PN544_PL_NFCT_DEACTIVATED 0x09
  87. #define PN544_SWP_MGMT_GATE 0xA0
  88. #define PN544_NFC_WI_MGMT_GATE 0xA1
  89. static struct nfc_hci_gate pn544_gates[] = {
  90. {NFC_HCI_ADMIN_GATE, NFC_HCI_INVALID_PIPE},
  91. {NFC_HCI_LOOPBACK_GATE, NFC_HCI_INVALID_PIPE},
  92. {NFC_HCI_ID_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  93. {NFC_HCI_LINK_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  94. {NFC_HCI_RF_READER_B_GATE, NFC_HCI_INVALID_PIPE},
  95. {NFC_HCI_RF_READER_A_GATE, NFC_HCI_INVALID_PIPE},
  96. {PN544_SYS_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  97. {PN544_SWP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  98. {PN544_POLLING_LOOP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  99. {PN544_NFC_WI_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  100. {PN544_RF_READER_F_GATE, NFC_HCI_INVALID_PIPE},
  101. {PN544_RF_READER_JEWEL_GATE, NFC_HCI_INVALID_PIPE},
  102. {PN544_RF_READER_ISO15693_GATE, NFC_HCI_INVALID_PIPE},
  103. {PN544_RF_READER_NFCIP1_INITIATOR_GATE, NFC_HCI_INVALID_PIPE},
  104. {PN544_RF_READER_NFCIP1_TARGET_GATE, NFC_HCI_INVALID_PIPE}
  105. };
  106. /* Largest headroom needed for outgoing custom commands */
  107. #define PN544_CMDS_HEADROOM 2
  108. #define PN544_FRAME_HEADROOM 1
  109. #define PN544_FRAME_TAILROOM 2
  110. struct pn544_hci_info {
  111. struct i2c_client *i2c_dev;
  112. struct nfc_hci_dev *hdev;
  113. enum pn544_state state;
  114. struct mutex info_lock;
  115. unsigned int gpio_en;
  116. unsigned int gpio_irq;
  117. unsigned int gpio_fw;
  118. unsigned int en_polarity;
  119. int hard_fault; /*
  120. * < 0 if hardware error occured (e.g. i2c err)
  121. * and prevents normal operation.
  122. */
  123. int async_cb_type;
  124. data_exchange_cb_t async_cb;
  125. void *async_cb_context;
  126. };
  127. static void pn544_hci_platform_init(struct pn544_hci_info *info)
  128. {
  129. int polarity, retry, ret;
  130. char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
  131. int count = sizeof(rset_cmd);
  132. pr_info(DRIVER_DESC ": %s\n", __func__);
  133. dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n");
  134. /* Disable fw download */
  135. gpio_set_value(info->gpio_fw, 0);
  136. for (polarity = 0; polarity < 2; polarity++) {
  137. info->en_polarity = polarity;
  138. retry = 3;
  139. while (retry--) {
  140. /* power off */
  141. gpio_set_value(info->gpio_en, !info->en_polarity);
  142. usleep_range(10000, 15000);
  143. /* power on */
  144. gpio_set_value(info->gpio_en, info->en_polarity);
  145. usleep_range(10000, 15000);
  146. /* send reset */
  147. dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n");
  148. ret = i2c_master_send(info->i2c_dev, rset_cmd, count);
  149. if (ret == count) {
  150. dev_info(&info->i2c_dev->dev,
  151. "nfc_en polarity : active %s\n",
  152. (polarity == 0 ? "low" : "high"));
  153. goto out;
  154. }
  155. }
  156. }
  157. dev_err(&info->i2c_dev->dev,
  158. "Could not detect nfc_en polarity, fallback to active high\n");
  159. out:
  160. gpio_set_value(info->gpio_en, !info->en_polarity);
  161. }
  162. static int pn544_hci_enable(struct pn544_hci_info *info, int mode)
  163. {
  164. pr_info(DRIVER_DESC ": %s\n", __func__);
  165. gpio_set_value(info->gpio_fw, 0);
  166. gpio_set_value(info->gpio_en, info->en_polarity);
  167. usleep_range(10000, 15000);
  168. return 0;
  169. }
  170. static void pn544_hci_disable(struct pn544_hci_info *info)
  171. {
  172. pr_info(DRIVER_DESC ": %s\n", __func__);
  173. gpio_set_value(info->gpio_fw, 0);
  174. gpio_set_value(info->gpio_en, !info->en_polarity);
  175. usleep_range(10000, 15000);
  176. gpio_set_value(info->gpio_en, info->en_polarity);
  177. usleep_range(10000, 15000);
  178. gpio_set_value(info->gpio_en, !info->en_polarity);
  179. usleep_range(10000, 15000);
  180. }
  181. static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len)
  182. {
  183. int r;
  184. usleep_range(3000, 6000);
  185. r = i2c_master_send(client, buf, len);
  186. if (r == -EREMOTEIO) { /* Retry, chip was in standby */
  187. usleep_range(6000, 10000);
  188. r = i2c_master_send(client, buf, len);
  189. }
  190. if (r >= 0) {
  191. if (r != len)
  192. return -EREMOTEIO;
  193. else
  194. return 0;
  195. }
  196. return r;
  197. }
  198. static int check_crc(u8 *buf, int buflen)
  199. {
  200. int len;
  201. u16 crc;
  202. len = buf[0] + 1;
  203. crc = crc_ccitt(0xffff, buf, len - 2);
  204. crc = ~crc;
  205. if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
  206. pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n",
  207. crc, buf[len - 1], buf[len - 2]);
  208. pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
  209. print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
  210. 16, 2, buf, buflen, false);
  211. return -EPERM;
  212. }
  213. return 0;
  214. }
  215. /*
  216. * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
  217. * that i2c bus will be flushed and that next read will start on a new frame.
  218. * returned skb contains only LLC header and payload.
  219. * returns:
  220. * -EREMOTEIO : i2c read error (fatal)
  221. * -EBADMSG : frame was incorrect and discarded
  222. * -ENOMEM : cannot allocate skb, frame dropped
  223. */
  224. static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb)
  225. {
  226. int r;
  227. u8 len;
  228. u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1];
  229. r = i2c_master_recv(client, &len, 1);
  230. if (r != 1) {
  231. dev_err(&client->dev, "cannot read len byte\n");
  232. return -EREMOTEIO;
  233. }
  234. if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) ||
  235. (len > (PN544_HCI_LLC_MAX_SIZE - 1))) {
  236. dev_err(&client->dev, "invalid len byte\n");
  237. r = -EBADMSG;
  238. goto flush;
  239. }
  240. *skb = alloc_skb(1 + len, GFP_KERNEL);
  241. if (*skb == NULL) {
  242. r = -ENOMEM;
  243. goto flush;
  244. }
  245. *skb_put(*skb, 1) = len;
  246. r = i2c_master_recv(client, skb_put(*skb, len), len);
  247. if (r != len) {
  248. kfree_skb(*skb);
  249. return -EREMOTEIO;
  250. }
  251. r = check_crc((*skb)->data, (*skb)->len);
  252. if (r != 0) {
  253. kfree_skb(*skb);
  254. r = -EBADMSG;
  255. goto flush;
  256. }
  257. skb_pull(*skb, 1);
  258. skb_trim(*skb, (*skb)->len - 2);
  259. usleep_range(3000, 6000);
  260. return 0;
  261. flush:
  262. if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
  263. r = -EREMOTEIO;
  264. usleep_range(3000, 6000);
  265. return r;
  266. }
  267. /*
  268. * Reads an shdlc frame from the chip. This is not as straightforward as it
  269. * seems. There are cases where we could loose the frame start synchronization.
  270. * The frame format is len-data-crc, and corruption can occur anywhere while
  271. * transiting on i2c bus, such that we could read an invalid len.
  272. * In order to recover synchronization with the next frame, we must be sure
  273. * to read the real amount of data without using the len byte. We do this by
  274. * assuming the following:
  275. * - the chip will always present only one single complete frame on the bus
  276. * before triggering the interrupt
  277. * - the chip will not present a new frame until we have completely read
  278. * the previous one (or until we have handled the interrupt).
  279. * The tricky case is when we read a corrupted len that is less than the real
  280. * len. We must detect this here in order to determine that we need to flush
  281. * the bus. This is the reason why we check the crc here.
  282. */
  283. static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id)
  284. {
  285. struct pn544_hci_info *info = dev_id;
  286. struct i2c_client *client;
  287. struct sk_buff *skb = NULL;
  288. int r;
  289. if (!info || irq != info->i2c_dev->irq) {
  290. WARN_ON_ONCE(1);
  291. return IRQ_NONE;
  292. }
  293. client = info->i2c_dev;
  294. dev_dbg(&client->dev, "IRQ\n");
  295. if (info->hard_fault != 0)
  296. return IRQ_HANDLED;
  297. r = pn544_hci_i2c_read(client, &skb);
  298. if (r == -EREMOTEIO) {
  299. info->hard_fault = r;
  300. nfc_hci_recv_frame(info->hdev, NULL);
  301. return IRQ_HANDLED;
  302. } else if ((r == -ENOMEM) || (r == -EBADMSG)) {
  303. return IRQ_HANDLED;
  304. }
  305. nfc_hci_recv_frame(info->hdev, skb);
  306. return IRQ_HANDLED;
  307. }
  308. static int pn544_hci_open(struct nfc_hci_dev *hdev)
  309. {
  310. struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
  311. int r = 0;
  312. mutex_lock(&info->info_lock);
  313. if (info->state != PN544_ST_COLD) {
  314. r = -EBUSY;
  315. goto out;
  316. }
  317. r = pn544_hci_enable(info, HCI_MODE);
  318. if (r == 0)
  319. info->state = PN544_ST_READY;
  320. out:
  321. mutex_unlock(&info->info_lock);
  322. return r;
  323. }
  324. static void pn544_hci_close(struct nfc_hci_dev *hdev)
  325. {
  326. struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
  327. mutex_lock(&info->info_lock);
  328. if (info->state == PN544_ST_COLD)
  329. goto out;
  330. pn544_hci_disable(info);
  331. info->state = PN544_ST_COLD;
  332. out:
  333. mutex_unlock(&info->info_lock);
  334. }
  335. static int pn544_hci_ready(struct nfc_hci_dev *hdev)
  336. {
  337. struct sk_buff *skb;
  338. static struct hw_config {
  339. u8 adr[2];
  340. u8 value;
  341. } hw_config[] = {
  342. {{0x9f, 0x9a}, 0x00},
  343. {{0x98, 0x10}, 0xbc},
  344. {{0x9e, 0x71}, 0x00},
  345. {{0x98, 0x09}, 0x00},
  346. {{0x9e, 0xb4}, 0x00},
  347. {{0x9e, 0xd9}, 0xff},
  348. {{0x9e, 0xda}, 0xff},
  349. {{0x9e, 0xdb}, 0x23},
  350. {{0x9e, 0xdc}, 0x21},
  351. {{0x9e, 0xdd}, 0x22},
  352. {{0x9e, 0xde}, 0x24},
  353. {{0x9c, 0x01}, 0x08},
  354. {{0x9e, 0xaa}, 0x01},
  355. {{0x9b, 0xd1}, 0x0d},
  356. {{0x9b, 0xd2}, 0x24},
  357. {{0x9b, 0xd3}, 0x0a},
  358. {{0x9b, 0xd4}, 0x22},
  359. {{0x9b, 0xd5}, 0x08},
  360. {{0x9b, 0xd6}, 0x1e},
  361. {{0x9b, 0xdd}, 0x1c},
  362. {{0x9b, 0x84}, 0x13},
  363. {{0x99, 0x81}, 0x7f},
  364. {{0x99, 0x31}, 0x70},
  365. {{0x98, 0x00}, 0x3f},
  366. {{0x9f, 0x09}, 0x00},
  367. {{0x9f, 0x0a}, 0x05},
  368. {{0x9e, 0xd1}, 0xa1},
  369. {{0x99, 0x23}, 0x00},
  370. {{0x9e, 0x74}, 0x80},
  371. {{0x9f, 0x28}, 0x10},
  372. {{0x9f, 0x35}, 0x14},
  373. {{0x9f, 0x36}, 0x60},
  374. {{0x9c, 0x31}, 0x00},
  375. {{0x9c, 0x32}, 0xc8},
  376. {{0x9c, 0x19}, 0x40},
  377. {{0x9c, 0x1a}, 0x40},
  378. {{0x9c, 0x0c}, 0x00},
  379. {{0x9c, 0x0d}, 0x00},
  380. {{0x9c, 0x12}, 0x00},
  381. {{0x9c, 0x13}, 0x00},
  382. {{0x98, 0xa2}, 0x0e},
  383. {{0x98, 0x93}, 0x40},
  384. {{0x98, 0x7d}, 0x02},
  385. {{0x98, 0x7e}, 0x00},
  386. {{0x9f, 0xc8}, 0x01},
  387. };
  388. struct hw_config *p = hw_config;
  389. int count = ARRAY_SIZE(hw_config);
  390. struct sk_buff *res_skb;
  391. u8 param[4];
  392. int r;
  393. param[0] = 0;
  394. while (count--) {
  395. param[1] = p->adr[0];
  396. param[2] = p->adr[1];
  397. param[3] = p->value;
  398. r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE,
  399. param, 4, &res_skb);
  400. if (r < 0)
  401. return r;
  402. if (res_skb->len != 1) {
  403. kfree_skb(res_skb);
  404. return -EPROTO;
  405. }
  406. if (res_skb->data[0] != p->value) {
  407. kfree_skb(res_skb);
  408. return -EIO;
  409. }
  410. kfree_skb(res_skb);
  411. p++;
  412. }
  413. param[0] = NFC_HCI_UICC_HOST_ID;
  414. r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE,
  415. NFC_HCI_ADMIN_WHITELIST, param, 1);
  416. if (r < 0)
  417. return r;
  418. param[0] = 0x3d;
  419. r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE,
  420. PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1);
  421. if (r < 0)
  422. return r;
  423. param[0] = 0x0;
  424. r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE,
  425. PN544_RF_READER_A_AUTO_ACTIVATION, param, 1);
  426. if (r < 0)
  427. return r;
  428. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  429. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  430. if (r < 0)
  431. return r;
  432. param[0] = 0x1;
  433. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  434. PN544_PL_NFCT_DEACTIVATED, param, 1);
  435. if (r < 0)
  436. return r;
  437. param[0] = 0x0;
  438. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  439. PN544_PL_RDPHASES, param, 1);
  440. if (r < 0)
  441. return r;
  442. r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE,
  443. PN544_ID_MGMT_FULL_VERSION_SW, &skb);
  444. if (r < 0)
  445. return r;
  446. if (skb->len != FULL_VERSION_LEN) {
  447. kfree_skb(skb);
  448. return -EINVAL;
  449. }
  450. print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ",
  451. DUMP_PREFIX_NONE, 16, 1,
  452. skb->data, FULL_VERSION_LEN, false);
  453. kfree_skb(skb);
  454. return 0;
  455. }
  456. static void pn544_hci_add_len_crc(struct sk_buff *skb)
  457. {
  458. u16 crc;
  459. int len;
  460. len = skb->len + 2;
  461. *skb_push(skb, 1) = len;
  462. crc = crc_ccitt(0xffff, skb->data, skb->len);
  463. crc = ~crc;
  464. *skb_put(skb, 1) = crc & 0xff;
  465. *skb_put(skb, 1) = crc >> 8;
  466. }
  467. static void pn544_hci_remove_len_crc(struct sk_buff *skb)
  468. {
  469. skb_pull(skb, PN544_FRAME_HEADROOM);
  470. skb_trim(skb, PN544_FRAME_TAILROOM);
  471. }
  472. static int pn544_hci_xmit(struct nfc_hci_dev *hdev, struct sk_buff *skb)
  473. {
  474. struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
  475. struct i2c_client *client = info->i2c_dev;
  476. int r;
  477. if (info->hard_fault != 0)
  478. return info->hard_fault;
  479. pn544_hci_add_len_crc(skb);
  480. r = pn544_hci_i2c_write(client, skb->data, skb->len);
  481. pn544_hci_remove_len_crc(skb);
  482. return r;
  483. }
  484. static int pn544_hci_start_poll(struct nfc_hci_dev *hdev,
  485. u32 im_protocols, u32 tm_protocols)
  486. {
  487. u8 phases = 0;
  488. int r;
  489. u8 duration[2];
  490. u8 activated;
  491. u8 i_mode = 0x3f; /* Enable all supported modes */
  492. u8 t_mode = 0x0f;
  493. u8 t_merge = 0x01; /* Enable merge by default */
  494. pr_info(DRIVER_DESC ": %s protocols 0x%x 0x%x\n",
  495. __func__, im_protocols, tm_protocols);
  496. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  497. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  498. if (r < 0)
  499. return r;
  500. duration[0] = 0x18;
  501. duration[1] = 0x6a;
  502. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  503. PN544_PL_EMULATION, duration, 2);
  504. if (r < 0)
  505. return r;
  506. activated = 0;
  507. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  508. PN544_PL_NFCT_DEACTIVATED, &activated, 1);
  509. if (r < 0)
  510. return r;
  511. if (im_protocols & (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK |
  512. NFC_PROTO_JEWEL_MASK))
  513. phases |= 1; /* Type A */
  514. if (im_protocols & NFC_PROTO_FELICA_MASK) {
  515. phases |= (1 << 2); /* Type F 212 */
  516. phases |= (1 << 3); /* Type F 424 */
  517. }
  518. phases |= (1 << 5); /* NFC active */
  519. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  520. PN544_PL_RDPHASES, &phases, 1);
  521. if (r < 0)
  522. return r;
  523. if ((im_protocols | tm_protocols) & NFC_PROTO_NFC_DEP_MASK) {
  524. hdev->gb = nfc_get_local_general_bytes(hdev->ndev,
  525. &hdev->gb_len);
  526. pr_debug("generate local bytes %p", hdev->gb);
  527. if (hdev->gb == NULL || hdev->gb_len == 0) {
  528. im_protocols &= ~NFC_PROTO_NFC_DEP_MASK;
  529. tm_protocols &= ~NFC_PROTO_NFC_DEP_MASK;
  530. }
  531. }
  532. if (im_protocols & NFC_PROTO_NFC_DEP_MASK) {
  533. r = nfc_hci_send_event(hdev,
  534. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  535. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  536. if (r < 0)
  537. return r;
  538. r = nfc_hci_set_param(hdev,
  539. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  540. PN544_DEP_MODE, &i_mode, 1);
  541. if (r < 0)
  542. return r;
  543. r = nfc_hci_set_param(hdev,
  544. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  545. PN544_DEP_ATR_REQ, hdev->gb, hdev->gb_len);
  546. if (r < 0)
  547. return r;
  548. r = nfc_hci_send_event(hdev,
  549. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  550. NFC_HCI_EVT_READER_REQUESTED, NULL, 0);
  551. if (r < 0)
  552. nfc_hci_send_event(hdev,
  553. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  554. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  555. }
  556. if (tm_protocols & NFC_PROTO_NFC_DEP_MASK) {
  557. r = nfc_hci_set_param(hdev, PN544_RF_READER_NFCIP1_TARGET_GATE,
  558. PN544_DEP_MODE, &t_mode, 1);
  559. if (r < 0)
  560. return r;
  561. r = nfc_hci_set_param(hdev, PN544_RF_READER_NFCIP1_TARGET_GATE,
  562. PN544_DEP_ATR_RES, hdev->gb, hdev->gb_len);
  563. if (r < 0)
  564. return r;
  565. r = nfc_hci_set_param(hdev, PN544_RF_READER_NFCIP1_TARGET_GATE,
  566. PN544_DEP_MERGE, &t_merge, 1);
  567. if (r < 0)
  568. return r;
  569. }
  570. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  571. NFC_HCI_EVT_READER_REQUESTED, NULL, 0);
  572. if (r < 0)
  573. nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  574. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  575. return r;
  576. }
  577. static int pn544_hci_target_from_gate(struct nfc_hci_dev *hdev, u8 gate,
  578. struct nfc_target *target)
  579. {
  580. switch (gate) {
  581. case PN544_RF_READER_F_GATE:
  582. target->supported_protocols = NFC_PROTO_FELICA_MASK;
  583. break;
  584. case PN544_RF_READER_JEWEL_GATE:
  585. target->supported_protocols = NFC_PROTO_JEWEL_MASK;
  586. target->sens_res = 0x0c00;
  587. break;
  588. default:
  589. return -EPROTO;
  590. }
  591. return 0;
  592. }
  593. static int pn544_hci_complete_target_discovered(struct nfc_hci_dev *hdev,
  594. u8 gate,
  595. struct nfc_target *target)
  596. {
  597. struct sk_buff *uid_skb;
  598. int r = 0;
  599. if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
  600. if (target->nfcid1_len != 4 && target->nfcid1_len != 7 &&
  601. target->nfcid1_len != 10)
  602. return -EPROTO;
  603. r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
  604. PN544_RF_READER_CMD_ACTIVATE_NEXT,
  605. target->nfcid1, target->nfcid1_len, NULL);
  606. } else if (target->supported_protocols & NFC_PROTO_FELICA_MASK) {
  607. r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE,
  608. PN544_FELICA_ID, &uid_skb);
  609. if (r < 0)
  610. return r;
  611. if (uid_skb->len != 8) {
  612. kfree_skb(uid_skb);
  613. return -EPROTO;
  614. }
  615. r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE,
  616. PN544_RF_READER_CMD_ACTIVATE_NEXT,
  617. uid_skb->data, uid_skb->len, NULL);
  618. kfree_skb(uid_skb);
  619. } else if (target->supported_protocols & NFC_PROTO_ISO14443_MASK) {
  620. /*
  621. * TODO: maybe other ISO 14443 require some kind of continue
  622. * activation, but for now we've seen only this one below.
  623. */
  624. if (target->sens_res == 0x4403) /* Type 4 Mifare DESFire */
  625. r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
  626. PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION,
  627. NULL, 0, NULL);
  628. }
  629. return r;
  630. }
  631. #define PN544_CB_TYPE_READER_F 1
  632. static void pn544_hci_data_exchange_cb(void *context, struct sk_buff *skb,
  633. int err)
  634. {
  635. struct pn544_hci_info *info = context;
  636. switch (info->async_cb_type) {
  637. case PN544_CB_TYPE_READER_F:
  638. if (err == 0)
  639. skb_pull(skb, 1);
  640. info->async_cb(info->async_cb_context, skb, err);
  641. break;
  642. default:
  643. if (err == 0)
  644. kfree_skb(skb);
  645. break;
  646. }
  647. }
  648. #define MIFARE_CMD_AUTH_KEY_A 0x60
  649. #define MIFARE_CMD_AUTH_KEY_B 0x61
  650. #define MIFARE_CMD_HEADER 2
  651. #define MIFARE_UID_LEN 4
  652. #define MIFARE_KEY_LEN 6
  653. #define MIFARE_CMD_LEN 12
  654. /*
  655. * Returns:
  656. * <= 0: driver handled the data exchange
  657. * 1: driver doesn't especially handle, please do standard processing
  658. */
  659. static int pn544_hci_data_exchange(struct nfc_hci_dev *hdev,
  660. struct nfc_target *target,
  661. struct sk_buff *skb, data_exchange_cb_t cb,
  662. void *cb_context)
  663. {
  664. struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
  665. pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__,
  666. target->hci_reader_gate);
  667. switch (target->hci_reader_gate) {
  668. case NFC_HCI_RF_READER_A_GATE:
  669. if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
  670. /*
  671. * It seems that pn544 is inverting key and UID for
  672. * MIFARE authentication commands.
  673. */
  674. if (skb->len == MIFARE_CMD_LEN &&
  675. (skb->data[0] == MIFARE_CMD_AUTH_KEY_A ||
  676. skb->data[0] == MIFARE_CMD_AUTH_KEY_B)) {
  677. u8 uid[MIFARE_UID_LEN];
  678. u8 *data = skb->data + MIFARE_CMD_HEADER;
  679. memcpy(uid, data + MIFARE_KEY_LEN,
  680. MIFARE_UID_LEN);
  681. memmove(data + MIFARE_UID_LEN, data,
  682. MIFARE_KEY_LEN);
  683. memcpy(data, uid, MIFARE_UID_LEN);
  684. }
  685. return nfc_hci_send_cmd_async(hdev,
  686. target->hci_reader_gate,
  687. PN544_MIFARE_CMD,
  688. skb->data, skb->len,
  689. cb, cb_context);
  690. } else
  691. return 1;
  692. case PN544_RF_READER_F_GATE:
  693. *skb_push(skb, 1) = 0;
  694. *skb_push(skb, 1) = 0;
  695. info->async_cb_type = PN544_CB_TYPE_READER_F;
  696. info->async_cb = cb;
  697. info->async_cb_context = cb_context;
  698. return nfc_hci_send_cmd_async(hdev, target->hci_reader_gate,
  699. PN544_FELICA_RAW, skb->data,
  700. skb->len,
  701. pn544_hci_data_exchange_cb, info);
  702. case PN544_RF_READER_JEWEL_GATE:
  703. return nfc_hci_send_cmd_async(hdev, target->hci_reader_gate,
  704. PN544_JEWEL_RAW_CMD, skb->data,
  705. skb->len, cb, cb_context);
  706. default:
  707. return 1;
  708. }
  709. }
  710. static int pn544_hci_check_presence(struct nfc_hci_dev *hdev,
  711. struct nfc_target *target)
  712. {
  713. return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
  714. PN544_RF_READER_CMD_PRESENCE_CHECK,
  715. NULL, 0, NULL);
  716. }
  717. static struct nfc_hci_ops pn544_hci_ops = {
  718. .open = pn544_hci_open,
  719. .close = pn544_hci_close,
  720. .hci_ready = pn544_hci_ready,
  721. .xmit = pn544_hci_xmit,
  722. .start_poll = pn544_hci_start_poll,
  723. .target_from_gate = pn544_hci_target_from_gate,
  724. .complete_target_discovered = pn544_hci_complete_target_discovered,
  725. .data_exchange = pn544_hci_data_exchange,
  726. .check_presence = pn544_hci_check_presence,
  727. };
  728. static int __devinit pn544_hci_probe(struct i2c_client *client,
  729. const struct i2c_device_id *id)
  730. {
  731. struct pn544_hci_info *info;
  732. struct pn544_nfc_platform_data *pdata;
  733. int r = 0;
  734. u32 protocols;
  735. struct nfc_hci_init_data init_data;
  736. dev_dbg(&client->dev, "%s\n", __func__);
  737. dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
  738. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  739. dev_err(&client->dev, "Need I2C_FUNC_I2C\n");
  740. return -ENODEV;
  741. }
  742. info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL);
  743. if (!info) {
  744. dev_err(&client->dev,
  745. "Cannot allocate memory for pn544_hci_info.\n");
  746. r = -ENOMEM;
  747. goto err_info_alloc;
  748. }
  749. info->i2c_dev = client;
  750. info->state = PN544_ST_COLD;
  751. mutex_init(&info->info_lock);
  752. i2c_set_clientdata(client, info);
  753. pdata = client->dev.platform_data;
  754. if (pdata == NULL) {
  755. dev_err(&client->dev, "No platform data\n");
  756. r = -EINVAL;
  757. goto err_pdata;
  758. }
  759. if (pdata->request_resources == NULL) {
  760. dev_err(&client->dev, "request_resources() missing\n");
  761. r = -EINVAL;
  762. goto err_pdata;
  763. }
  764. r = pdata->request_resources(client);
  765. if (r) {
  766. dev_err(&client->dev, "Cannot get platform resources\n");
  767. goto err_pdata;
  768. }
  769. info->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE);
  770. info->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET);
  771. info->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ);
  772. pn544_hci_platform_init(info);
  773. r = request_threaded_irq(client->irq, NULL, pn544_hci_irq_thread_fn,
  774. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  775. PN544_HCI_DRIVER_NAME, info);
  776. if (r < 0) {
  777. dev_err(&client->dev, "Unable to register IRQ handler\n");
  778. goto err_rti;
  779. }
  780. init_data.gate_count = ARRAY_SIZE(pn544_gates);
  781. memcpy(init_data.gates, pn544_gates, sizeof(pn544_gates));
  782. /*
  783. * TODO: Session id must include the driver name + some bus addr
  784. * persistent info to discriminate 2 identical chips
  785. */
  786. strcpy(init_data.session_id, "ID544HCI");
  787. protocols = NFC_PROTO_JEWEL_MASK |
  788. NFC_PROTO_MIFARE_MASK |
  789. NFC_PROTO_FELICA_MASK |
  790. NFC_PROTO_ISO14443_MASK |
  791. NFC_PROTO_ISO14443_B_MASK |
  792. NFC_PROTO_NFC_DEP_MASK;
  793. info->hdev = nfc_hci_allocate_device(&pn544_hci_ops, &init_data,
  794. protocols, LLC_SHDLC_NAME,
  795. PN544_FRAME_HEADROOM +
  796. PN544_CMDS_HEADROOM,
  797. PN544_FRAME_TAILROOM,
  798. PN544_HCI_LLC_MAX_PAYLOAD);
  799. if (!info->hdev) {
  800. dev_err(&client->dev, "Cannot allocate nfc hdev.\n");
  801. r = -ENOMEM;
  802. goto err_alloc_hdev;
  803. }
  804. nfc_hci_set_clientdata(info->hdev, info);
  805. r = nfc_hci_register_device(info->hdev);
  806. if (r)
  807. goto err_regdev;
  808. return 0;
  809. err_regdev:
  810. nfc_hci_free_device(info->hdev);
  811. err_alloc_hdev:
  812. free_irq(client->irq, info);
  813. err_rti:
  814. if (pdata->free_resources != NULL)
  815. pdata->free_resources();
  816. err_pdata:
  817. kfree(info);
  818. err_info_alloc:
  819. return r;
  820. }
  821. static __devexit int pn544_hci_remove(struct i2c_client *client)
  822. {
  823. struct pn544_hci_info *info = i2c_get_clientdata(client);
  824. struct pn544_nfc_platform_data *pdata = client->dev.platform_data;
  825. dev_dbg(&client->dev, "%s\n", __func__);
  826. nfc_hci_free_device(info->hdev);
  827. if (info->state != PN544_ST_COLD) {
  828. if (pdata->disable)
  829. pdata->disable();
  830. }
  831. free_irq(client->irq, info);
  832. if (pdata->free_resources)
  833. pdata->free_resources();
  834. kfree(info);
  835. return 0;
  836. }
  837. static struct i2c_driver pn544_hci_driver = {
  838. .driver = {
  839. .name = PN544_HCI_DRIVER_NAME,
  840. },
  841. .probe = pn544_hci_probe,
  842. .id_table = pn544_hci_id_table,
  843. .remove = __devexit_p(pn544_hci_remove),
  844. };
  845. static int __init pn544_hci_init(void)
  846. {
  847. int r;
  848. pr_debug(DRIVER_DESC ": %s\n", __func__);
  849. r = i2c_add_driver(&pn544_hci_driver);
  850. if (r) {
  851. pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n");
  852. return r;
  853. }
  854. return 0;
  855. }
  856. static void __exit pn544_hci_exit(void)
  857. {
  858. i2c_del_driver(&pn544_hci_driver);
  859. }
  860. module_init(pn544_hci_init);
  861. module_exit(pn544_hci_exit);
  862. MODULE_LICENSE("GPL");
  863. MODULE_DESCRIPTION(DRIVER_DESC);