omap-usb-tll.c 13 KB

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  1. /**
  2. * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
  5. * Author: Keshava Munegowda <keshava_mgowda@ti.com>
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 of
  9. * the License as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/types.h>
  22. #include <linux/slab.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/clk.h>
  26. #include <linux/io.h>
  27. #include <linux/err.h>
  28. #include <linux/pm_runtime.h>
  29. #include <linux/platform_data/usb-omap.h>
  30. #define USBTLL_DRIVER_NAME "usbhs_tll"
  31. /* TLL Register Set */
  32. #define OMAP_USBTLL_REVISION (0x00)
  33. #define OMAP_USBTLL_SYSCONFIG (0x10)
  34. #define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
  35. #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
  36. #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
  37. #define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
  38. #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
  39. #define OMAP_USBTLL_SYSSTATUS (0x14)
  40. #define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
  41. #define OMAP_USBTLL_IRQSTATUS (0x18)
  42. #define OMAP_USBTLL_IRQENABLE (0x1C)
  43. #define OMAP_TLL_SHARED_CONF (0x30)
  44. #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
  45. #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
  46. #define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
  47. #define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
  48. #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
  49. #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
  50. #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
  51. #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
  52. #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
  53. #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
  54. #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
  55. #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
  56. #define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
  57. #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
  58. #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
  59. #define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
  60. #define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
  61. #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
  62. #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
  63. #define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
  64. #define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
  65. #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
  66. #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
  67. #define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
  68. #define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
  69. #define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
  70. #define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
  71. #define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
  72. #define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
  73. #define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
  74. #define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
  75. #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
  76. #define OMAP_REV2_TLL_CHANNEL_COUNT 2
  77. #define OMAP_TLL_CHANNEL_COUNT 3
  78. #define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
  79. #define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
  80. #define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
  81. /* Values of USBTLL_REVISION - Note: these are not given in the TRM */
  82. #define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */
  83. #define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */
  84. #define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */
  85. #define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
  86. struct usbtll_omap {
  87. struct clk *usbtll_p1_fck;
  88. struct clk *usbtll_p2_fck;
  89. int nch; /* num. of channels */
  90. struct usbhs_omap_platform_data *pdata;
  91. /* secure the register updates */
  92. spinlock_t lock;
  93. };
  94. /*-------------------------------------------------------------------------*/
  95. const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
  96. struct platform_device *tll_pdev;
  97. /*-------------------------------------------------------------------------*/
  98. static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
  99. {
  100. __raw_writel(val, base + reg);
  101. }
  102. static inline u32 usbtll_read(void __iomem *base, u32 reg)
  103. {
  104. return __raw_readl(base + reg);
  105. }
  106. static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
  107. {
  108. __raw_writeb(val, base + reg);
  109. }
  110. static inline u8 usbtll_readb(void __iomem *base, u8 reg)
  111. {
  112. return __raw_readb(base + reg);
  113. }
  114. /*-------------------------------------------------------------------------*/
  115. static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
  116. {
  117. switch (pmode) {
  118. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  119. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  120. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  121. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  122. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  123. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  124. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  125. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  126. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  127. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  128. return true;
  129. default:
  130. return false;
  131. }
  132. }
  133. /*
  134. * convert the port-mode enum to a value we can use in the FSLSMODE
  135. * field of USBTLL_CHANNEL_CONF
  136. */
  137. static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
  138. {
  139. switch (mode) {
  140. case OMAP_USBHS_PORT_MODE_UNUSED:
  141. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  142. return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
  143. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  144. return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
  145. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  146. return OMAP_TLL_FSLSMODE_3PIN_PHY;
  147. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  148. return OMAP_TLL_FSLSMODE_4PIN_PHY;
  149. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  150. return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
  151. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  152. return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
  153. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  154. return OMAP_TLL_FSLSMODE_3PIN_TLL;
  155. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  156. return OMAP_TLL_FSLSMODE_4PIN_TLL;
  157. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  158. return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
  159. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  160. return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
  161. default:
  162. pr_warn("Invalid port mode, using default\n");
  163. return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
  164. }
  165. }
  166. /**
  167. * usbtll_omap_probe - initialize TI-based HCDs
  168. *
  169. * Allocates basic resources for this USB host controller.
  170. */
  171. static int usbtll_omap_probe(struct platform_device *pdev)
  172. {
  173. struct device *dev = &pdev->dev;
  174. struct usbhs_omap_platform_data *pdata = dev->platform_data;
  175. void __iomem *base;
  176. struct resource *res;
  177. struct usbtll_omap *tll;
  178. unsigned reg;
  179. unsigned long flags;
  180. int ret = 0;
  181. int i, ver;
  182. dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
  183. tll = kzalloc(sizeof(struct usbtll_omap), GFP_KERNEL);
  184. if (!tll) {
  185. dev_err(dev, "Memory allocation failed\n");
  186. ret = -ENOMEM;
  187. goto end;
  188. }
  189. spin_lock_init(&tll->lock);
  190. tll->pdata = pdata;
  191. tll->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk");
  192. if (IS_ERR(tll->usbtll_p1_fck)) {
  193. ret = PTR_ERR(tll->usbtll_p1_fck);
  194. dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret);
  195. goto err_tll;
  196. }
  197. tll->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk");
  198. if (IS_ERR(tll->usbtll_p2_fck)) {
  199. ret = PTR_ERR(tll->usbtll_p2_fck);
  200. dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret);
  201. goto err_usbtll_p1_fck;
  202. }
  203. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  204. if (!res) {
  205. dev_err(dev, "usb tll get resource failed\n");
  206. ret = -ENODEV;
  207. goto err_usbtll_p2_fck;
  208. }
  209. base = ioremap(res->start, resource_size(res));
  210. if (!base) {
  211. dev_err(dev, "TLL ioremap failed\n");
  212. ret = -ENOMEM;
  213. goto err_usbtll_p2_fck;
  214. }
  215. platform_set_drvdata(pdev, tll);
  216. pm_runtime_enable(dev);
  217. pm_runtime_get_sync(dev);
  218. spin_lock_irqsave(&tll->lock, flags);
  219. ver = usbtll_read(base, OMAP_USBTLL_REVISION);
  220. switch (ver) {
  221. case OMAP_USBTLL_REV1:
  222. tll->nch = OMAP_TLL_CHANNEL_COUNT;
  223. break;
  224. case OMAP_USBTLL_REV2:
  225. case OMAP_USBTLL_REV3:
  226. tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
  227. break;
  228. default:
  229. tll->nch = OMAP_TLL_CHANNEL_COUNT;
  230. dev_dbg(dev,
  231. "USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
  232. ver, tll->nch);
  233. break;
  234. }
  235. if (is_ehci_tll_mode(pdata->port_mode[0]) ||
  236. is_ehci_tll_mode(pdata->port_mode[1]) ||
  237. is_ehci_tll_mode(pdata->port_mode[2]) ||
  238. is_ohci_port(pdata->port_mode[0]) ||
  239. is_ohci_port(pdata->port_mode[1]) ||
  240. is_ohci_port(pdata->port_mode[2])) {
  241. /* Program Common TLL register */
  242. reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
  243. reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
  244. | OMAP_TLL_SHARED_CONF_USB_DIVRATION);
  245. reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
  246. reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
  247. usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
  248. /* Enable channels now */
  249. for (i = 0; i < tll->nch; i++) {
  250. reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
  251. if (is_ohci_port(pdata->port_mode[i])) {
  252. reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
  253. << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
  254. reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
  255. } else if (pdata->port_mode[i] ==
  256. OMAP_EHCI_PORT_MODE_TLL) {
  257. /*
  258. * Disable AutoIdle, BitStuffing
  259. * and use SDR Mode
  260. */
  261. reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
  262. | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
  263. | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
  264. } else {
  265. continue;
  266. }
  267. reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
  268. usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
  269. usbtll_writeb(base,
  270. OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
  271. 0xbe);
  272. }
  273. }
  274. spin_unlock_irqrestore(&tll->lock, flags);
  275. iounmap(base);
  276. pm_runtime_put_sync(dev);
  277. tll_pdev = pdev;
  278. if (!ret)
  279. goto end;
  280. pm_runtime_disable(dev);
  281. err_usbtll_p2_fck:
  282. clk_put(tll->usbtll_p2_fck);
  283. err_usbtll_p1_fck:
  284. clk_put(tll->usbtll_p1_fck);
  285. err_tll:
  286. kfree(tll);
  287. end:
  288. return ret;
  289. }
  290. /**
  291. * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
  292. * @pdev: USB Host Controller being removed
  293. *
  294. * Reverses the effect of usbtll_omap_probe().
  295. */
  296. static int usbtll_omap_remove(struct platform_device *pdev)
  297. {
  298. struct usbtll_omap *tll = platform_get_drvdata(pdev);
  299. clk_put(tll->usbtll_p2_fck);
  300. clk_put(tll->usbtll_p1_fck);
  301. pm_runtime_disable(&pdev->dev);
  302. kfree(tll);
  303. return 0;
  304. }
  305. static int usbtll_runtime_resume(struct device *dev)
  306. {
  307. struct usbtll_omap *tll = dev_get_drvdata(dev);
  308. struct usbhs_omap_platform_data *pdata = tll->pdata;
  309. unsigned long flags;
  310. dev_dbg(dev, "usbtll_runtime_resume\n");
  311. if (!pdata) {
  312. dev_dbg(dev, "missing platform_data\n");
  313. return -ENODEV;
  314. }
  315. spin_lock_irqsave(&tll->lock, flags);
  316. if (is_ehci_tll_mode(pdata->port_mode[0]))
  317. clk_enable(tll->usbtll_p1_fck);
  318. if (is_ehci_tll_mode(pdata->port_mode[1]))
  319. clk_enable(tll->usbtll_p2_fck);
  320. spin_unlock_irqrestore(&tll->lock, flags);
  321. return 0;
  322. }
  323. static int usbtll_runtime_suspend(struct device *dev)
  324. {
  325. struct usbtll_omap *tll = dev_get_drvdata(dev);
  326. struct usbhs_omap_platform_data *pdata = tll->pdata;
  327. unsigned long flags;
  328. dev_dbg(dev, "usbtll_runtime_suspend\n");
  329. if (!pdata) {
  330. dev_dbg(dev, "missing platform_data\n");
  331. return -ENODEV;
  332. }
  333. spin_lock_irqsave(&tll->lock, flags);
  334. if (is_ehci_tll_mode(pdata->port_mode[0]))
  335. clk_disable(tll->usbtll_p1_fck);
  336. if (is_ehci_tll_mode(pdata->port_mode[1]))
  337. clk_disable(tll->usbtll_p2_fck);
  338. spin_unlock_irqrestore(&tll->lock, flags);
  339. return 0;
  340. }
  341. static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
  342. SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
  343. usbtll_runtime_resume,
  344. NULL)
  345. };
  346. static struct platform_driver usbtll_omap_driver = {
  347. .driver = {
  348. .name = (char *)usbtll_driver_name,
  349. .owner = THIS_MODULE,
  350. .pm = &usbtllomap_dev_pm_ops,
  351. },
  352. .probe = usbtll_omap_probe,
  353. .remove = usbtll_omap_remove,
  354. };
  355. int omap_tll_enable(void)
  356. {
  357. if (!tll_pdev) {
  358. pr_err("missing omap usbhs tll platform_data\n");
  359. return -ENODEV;
  360. }
  361. return pm_runtime_get_sync(&tll_pdev->dev);
  362. }
  363. EXPORT_SYMBOL_GPL(omap_tll_enable);
  364. int omap_tll_disable(void)
  365. {
  366. if (!tll_pdev) {
  367. pr_err("missing omap usbhs tll platform_data\n");
  368. return -ENODEV;
  369. }
  370. return pm_runtime_put_sync(&tll_pdev->dev);
  371. }
  372. EXPORT_SYMBOL_GPL(omap_tll_disable);
  373. MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
  374. MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
  375. MODULE_LICENSE("GPL v2");
  376. MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
  377. static int __init omap_usbtll_drvinit(void)
  378. {
  379. return platform_driver_register(&usbtll_omap_driver);
  380. }
  381. /*
  382. * init before usbhs core driver;
  383. * The usbtll driver should be initialized before
  384. * the usbhs core driver probe function is called.
  385. */
  386. fs_initcall(omap_usbtll_drvinit);
  387. static void __exit omap_usbtll_drvexit(void)
  388. {
  389. platform_driver_unregister(&usbtll_omap_driver);
  390. }
  391. module_exit(omap_usbtll_drvexit);