rtc-sa1100.c 12 KB

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  1. /*
  2. * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
  3. *
  4. * Copyright (c) 2000 Nils Faerber
  5. *
  6. * Based on rtc.c by Paul Gortmaker
  7. *
  8. * Original Driver by Nils Faerber <nils@kernelconcepts.de>
  9. *
  10. * Modifications from:
  11. * CIH <cih@coventive.com>
  12. * Nicolas Pitre <nico@fluxnic.net>
  13. * Andrew Christian <andrew.christian@hp.com>
  14. *
  15. * Converted to the RTC subsystem and Driver Model
  16. * by Richard Purdie <rpurdie@rpsys.net>
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License
  20. * as published by the Free Software Foundation; either version
  21. * 2 of the License, or (at your option) any later version.
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/module.h>
  25. #include <linux/rtc.h>
  26. #include <linux/init.h>
  27. #include <linux/fs.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/string.h>
  30. #include <linux/pm.h>
  31. #include <linux/bitops.h>
  32. #include <mach/hardware.h>
  33. #include <asm/irq.h>
  34. #ifdef CONFIG_ARCH_PXA
  35. #include <mach/regs-rtc.h>
  36. #include <mach/regs-ost.h>
  37. #endif
  38. #define RTC_DEF_DIVIDER (32768 - 1)
  39. #define RTC_DEF_TRIM 0
  40. static unsigned long rtc_freq = 1024;
  41. static unsigned long timer_freq;
  42. static struct rtc_time rtc_alarm;
  43. static DEFINE_SPINLOCK(sa1100_rtc_lock);
  44. static inline int rtc_periodic_alarm(struct rtc_time *tm)
  45. {
  46. return (tm->tm_year == -1) ||
  47. ((unsigned)tm->tm_mon >= 12) ||
  48. ((unsigned)(tm->tm_mday - 1) >= 31) ||
  49. ((unsigned)tm->tm_hour > 23) ||
  50. ((unsigned)tm->tm_min > 59) ||
  51. ((unsigned)tm->tm_sec > 59);
  52. }
  53. /*
  54. * Calculate the next alarm time given the requested alarm time mask
  55. * and the current time.
  56. */
  57. static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
  58. struct rtc_time *alrm)
  59. {
  60. unsigned long next_time;
  61. unsigned long now_time;
  62. next->tm_year = now->tm_year;
  63. next->tm_mon = now->tm_mon;
  64. next->tm_mday = now->tm_mday;
  65. next->tm_hour = alrm->tm_hour;
  66. next->tm_min = alrm->tm_min;
  67. next->tm_sec = alrm->tm_sec;
  68. rtc_tm_to_time(now, &now_time);
  69. rtc_tm_to_time(next, &next_time);
  70. if (next_time < now_time) {
  71. /* Advance one day */
  72. next_time += 60 * 60 * 24;
  73. rtc_time_to_tm(next_time, next);
  74. }
  75. }
  76. static int rtc_update_alarm(struct rtc_time *alrm)
  77. {
  78. struct rtc_time alarm_tm, now_tm;
  79. unsigned long now, time;
  80. int ret;
  81. do {
  82. now = RCNR;
  83. rtc_time_to_tm(now, &now_tm);
  84. rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
  85. ret = rtc_tm_to_time(&alarm_tm, &time);
  86. if (ret != 0)
  87. break;
  88. RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
  89. RTAR = time;
  90. } while (now != RCNR);
  91. return ret;
  92. }
  93. static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
  94. {
  95. struct platform_device *pdev = to_platform_device(dev_id);
  96. struct rtc_device *rtc = platform_get_drvdata(pdev);
  97. unsigned int rtsr;
  98. unsigned long events = 0;
  99. spin_lock(&sa1100_rtc_lock);
  100. rtsr = RTSR;
  101. /* clear interrupt sources */
  102. RTSR = 0;
  103. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  104. * See also the comments in sa1100_rtc_probe(). */
  105. if (rtsr & (RTSR_ALE | RTSR_HZE)) {
  106. /* This is the original code, before there was the if test
  107. * above. This code does not clear interrupts that were not
  108. * enabled. */
  109. RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
  110. } else {
  111. /* For some reason, it is possible to enter this routine
  112. * without interruptions enabled, it has been tested with
  113. * several units (Bug in SA11xx chip?).
  114. *
  115. * This situation leads to an infinite "loop" of interrupt
  116. * routine calling and as a result the processor seems to
  117. * lock on its first call to open(). */
  118. RTSR = RTSR_AL | RTSR_HZ;
  119. }
  120. /* clear alarm interrupt if it has occurred */
  121. if (rtsr & RTSR_AL)
  122. rtsr &= ~RTSR_ALE;
  123. RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
  124. /* update irq data & counter */
  125. if (rtsr & RTSR_AL)
  126. events |= RTC_AF | RTC_IRQF;
  127. if (rtsr & RTSR_HZ)
  128. events |= RTC_UF | RTC_IRQF;
  129. rtc_update_irq(rtc, 1, events);
  130. if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
  131. rtc_update_alarm(&rtc_alarm);
  132. spin_unlock(&sa1100_rtc_lock);
  133. return IRQ_HANDLED;
  134. }
  135. static int rtc_timer1_count;
  136. static irqreturn_t timer1_interrupt(int irq, void *dev_id)
  137. {
  138. struct platform_device *pdev = to_platform_device(dev_id);
  139. struct rtc_device *rtc = platform_get_drvdata(pdev);
  140. /*
  141. * If we match for the first time, rtc_timer1_count will be 1.
  142. * Otherwise, we wrapped around (very unlikely but
  143. * still possible) so compute the amount of missed periods.
  144. * The match reg is updated only when the data is actually retrieved
  145. * to avoid unnecessary interrupts.
  146. */
  147. OSSR = OSSR_M1; /* clear match on timer1 */
  148. rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF);
  149. if (rtc_timer1_count == 1)
  150. rtc_timer1_count = (rtc_freq * ((1 << 30) / (timer_freq >> 2)));
  151. return IRQ_HANDLED;
  152. }
  153. static int sa1100_rtc_read_callback(struct device *dev, int data)
  154. {
  155. if (data & RTC_PF) {
  156. /* interpolate missed periods and set match for the next */
  157. unsigned long period = timer_freq / rtc_freq;
  158. unsigned long oscr = OSCR;
  159. unsigned long osmr1 = OSMR1;
  160. unsigned long missed = (oscr - osmr1)/period;
  161. data += missed << 8;
  162. OSSR = OSSR_M1; /* clear match on timer 1 */
  163. OSMR1 = osmr1 + (missed + 1)*period;
  164. /* Ensure we didn't miss another match in the mean time.
  165. * Here we compare (match - OSCR) 8 instead of 0 --
  166. * see comment in pxa_timer_interrupt() for explanation.
  167. */
  168. while ((signed long)((osmr1 = OSMR1) - OSCR) <= 8) {
  169. data += 0x100;
  170. OSSR = OSSR_M1; /* clear match on timer 1 */
  171. OSMR1 = osmr1 + period;
  172. }
  173. }
  174. return data;
  175. }
  176. static int sa1100_rtc_open(struct device *dev)
  177. {
  178. int ret;
  179. ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
  180. "rtc 1Hz", dev);
  181. if (ret) {
  182. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
  183. goto fail_ui;
  184. }
  185. ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
  186. "rtc Alrm", dev);
  187. if (ret) {
  188. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
  189. goto fail_ai;
  190. }
  191. ret = request_irq(IRQ_OST1, timer1_interrupt, IRQF_DISABLED,
  192. "rtc timer", dev);
  193. if (ret) {
  194. dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1);
  195. goto fail_pi;
  196. }
  197. return 0;
  198. fail_pi:
  199. free_irq(IRQ_RTCAlrm, dev);
  200. fail_ai:
  201. free_irq(IRQ_RTC1Hz, dev);
  202. fail_ui:
  203. return ret;
  204. }
  205. static void sa1100_rtc_release(struct device *dev)
  206. {
  207. spin_lock_irq(&sa1100_rtc_lock);
  208. RTSR = 0;
  209. OIER &= ~OIER_E1;
  210. OSSR = OSSR_M1;
  211. spin_unlock_irq(&sa1100_rtc_lock);
  212. free_irq(IRQ_OST1, dev);
  213. free_irq(IRQ_RTCAlrm, dev);
  214. free_irq(IRQ_RTC1Hz, dev);
  215. }
  216. static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd,
  217. unsigned long arg)
  218. {
  219. switch (cmd) {
  220. case RTC_AIE_OFF:
  221. spin_lock_irq(&sa1100_rtc_lock);
  222. RTSR &= ~RTSR_ALE;
  223. spin_unlock_irq(&sa1100_rtc_lock);
  224. return 0;
  225. case RTC_AIE_ON:
  226. spin_lock_irq(&sa1100_rtc_lock);
  227. RTSR |= RTSR_ALE;
  228. spin_unlock_irq(&sa1100_rtc_lock);
  229. return 0;
  230. case RTC_UIE_OFF:
  231. spin_lock_irq(&sa1100_rtc_lock);
  232. RTSR &= ~RTSR_HZE;
  233. spin_unlock_irq(&sa1100_rtc_lock);
  234. return 0;
  235. case RTC_UIE_ON:
  236. spin_lock_irq(&sa1100_rtc_lock);
  237. RTSR |= RTSR_HZE;
  238. spin_unlock_irq(&sa1100_rtc_lock);
  239. return 0;
  240. case RTC_PIE_OFF:
  241. spin_lock_irq(&sa1100_rtc_lock);
  242. OIER &= ~OIER_E1;
  243. spin_unlock_irq(&sa1100_rtc_lock);
  244. return 0;
  245. case RTC_PIE_ON:
  246. spin_lock_irq(&sa1100_rtc_lock);
  247. OSMR1 = timer_freq / rtc_freq + OSCR;
  248. OIER |= OIER_E1;
  249. rtc_timer1_count = 1;
  250. spin_unlock_irq(&sa1100_rtc_lock);
  251. return 0;
  252. case RTC_IRQP_READ:
  253. return put_user(rtc_freq, (unsigned long *)arg);
  254. case RTC_IRQP_SET:
  255. if (arg < 1 || arg > timer_freq)
  256. return -EINVAL;
  257. rtc_freq = arg;
  258. return 0;
  259. }
  260. return -ENOIOCTLCMD;
  261. }
  262. static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
  263. {
  264. rtc_time_to_tm(RCNR, tm);
  265. return 0;
  266. }
  267. static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
  268. {
  269. unsigned long time;
  270. int ret;
  271. ret = rtc_tm_to_time(tm, &time);
  272. if (ret == 0)
  273. RCNR = time;
  274. return ret;
  275. }
  276. static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  277. {
  278. u32 rtsr;
  279. memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
  280. rtsr = RTSR;
  281. alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
  282. alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
  283. return 0;
  284. }
  285. static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  286. {
  287. int ret;
  288. spin_lock_irq(&sa1100_rtc_lock);
  289. ret = rtc_update_alarm(&alrm->time);
  290. if (ret == 0) {
  291. if (alrm->enabled)
  292. RTSR |= RTSR_ALE;
  293. else
  294. RTSR &= ~RTSR_ALE;
  295. }
  296. spin_unlock_irq(&sa1100_rtc_lock);
  297. return ret;
  298. }
  299. static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
  300. {
  301. seq_printf(seq, "trim/divider\t: 0x%08x\n", (u32) RTTR);
  302. seq_printf(seq, "update_IRQ\t: %s\n",
  303. (RTSR & RTSR_HZE) ? "yes" : "no");
  304. seq_printf(seq, "periodic_IRQ\t: %s\n",
  305. (OIER & OIER_E1) ? "yes" : "no");
  306. seq_printf(seq, "periodic_freq\t: %ld\n", rtc_freq);
  307. seq_printf(seq, "RTSR\t\t: 0x%08x\n", (u32)RTSR);
  308. return 0;
  309. }
  310. static const struct rtc_class_ops sa1100_rtc_ops = {
  311. .open = sa1100_rtc_open,
  312. .read_callback = sa1100_rtc_read_callback,
  313. .release = sa1100_rtc_release,
  314. .ioctl = sa1100_rtc_ioctl,
  315. .read_time = sa1100_rtc_read_time,
  316. .set_time = sa1100_rtc_set_time,
  317. .read_alarm = sa1100_rtc_read_alarm,
  318. .set_alarm = sa1100_rtc_set_alarm,
  319. .proc = sa1100_rtc_proc,
  320. };
  321. static int sa1100_rtc_probe(struct platform_device *pdev)
  322. {
  323. struct rtc_device *rtc;
  324. timer_freq = get_clock_tick_rate();
  325. /*
  326. * According to the manual we should be able to let RTTR be zero
  327. * and then a default diviser for a 32.768KHz clock is used.
  328. * Apparently this doesn't work, at least for my SA1110 rev 5.
  329. * If the clock divider is uninitialized then reset it to the
  330. * default value to get the 1Hz clock.
  331. */
  332. if (RTTR == 0) {
  333. RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
  334. dev_warn(&pdev->dev, "warning: "
  335. "initializing default clock divider/trim value\n");
  336. /* The current RTC value probably doesn't make sense either */
  337. RCNR = 0;
  338. }
  339. device_init_wakeup(&pdev->dev, 1);
  340. rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
  341. THIS_MODULE);
  342. if (IS_ERR(rtc))
  343. return PTR_ERR(rtc);
  344. platform_set_drvdata(pdev, rtc);
  345. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  346. * See also the comments in sa1100_rtc_interrupt().
  347. *
  348. * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
  349. * interrupt pending, even though interrupts were never enabled.
  350. * In this case, this bit it must be reset before enabling
  351. * interruptions to avoid a nonexistent interrupt to occur.
  352. *
  353. * In principle, the same problem would apply to bit 0, although it has
  354. * never been observed to happen.
  355. *
  356. * This issue is addressed both here and in sa1100_rtc_interrupt().
  357. * If the issue is not addressed here, in the times when the processor
  358. * wakes up with the bit set there will be one spurious interrupt.
  359. *
  360. * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
  361. * safe side, once the condition that lead to this strange
  362. * initialization is unknown and could in principle happen during
  363. * normal processing.
  364. *
  365. * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
  366. * the corresponding bits in RTSR. */
  367. RTSR = RTSR_AL | RTSR_HZ;
  368. return 0;
  369. }
  370. static int sa1100_rtc_remove(struct platform_device *pdev)
  371. {
  372. struct rtc_device *rtc = platform_get_drvdata(pdev);
  373. if (rtc)
  374. rtc_device_unregister(rtc);
  375. return 0;
  376. }
  377. #ifdef CONFIG_PM
  378. static int sa1100_rtc_suspend(struct device *dev)
  379. {
  380. if (device_may_wakeup(dev))
  381. enable_irq_wake(IRQ_RTCAlrm);
  382. return 0;
  383. }
  384. static int sa1100_rtc_resume(struct device *dev)
  385. {
  386. if (device_may_wakeup(dev))
  387. disable_irq_wake(IRQ_RTCAlrm);
  388. return 0;
  389. }
  390. static const struct dev_pm_ops sa1100_rtc_pm_ops = {
  391. .suspend = sa1100_rtc_suspend,
  392. .resume = sa1100_rtc_resume,
  393. };
  394. #endif
  395. static struct platform_driver sa1100_rtc_driver = {
  396. .probe = sa1100_rtc_probe,
  397. .remove = sa1100_rtc_remove,
  398. .driver = {
  399. .name = "sa1100-rtc",
  400. #ifdef CONFIG_PM
  401. .pm = &sa1100_rtc_pm_ops,
  402. #endif
  403. },
  404. };
  405. static int __init sa1100_rtc_init(void)
  406. {
  407. return platform_driver_register(&sa1100_rtc_driver);
  408. }
  409. static void __exit sa1100_rtc_exit(void)
  410. {
  411. platform_driver_unregister(&sa1100_rtc_driver);
  412. }
  413. module_init(sa1100_rtc_init);
  414. module_exit(sa1100_rtc_exit);
  415. MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
  416. MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
  417. MODULE_LICENSE("GPL");
  418. MODULE_ALIAS("platform:sa1100-rtc");