intel_lvds.c 34 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. u32 pfit_control;
  48. u32 pfit_pgm_ratios;
  49. bool pfit_dirty;
  50. bool is_dual_link;
  51. u32 reg;
  52. struct intel_lvds_connector *attached_connector;
  53. };
  54. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  55. {
  56. return container_of(encoder, struct intel_lvds_encoder, base.base);
  57. }
  58. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  59. {
  60. return container_of(connector, struct intel_lvds_connector, base.base);
  61. }
  62. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  63. enum pipe *pipe)
  64. {
  65. struct drm_device *dev = encoder->base.dev;
  66. struct drm_i915_private *dev_priv = dev->dev_private;
  67. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  68. u32 tmp;
  69. tmp = I915_READ(lvds_encoder->reg);
  70. if (!(tmp & LVDS_PORT_EN))
  71. return false;
  72. if (HAS_PCH_CPT(dev))
  73. *pipe = PORT_TO_PIPE_CPT(tmp);
  74. else
  75. *pipe = PORT_TO_PIPE(tmp);
  76. return true;
  77. }
  78. /**
  79. * Sets the power state for the panel.
  80. */
  81. static void intel_enable_lvds(struct intel_encoder *encoder)
  82. {
  83. struct drm_device *dev = encoder->base.dev;
  84. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  85. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  86. struct drm_i915_private *dev_priv = dev->dev_private;
  87. u32 ctl_reg, stat_reg;
  88. if (HAS_PCH_SPLIT(dev)) {
  89. ctl_reg = PCH_PP_CONTROL;
  90. stat_reg = PCH_PP_STATUS;
  91. } else {
  92. ctl_reg = PP_CONTROL;
  93. stat_reg = PP_STATUS;
  94. }
  95. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  96. if (lvds_encoder->pfit_dirty) {
  97. /*
  98. * Enable automatic panel scaling so that non-native modes
  99. * fill the screen. The panel fitter should only be
  100. * adjusted whilst the pipe is disabled, according to
  101. * register description and PRM.
  102. */
  103. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  104. lvds_encoder->pfit_control,
  105. lvds_encoder->pfit_pgm_ratios);
  106. I915_WRITE(PFIT_PGM_RATIOS, lvds_encoder->pfit_pgm_ratios);
  107. I915_WRITE(PFIT_CONTROL, lvds_encoder->pfit_control);
  108. lvds_encoder->pfit_dirty = false;
  109. }
  110. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  111. POSTING_READ(lvds_encoder->reg);
  112. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  113. DRM_ERROR("timed out waiting for panel to power on\n");
  114. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  115. }
  116. static void intel_disable_lvds(struct intel_encoder *encoder)
  117. {
  118. struct drm_device *dev = encoder->base.dev;
  119. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  120. struct drm_i915_private *dev_priv = dev->dev_private;
  121. u32 ctl_reg, stat_reg;
  122. if (HAS_PCH_SPLIT(dev)) {
  123. ctl_reg = PCH_PP_CONTROL;
  124. stat_reg = PCH_PP_STATUS;
  125. } else {
  126. ctl_reg = PP_CONTROL;
  127. stat_reg = PP_STATUS;
  128. }
  129. intel_panel_disable_backlight(dev);
  130. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  131. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  132. DRM_ERROR("timed out waiting for panel to power off\n");
  133. if (lvds_encoder->pfit_control) {
  134. I915_WRITE(PFIT_CONTROL, 0);
  135. lvds_encoder->pfit_dirty = true;
  136. }
  137. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  138. POSTING_READ(lvds_encoder->reg);
  139. }
  140. static int intel_lvds_mode_valid(struct drm_connector *connector,
  141. struct drm_display_mode *mode)
  142. {
  143. struct intel_connector *intel_connector = to_intel_connector(connector);
  144. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  145. if (mode->hdisplay > fixed_mode->hdisplay)
  146. return MODE_PANEL;
  147. if (mode->vdisplay > fixed_mode->vdisplay)
  148. return MODE_PANEL;
  149. return MODE_OK;
  150. }
  151. static void
  152. centre_horizontally(struct drm_display_mode *mode,
  153. int width)
  154. {
  155. u32 border, sync_pos, blank_width, sync_width;
  156. /* keep the hsync and hblank widths constant */
  157. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  158. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  159. sync_pos = (blank_width - sync_width + 1) / 2;
  160. border = (mode->hdisplay - width + 1) / 2;
  161. border += border & 1; /* make the border even */
  162. mode->crtc_hdisplay = width;
  163. mode->crtc_hblank_start = width + border;
  164. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  165. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  166. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  167. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  168. }
  169. static void
  170. centre_vertically(struct drm_display_mode *mode,
  171. int height)
  172. {
  173. u32 border, sync_pos, blank_width, sync_width;
  174. /* keep the vsync and vblank widths constant */
  175. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  176. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  177. sync_pos = (blank_width - sync_width + 1) / 2;
  178. border = (mode->vdisplay - height + 1) / 2;
  179. mode->crtc_vdisplay = height;
  180. mode->crtc_vblank_start = height + border;
  181. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  182. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  183. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  184. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  185. }
  186. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  187. {
  188. /*
  189. * Floating point operation is not supported. So the FACTOR
  190. * is defined, which can avoid the floating point computation
  191. * when calculating the panel ratio.
  192. */
  193. #define ACCURACY 12
  194. #define FACTOR (1 << ACCURACY)
  195. u32 ratio = source * FACTOR / target;
  196. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  197. }
  198. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  199. const struct drm_display_mode *mode,
  200. struct drm_display_mode *adjusted_mode)
  201. {
  202. struct drm_device *dev = encoder->dev;
  203. struct drm_i915_private *dev_priv = dev->dev_private;
  204. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
  205. struct intel_connector *intel_connector =
  206. &lvds_encoder->attached_connector->base;
  207. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  208. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  209. int pipe;
  210. /* Should never happen!! */
  211. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  212. DRM_ERROR("Can't support LVDS on pipe A\n");
  213. return false;
  214. }
  215. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  216. return false;
  217. /*
  218. * We have timings from the BIOS for the panel, put them in
  219. * to the adjusted mode. The CRTC will be set up for this mode,
  220. * with the panel scaling set up to source from the H/VDisplay
  221. * of the original mode.
  222. */
  223. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  224. adjusted_mode);
  225. if (HAS_PCH_SPLIT(dev)) {
  226. intel_pch_panel_fitting(dev,
  227. intel_connector->panel.fitting_mode,
  228. mode, adjusted_mode);
  229. return true;
  230. }
  231. /* Native modes don't need fitting */
  232. if (adjusted_mode->hdisplay == mode->hdisplay &&
  233. adjusted_mode->vdisplay == mode->vdisplay)
  234. goto out;
  235. /* 965+ wants fuzzy fitting */
  236. if (INTEL_INFO(dev)->gen >= 4)
  237. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  238. PFIT_FILTER_FUZZY);
  239. /*
  240. * Enable automatic panel scaling for non-native modes so that they fill
  241. * the screen. Should be enabled before the pipe is enabled, according
  242. * to register description and PRM.
  243. * Change the value here to see the borders for debugging
  244. */
  245. for_each_pipe(pipe)
  246. I915_WRITE(BCLRPAT(pipe), 0);
  247. drm_mode_set_crtcinfo(adjusted_mode, 0);
  248. switch (intel_connector->panel.fitting_mode) {
  249. case DRM_MODE_SCALE_CENTER:
  250. /*
  251. * For centered modes, we have to calculate border widths &
  252. * heights and modify the values programmed into the CRTC.
  253. */
  254. centre_horizontally(adjusted_mode, mode->hdisplay);
  255. centre_vertically(adjusted_mode, mode->vdisplay);
  256. border = LVDS_BORDER_ENABLE;
  257. break;
  258. case DRM_MODE_SCALE_ASPECT:
  259. /* Scale but preserve the aspect ratio */
  260. if (INTEL_INFO(dev)->gen >= 4) {
  261. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  262. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  263. /* 965+ is easy, it does everything in hw */
  264. if (scaled_width > scaled_height)
  265. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  266. else if (scaled_width < scaled_height)
  267. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  268. else if (adjusted_mode->hdisplay != mode->hdisplay)
  269. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  270. } else {
  271. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  272. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  273. /*
  274. * For earlier chips we have to calculate the scaling
  275. * ratio by hand and program it into the
  276. * PFIT_PGM_RATIO register
  277. */
  278. if (scaled_width > scaled_height) { /* pillar */
  279. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  280. border = LVDS_BORDER_ENABLE;
  281. if (mode->vdisplay != adjusted_mode->vdisplay) {
  282. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  283. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  284. bits << PFIT_VERT_SCALE_SHIFT);
  285. pfit_control |= (PFIT_ENABLE |
  286. VERT_INTERP_BILINEAR |
  287. HORIZ_INTERP_BILINEAR);
  288. }
  289. } else if (scaled_width < scaled_height) { /* letter */
  290. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  291. border = LVDS_BORDER_ENABLE;
  292. if (mode->hdisplay != adjusted_mode->hdisplay) {
  293. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  294. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  295. bits << PFIT_VERT_SCALE_SHIFT);
  296. pfit_control |= (PFIT_ENABLE |
  297. VERT_INTERP_BILINEAR |
  298. HORIZ_INTERP_BILINEAR);
  299. }
  300. } else
  301. /* Aspects match, Let hw scale both directions */
  302. pfit_control |= (PFIT_ENABLE |
  303. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  304. VERT_INTERP_BILINEAR |
  305. HORIZ_INTERP_BILINEAR);
  306. }
  307. break;
  308. case DRM_MODE_SCALE_FULLSCREEN:
  309. /*
  310. * Full scaling, even if it changes the aspect ratio.
  311. * Fortunately this is all done for us in hw.
  312. */
  313. if (mode->vdisplay != adjusted_mode->vdisplay ||
  314. mode->hdisplay != adjusted_mode->hdisplay) {
  315. pfit_control |= PFIT_ENABLE;
  316. if (INTEL_INFO(dev)->gen >= 4)
  317. pfit_control |= PFIT_SCALING_AUTO;
  318. else
  319. pfit_control |= (VERT_AUTO_SCALE |
  320. VERT_INTERP_BILINEAR |
  321. HORIZ_AUTO_SCALE |
  322. HORIZ_INTERP_BILINEAR);
  323. }
  324. break;
  325. default:
  326. break;
  327. }
  328. out:
  329. /* If not enabling scaling, be consistent and always use 0. */
  330. if ((pfit_control & PFIT_ENABLE) == 0) {
  331. pfit_control = 0;
  332. pfit_pgm_ratios = 0;
  333. }
  334. /* Make sure pre-965 set dither correctly */
  335. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  336. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  337. if (pfit_control != lvds_encoder->pfit_control ||
  338. pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
  339. lvds_encoder->pfit_control = pfit_control;
  340. lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
  341. lvds_encoder->pfit_dirty = true;
  342. }
  343. dev_priv->lvds_border_bits = border;
  344. /*
  345. * XXX: It would be nice to support lower refresh rates on the
  346. * panels to reduce power consumption, and perhaps match the
  347. * user's requested refresh rate.
  348. */
  349. return true;
  350. }
  351. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  352. struct drm_display_mode *mode,
  353. struct drm_display_mode *adjusted_mode)
  354. {
  355. /*
  356. * The LVDS pin pair will already have been turned on in the
  357. * intel_crtc_mode_set since it has a large impact on the DPLL
  358. * settings.
  359. */
  360. }
  361. /**
  362. * Detect the LVDS connection.
  363. *
  364. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  365. * connected and closed means disconnected. We also send hotplug events as
  366. * needed, using lid status notification from the input layer.
  367. */
  368. static enum drm_connector_status
  369. intel_lvds_detect(struct drm_connector *connector, bool force)
  370. {
  371. struct drm_device *dev = connector->dev;
  372. enum drm_connector_status status;
  373. status = intel_panel_detect(dev);
  374. if (status != connector_status_unknown)
  375. return status;
  376. return connector_status_connected;
  377. }
  378. /**
  379. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  380. */
  381. static int intel_lvds_get_modes(struct drm_connector *connector)
  382. {
  383. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  384. struct drm_device *dev = connector->dev;
  385. struct drm_display_mode *mode;
  386. /* use cached edid if we have one */
  387. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  388. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  389. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  390. if (mode == NULL)
  391. return 0;
  392. drm_mode_probed_add(connector, mode);
  393. return 1;
  394. }
  395. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  396. {
  397. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  398. return 1;
  399. }
  400. /* The GPU hangs up on these systems if modeset is performed on LID open */
  401. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  402. {
  403. .callback = intel_no_modeset_on_lid_dmi_callback,
  404. .ident = "Toshiba Tecra A11",
  405. .matches = {
  406. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  407. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  408. },
  409. },
  410. { } /* terminating entry */
  411. };
  412. /*
  413. * Lid events. Note the use of 'modeset_on_lid':
  414. * - we set it on lid close, and reset it on open
  415. * - we use it as a "only once" bit (ie we ignore
  416. * duplicate events where it was already properly
  417. * set/reset)
  418. * - the suspend/resume paths will also set it to
  419. * zero, since they restore the mode ("lid open").
  420. */
  421. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  422. void *unused)
  423. {
  424. struct intel_lvds_connector *lvds_connector =
  425. container_of(nb, struct intel_lvds_connector, lid_notifier);
  426. struct drm_connector *connector = &lvds_connector->base.base;
  427. struct drm_device *dev = connector->dev;
  428. struct drm_i915_private *dev_priv = dev->dev_private;
  429. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  430. return NOTIFY_OK;
  431. /*
  432. * check and update the status of LVDS connector after receiving
  433. * the LID nofication event.
  434. */
  435. connector->status = connector->funcs->detect(connector, false);
  436. /* Don't force modeset on machines where it causes a GPU lockup */
  437. if (dmi_check_system(intel_no_modeset_on_lid))
  438. return NOTIFY_OK;
  439. if (!acpi_lid_open()) {
  440. dev_priv->modeset_on_lid = 1;
  441. return NOTIFY_OK;
  442. }
  443. if (!dev_priv->modeset_on_lid)
  444. return NOTIFY_OK;
  445. dev_priv->modeset_on_lid = 0;
  446. mutex_lock(&dev->mode_config.mutex);
  447. intel_modeset_setup_hw_state(dev, true);
  448. mutex_unlock(&dev->mode_config.mutex);
  449. return NOTIFY_OK;
  450. }
  451. /**
  452. * intel_lvds_destroy - unregister and free LVDS structures
  453. * @connector: connector to free
  454. *
  455. * Unregister the DDC bus for this connector then free the driver private
  456. * structure.
  457. */
  458. static void intel_lvds_destroy(struct drm_connector *connector)
  459. {
  460. struct intel_lvds_connector *lvds_connector =
  461. to_lvds_connector(connector);
  462. if (lvds_connector->lid_notifier.notifier_call)
  463. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  464. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  465. kfree(lvds_connector->base.edid);
  466. intel_panel_destroy_backlight(connector->dev);
  467. intel_panel_fini(&lvds_connector->base.panel);
  468. drm_sysfs_connector_remove(connector);
  469. drm_connector_cleanup(connector);
  470. kfree(connector);
  471. }
  472. static int intel_lvds_set_property(struct drm_connector *connector,
  473. struct drm_property *property,
  474. uint64_t value)
  475. {
  476. struct intel_connector *intel_connector = to_intel_connector(connector);
  477. struct drm_device *dev = connector->dev;
  478. if (property == dev->mode_config.scaling_mode_property) {
  479. struct drm_crtc *crtc;
  480. if (value == DRM_MODE_SCALE_NONE) {
  481. DRM_DEBUG_KMS("no scaling not supported\n");
  482. return -EINVAL;
  483. }
  484. if (intel_connector->panel.fitting_mode == value) {
  485. /* the LVDS scaling property is not changed */
  486. return 0;
  487. }
  488. intel_connector->panel.fitting_mode = value;
  489. crtc = intel_attached_encoder(connector)->base.crtc;
  490. if (crtc && crtc->enabled) {
  491. /*
  492. * If the CRTC is enabled, the display will be changed
  493. * according to the new panel fitting mode.
  494. */
  495. intel_set_mode(crtc, &crtc->mode,
  496. crtc->x, crtc->y, crtc->fb);
  497. }
  498. }
  499. return 0;
  500. }
  501. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  502. .mode_fixup = intel_lvds_mode_fixup,
  503. .mode_set = intel_lvds_mode_set,
  504. .disable = intel_encoder_noop,
  505. };
  506. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  507. .get_modes = intel_lvds_get_modes,
  508. .mode_valid = intel_lvds_mode_valid,
  509. .best_encoder = intel_best_encoder,
  510. };
  511. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  512. .dpms = intel_connector_dpms,
  513. .detect = intel_lvds_detect,
  514. .fill_modes = drm_helper_probe_single_connector_modes,
  515. .set_property = intel_lvds_set_property,
  516. .destroy = intel_lvds_destroy,
  517. };
  518. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  519. .destroy = intel_encoder_destroy,
  520. };
  521. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  522. {
  523. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  524. return 1;
  525. }
  526. /* These systems claim to have LVDS, but really don't */
  527. static const struct dmi_system_id intel_no_lvds[] = {
  528. {
  529. .callback = intel_no_lvds_dmi_callback,
  530. .ident = "Apple Mac Mini (Core series)",
  531. .matches = {
  532. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  533. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  534. },
  535. },
  536. {
  537. .callback = intel_no_lvds_dmi_callback,
  538. .ident = "Apple Mac Mini (Core 2 series)",
  539. .matches = {
  540. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  541. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  542. },
  543. },
  544. {
  545. .callback = intel_no_lvds_dmi_callback,
  546. .ident = "MSI IM-945GSE-A",
  547. .matches = {
  548. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  549. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  550. },
  551. },
  552. {
  553. .callback = intel_no_lvds_dmi_callback,
  554. .ident = "Dell Studio Hybrid",
  555. .matches = {
  556. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  557. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  558. },
  559. },
  560. {
  561. .callback = intel_no_lvds_dmi_callback,
  562. .ident = "Dell OptiPlex FX170",
  563. .matches = {
  564. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  565. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  566. },
  567. },
  568. {
  569. .callback = intel_no_lvds_dmi_callback,
  570. .ident = "AOpen Mini PC",
  571. .matches = {
  572. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  573. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  574. },
  575. },
  576. {
  577. .callback = intel_no_lvds_dmi_callback,
  578. .ident = "AOpen Mini PC MP915",
  579. .matches = {
  580. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  581. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  582. },
  583. },
  584. {
  585. .callback = intel_no_lvds_dmi_callback,
  586. .ident = "AOpen i915GMm-HFS",
  587. .matches = {
  588. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  589. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  590. },
  591. },
  592. {
  593. .callback = intel_no_lvds_dmi_callback,
  594. .ident = "AOpen i45GMx-I",
  595. .matches = {
  596. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  597. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  598. },
  599. },
  600. {
  601. .callback = intel_no_lvds_dmi_callback,
  602. .ident = "Aopen i945GTt-VFA",
  603. .matches = {
  604. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  605. },
  606. },
  607. {
  608. .callback = intel_no_lvds_dmi_callback,
  609. .ident = "Clientron U800",
  610. .matches = {
  611. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  612. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  613. },
  614. },
  615. {
  616. .callback = intel_no_lvds_dmi_callback,
  617. .ident = "Clientron E830",
  618. .matches = {
  619. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  620. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  621. },
  622. },
  623. {
  624. .callback = intel_no_lvds_dmi_callback,
  625. .ident = "Asus EeeBox PC EB1007",
  626. .matches = {
  627. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  628. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  629. },
  630. },
  631. {
  632. .callback = intel_no_lvds_dmi_callback,
  633. .ident = "Asus AT5NM10T-I",
  634. .matches = {
  635. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  636. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  637. },
  638. },
  639. {
  640. .callback = intel_no_lvds_dmi_callback,
  641. .ident = "Hewlett-Packard HP t5740e Thin Client",
  642. .matches = {
  643. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  644. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  645. },
  646. },
  647. {
  648. .callback = intel_no_lvds_dmi_callback,
  649. .ident = "Hewlett-Packard t5745",
  650. .matches = {
  651. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  652. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  653. },
  654. },
  655. {
  656. .callback = intel_no_lvds_dmi_callback,
  657. .ident = "Hewlett-Packard st5747",
  658. .matches = {
  659. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  660. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  661. },
  662. },
  663. {
  664. .callback = intel_no_lvds_dmi_callback,
  665. .ident = "MSI Wind Box DC500",
  666. .matches = {
  667. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  668. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  669. },
  670. },
  671. {
  672. .callback = intel_no_lvds_dmi_callback,
  673. .ident = "ZOTAC ZBOXSD-ID12/ID13",
  674. .matches = {
  675. DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
  676. DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
  677. },
  678. },
  679. {
  680. .callback = intel_no_lvds_dmi_callback,
  681. .ident = "Gigabyte GA-D525TUD",
  682. .matches = {
  683. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  684. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  685. },
  686. },
  687. {
  688. .callback = intel_no_lvds_dmi_callback,
  689. .ident = "Supermicro X7SPA-H",
  690. .matches = {
  691. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  692. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  693. },
  694. },
  695. { } /* terminating entry */
  696. };
  697. /**
  698. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  699. * @dev: drm device
  700. * @connector: LVDS connector
  701. *
  702. * Find the reduced downclock for LVDS in EDID.
  703. */
  704. static void intel_find_lvds_downclock(struct drm_device *dev,
  705. struct drm_display_mode *fixed_mode,
  706. struct drm_connector *connector)
  707. {
  708. struct drm_i915_private *dev_priv = dev->dev_private;
  709. struct drm_display_mode *scan;
  710. int temp_downclock;
  711. temp_downclock = fixed_mode->clock;
  712. list_for_each_entry(scan, &connector->probed_modes, head) {
  713. /*
  714. * If one mode has the same resolution with the fixed_panel
  715. * mode while they have the different refresh rate, it means
  716. * that the reduced downclock is found for the LVDS. In such
  717. * case we can set the different FPx0/1 to dynamically select
  718. * between low and high frequency.
  719. */
  720. if (scan->hdisplay == fixed_mode->hdisplay &&
  721. scan->hsync_start == fixed_mode->hsync_start &&
  722. scan->hsync_end == fixed_mode->hsync_end &&
  723. scan->htotal == fixed_mode->htotal &&
  724. scan->vdisplay == fixed_mode->vdisplay &&
  725. scan->vsync_start == fixed_mode->vsync_start &&
  726. scan->vsync_end == fixed_mode->vsync_end &&
  727. scan->vtotal == fixed_mode->vtotal) {
  728. if (scan->clock < temp_downclock) {
  729. /*
  730. * The downclock is already found. But we
  731. * expect to find the lower downclock.
  732. */
  733. temp_downclock = scan->clock;
  734. }
  735. }
  736. }
  737. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  738. /* We found the downclock for LVDS. */
  739. dev_priv->lvds_downclock_avail = 1;
  740. dev_priv->lvds_downclock = temp_downclock;
  741. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  742. "Normal clock %dKhz, downclock %dKhz\n",
  743. fixed_mode->clock, temp_downclock);
  744. }
  745. }
  746. /*
  747. * Enumerate the child dev array parsed from VBT to check whether
  748. * the LVDS is present.
  749. * If it is present, return 1.
  750. * If it is not present, return false.
  751. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  752. */
  753. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  754. u8 *i2c_pin)
  755. {
  756. struct drm_i915_private *dev_priv = dev->dev_private;
  757. int i;
  758. if (!dev_priv->child_dev_num)
  759. return true;
  760. for (i = 0; i < dev_priv->child_dev_num; i++) {
  761. struct child_device_config *child = dev_priv->child_dev + i;
  762. /* If the device type is not LFP, continue.
  763. * We have to check both the new identifiers as well as the
  764. * old for compatibility with some BIOSes.
  765. */
  766. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  767. child->device_type != DEVICE_TYPE_LFP)
  768. continue;
  769. if (intel_gmbus_is_port_valid(child->i2c_pin))
  770. *i2c_pin = child->i2c_pin;
  771. /* However, we cannot trust the BIOS writers to populate
  772. * the VBT correctly. Since LVDS requires additional
  773. * information from AIM blocks, a non-zero addin offset is
  774. * a good indicator that the LVDS is actually present.
  775. */
  776. if (child->addin_offset)
  777. return true;
  778. /* But even then some BIOS writers perform some black magic
  779. * and instantiate the device without reference to any
  780. * additional data. Trust that if the VBT was written into
  781. * the OpRegion then they have validated the LVDS's existence.
  782. */
  783. if (dev_priv->opregion.vbt)
  784. return true;
  785. }
  786. return false;
  787. }
  788. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  789. {
  790. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  791. return 1;
  792. }
  793. static const struct dmi_system_id intel_dual_link_lvds[] = {
  794. {
  795. .callback = intel_dual_link_lvds_callback,
  796. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  797. .matches = {
  798. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  799. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  800. },
  801. },
  802. { } /* terminating entry */
  803. };
  804. bool intel_is_dual_link_lvds(struct drm_device *dev)
  805. {
  806. struct intel_encoder *encoder;
  807. struct intel_lvds_encoder *lvds_encoder;
  808. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  809. base.head) {
  810. if (encoder->type == INTEL_OUTPUT_LVDS) {
  811. lvds_encoder = to_lvds_encoder(&encoder->base);
  812. return lvds_encoder->is_dual_link;
  813. }
  814. }
  815. return false;
  816. }
  817. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  818. {
  819. struct drm_device *dev = lvds_encoder->base.base.dev;
  820. unsigned int val;
  821. struct drm_i915_private *dev_priv = dev->dev_private;
  822. /* use the module option value if specified */
  823. if (i915_lvds_channel_mode > 0)
  824. return i915_lvds_channel_mode == 2;
  825. if (dmi_check_system(intel_dual_link_lvds))
  826. return true;
  827. /* BIOS should set the proper LVDS register value at boot, but
  828. * in reality, it doesn't set the value when the lid is closed;
  829. * we need to check "the value to be set" in VBT when LVDS
  830. * register is uninitialized.
  831. */
  832. val = I915_READ(lvds_encoder->reg);
  833. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  834. val = dev_priv->bios_lvds_val;
  835. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  836. }
  837. static bool intel_lvds_supported(struct drm_device *dev)
  838. {
  839. /* With the introduction of the PCH we gained a dedicated
  840. * LVDS presence pin, use it. */
  841. if (HAS_PCH_SPLIT(dev))
  842. return true;
  843. /* Otherwise LVDS was only attached to mobile products,
  844. * except for the inglorious 830gm */
  845. return IS_MOBILE(dev) && !IS_I830(dev);
  846. }
  847. /**
  848. * intel_lvds_init - setup LVDS connectors on this device
  849. * @dev: drm device
  850. *
  851. * Create the connector, register the LVDS DDC bus, and try to figure out what
  852. * modes we can display on the LVDS panel (if present).
  853. */
  854. bool intel_lvds_init(struct drm_device *dev)
  855. {
  856. struct drm_i915_private *dev_priv = dev->dev_private;
  857. struct intel_lvds_encoder *lvds_encoder;
  858. struct intel_encoder *intel_encoder;
  859. struct intel_lvds_connector *lvds_connector;
  860. struct intel_connector *intel_connector;
  861. struct drm_connector *connector;
  862. struct drm_encoder *encoder;
  863. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  864. struct drm_display_mode *fixed_mode = NULL;
  865. struct edid *edid;
  866. struct drm_crtc *crtc;
  867. u32 lvds;
  868. int pipe;
  869. u8 pin;
  870. if (!intel_lvds_supported(dev))
  871. return false;
  872. /* Skip init on machines we know falsely report LVDS */
  873. if (dmi_check_system(intel_no_lvds))
  874. return false;
  875. pin = GMBUS_PORT_PANEL;
  876. if (!lvds_is_present_in_vbt(dev, &pin)) {
  877. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  878. return false;
  879. }
  880. if (HAS_PCH_SPLIT(dev)) {
  881. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  882. return false;
  883. if (dev_priv->edp.support) {
  884. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  885. return false;
  886. }
  887. }
  888. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  889. if (!lvds_encoder)
  890. return false;
  891. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  892. if (!lvds_connector) {
  893. kfree(lvds_encoder);
  894. return false;
  895. }
  896. lvds_encoder->attached_connector = lvds_connector;
  897. if (!HAS_PCH_SPLIT(dev)) {
  898. lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
  899. }
  900. intel_encoder = &lvds_encoder->base;
  901. encoder = &intel_encoder->base;
  902. intel_connector = &lvds_connector->base;
  903. connector = &intel_connector->base;
  904. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  905. DRM_MODE_CONNECTOR_LVDS);
  906. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  907. DRM_MODE_ENCODER_LVDS);
  908. intel_encoder->enable = intel_enable_lvds;
  909. intel_encoder->disable = intel_disable_lvds;
  910. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  911. intel_connector->get_hw_state = intel_connector_get_hw_state;
  912. intel_connector_attach_encoder(intel_connector, intel_encoder);
  913. intel_encoder->type = INTEL_OUTPUT_LVDS;
  914. intel_encoder->cloneable = false;
  915. if (HAS_PCH_SPLIT(dev))
  916. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  917. else if (IS_GEN4(dev))
  918. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  919. else
  920. intel_encoder->crtc_mask = (1 << 1);
  921. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  922. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  923. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  924. connector->interlace_allowed = false;
  925. connector->doublescan_allowed = false;
  926. if (HAS_PCH_SPLIT(dev)) {
  927. lvds_encoder->reg = PCH_LVDS;
  928. } else {
  929. lvds_encoder->reg = LVDS;
  930. }
  931. /* create the scaling mode property */
  932. drm_mode_create_scaling_mode_property(dev);
  933. drm_object_attach_property(&connector->base,
  934. dev->mode_config.scaling_mode_property,
  935. DRM_MODE_SCALE_ASPECT);
  936. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  937. /*
  938. * LVDS discovery:
  939. * 1) check for EDID on DDC
  940. * 2) check for VBT data
  941. * 3) check to see if LVDS is already on
  942. * if none of the above, no panel
  943. * 4) make sure lid is open
  944. * if closed, act like it's not there for now
  945. */
  946. /*
  947. * Attempt to get the fixed panel mode from DDC. Assume that the
  948. * preferred mode is the right one.
  949. */
  950. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  951. if (edid) {
  952. if (drm_add_edid_modes(connector, edid)) {
  953. drm_mode_connector_update_edid_property(connector,
  954. edid);
  955. } else {
  956. kfree(edid);
  957. edid = ERR_PTR(-EINVAL);
  958. }
  959. } else {
  960. edid = ERR_PTR(-ENOENT);
  961. }
  962. lvds_connector->base.edid = edid;
  963. if (IS_ERR_OR_NULL(edid)) {
  964. /* Didn't get an EDID, so
  965. * Set wide sync ranges so we get all modes
  966. * handed to valid_mode for checking
  967. */
  968. connector->display_info.min_vfreq = 0;
  969. connector->display_info.max_vfreq = 200;
  970. connector->display_info.min_hfreq = 0;
  971. connector->display_info.max_hfreq = 200;
  972. }
  973. list_for_each_entry(scan, &connector->probed_modes, head) {
  974. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  975. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  976. drm_mode_debug_printmodeline(scan);
  977. fixed_mode = drm_mode_duplicate(dev, scan);
  978. if (fixed_mode) {
  979. intel_find_lvds_downclock(dev, fixed_mode,
  980. connector);
  981. goto out;
  982. }
  983. }
  984. }
  985. /* Failed to get EDID, what about VBT? */
  986. if (dev_priv->lfp_lvds_vbt_mode) {
  987. DRM_DEBUG_KMS("using mode from VBT: ");
  988. drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
  989. fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  990. if (fixed_mode) {
  991. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  992. goto out;
  993. }
  994. }
  995. /*
  996. * If we didn't get EDID, try checking if the panel is already turned
  997. * on. If so, assume that whatever is currently programmed is the
  998. * correct mode.
  999. */
  1000. /* Ironlake: FIXME if still fail, not try pipe mode now */
  1001. if (HAS_PCH_SPLIT(dev))
  1002. goto failed;
  1003. lvds = I915_READ(LVDS);
  1004. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1005. crtc = intel_get_crtc_for_pipe(dev, pipe);
  1006. if (crtc && (lvds & LVDS_PORT_EN)) {
  1007. fixed_mode = intel_crtc_mode_get(dev, crtc);
  1008. if (fixed_mode) {
  1009. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  1010. drm_mode_debug_printmodeline(fixed_mode);
  1011. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1012. goto out;
  1013. }
  1014. }
  1015. /* If we still don't have a mode after all that, give up. */
  1016. if (!fixed_mode)
  1017. goto failed;
  1018. out:
  1019. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  1020. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1021. lvds_encoder->is_dual_link ? "dual" : "single");
  1022. /*
  1023. * Unlock registers and just
  1024. * leave them unlocked
  1025. */
  1026. if (HAS_PCH_SPLIT(dev)) {
  1027. I915_WRITE(PCH_PP_CONTROL,
  1028. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  1029. } else {
  1030. I915_WRITE(PP_CONTROL,
  1031. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  1032. }
  1033. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  1034. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  1035. DRM_DEBUG_KMS("lid notifier registration failed\n");
  1036. lvds_connector->lid_notifier.notifier_call = NULL;
  1037. }
  1038. drm_sysfs_connector_add(connector);
  1039. intel_panel_init(&intel_connector->panel, fixed_mode);
  1040. intel_panel_setup_backlight(connector);
  1041. return true;
  1042. failed:
  1043. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1044. drm_connector_cleanup(connector);
  1045. drm_encoder_cleanup(encoder);
  1046. if (fixed_mode)
  1047. drm_mode_destroy(dev, fixed_mode);
  1048. kfree(lvds_encoder);
  1049. kfree(lvds_connector);
  1050. return false;
  1051. }