e1000_ethtool.c 56 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. /* ethtool support for e1000 */
  21. #include "e1000.h"
  22. #include <asm/uaccess.h>
  23. extern char e1000_driver_name[];
  24. extern char e1000_driver_version[];
  25. extern int e1000_up(struct e1000_adapter *adapter);
  26. extern void e1000_down(struct e1000_adapter *adapter);
  27. extern void e1000_reset(struct e1000_adapter *adapter);
  28. extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  29. extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  30. extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  31. extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  32. extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  33. extern void e1000_update_stats(struct e1000_adapter *adapter);
  34. struct e1000_stats {
  35. char stat_string[ETH_GSTRING_LEN];
  36. int sizeof_stat;
  37. int stat_offset;
  38. };
  39. #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
  40. offsetof(struct e1000_adapter, m)
  41. static const struct e1000_stats e1000_gstrings_stats[] = {
  42. { "rx_packets", E1000_STAT(net_stats.rx_packets) },
  43. { "tx_packets", E1000_STAT(net_stats.tx_packets) },
  44. { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
  45. { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
  46. { "rx_errors", E1000_STAT(net_stats.rx_errors) },
  47. { "tx_errors", E1000_STAT(net_stats.tx_errors) },
  48. { "rx_dropped", E1000_STAT(net_stats.rx_dropped) },
  49. { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
  50. { "multicast", E1000_STAT(net_stats.multicast) },
  51. { "collisions", E1000_STAT(net_stats.collisions) },
  52. { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
  53. { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
  54. { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
  55. { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
  56. { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
  57. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  58. { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
  59. { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
  60. { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
  61. { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
  62. { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
  63. { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
  64. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  65. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  66. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  67. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  68. { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
  69. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  70. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  71. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  72. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  73. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  74. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  75. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  76. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  77. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  78. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  79. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  80. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
  81. { "rx_header_split", E1000_STAT(rx_hdr_split) },
  82. { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
  83. };
  84. #ifdef CONFIG_E1000_MQ
  85. #define E1000_QUEUE_STATS_LEN \
  86. (((struct e1000_adapter *)netdev->priv)->num_tx_queues + \
  87. ((struct e1000_adapter *)netdev->priv)->num_rx_queues) \
  88. * (sizeof(struct e1000_queue_stats) / sizeof(uint64_t))
  89. #else
  90. #define E1000_QUEUE_STATS_LEN 0
  91. #endif
  92. #define E1000_GLOBAL_STATS_LEN \
  93. sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
  94. #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
  95. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  96. "Register test (offline)", "Eeprom test (offline)",
  97. "Interrupt test (offline)", "Loopback test (offline)",
  98. "Link test (on/offline)"
  99. };
  100. #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
  101. static int
  102. e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  103. {
  104. struct e1000_adapter *adapter = netdev_priv(netdev);
  105. struct e1000_hw *hw = &adapter->hw;
  106. if(hw->media_type == e1000_media_type_copper) {
  107. ecmd->supported = (SUPPORTED_10baseT_Half |
  108. SUPPORTED_10baseT_Full |
  109. SUPPORTED_100baseT_Half |
  110. SUPPORTED_100baseT_Full |
  111. SUPPORTED_1000baseT_Full|
  112. SUPPORTED_Autoneg |
  113. SUPPORTED_TP);
  114. ecmd->advertising = ADVERTISED_TP;
  115. if(hw->autoneg == 1) {
  116. ecmd->advertising |= ADVERTISED_Autoneg;
  117. /* the e1000 autoneg seems to match ethtool nicely */
  118. ecmd->advertising |= hw->autoneg_advertised;
  119. }
  120. ecmd->port = PORT_TP;
  121. ecmd->phy_address = hw->phy_addr;
  122. if(hw->mac_type == e1000_82543)
  123. ecmd->transceiver = XCVR_EXTERNAL;
  124. else
  125. ecmd->transceiver = XCVR_INTERNAL;
  126. } else {
  127. ecmd->supported = (SUPPORTED_1000baseT_Full |
  128. SUPPORTED_FIBRE |
  129. SUPPORTED_Autoneg);
  130. ecmd->advertising = (ADVERTISED_1000baseT_Full |
  131. ADVERTISED_FIBRE |
  132. ADVERTISED_Autoneg);
  133. ecmd->port = PORT_FIBRE;
  134. if(hw->mac_type >= e1000_82545)
  135. ecmd->transceiver = XCVR_INTERNAL;
  136. else
  137. ecmd->transceiver = XCVR_EXTERNAL;
  138. }
  139. if(netif_carrier_ok(adapter->netdev)) {
  140. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  141. &adapter->link_duplex);
  142. ecmd->speed = adapter->link_speed;
  143. /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
  144. * and HALF_DUPLEX != DUPLEX_HALF */
  145. if(adapter->link_duplex == FULL_DUPLEX)
  146. ecmd->duplex = DUPLEX_FULL;
  147. else
  148. ecmd->duplex = DUPLEX_HALF;
  149. } else {
  150. ecmd->speed = -1;
  151. ecmd->duplex = -1;
  152. }
  153. ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  154. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  155. return 0;
  156. }
  157. static int
  158. e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  159. {
  160. struct e1000_adapter *adapter = netdev_priv(netdev);
  161. struct e1000_hw *hw = &adapter->hw;
  162. /* When SoL/IDER sessions are active, autoneg/speed/duplex
  163. * cannot be changed */
  164. if (e1000_check_phy_reset_block(hw)) {
  165. DPRINTK(DRV, ERR, "Cannot change link characteristics "
  166. "when SoL/IDER is active.\n");
  167. return -EINVAL;
  168. }
  169. if (ecmd->autoneg == AUTONEG_ENABLE) {
  170. hw->autoneg = 1;
  171. if(hw->media_type == e1000_media_type_fiber)
  172. hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
  173. ADVERTISED_FIBRE |
  174. ADVERTISED_Autoneg;
  175. else
  176. hw->autoneg_advertised = ADVERTISED_10baseT_Half |
  177. ADVERTISED_10baseT_Full |
  178. ADVERTISED_100baseT_Half |
  179. ADVERTISED_100baseT_Full |
  180. ADVERTISED_1000baseT_Full|
  181. ADVERTISED_Autoneg |
  182. ADVERTISED_TP;
  183. ecmd->advertising = hw->autoneg_advertised;
  184. } else
  185. if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
  186. return -EINVAL;
  187. /* reset the link */
  188. if(netif_running(adapter->netdev)) {
  189. e1000_down(adapter);
  190. e1000_reset(adapter);
  191. e1000_up(adapter);
  192. } else
  193. e1000_reset(adapter);
  194. return 0;
  195. }
  196. static void
  197. e1000_get_pauseparam(struct net_device *netdev,
  198. struct ethtool_pauseparam *pause)
  199. {
  200. struct e1000_adapter *adapter = netdev_priv(netdev);
  201. struct e1000_hw *hw = &adapter->hw;
  202. pause->autoneg =
  203. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  204. if(hw->fc == e1000_fc_rx_pause)
  205. pause->rx_pause = 1;
  206. else if(hw->fc == e1000_fc_tx_pause)
  207. pause->tx_pause = 1;
  208. else if(hw->fc == e1000_fc_full) {
  209. pause->rx_pause = 1;
  210. pause->tx_pause = 1;
  211. }
  212. }
  213. static int
  214. e1000_set_pauseparam(struct net_device *netdev,
  215. struct ethtool_pauseparam *pause)
  216. {
  217. struct e1000_adapter *adapter = netdev_priv(netdev);
  218. struct e1000_hw *hw = &adapter->hw;
  219. adapter->fc_autoneg = pause->autoneg;
  220. if(pause->rx_pause && pause->tx_pause)
  221. hw->fc = e1000_fc_full;
  222. else if(pause->rx_pause && !pause->tx_pause)
  223. hw->fc = e1000_fc_rx_pause;
  224. else if(!pause->rx_pause && pause->tx_pause)
  225. hw->fc = e1000_fc_tx_pause;
  226. else if(!pause->rx_pause && !pause->tx_pause)
  227. hw->fc = e1000_fc_none;
  228. hw->original_fc = hw->fc;
  229. if(adapter->fc_autoneg == AUTONEG_ENABLE) {
  230. if(netif_running(adapter->netdev)) {
  231. e1000_down(adapter);
  232. e1000_up(adapter);
  233. } else
  234. e1000_reset(adapter);
  235. }
  236. else
  237. return ((hw->media_type == e1000_media_type_fiber) ?
  238. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  239. return 0;
  240. }
  241. static uint32_t
  242. e1000_get_rx_csum(struct net_device *netdev)
  243. {
  244. struct e1000_adapter *adapter = netdev_priv(netdev);
  245. return adapter->rx_csum;
  246. }
  247. static int
  248. e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
  249. {
  250. struct e1000_adapter *adapter = netdev_priv(netdev);
  251. adapter->rx_csum = data;
  252. if(netif_running(netdev)) {
  253. e1000_down(adapter);
  254. e1000_up(adapter);
  255. } else
  256. e1000_reset(adapter);
  257. return 0;
  258. }
  259. static uint32_t
  260. e1000_get_tx_csum(struct net_device *netdev)
  261. {
  262. return (netdev->features & NETIF_F_HW_CSUM) != 0;
  263. }
  264. static int
  265. e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
  266. {
  267. struct e1000_adapter *adapter = netdev_priv(netdev);
  268. if(adapter->hw.mac_type < e1000_82543) {
  269. if (!data)
  270. return -EINVAL;
  271. return 0;
  272. }
  273. if (data)
  274. netdev->features |= NETIF_F_HW_CSUM;
  275. else
  276. netdev->features &= ~NETIF_F_HW_CSUM;
  277. return 0;
  278. }
  279. #ifdef NETIF_F_TSO
  280. static int
  281. e1000_set_tso(struct net_device *netdev, uint32_t data)
  282. {
  283. struct e1000_adapter *adapter = netdev_priv(netdev);
  284. if((adapter->hw.mac_type < e1000_82544) ||
  285. (adapter->hw.mac_type == e1000_82547))
  286. return data ? -EINVAL : 0;
  287. if (data)
  288. netdev->features |= NETIF_F_TSO;
  289. else
  290. netdev->features &= ~NETIF_F_TSO;
  291. return 0;
  292. }
  293. #endif /* NETIF_F_TSO */
  294. static uint32_t
  295. e1000_get_msglevel(struct net_device *netdev)
  296. {
  297. struct e1000_adapter *adapter = netdev_priv(netdev);
  298. return adapter->msg_enable;
  299. }
  300. static void
  301. e1000_set_msglevel(struct net_device *netdev, uint32_t data)
  302. {
  303. struct e1000_adapter *adapter = netdev_priv(netdev);
  304. adapter->msg_enable = data;
  305. }
  306. static int
  307. e1000_get_regs_len(struct net_device *netdev)
  308. {
  309. #define E1000_REGS_LEN 32
  310. return E1000_REGS_LEN * sizeof(uint32_t);
  311. }
  312. static void
  313. e1000_get_regs(struct net_device *netdev,
  314. struct ethtool_regs *regs, void *p)
  315. {
  316. struct e1000_adapter *adapter = netdev_priv(netdev);
  317. struct e1000_hw *hw = &adapter->hw;
  318. uint32_t *regs_buff = p;
  319. uint16_t phy_data;
  320. memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
  321. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  322. regs_buff[0] = E1000_READ_REG(hw, CTRL);
  323. regs_buff[1] = E1000_READ_REG(hw, STATUS);
  324. regs_buff[2] = E1000_READ_REG(hw, RCTL);
  325. regs_buff[3] = E1000_READ_REG(hw, RDLEN);
  326. regs_buff[4] = E1000_READ_REG(hw, RDH);
  327. regs_buff[5] = E1000_READ_REG(hw, RDT);
  328. regs_buff[6] = E1000_READ_REG(hw, RDTR);
  329. regs_buff[7] = E1000_READ_REG(hw, TCTL);
  330. regs_buff[8] = E1000_READ_REG(hw, TDLEN);
  331. regs_buff[9] = E1000_READ_REG(hw, TDH);
  332. regs_buff[10] = E1000_READ_REG(hw, TDT);
  333. regs_buff[11] = E1000_READ_REG(hw, TIDV);
  334. regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
  335. if(hw->phy_type == e1000_phy_igp) {
  336. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  337. IGP01E1000_PHY_AGC_A);
  338. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  339. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  340. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  341. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  342. IGP01E1000_PHY_AGC_B);
  343. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  344. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  345. regs_buff[14] = (uint32_t)phy_data; /* cable length */
  346. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  347. IGP01E1000_PHY_AGC_C);
  348. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  349. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  350. regs_buff[15] = (uint32_t)phy_data; /* cable length */
  351. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  352. IGP01E1000_PHY_AGC_D);
  353. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  354. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  355. regs_buff[16] = (uint32_t)phy_data; /* cable length */
  356. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  357. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  358. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  359. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  360. regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
  361. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  362. IGP01E1000_PHY_PCS_INIT_REG);
  363. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  364. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  365. regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
  366. regs_buff[20] = 0; /* polarity correction enabled (always) */
  367. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  368. regs_buff[23] = regs_buff[18]; /* mdix mode */
  369. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  370. } else {
  371. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  372. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  373. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  374. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  375. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  376. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  377. regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
  378. regs_buff[18] = regs_buff[13]; /* cable polarity */
  379. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  380. regs_buff[20] = regs_buff[17]; /* polarity correction */
  381. /* phy receive errors */
  382. regs_buff[22] = adapter->phy_stats.receive_errors;
  383. regs_buff[23] = regs_buff[13]; /* mdix mode */
  384. }
  385. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  386. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  387. regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
  388. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  389. if(hw->mac_type >= e1000_82540 &&
  390. hw->media_type == e1000_media_type_copper) {
  391. regs_buff[26] = E1000_READ_REG(hw, MANC);
  392. }
  393. }
  394. static int
  395. e1000_get_eeprom_len(struct net_device *netdev)
  396. {
  397. struct e1000_adapter *adapter = netdev_priv(netdev);
  398. return adapter->hw.eeprom.word_size * 2;
  399. }
  400. static int
  401. e1000_get_eeprom(struct net_device *netdev,
  402. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  403. {
  404. struct e1000_adapter *adapter = netdev_priv(netdev);
  405. struct e1000_hw *hw = &adapter->hw;
  406. uint16_t *eeprom_buff;
  407. int first_word, last_word;
  408. int ret_val = 0;
  409. uint16_t i;
  410. if(eeprom->len == 0)
  411. return -EINVAL;
  412. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  413. first_word = eeprom->offset >> 1;
  414. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  415. eeprom_buff = kmalloc(sizeof(uint16_t) *
  416. (last_word - first_word + 1), GFP_KERNEL);
  417. if(!eeprom_buff)
  418. return -ENOMEM;
  419. if(hw->eeprom.type == e1000_eeprom_spi)
  420. ret_val = e1000_read_eeprom(hw, first_word,
  421. last_word - first_word + 1,
  422. eeprom_buff);
  423. else {
  424. for (i = 0; i < last_word - first_word + 1; i++)
  425. if((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  426. &eeprom_buff[i])))
  427. break;
  428. }
  429. /* Device's eeprom is always little-endian, word addressable */
  430. for (i = 0; i < last_word - first_word + 1; i++)
  431. le16_to_cpus(&eeprom_buff[i]);
  432. memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
  433. eeprom->len);
  434. kfree(eeprom_buff);
  435. return ret_val;
  436. }
  437. static int
  438. e1000_set_eeprom(struct net_device *netdev,
  439. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  440. {
  441. struct e1000_adapter *adapter = netdev_priv(netdev);
  442. struct e1000_hw *hw = &adapter->hw;
  443. uint16_t *eeprom_buff;
  444. void *ptr;
  445. int max_len, first_word, last_word, ret_val = 0;
  446. uint16_t i;
  447. if(eeprom->len == 0)
  448. return -EOPNOTSUPP;
  449. if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  450. return -EFAULT;
  451. max_len = hw->eeprom.word_size * 2;
  452. first_word = eeprom->offset >> 1;
  453. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  454. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  455. if(!eeprom_buff)
  456. return -ENOMEM;
  457. ptr = (void *)eeprom_buff;
  458. if(eeprom->offset & 1) {
  459. /* need read/modify/write of first changed EEPROM word */
  460. /* only the second byte of the word is being modified */
  461. ret_val = e1000_read_eeprom(hw, first_word, 1,
  462. &eeprom_buff[0]);
  463. ptr++;
  464. }
  465. if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  466. /* need read/modify/write of last changed EEPROM word */
  467. /* only the first byte of the word is being modified */
  468. ret_val = e1000_read_eeprom(hw, last_word, 1,
  469. &eeprom_buff[last_word - first_word]);
  470. }
  471. /* Device's eeprom is always little-endian, word addressable */
  472. for (i = 0; i < last_word - first_word + 1; i++)
  473. le16_to_cpus(&eeprom_buff[i]);
  474. memcpy(ptr, bytes, eeprom->len);
  475. for (i = 0; i < last_word - first_word + 1; i++)
  476. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  477. ret_val = e1000_write_eeprom(hw, first_word,
  478. last_word - first_word + 1, eeprom_buff);
  479. /* Update the checksum over the first part of the EEPROM if needed
  480. * and flush shadow RAM for 82573 conrollers */
  481. if((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
  482. (hw->mac_type == e1000_82573)))
  483. e1000_update_eeprom_checksum(hw);
  484. kfree(eeprom_buff);
  485. return ret_val;
  486. }
  487. static void
  488. e1000_get_drvinfo(struct net_device *netdev,
  489. struct ethtool_drvinfo *drvinfo)
  490. {
  491. struct e1000_adapter *adapter = netdev_priv(netdev);
  492. char firmware_version[32];
  493. uint16_t eeprom_data;
  494. strncpy(drvinfo->driver, e1000_driver_name, 32);
  495. strncpy(drvinfo->version, e1000_driver_version, 32);
  496. /* EEPROM image version # is reported as firmware version # for
  497. * 8257{1|2|3} controllers */
  498. e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
  499. switch (adapter->hw.mac_type) {
  500. case e1000_82571:
  501. case e1000_82572:
  502. case e1000_82573:
  503. sprintf(firmware_version, "%d.%d-%d",
  504. (eeprom_data & 0xF000) >> 12,
  505. (eeprom_data & 0x0FF0) >> 4,
  506. eeprom_data & 0x000F);
  507. break;
  508. default:
  509. sprintf(firmware_version, "N/A");
  510. }
  511. strncpy(drvinfo->fw_version, firmware_version, 32);
  512. strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  513. drvinfo->n_stats = E1000_STATS_LEN;
  514. drvinfo->testinfo_len = E1000_TEST_LEN;
  515. drvinfo->regdump_len = e1000_get_regs_len(netdev);
  516. drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
  517. }
  518. static void
  519. e1000_get_ringparam(struct net_device *netdev,
  520. struct ethtool_ringparam *ring)
  521. {
  522. struct e1000_adapter *adapter = netdev_priv(netdev);
  523. e1000_mac_type mac_type = adapter->hw.mac_type;
  524. struct e1000_tx_ring *txdr = adapter->tx_ring;
  525. struct e1000_rx_ring *rxdr = adapter->rx_ring;
  526. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  527. E1000_MAX_82544_RXD;
  528. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  529. E1000_MAX_82544_TXD;
  530. ring->rx_mini_max_pending = 0;
  531. ring->rx_jumbo_max_pending = 0;
  532. ring->rx_pending = rxdr->count;
  533. ring->tx_pending = txdr->count;
  534. ring->rx_mini_pending = 0;
  535. ring->rx_jumbo_pending = 0;
  536. }
  537. static int
  538. e1000_set_ringparam(struct net_device *netdev,
  539. struct ethtool_ringparam *ring)
  540. {
  541. struct e1000_adapter *adapter = netdev_priv(netdev);
  542. e1000_mac_type mac_type = adapter->hw.mac_type;
  543. struct e1000_tx_ring *txdr, *tx_old, *tx_new;
  544. struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
  545. int i, err, tx_ring_size, rx_ring_size;
  546. tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  547. rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  548. if (netif_running(adapter->netdev))
  549. e1000_down(adapter);
  550. tx_old = adapter->tx_ring;
  551. rx_old = adapter->rx_ring;
  552. adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
  553. if (!adapter->tx_ring) {
  554. err = -ENOMEM;
  555. goto err_setup_rx;
  556. }
  557. memset(adapter->tx_ring, 0, tx_ring_size);
  558. adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
  559. if (!adapter->rx_ring) {
  560. kfree(adapter->tx_ring);
  561. err = -ENOMEM;
  562. goto err_setup_rx;
  563. }
  564. memset(adapter->rx_ring, 0, rx_ring_size);
  565. txdr = adapter->tx_ring;
  566. rxdr = adapter->rx_ring;
  567. if((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  568. return -EINVAL;
  569. rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
  570. rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
  571. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  572. E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  573. txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
  574. txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
  575. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  576. E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  577. for (i = 0; i < adapter->num_tx_queues; i++)
  578. txdr[i].count = txdr->count;
  579. for (i = 0; i < adapter->num_rx_queues; i++)
  580. rxdr[i].count = rxdr->count;
  581. if(netif_running(adapter->netdev)) {
  582. /* Try to get new resources before deleting old */
  583. if ((err = e1000_setup_all_rx_resources(adapter)))
  584. goto err_setup_rx;
  585. if ((err = e1000_setup_all_tx_resources(adapter)))
  586. goto err_setup_tx;
  587. /* save the new, restore the old in order to free it,
  588. * then restore the new back again */
  589. rx_new = adapter->rx_ring;
  590. tx_new = adapter->tx_ring;
  591. adapter->rx_ring = rx_old;
  592. adapter->tx_ring = tx_old;
  593. e1000_free_all_rx_resources(adapter);
  594. e1000_free_all_tx_resources(adapter);
  595. kfree(tx_old);
  596. kfree(rx_old);
  597. adapter->rx_ring = rx_new;
  598. adapter->tx_ring = tx_new;
  599. if((err = e1000_up(adapter)))
  600. return err;
  601. }
  602. return 0;
  603. err_setup_tx:
  604. e1000_free_all_rx_resources(adapter);
  605. err_setup_rx:
  606. adapter->rx_ring = rx_old;
  607. adapter->tx_ring = tx_old;
  608. e1000_up(adapter);
  609. return err;
  610. }
  611. #define REG_PATTERN_TEST(R, M, W) \
  612. { \
  613. uint32_t pat, value; \
  614. uint32_t test[] = \
  615. {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
  616. for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
  617. E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
  618. value = E1000_READ_REG(&adapter->hw, R); \
  619. if(value != (test[pat] & W & M)) { \
  620. DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
  621. "0x%08X expected 0x%08X\n", \
  622. E1000_##R, value, (test[pat] & W & M)); \
  623. *data = (adapter->hw.mac_type < e1000_82543) ? \
  624. E1000_82542_##R : E1000_##R; \
  625. return 1; \
  626. } \
  627. } \
  628. }
  629. #define REG_SET_AND_CHECK(R, M, W) \
  630. { \
  631. uint32_t value; \
  632. E1000_WRITE_REG(&adapter->hw, R, W & M); \
  633. value = E1000_READ_REG(&adapter->hw, R); \
  634. if((W & M) != (value & M)) { \
  635. DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
  636. "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
  637. *data = (adapter->hw.mac_type < e1000_82543) ? \
  638. E1000_82542_##R : E1000_##R; \
  639. return 1; \
  640. } \
  641. }
  642. static int
  643. e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
  644. {
  645. uint32_t value, before, after;
  646. uint32_t i, toggle;
  647. /* The status register is Read Only, so a write should fail.
  648. * Some bits that get toggled are ignored.
  649. */
  650. switch (adapter->hw.mac_type) {
  651. /* there are several bits on newer hardware that are r/w */
  652. case e1000_82571:
  653. case e1000_82572:
  654. toggle = 0x7FFFF3FF;
  655. break;
  656. case e1000_82573:
  657. toggle = 0x7FFFF033;
  658. break;
  659. default:
  660. toggle = 0xFFFFF833;
  661. break;
  662. }
  663. before = E1000_READ_REG(&adapter->hw, STATUS);
  664. value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
  665. E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
  666. after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
  667. if(value != after) {
  668. DPRINTK(DRV, ERR, "failed STATUS register test got: "
  669. "0x%08X expected: 0x%08X\n", after, value);
  670. *data = 1;
  671. return 1;
  672. }
  673. /* restore previous status */
  674. E1000_WRITE_REG(&adapter->hw, STATUS, before);
  675. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  676. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  677. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  678. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  679. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  680. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  681. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  682. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  683. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  684. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  685. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  686. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  687. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  688. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  689. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  690. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
  691. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  692. if(adapter->hw.mac_type >= e1000_82543) {
  693. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
  694. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  695. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  696. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  697. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  698. for(i = 0; i < E1000_RAR_ENTRIES; i++) {
  699. REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
  700. 0xFFFFFFFF);
  701. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
  702. 0xFFFFFFFF);
  703. }
  704. } else {
  705. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  706. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  707. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  708. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  709. }
  710. for(i = 0; i < E1000_MC_TBL_SIZE; i++)
  711. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  712. *data = 0;
  713. return 0;
  714. }
  715. static int
  716. e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
  717. {
  718. uint16_t temp;
  719. uint16_t checksum = 0;
  720. uint16_t i;
  721. *data = 0;
  722. /* Read and add up the contents of the EEPROM */
  723. for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  724. if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
  725. *data = 1;
  726. break;
  727. }
  728. checksum += temp;
  729. }
  730. /* If Checksum is not Correct return error else test passed */
  731. if((checksum != (uint16_t) EEPROM_SUM) && !(*data))
  732. *data = 2;
  733. return *data;
  734. }
  735. static irqreturn_t
  736. e1000_test_intr(int irq,
  737. void *data,
  738. struct pt_regs *regs)
  739. {
  740. struct net_device *netdev = (struct net_device *) data;
  741. struct e1000_adapter *adapter = netdev_priv(netdev);
  742. adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
  743. return IRQ_HANDLED;
  744. }
  745. static int
  746. e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
  747. {
  748. struct net_device *netdev = adapter->netdev;
  749. uint32_t mask, i=0, shared_int = TRUE;
  750. uint32_t irq = adapter->pdev->irq;
  751. *data = 0;
  752. /* Hook up test interrupt handler just for this test */
  753. if(!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
  754. shared_int = FALSE;
  755. } else if(request_irq(irq, &e1000_test_intr, SA_SHIRQ,
  756. netdev->name, netdev)){
  757. *data = 1;
  758. return -1;
  759. }
  760. /* Disable all the interrupts */
  761. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  762. msec_delay(10);
  763. /* Test each interrupt */
  764. for(; i < 10; i++) {
  765. /* Interrupt to test */
  766. mask = 1 << i;
  767. if(!shared_int) {
  768. /* Disable the interrupt to be reported in
  769. * the cause register and then force the same
  770. * interrupt and see if one gets posted. If
  771. * an interrupt was posted to the bus, the
  772. * test failed.
  773. */
  774. adapter->test_icr = 0;
  775. E1000_WRITE_REG(&adapter->hw, IMC, mask);
  776. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  777. msec_delay(10);
  778. if(adapter->test_icr & mask) {
  779. *data = 3;
  780. break;
  781. }
  782. }
  783. /* Enable the interrupt to be reported in
  784. * the cause register and then force the same
  785. * interrupt and see if one gets posted. If
  786. * an interrupt was not posted to the bus, the
  787. * test failed.
  788. */
  789. adapter->test_icr = 0;
  790. E1000_WRITE_REG(&adapter->hw, IMS, mask);
  791. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  792. msec_delay(10);
  793. if(!(adapter->test_icr & mask)) {
  794. *data = 4;
  795. break;
  796. }
  797. if(!shared_int) {
  798. /* Disable the other interrupts to be reported in
  799. * the cause register and then force the other
  800. * interrupts and see if any get posted. If
  801. * an interrupt was posted to the bus, the
  802. * test failed.
  803. */
  804. adapter->test_icr = 0;
  805. E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
  806. E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
  807. msec_delay(10);
  808. if(adapter->test_icr) {
  809. *data = 5;
  810. break;
  811. }
  812. }
  813. }
  814. /* Disable all the interrupts */
  815. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  816. msec_delay(10);
  817. /* Unhook test interrupt handler */
  818. free_irq(irq, netdev);
  819. return *data;
  820. }
  821. static void
  822. e1000_free_desc_rings(struct e1000_adapter *adapter)
  823. {
  824. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  825. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  826. struct pci_dev *pdev = adapter->pdev;
  827. int i;
  828. if(txdr->desc && txdr->buffer_info) {
  829. for(i = 0; i < txdr->count; i++) {
  830. if(txdr->buffer_info[i].dma)
  831. pci_unmap_single(pdev, txdr->buffer_info[i].dma,
  832. txdr->buffer_info[i].length,
  833. PCI_DMA_TODEVICE);
  834. if(txdr->buffer_info[i].skb)
  835. dev_kfree_skb(txdr->buffer_info[i].skb);
  836. }
  837. }
  838. if(rxdr->desc && rxdr->buffer_info) {
  839. for(i = 0; i < rxdr->count; i++) {
  840. if(rxdr->buffer_info[i].dma)
  841. pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
  842. rxdr->buffer_info[i].length,
  843. PCI_DMA_FROMDEVICE);
  844. if(rxdr->buffer_info[i].skb)
  845. dev_kfree_skb(rxdr->buffer_info[i].skb);
  846. }
  847. }
  848. if (txdr->desc) {
  849. pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
  850. txdr->desc = NULL;
  851. }
  852. if (rxdr->desc) {
  853. pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
  854. rxdr->desc = NULL;
  855. }
  856. kfree(txdr->buffer_info);
  857. txdr->buffer_info = NULL;
  858. kfree(rxdr->buffer_info);
  859. rxdr->buffer_info = NULL;
  860. return;
  861. }
  862. static int
  863. e1000_setup_desc_rings(struct e1000_adapter *adapter)
  864. {
  865. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  866. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  867. struct pci_dev *pdev = adapter->pdev;
  868. uint32_t rctl;
  869. int size, i, ret_val;
  870. /* Setup Tx descriptor ring and Tx buffers */
  871. if(!txdr->count)
  872. txdr->count = E1000_DEFAULT_TXD;
  873. size = txdr->count * sizeof(struct e1000_buffer);
  874. if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  875. ret_val = 1;
  876. goto err_nomem;
  877. }
  878. memset(txdr->buffer_info, 0, size);
  879. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  880. E1000_ROUNDUP(txdr->size, 4096);
  881. if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
  882. ret_val = 2;
  883. goto err_nomem;
  884. }
  885. memset(txdr->desc, 0, txdr->size);
  886. txdr->next_to_use = txdr->next_to_clean = 0;
  887. E1000_WRITE_REG(&adapter->hw, TDBAL,
  888. ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
  889. E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
  890. E1000_WRITE_REG(&adapter->hw, TDLEN,
  891. txdr->count * sizeof(struct e1000_tx_desc));
  892. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  893. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  894. E1000_WRITE_REG(&adapter->hw, TCTL,
  895. E1000_TCTL_PSP | E1000_TCTL_EN |
  896. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  897. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  898. for(i = 0; i < txdr->count; i++) {
  899. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  900. struct sk_buff *skb;
  901. unsigned int size = 1024;
  902. if(!(skb = alloc_skb(size, GFP_KERNEL))) {
  903. ret_val = 3;
  904. goto err_nomem;
  905. }
  906. skb_put(skb, size);
  907. txdr->buffer_info[i].skb = skb;
  908. txdr->buffer_info[i].length = skb->len;
  909. txdr->buffer_info[i].dma =
  910. pci_map_single(pdev, skb->data, skb->len,
  911. PCI_DMA_TODEVICE);
  912. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  913. tx_desc->lower.data = cpu_to_le32(skb->len);
  914. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  915. E1000_TXD_CMD_IFCS |
  916. E1000_TXD_CMD_RPS);
  917. tx_desc->upper.data = 0;
  918. }
  919. /* Setup Rx descriptor ring and Rx buffers */
  920. if(!rxdr->count)
  921. rxdr->count = E1000_DEFAULT_RXD;
  922. size = rxdr->count * sizeof(struct e1000_buffer);
  923. if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  924. ret_val = 4;
  925. goto err_nomem;
  926. }
  927. memset(rxdr->buffer_info, 0, size);
  928. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  929. if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
  930. ret_val = 5;
  931. goto err_nomem;
  932. }
  933. memset(rxdr->desc, 0, rxdr->size);
  934. rxdr->next_to_use = rxdr->next_to_clean = 0;
  935. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  936. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  937. E1000_WRITE_REG(&adapter->hw, RDBAL,
  938. ((uint64_t) rxdr->dma & 0xFFFFFFFF));
  939. E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
  940. E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
  941. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  942. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  943. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  944. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  945. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  946. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  947. for(i = 0; i < rxdr->count; i++) {
  948. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  949. struct sk_buff *skb;
  950. if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
  951. GFP_KERNEL))) {
  952. ret_val = 6;
  953. goto err_nomem;
  954. }
  955. skb_reserve(skb, NET_IP_ALIGN);
  956. rxdr->buffer_info[i].skb = skb;
  957. rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
  958. rxdr->buffer_info[i].dma =
  959. pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
  960. PCI_DMA_FROMDEVICE);
  961. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  962. memset(skb->data, 0x00, skb->len);
  963. }
  964. return 0;
  965. err_nomem:
  966. e1000_free_desc_rings(adapter);
  967. return ret_val;
  968. }
  969. static void
  970. e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  971. {
  972. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  973. e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
  974. e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
  975. e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
  976. e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
  977. }
  978. static void
  979. e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  980. {
  981. uint16_t phy_reg;
  982. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  983. * Extended PHY Specific Control Register to 25MHz clock. This
  984. * value defaults back to a 2.5MHz clock when the PHY is reset.
  985. */
  986. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  987. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  988. e1000_write_phy_reg(&adapter->hw,
  989. M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  990. /* In addition, because of the s/w reset above, we need to enable
  991. * CRS on TX. This must be set for both full and half duplex
  992. * operation.
  993. */
  994. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  995. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  996. e1000_write_phy_reg(&adapter->hw,
  997. M88E1000_PHY_SPEC_CTRL, phy_reg);
  998. }
  999. static int
  1000. e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  1001. {
  1002. uint32_t ctrl_reg;
  1003. uint16_t phy_reg;
  1004. /* Setup the Device Control Register for PHY loopback test. */
  1005. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1006. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  1007. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1008. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1009. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  1010. E1000_CTRL_FD); /* Force Duplex to FULL */
  1011. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1012. /* Read the PHY Specific Control Register (0x10) */
  1013. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  1014. /* Clear Auto-Crossover bits in PHY Specific Control Register
  1015. * (bits 6:5).
  1016. */
  1017. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  1018. e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  1019. /* Perform software reset on the PHY */
  1020. e1000_phy_reset(&adapter->hw);
  1021. /* Have to setup TX_CLK and TX_CRS after software reset */
  1022. e1000_phy_reset_clk_and_crs(adapter);
  1023. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
  1024. /* Wait for reset to complete. */
  1025. udelay(500);
  1026. /* Have to setup TX_CLK and TX_CRS after software reset */
  1027. e1000_phy_reset_clk_and_crs(adapter);
  1028. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  1029. e1000_phy_disable_receiver(adapter);
  1030. /* Set the loopback bit in the PHY control register. */
  1031. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1032. phy_reg |= MII_CR_LOOPBACK;
  1033. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1034. /* Setup TX_CLK and TX_CRS one more time. */
  1035. e1000_phy_reset_clk_and_crs(adapter);
  1036. /* Check Phy Configuration */
  1037. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1038. if(phy_reg != 0x4100)
  1039. return 9;
  1040. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  1041. if(phy_reg != 0x0070)
  1042. return 10;
  1043. e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
  1044. if(phy_reg != 0x001A)
  1045. return 11;
  1046. return 0;
  1047. }
  1048. static int
  1049. e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  1050. {
  1051. uint32_t ctrl_reg = 0;
  1052. uint32_t stat_reg = 0;
  1053. adapter->hw.autoneg = FALSE;
  1054. if(adapter->hw.phy_type == e1000_phy_m88) {
  1055. /* Auto-MDI/MDIX Off */
  1056. e1000_write_phy_reg(&adapter->hw,
  1057. M88E1000_PHY_SPEC_CTRL, 0x0808);
  1058. /* reset to update Auto-MDI/MDIX */
  1059. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
  1060. /* autoneg off */
  1061. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
  1062. }
  1063. /* force 1000, set loopback */
  1064. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
  1065. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1066. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1067. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1068. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1069. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1070. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1071. E1000_CTRL_FD); /* Force Duplex to FULL */
  1072. if(adapter->hw.media_type == e1000_media_type_copper &&
  1073. adapter->hw.phy_type == e1000_phy_m88) {
  1074. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1075. } else {
  1076. /* Set the ILOS bit on the fiber Nic is half
  1077. * duplex link is detected. */
  1078. stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
  1079. if((stat_reg & E1000_STATUS_FD) == 0)
  1080. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1081. }
  1082. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1083. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1084. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1085. */
  1086. if(adapter->hw.phy_type == e1000_phy_m88)
  1087. e1000_phy_disable_receiver(adapter);
  1088. udelay(500);
  1089. return 0;
  1090. }
  1091. static int
  1092. e1000_set_phy_loopback(struct e1000_adapter *adapter)
  1093. {
  1094. uint16_t phy_reg = 0;
  1095. uint16_t count = 0;
  1096. switch (adapter->hw.mac_type) {
  1097. case e1000_82543:
  1098. if(adapter->hw.media_type == e1000_media_type_copper) {
  1099. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1100. * Some PHY registers get corrupted at random, so
  1101. * attempt this 10 times.
  1102. */
  1103. while(e1000_nonintegrated_phy_loopback(adapter) &&
  1104. count++ < 10);
  1105. if(count < 11)
  1106. return 0;
  1107. }
  1108. break;
  1109. case e1000_82544:
  1110. case e1000_82540:
  1111. case e1000_82545:
  1112. case e1000_82545_rev_3:
  1113. case e1000_82546:
  1114. case e1000_82546_rev_3:
  1115. case e1000_82541:
  1116. case e1000_82541_rev_2:
  1117. case e1000_82547:
  1118. case e1000_82547_rev_2:
  1119. case e1000_82571:
  1120. case e1000_82572:
  1121. case e1000_82573:
  1122. return e1000_integrated_phy_loopback(adapter);
  1123. break;
  1124. default:
  1125. /* Default PHY loopback work is to read the MII
  1126. * control register and assert bit 14 (loopback mode).
  1127. */
  1128. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1129. phy_reg |= MII_CR_LOOPBACK;
  1130. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1131. return 0;
  1132. break;
  1133. }
  1134. return 8;
  1135. }
  1136. static int
  1137. e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1138. {
  1139. struct e1000_hw *hw = &adapter->hw;
  1140. uint32_t rctl;
  1141. if (hw->media_type == e1000_media_type_fiber ||
  1142. hw->media_type == e1000_media_type_internal_serdes) {
  1143. switch (hw->mac_type) {
  1144. case e1000_82545:
  1145. case e1000_82546:
  1146. case e1000_82545_rev_3:
  1147. case e1000_82546_rev_3:
  1148. return e1000_set_phy_loopback(adapter);
  1149. break;
  1150. case e1000_82571:
  1151. case e1000_82572:
  1152. #define E1000_SERDES_LB_ON 0x410
  1153. e1000_set_phy_loopback(adapter);
  1154. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
  1155. msec_delay(10);
  1156. return 0;
  1157. break;
  1158. default:
  1159. rctl = E1000_READ_REG(hw, RCTL);
  1160. rctl |= E1000_RCTL_LBM_TCVR;
  1161. E1000_WRITE_REG(hw, RCTL, rctl);
  1162. return 0;
  1163. }
  1164. } else if (hw->media_type == e1000_media_type_copper)
  1165. return e1000_set_phy_loopback(adapter);
  1166. return 7;
  1167. }
  1168. static void
  1169. e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1170. {
  1171. struct e1000_hw *hw = &adapter->hw;
  1172. uint32_t rctl;
  1173. uint16_t phy_reg;
  1174. rctl = E1000_READ_REG(hw, RCTL);
  1175. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1176. E1000_WRITE_REG(hw, RCTL, rctl);
  1177. switch (hw->mac_type) {
  1178. case e1000_82571:
  1179. case e1000_82572:
  1180. if (hw->media_type == e1000_media_type_fiber ||
  1181. hw->media_type == e1000_media_type_internal_serdes) {
  1182. #define E1000_SERDES_LB_OFF 0x400
  1183. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
  1184. msec_delay(10);
  1185. break;
  1186. }
  1187. /* Fall Through */
  1188. case e1000_82545:
  1189. case e1000_82546:
  1190. case e1000_82545_rev_3:
  1191. case e1000_82546_rev_3:
  1192. default:
  1193. hw->autoneg = TRUE;
  1194. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1195. if (phy_reg & MII_CR_LOOPBACK) {
  1196. phy_reg &= ~MII_CR_LOOPBACK;
  1197. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1198. e1000_phy_reset(hw);
  1199. }
  1200. break;
  1201. }
  1202. }
  1203. static void
  1204. e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1205. {
  1206. memset(skb->data, 0xFF, frame_size);
  1207. frame_size &= ~1;
  1208. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1209. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1210. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1211. }
  1212. static int
  1213. e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1214. {
  1215. frame_size &= ~1;
  1216. if(*(skb->data + 3) == 0xFF) {
  1217. if((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1218. (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
  1219. return 0;
  1220. }
  1221. }
  1222. return 13;
  1223. }
  1224. static int
  1225. e1000_run_loopback_test(struct e1000_adapter *adapter)
  1226. {
  1227. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  1228. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  1229. struct pci_dev *pdev = adapter->pdev;
  1230. int i, j, k, l, lc, good_cnt, ret_val=0;
  1231. unsigned long time;
  1232. E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
  1233. /* Calculate the loop count based on the largest descriptor ring
  1234. * The idea is to wrap the largest ring a number of times using 64
  1235. * send/receive pairs during each loop
  1236. */
  1237. if(rxdr->count <= txdr->count)
  1238. lc = ((txdr->count / 64) * 2) + 1;
  1239. else
  1240. lc = ((rxdr->count / 64) * 2) + 1;
  1241. k = l = 0;
  1242. for(j = 0; j <= lc; j++) { /* loop count loop */
  1243. for(i = 0; i < 64; i++) { /* send the packets */
  1244. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1245. 1024);
  1246. pci_dma_sync_single_for_device(pdev,
  1247. txdr->buffer_info[k].dma,
  1248. txdr->buffer_info[k].length,
  1249. PCI_DMA_TODEVICE);
  1250. if(unlikely(++k == txdr->count)) k = 0;
  1251. }
  1252. E1000_WRITE_REG(&adapter->hw, TDT, k);
  1253. msec_delay(200);
  1254. time = jiffies; /* set the start time for the receive */
  1255. good_cnt = 0;
  1256. do { /* receive the sent packets */
  1257. pci_dma_sync_single_for_cpu(pdev,
  1258. rxdr->buffer_info[l].dma,
  1259. rxdr->buffer_info[l].length,
  1260. PCI_DMA_FROMDEVICE);
  1261. ret_val = e1000_check_lbtest_frame(
  1262. rxdr->buffer_info[l].skb,
  1263. 1024);
  1264. if(!ret_val)
  1265. good_cnt++;
  1266. if(unlikely(++l == rxdr->count)) l = 0;
  1267. /* time + 20 msecs (200 msecs on 2.4) is more than
  1268. * enough time to complete the receives, if it's
  1269. * exceeded, break and error off
  1270. */
  1271. } while (good_cnt < 64 && jiffies < (time + 20));
  1272. if(good_cnt != 64) {
  1273. ret_val = 13; /* ret_val is the same as mis-compare */
  1274. break;
  1275. }
  1276. if(jiffies >= (time + 2)) {
  1277. ret_val = 14; /* error code for time out error */
  1278. break;
  1279. }
  1280. } /* end loop count loop */
  1281. return ret_val;
  1282. }
  1283. static int
  1284. e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
  1285. {
  1286. /* PHY loopback cannot be performed if SoL/IDER
  1287. * sessions are active */
  1288. if (e1000_check_phy_reset_block(&adapter->hw)) {
  1289. DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
  1290. "when SoL/IDER is active.\n");
  1291. *data = 0;
  1292. goto out;
  1293. }
  1294. if ((*data = e1000_setup_desc_rings(adapter)))
  1295. goto out;
  1296. if ((*data = e1000_setup_loopback_test(adapter)))
  1297. goto err_loopback;
  1298. *data = e1000_run_loopback_test(adapter);
  1299. e1000_loopback_cleanup(adapter);
  1300. err_loopback:
  1301. e1000_free_desc_rings(adapter);
  1302. out:
  1303. return *data;
  1304. }
  1305. static int
  1306. e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
  1307. {
  1308. *data = 0;
  1309. if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1310. int i = 0;
  1311. adapter->hw.serdes_link_down = TRUE;
  1312. /* On some blade server designs, link establishment
  1313. * could take as long as 2-3 minutes */
  1314. do {
  1315. e1000_check_for_link(&adapter->hw);
  1316. if (adapter->hw.serdes_link_down == FALSE)
  1317. return *data;
  1318. msec_delay(20);
  1319. } while (i++ < 3750);
  1320. *data = 1;
  1321. } else {
  1322. e1000_check_for_link(&adapter->hw);
  1323. if(adapter->hw.autoneg) /* if auto_neg is set wait for it */
  1324. msec_delay(4000);
  1325. if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
  1326. *data = 1;
  1327. }
  1328. }
  1329. return *data;
  1330. }
  1331. static int
  1332. e1000_diag_test_count(struct net_device *netdev)
  1333. {
  1334. return E1000_TEST_LEN;
  1335. }
  1336. static void
  1337. e1000_diag_test(struct net_device *netdev,
  1338. struct ethtool_test *eth_test, uint64_t *data)
  1339. {
  1340. struct e1000_adapter *adapter = netdev_priv(netdev);
  1341. boolean_t if_running = netif_running(netdev);
  1342. if(eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1343. /* Offline tests */
  1344. /* save speed, duplex, autoneg settings */
  1345. uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
  1346. uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
  1347. uint8_t autoneg = adapter->hw.autoneg;
  1348. /* Link test performed before hardware reset so autoneg doesn't
  1349. * interfere with test result */
  1350. if(e1000_link_test(adapter, &data[4]))
  1351. eth_test->flags |= ETH_TEST_FL_FAILED;
  1352. if(if_running)
  1353. e1000_down(adapter);
  1354. else
  1355. e1000_reset(adapter);
  1356. if(e1000_reg_test(adapter, &data[0]))
  1357. eth_test->flags |= ETH_TEST_FL_FAILED;
  1358. e1000_reset(adapter);
  1359. if(e1000_eeprom_test(adapter, &data[1]))
  1360. eth_test->flags |= ETH_TEST_FL_FAILED;
  1361. e1000_reset(adapter);
  1362. if(e1000_intr_test(adapter, &data[2]))
  1363. eth_test->flags |= ETH_TEST_FL_FAILED;
  1364. e1000_reset(adapter);
  1365. if(e1000_loopback_test(adapter, &data[3]))
  1366. eth_test->flags |= ETH_TEST_FL_FAILED;
  1367. /* restore speed, duplex, autoneg settings */
  1368. adapter->hw.autoneg_advertised = autoneg_advertised;
  1369. adapter->hw.forced_speed_duplex = forced_speed_duplex;
  1370. adapter->hw.autoneg = autoneg;
  1371. e1000_reset(adapter);
  1372. if(if_running)
  1373. e1000_up(adapter);
  1374. } else {
  1375. /* Online tests */
  1376. if(e1000_link_test(adapter, &data[4]))
  1377. eth_test->flags |= ETH_TEST_FL_FAILED;
  1378. /* Offline tests aren't run; pass by default */
  1379. data[0] = 0;
  1380. data[1] = 0;
  1381. data[2] = 0;
  1382. data[3] = 0;
  1383. }
  1384. msleep_interruptible(4 * 1000);
  1385. }
  1386. static void
  1387. e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1388. {
  1389. struct e1000_adapter *adapter = netdev_priv(netdev);
  1390. struct e1000_hw *hw = &adapter->hw;
  1391. switch(adapter->hw.device_id) {
  1392. case E1000_DEV_ID_82542:
  1393. case E1000_DEV_ID_82543GC_FIBER:
  1394. case E1000_DEV_ID_82543GC_COPPER:
  1395. case E1000_DEV_ID_82544EI_FIBER:
  1396. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1397. case E1000_DEV_ID_82545EM_FIBER:
  1398. case E1000_DEV_ID_82545EM_COPPER:
  1399. wol->supported = 0;
  1400. wol->wolopts = 0;
  1401. return;
  1402. case E1000_DEV_ID_82546EB_FIBER:
  1403. case E1000_DEV_ID_82546GB_FIBER:
  1404. case E1000_DEV_ID_82571EB_FIBER:
  1405. /* Wake events only supported on port A for dual fiber */
  1406. if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
  1407. wol->supported = 0;
  1408. wol->wolopts = 0;
  1409. return;
  1410. }
  1411. /* Fall Through */
  1412. default:
  1413. wol->supported = WAKE_UCAST | WAKE_MCAST |
  1414. WAKE_BCAST | WAKE_MAGIC;
  1415. wol->wolopts = 0;
  1416. if(adapter->wol & E1000_WUFC_EX)
  1417. wol->wolopts |= WAKE_UCAST;
  1418. if(adapter->wol & E1000_WUFC_MC)
  1419. wol->wolopts |= WAKE_MCAST;
  1420. if(adapter->wol & E1000_WUFC_BC)
  1421. wol->wolopts |= WAKE_BCAST;
  1422. if(adapter->wol & E1000_WUFC_MAG)
  1423. wol->wolopts |= WAKE_MAGIC;
  1424. return;
  1425. }
  1426. }
  1427. static int
  1428. e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1429. {
  1430. struct e1000_adapter *adapter = netdev_priv(netdev);
  1431. struct e1000_hw *hw = &adapter->hw;
  1432. switch(adapter->hw.device_id) {
  1433. case E1000_DEV_ID_82542:
  1434. case E1000_DEV_ID_82543GC_FIBER:
  1435. case E1000_DEV_ID_82543GC_COPPER:
  1436. case E1000_DEV_ID_82544EI_FIBER:
  1437. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1438. case E1000_DEV_ID_82545EM_FIBER:
  1439. case E1000_DEV_ID_82545EM_COPPER:
  1440. return wol->wolopts ? -EOPNOTSUPP : 0;
  1441. case E1000_DEV_ID_82546EB_FIBER:
  1442. case E1000_DEV_ID_82546GB_FIBER:
  1443. case E1000_DEV_ID_82571EB_FIBER:
  1444. /* Wake events only supported on port A for dual fiber */
  1445. if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
  1446. return wol->wolopts ? -EOPNOTSUPP : 0;
  1447. /* Fall Through */
  1448. default:
  1449. if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1450. return -EOPNOTSUPP;
  1451. adapter->wol = 0;
  1452. if(wol->wolopts & WAKE_UCAST)
  1453. adapter->wol |= E1000_WUFC_EX;
  1454. if(wol->wolopts & WAKE_MCAST)
  1455. adapter->wol |= E1000_WUFC_MC;
  1456. if(wol->wolopts & WAKE_BCAST)
  1457. adapter->wol |= E1000_WUFC_BC;
  1458. if(wol->wolopts & WAKE_MAGIC)
  1459. adapter->wol |= E1000_WUFC_MAG;
  1460. }
  1461. return 0;
  1462. }
  1463. /* toggle LED 4 times per second = 2 "blinks" per second */
  1464. #define E1000_ID_INTERVAL (HZ/4)
  1465. /* bit defines for adapter->led_status */
  1466. #define E1000_LED_ON 0
  1467. static void
  1468. e1000_led_blink_callback(unsigned long data)
  1469. {
  1470. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1471. if(test_and_change_bit(E1000_LED_ON, &adapter->led_status))
  1472. e1000_led_off(&adapter->hw);
  1473. else
  1474. e1000_led_on(&adapter->hw);
  1475. mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
  1476. }
  1477. static int
  1478. e1000_phys_id(struct net_device *netdev, uint32_t data)
  1479. {
  1480. struct e1000_adapter *adapter = netdev_priv(netdev);
  1481. if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
  1482. data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
  1483. if(adapter->hw.mac_type < e1000_82571) {
  1484. if(!adapter->blink_timer.function) {
  1485. init_timer(&adapter->blink_timer);
  1486. adapter->blink_timer.function = e1000_led_blink_callback;
  1487. adapter->blink_timer.data = (unsigned long) adapter;
  1488. }
  1489. e1000_setup_led(&adapter->hw);
  1490. mod_timer(&adapter->blink_timer, jiffies);
  1491. msleep_interruptible(data * 1000);
  1492. del_timer_sync(&adapter->blink_timer);
  1493. } else if (adapter->hw.mac_type < e1000_82573) {
  1494. E1000_WRITE_REG(&adapter->hw, LEDCTL,
  1495. (E1000_LEDCTL_LED2_BLINK_RATE |
  1496. E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
  1497. (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
  1498. (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
  1499. (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
  1500. msleep_interruptible(data * 1000);
  1501. } else {
  1502. E1000_WRITE_REG(&adapter->hw, LEDCTL,
  1503. (E1000_LEDCTL_LED2_BLINK_RATE |
  1504. E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
  1505. (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
  1506. (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
  1507. (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
  1508. msleep_interruptible(data * 1000);
  1509. }
  1510. e1000_led_off(&adapter->hw);
  1511. clear_bit(E1000_LED_ON, &adapter->led_status);
  1512. e1000_cleanup_led(&adapter->hw);
  1513. return 0;
  1514. }
  1515. static int
  1516. e1000_nway_reset(struct net_device *netdev)
  1517. {
  1518. struct e1000_adapter *adapter = netdev_priv(netdev);
  1519. if(netif_running(netdev)) {
  1520. e1000_down(adapter);
  1521. e1000_up(adapter);
  1522. }
  1523. return 0;
  1524. }
  1525. static int
  1526. e1000_get_stats_count(struct net_device *netdev)
  1527. {
  1528. return E1000_STATS_LEN;
  1529. }
  1530. static void
  1531. e1000_get_ethtool_stats(struct net_device *netdev,
  1532. struct ethtool_stats *stats, uint64_t *data)
  1533. {
  1534. struct e1000_adapter *adapter = netdev_priv(netdev);
  1535. #ifdef CONFIG_E1000_MQ
  1536. uint64_t *queue_stat;
  1537. int stat_count = sizeof(struct e1000_queue_stats) / sizeof(uint64_t);
  1538. int j, k;
  1539. #endif
  1540. int i;
  1541. e1000_update_stats(adapter);
  1542. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1543. char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
  1544. data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
  1545. sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
  1546. }
  1547. #ifdef CONFIG_E1000_MQ
  1548. for (j = 0; j < adapter->num_tx_queues; j++) {
  1549. queue_stat = (uint64_t *)&adapter->tx_ring[j].tx_stats;
  1550. for (k = 0; k < stat_count; k++)
  1551. data[i + k] = queue_stat[k];
  1552. i += k;
  1553. }
  1554. for (j = 0; j < adapter->num_rx_queues; j++) {
  1555. queue_stat = (uint64_t *)&adapter->rx_ring[j].rx_stats;
  1556. for (k = 0; k < stat_count; k++)
  1557. data[i + k] = queue_stat[k];
  1558. i += k;
  1559. }
  1560. #endif
  1561. /* BUG_ON(i != E1000_STATS_LEN); */
  1562. }
  1563. static void
  1564. e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
  1565. {
  1566. #ifdef CONFIG_E1000_MQ
  1567. struct e1000_adapter *adapter = netdev_priv(netdev);
  1568. #endif
  1569. uint8_t *p = data;
  1570. int i;
  1571. switch(stringset) {
  1572. case ETH_SS_TEST:
  1573. memcpy(data, *e1000_gstrings_test,
  1574. E1000_TEST_LEN*ETH_GSTRING_LEN);
  1575. break;
  1576. case ETH_SS_STATS:
  1577. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1578. memcpy(p, e1000_gstrings_stats[i].stat_string,
  1579. ETH_GSTRING_LEN);
  1580. p += ETH_GSTRING_LEN;
  1581. }
  1582. #ifdef CONFIG_E1000_MQ
  1583. for (i = 0; i < adapter->num_tx_queues; i++) {
  1584. sprintf(p, "tx_queue_%u_packets", i);
  1585. p += ETH_GSTRING_LEN;
  1586. sprintf(p, "tx_queue_%u_bytes", i);
  1587. p += ETH_GSTRING_LEN;
  1588. }
  1589. for (i = 0; i < adapter->num_rx_queues; i++) {
  1590. sprintf(p, "rx_queue_%u_packets", i);
  1591. p += ETH_GSTRING_LEN;
  1592. sprintf(p, "rx_queue_%u_bytes", i);
  1593. p += ETH_GSTRING_LEN;
  1594. }
  1595. #endif
  1596. /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
  1597. break;
  1598. }
  1599. }
  1600. static struct ethtool_ops e1000_ethtool_ops = {
  1601. .get_settings = e1000_get_settings,
  1602. .set_settings = e1000_set_settings,
  1603. .get_drvinfo = e1000_get_drvinfo,
  1604. .get_regs_len = e1000_get_regs_len,
  1605. .get_regs = e1000_get_regs,
  1606. .get_wol = e1000_get_wol,
  1607. .set_wol = e1000_set_wol,
  1608. .get_msglevel = e1000_get_msglevel,
  1609. .set_msglevel = e1000_set_msglevel,
  1610. .nway_reset = e1000_nway_reset,
  1611. .get_link = ethtool_op_get_link,
  1612. .get_eeprom_len = e1000_get_eeprom_len,
  1613. .get_eeprom = e1000_get_eeprom,
  1614. .set_eeprom = e1000_set_eeprom,
  1615. .get_ringparam = e1000_get_ringparam,
  1616. .set_ringparam = e1000_set_ringparam,
  1617. .get_pauseparam = e1000_get_pauseparam,
  1618. .set_pauseparam = e1000_set_pauseparam,
  1619. .get_rx_csum = e1000_get_rx_csum,
  1620. .set_rx_csum = e1000_set_rx_csum,
  1621. .get_tx_csum = e1000_get_tx_csum,
  1622. .set_tx_csum = e1000_set_tx_csum,
  1623. .get_sg = ethtool_op_get_sg,
  1624. .set_sg = ethtool_op_set_sg,
  1625. #ifdef NETIF_F_TSO
  1626. .get_tso = ethtool_op_get_tso,
  1627. .set_tso = e1000_set_tso,
  1628. #endif
  1629. .self_test_count = e1000_diag_test_count,
  1630. .self_test = e1000_diag_test,
  1631. .get_strings = e1000_get_strings,
  1632. .phys_id = e1000_phys_id,
  1633. .get_stats_count = e1000_get_stats_count,
  1634. .get_ethtool_stats = e1000_get_ethtool_stats,
  1635. .get_perm_addr = ethtool_op_get_perm_addr,
  1636. };
  1637. void e1000_set_ethtool_ops(struct net_device *netdev)
  1638. {
  1639. SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
  1640. }