dm9000.c 29 KB

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  1. /*
  2. * dm9000.c: Version 1.2 03/18/2003
  3. *
  4. * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
  5. * Copyright (C) 1997 Sten Wang
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
  18. *
  19. * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
  20. * 06/22/2001 Support DM9801 progrmming
  21. * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
  22. * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
  23. * R17 = (R17 & 0xfff0) | NF + 3
  24. * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
  25. * R17 = (R17 & 0xfff0) | NF
  26. *
  27. * v1.00 modify by simon 2001.9.5
  28. * change for kernel 2.4.x
  29. *
  30. * v1.1 11/09/2001 fix force mode bug
  31. *
  32. * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
  33. * Fixed phy reset.
  34. * Added tx/rx 32 bit mode.
  35. * Cleaned up for kernel merge.
  36. *
  37. * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
  38. * Port to 2.6 kernel
  39. *
  40. * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
  41. * Cleanup of code to remove ifdefs
  42. * Allowed platform device data to influence access width
  43. * Reformatting areas of code
  44. *
  45. * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
  46. * * removed 2.4 style module parameters
  47. * * removed removed unused stat counter and fixed
  48. * net_device_stats
  49. * * introduced tx_timeout function
  50. * * reworked locking
  51. *
  52. * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
  53. * * fixed spinlock call without pointer
  54. * * ensure spinlock is initialised
  55. */
  56. #include <linux/module.h>
  57. #include <linux/ioport.h>
  58. #include <linux/netdevice.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/init.h>
  61. #include <linux/skbuff.h>
  62. #include <linux/spinlock.h>
  63. #include <linux/crc32.h>
  64. #include <linux/mii.h>
  65. #include <linux/ethtool.h>
  66. #include <linux/dm9000.h>
  67. #include <linux/delay.h>
  68. #include <linux/platform_device.h>
  69. #include <linux/irq.h>
  70. #include <asm/delay.h>
  71. #include <asm/irq.h>
  72. #include <asm/io.h>
  73. #include "dm9000.h"
  74. /* Board/System/Debug information/definition ---------------- */
  75. #define DM9000_PHY 0x40 /* PHY address 0x01 */
  76. #define CARDNAME "dm9000"
  77. #define PFX CARDNAME ": "
  78. #define DRV_VERSION "1.30"
  79. #ifdef CONFIG_BLACKFIN
  80. #define readsb insb
  81. #define readsw insw
  82. #define readsl insl
  83. #define writesb outsb
  84. #define writesw outsw
  85. #define writesl outsl
  86. #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
  87. #else
  88. #define DEFAULT_TRIGGER (0)
  89. #endif
  90. /*
  91. * Transmit timeout, default 5 seconds.
  92. */
  93. static int watchdog = 5000;
  94. module_param(watchdog, int, 0400);
  95. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  96. /* Structure/enum declaration ------------------------------- */
  97. typedef struct board_info {
  98. void __iomem *io_addr; /* Register I/O base address */
  99. void __iomem *io_data; /* Data I/O address */
  100. u16 irq; /* IRQ */
  101. u16 tx_pkt_cnt;
  102. u16 queue_pkt_len;
  103. u16 queue_start_addr;
  104. u16 dbug_cnt;
  105. u8 io_mode; /* 0:word, 2:byte */
  106. u8 phy_addr;
  107. unsigned int flags;
  108. int debug_level;
  109. void (*inblk)(void __iomem *port, void *data, int length);
  110. void (*outblk)(void __iomem *port, void *data, int length);
  111. void (*dumpblk)(void __iomem *port, int length);
  112. struct device *dev; /* parent device */
  113. struct resource *addr_res; /* resources found */
  114. struct resource *data_res;
  115. struct resource *addr_req; /* resources requested */
  116. struct resource *data_req;
  117. struct resource *irq_res;
  118. unsigned char srom[128];
  119. spinlock_t lock;
  120. struct mii_if_info mii;
  121. u32 msg_enable;
  122. } board_info_t;
  123. /* debug code */
  124. #define dm9000_dbg(db, lev, msg...) do { \
  125. if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
  126. (lev) < db->debug_level) { \
  127. dev_dbg(db->dev, msg); \
  128. } \
  129. } while (0)
  130. static inline board_info_t *to_dm9000_board(struct net_device *dev)
  131. {
  132. return dev->priv;
  133. }
  134. /* function declaration ------------------------------------- */
  135. static int dm9000_probe(struct platform_device *);
  136. static int dm9000_open(struct net_device *);
  137. static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
  138. static int dm9000_stop(struct net_device *);
  139. static void dm9000_init_dm9000(struct net_device *);
  140. static irqreturn_t dm9000_interrupt(int, void *);
  141. static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
  142. static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
  143. int value);
  144. static u16 read_srom_word(board_info_t *, int);
  145. static void dm9000_rx(struct net_device *);
  146. static void dm9000_hash_table(struct net_device *);
  147. //#define DM9000_PROGRAM_EEPROM
  148. #ifdef DM9000_PROGRAM_EEPROM
  149. static void program_eeprom(board_info_t * db);
  150. #endif
  151. /* DM9000 network board routine ---------------------------- */
  152. static void
  153. dm9000_reset(board_info_t * db)
  154. {
  155. dev_dbg(db->dev, "resetting device\n");
  156. /* RESET device */
  157. writeb(DM9000_NCR, db->io_addr);
  158. udelay(200);
  159. writeb(NCR_RST, db->io_data);
  160. udelay(200);
  161. }
  162. /*
  163. * Read a byte from I/O port
  164. */
  165. static u8
  166. ior(board_info_t * db, int reg)
  167. {
  168. writeb(reg, db->io_addr);
  169. return readb(db->io_data);
  170. }
  171. /*
  172. * Write a byte to I/O port
  173. */
  174. static void
  175. iow(board_info_t * db, int reg, int value)
  176. {
  177. writeb(reg, db->io_addr);
  178. writeb(value, db->io_data);
  179. }
  180. /* routines for sending block to chip */
  181. static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
  182. {
  183. writesb(reg, data, count);
  184. }
  185. static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
  186. {
  187. writesw(reg, data, (count+1) >> 1);
  188. }
  189. static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
  190. {
  191. writesl(reg, data, (count+3) >> 2);
  192. }
  193. /* input block from chip to memory */
  194. static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
  195. {
  196. readsb(reg, data, count);
  197. }
  198. static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
  199. {
  200. readsw(reg, data, (count+1) >> 1);
  201. }
  202. static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
  203. {
  204. readsl(reg, data, (count+3) >> 2);
  205. }
  206. /* dump block from chip to null */
  207. static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
  208. {
  209. int i;
  210. int tmp;
  211. for (i = 0; i < count; i++)
  212. tmp = readb(reg);
  213. }
  214. static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
  215. {
  216. int i;
  217. int tmp;
  218. count = (count + 1) >> 1;
  219. for (i = 0; i < count; i++)
  220. tmp = readw(reg);
  221. }
  222. static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
  223. {
  224. int i;
  225. int tmp;
  226. count = (count + 3) >> 2;
  227. for (i = 0; i < count; i++)
  228. tmp = readl(reg);
  229. }
  230. /* dm9000_set_io
  231. *
  232. * select the specified set of io routines to use with the
  233. * device
  234. */
  235. static void dm9000_set_io(struct board_info *db, int byte_width)
  236. {
  237. /* use the size of the data resource to work out what IO
  238. * routines we want to use
  239. */
  240. switch (byte_width) {
  241. case 1:
  242. db->dumpblk = dm9000_dumpblk_8bit;
  243. db->outblk = dm9000_outblk_8bit;
  244. db->inblk = dm9000_inblk_8bit;
  245. break;
  246. case 3:
  247. dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
  248. case 2:
  249. db->dumpblk = dm9000_dumpblk_16bit;
  250. db->outblk = dm9000_outblk_16bit;
  251. db->inblk = dm9000_inblk_16bit;
  252. break;
  253. case 4:
  254. default:
  255. db->dumpblk = dm9000_dumpblk_32bit;
  256. db->outblk = dm9000_outblk_32bit;
  257. db->inblk = dm9000_inblk_32bit;
  258. break;
  259. }
  260. }
  261. /* Our watchdog timed out. Called by the networking layer */
  262. static void dm9000_timeout(struct net_device *dev)
  263. {
  264. board_info_t *db = (board_info_t *) dev->priv;
  265. u8 reg_save;
  266. unsigned long flags;
  267. /* Save previous register address */
  268. reg_save = readb(db->io_addr);
  269. spin_lock_irqsave(&db->lock,flags);
  270. netif_stop_queue(dev);
  271. dm9000_reset(db);
  272. dm9000_init_dm9000(dev);
  273. /* We can accept TX packets again */
  274. dev->trans_start = jiffies;
  275. netif_wake_queue(dev);
  276. /* Restore previous register address */
  277. writeb(reg_save, db->io_addr);
  278. spin_unlock_irqrestore(&db->lock,flags);
  279. }
  280. #ifdef CONFIG_NET_POLL_CONTROLLER
  281. /*
  282. *Used by netconsole
  283. */
  284. static void dm9000_poll_controller(struct net_device *dev)
  285. {
  286. disable_irq(dev->irq);
  287. dm9000_interrupt(dev->irq,dev);
  288. enable_irq(dev->irq);
  289. }
  290. #endif
  291. /* ethtool ops */
  292. static void dm9000_get_drvinfo(struct net_device *dev,
  293. struct ethtool_drvinfo *info)
  294. {
  295. board_info_t *dm = to_dm9000_board(dev);
  296. strcpy(info->driver, CARDNAME);
  297. strcpy(info->version, DRV_VERSION);
  298. strcpy(info->bus_info, to_platform_device(dm->dev)->name);
  299. }
  300. static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  301. {
  302. board_info_t *dm = to_dm9000_board(dev);
  303. unsigned long flags;
  304. spin_lock_irqsave(&dm->lock, flags);
  305. mii_ethtool_gset(&dm->mii, cmd);
  306. spin_lock_irqsave(&dm->lock, flags);
  307. return 0;
  308. }
  309. static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  310. {
  311. board_info_t *dm = to_dm9000_board(dev);
  312. unsigned long flags;
  313. int rc;
  314. spin_lock_irqsave(&dm->lock, flags);
  315. rc = mii_ethtool_sset(&dm->mii, cmd);
  316. spin_lock_irqsave(&dm->lock, flags);
  317. return rc;
  318. }
  319. static int dm9000_nway_reset(struct net_device *dev)
  320. {
  321. board_info_t *dm = to_dm9000_board(dev);
  322. return mii_nway_restart(&dm->mii);
  323. }
  324. static u32 dm9000_get_link(struct net_device *dev)
  325. {
  326. board_info_t *dm = to_dm9000_board(dev);
  327. return mii_link_ok(&dm->mii);
  328. }
  329. static const struct ethtool_ops dm9000_ethtool_ops = {
  330. .get_drvinfo = dm9000_get_drvinfo,
  331. .get_settings = dm9000_get_settings,
  332. .set_settings = dm9000_set_settings,
  333. .nway_reset = dm9000_nway_reset,
  334. .get_link = dm9000_get_link,
  335. };
  336. /* dm9000_release_board
  337. *
  338. * release a board, and any mapped resources
  339. */
  340. static void
  341. dm9000_release_board(struct platform_device *pdev, struct board_info *db)
  342. {
  343. if (db->data_res == NULL) {
  344. if (db->addr_res != NULL)
  345. release_mem_region((unsigned long)db->io_addr, 4);
  346. return;
  347. }
  348. /* unmap our resources */
  349. iounmap(db->io_addr);
  350. iounmap(db->io_data);
  351. /* release the resources */
  352. if (db->data_req != NULL) {
  353. release_resource(db->data_req);
  354. kfree(db->data_req);
  355. }
  356. if (db->addr_req != NULL) {
  357. release_resource(db->addr_req);
  358. kfree(db->addr_req);
  359. }
  360. }
  361. #define res_size(_r) (((_r)->end - (_r)->start) + 1)
  362. /*
  363. * Search DM9000 board, allocate space and register it
  364. */
  365. static int
  366. dm9000_probe(struct platform_device *pdev)
  367. {
  368. struct dm9000_plat_data *pdata = pdev->dev.platform_data;
  369. struct board_info *db; /* Point a board information structure */
  370. struct net_device *ndev;
  371. unsigned long base;
  372. int ret = 0;
  373. int iosize;
  374. int i;
  375. u32 id_val;
  376. /* Init network device */
  377. ndev = alloc_etherdev(sizeof (struct board_info));
  378. if (!ndev) {
  379. dev_err(&pdev->dev, "could not allocate device.\n");
  380. return -ENOMEM;
  381. }
  382. SET_NETDEV_DEV(ndev, &pdev->dev);
  383. dev_dbg(&pdev->dev, "dm9000_probe()");
  384. /* setup board info structure */
  385. db = (struct board_info *) ndev->priv;
  386. memset(db, 0, sizeof (*db));
  387. db->dev = &pdev->dev;
  388. spin_lock_init(&db->lock);
  389. if (pdev->num_resources < 2) {
  390. ret = -ENODEV;
  391. goto out;
  392. } else if (pdev->num_resources == 2) {
  393. base = pdev->resource[0].start;
  394. if (!request_mem_region(base, 4, ndev->name)) {
  395. ret = -EBUSY;
  396. goto out;
  397. }
  398. ndev->base_addr = base;
  399. ndev->irq = pdev->resource[1].start;
  400. db->io_addr = (void __iomem *)base;
  401. db->io_data = (void __iomem *)(base + 4);
  402. /* ensure at least we have a default set of IO routines */
  403. dm9000_set_io(db, 2);
  404. } else {
  405. db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  406. db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  407. db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  408. if (db->addr_res == NULL || db->data_res == NULL ||
  409. db->irq_res == NULL) {
  410. dev_err(db->dev, "insufficient resources\n");
  411. ret = -ENOENT;
  412. goto out;
  413. }
  414. i = res_size(db->addr_res);
  415. db->addr_req = request_mem_region(db->addr_res->start, i,
  416. pdev->name);
  417. if (db->addr_req == NULL) {
  418. dev_err(db->dev, "cannot claim address reg area\n");
  419. ret = -EIO;
  420. goto out;
  421. }
  422. db->io_addr = ioremap(db->addr_res->start, i);
  423. if (db->io_addr == NULL) {
  424. dev_err(db->dev, "failed to ioremap address reg\n");
  425. ret = -EINVAL;
  426. goto out;
  427. }
  428. iosize = res_size(db->data_res);
  429. db->data_req = request_mem_region(db->data_res->start, iosize,
  430. pdev->name);
  431. if (db->data_req == NULL) {
  432. dev_err(db->dev, "cannot claim data reg area\n");
  433. ret = -EIO;
  434. goto out;
  435. }
  436. db->io_data = ioremap(db->data_res->start, iosize);
  437. if (db->io_data == NULL) {
  438. dev_err(db->dev,"failed to ioremap data reg\n");
  439. ret = -EINVAL;
  440. goto out;
  441. }
  442. /* fill in parameters for net-dev structure */
  443. ndev->base_addr = (unsigned long)db->io_addr;
  444. ndev->irq = db->irq_res->start;
  445. /* ensure at least we have a default set of IO routines */
  446. dm9000_set_io(db, iosize);
  447. }
  448. /* check to see if anything is being over-ridden */
  449. if (pdata != NULL) {
  450. /* check to see if the driver wants to over-ride the
  451. * default IO width */
  452. if (pdata->flags & DM9000_PLATF_8BITONLY)
  453. dm9000_set_io(db, 1);
  454. if (pdata->flags & DM9000_PLATF_16BITONLY)
  455. dm9000_set_io(db, 2);
  456. if (pdata->flags & DM9000_PLATF_32BITONLY)
  457. dm9000_set_io(db, 4);
  458. /* check to see if there are any IO routine
  459. * over-rides */
  460. if (pdata->inblk != NULL)
  461. db->inblk = pdata->inblk;
  462. if (pdata->outblk != NULL)
  463. db->outblk = pdata->outblk;
  464. if (pdata->dumpblk != NULL)
  465. db->dumpblk = pdata->dumpblk;
  466. db->flags = pdata->flags;
  467. }
  468. dm9000_reset(db);
  469. /* try two times, DM9000 sometimes gets the first read wrong */
  470. for (i = 0; i < 2; i++) {
  471. id_val = ior(db, DM9000_VIDL);
  472. id_val |= (u32)ior(db, DM9000_VIDH) << 8;
  473. id_val |= (u32)ior(db, DM9000_PIDL) << 16;
  474. id_val |= (u32)ior(db, DM9000_PIDH) << 24;
  475. if (id_val == DM9000_ID)
  476. break;
  477. dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
  478. }
  479. if (id_val != DM9000_ID) {
  480. dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
  481. ret = -ENODEV;
  482. goto out;
  483. }
  484. /* from this point we assume that we have found a DM9000 */
  485. /* driver system function */
  486. ether_setup(ndev);
  487. ndev->open = &dm9000_open;
  488. ndev->hard_start_xmit = &dm9000_start_xmit;
  489. ndev->tx_timeout = &dm9000_timeout;
  490. ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
  491. ndev->stop = &dm9000_stop;
  492. ndev->set_multicast_list = &dm9000_hash_table;
  493. ndev->ethtool_ops = &dm9000_ethtool_ops;
  494. #ifdef CONFIG_NET_POLL_CONTROLLER
  495. ndev->poll_controller = &dm9000_poll_controller;
  496. #endif
  497. #ifdef DM9000_PROGRAM_EEPROM
  498. program_eeprom(db);
  499. #endif
  500. db->msg_enable = NETIF_MSG_LINK;
  501. db->mii.phy_id_mask = 0x1f;
  502. db->mii.reg_num_mask = 0x1f;
  503. db->mii.force_media = 0;
  504. db->mii.full_duplex = 0;
  505. db->mii.dev = ndev;
  506. db->mii.mdio_read = dm9000_phy_read;
  507. db->mii.mdio_write = dm9000_phy_write;
  508. /* Read SROM content */
  509. for (i = 0; i < 64; i++)
  510. ((u16 *) db->srom)[i] = read_srom_word(db, i);
  511. /* Set Node Address */
  512. for (i = 0; i < 6; i++)
  513. ndev->dev_addr[i] = db->srom[i];
  514. if (!is_valid_ether_addr(ndev->dev_addr)) {
  515. /* try reading from mac */
  516. for (i = 0; i < 6; i++)
  517. ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
  518. }
  519. if (!is_valid_ether_addr(ndev->dev_addr))
  520. dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
  521. "set using ifconfig\n", ndev->name);
  522. platform_set_drvdata(pdev, ndev);
  523. ret = register_netdev(ndev);
  524. if (ret == 0) {
  525. DECLARE_MAC_BUF(mac);
  526. printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n",
  527. ndev->name, db->io_addr, db->io_data, ndev->irq,
  528. print_mac(mac, ndev->dev_addr));
  529. }
  530. return 0;
  531. out:
  532. dev_err(db->dev, "not found (%d).\n", ret);
  533. dm9000_release_board(pdev, db);
  534. free_netdev(ndev);
  535. return ret;
  536. }
  537. /*
  538. * Open the interface.
  539. * The interface is opened whenever "ifconfig" actives it.
  540. */
  541. static int
  542. dm9000_open(struct net_device *dev)
  543. {
  544. board_info_t *db = (board_info_t *) dev->priv;
  545. unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
  546. dev_dbg(db->dev, "entering %s\n", __func__);
  547. /* If there is no IRQ type specified, default to something that
  548. * may work, and tell the user that this is a problem */
  549. if (irqflags == IRQF_TRIGGER_NONE) {
  550. dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
  551. irqflags = DEFAULT_TRIGGER;
  552. }
  553. irqflags |= IRQF_SHARED;
  554. if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
  555. return -EAGAIN;
  556. /* Initialize DM9000 board */
  557. dm9000_reset(db);
  558. dm9000_init_dm9000(dev);
  559. /* Init driver variable */
  560. db->dbug_cnt = 0;
  561. mii_check_media(&db->mii, netif_msg_link(db), 1);
  562. netif_start_queue(dev);
  563. return 0;
  564. }
  565. /*
  566. * Initilize dm9000 board
  567. */
  568. static void
  569. dm9000_init_dm9000(struct net_device *dev)
  570. {
  571. board_info_t *db = (board_info_t *) dev->priv;
  572. dm9000_dbg(db, 1, "entering %s\n", __func__);
  573. /* I/O mode */
  574. db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
  575. /* GPIO0 on pre-activate PHY */
  576. iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
  577. iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
  578. iow(db, DM9000_GPR, 0); /* Enable PHY */
  579. if (db->flags & DM9000_PLATF_EXT_PHY)
  580. iow(db, DM9000_NCR, NCR_EXT_PHY);
  581. /* Program operating register */
  582. iow(db, DM9000_TCR, 0); /* TX Polling clear */
  583. iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
  584. iow(db, DM9000_FCR, 0xff); /* Flow Control */
  585. iow(db, DM9000_SMCR, 0); /* Special Mode */
  586. /* clear TX status */
  587. iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
  588. iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
  589. /* Set address filter table */
  590. dm9000_hash_table(dev);
  591. /* Activate DM9000 */
  592. iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
  593. /* Enable TX/RX interrupt mask */
  594. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  595. /* Init Driver variable */
  596. db->tx_pkt_cnt = 0;
  597. db->queue_pkt_len = 0;
  598. dev->trans_start = 0;
  599. }
  600. /*
  601. * Hardware start transmission.
  602. * Send a packet to media from the upper layer.
  603. */
  604. static int
  605. dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
  606. {
  607. unsigned long flags;
  608. board_info_t *db = (board_info_t *) dev->priv;
  609. dm9000_dbg(db, 3, "%s:\n", __func__);
  610. if (db->tx_pkt_cnt > 1)
  611. return 1;
  612. spin_lock_irqsave(&db->lock, flags);
  613. /* Move data to DM9000 TX RAM */
  614. writeb(DM9000_MWCMD, db->io_addr);
  615. (db->outblk)(db->io_data, skb->data, skb->len);
  616. dev->stats.tx_bytes += skb->len;
  617. db->tx_pkt_cnt++;
  618. /* TX control: First packet immediately send, second packet queue */
  619. if (db->tx_pkt_cnt == 1) {
  620. /* Set TX length to DM9000 */
  621. iow(db, DM9000_TXPLL, skb->len & 0xff);
  622. iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
  623. /* Issue TX polling command */
  624. iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
  625. dev->trans_start = jiffies; /* save the time stamp */
  626. } else {
  627. /* Second packet */
  628. db->queue_pkt_len = skb->len;
  629. netif_stop_queue(dev);
  630. }
  631. spin_unlock_irqrestore(&db->lock, flags);
  632. /* free this SKB */
  633. dev_kfree_skb(skb);
  634. return 0;
  635. }
  636. static void
  637. dm9000_shutdown(struct net_device *dev)
  638. {
  639. board_info_t *db = (board_info_t *) dev->priv;
  640. /* RESET device */
  641. dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
  642. iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
  643. iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
  644. iow(db, DM9000_RCR, 0x00); /* Disable RX */
  645. }
  646. /*
  647. * Stop the interface.
  648. * The interface is stopped when it is brought.
  649. */
  650. static int
  651. dm9000_stop(struct net_device *ndev)
  652. {
  653. board_info_t *db = (board_info_t *) ndev->priv;
  654. dm9000_dbg(db, 1, "entering %s\n", __func__);
  655. netif_stop_queue(ndev);
  656. netif_carrier_off(ndev);
  657. /* free interrupt */
  658. free_irq(ndev->irq, ndev);
  659. dm9000_shutdown(ndev);
  660. return 0;
  661. }
  662. /*
  663. * DM9000 interrupt handler
  664. * receive the packet to upper layer, free the transmitted packet
  665. */
  666. static void
  667. dm9000_tx_done(struct net_device *dev, board_info_t * db)
  668. {
  669. int tx_status = ior(db, DM9000_NSR); /* Got TX status */
  670. if (tx_status & (NSR_TX2END | NSR_TX1END)) {
  671. /* One packet sent complete */
  672. db->tx_pkt_cnt--;
  673. dev->stats.tx_packets++;
  674. /* Queue packet check & send */
  675. if (db->tx_pkt_cnt > 0) {
  676. iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
  677. iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
  678. iow(db, DM9000_TCR, TCR_TXREQ);
  679. dev->trans_start = jiffies;
  680. }
  681. netif_wake_queue(dev);
  682. }
  683. }
  684. static irqreturn_t
  685. dm9000_interrupt(int irq, void *dev_id)
  686. {
  687. struct net_device *dev = dev_id;
  688. board_info_t *db = (board_info_t *) dev->priv;
  689. int int_status;
  690. u8 reg_save;
  691. dm9000_dbg(db, 3, "entering %s\n", __func__);
  692. /* A real interrupt coming */
  693. spin_lock(&db->lock);
  694. /* Save previous register address */
  695. reg_save = readb(db->io_addr);
  696. /* Disable all interrupts */
  697. iow(db, DM9000_IMR, IMR_PAR);
  698. /* Got DM9000 interrupt status */
  699. int_status = ior(db, DM9000_ISR); /* Got ISR */
  700. iow(db, DM9000_ISR, int_status); /* Clear ISR status */
  701. /* Received the coming packet */
  702. if (int_status & ISR_PRS)
  703. dm9000_rx(dev);
  704. /* Trnasmit Interrupt check */
  705. if (int_status & ISR_PTS)
  706. dm9000_tx_done(dev, db);
  707. /* Re-enable interrupt mask */
  708. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  709. /* Restore previous register address */
  710. writeb(reg_save, db->io_addr);
  711. spin_unlock(&db->lock);
  712. return IRQ_HANDLED;
  713. }
  714. struct dm9000_rxhdr {
  715. u8 RxPktReady;
  716. u8 RxStatus;
  717. u16 RxLen;
  718. } __attribute__((__packed__));
  719. /*
  720. * Received a packet and pass to upper layer
  721. */
  722. static void
  723. dm9000_rx(struct net_device *dev)
  724. {
  725. board_info_t *db = (board_info_t *) dev->priv;
  726. struct dm9000_rxhdr rxhdr;
  727. struct sk_buff *skb;
  728. u8 rxbyte, *rdptr;
  729. bool GoodPacket;
  730. int RxLen;
  731. /* Check packet ready or not */
  732. do {
  733. ior(db, DM9000_MRCMDX); /* Dummy read */
  734. /* Get most updated data */
  735. rxbyte = readb(db->io_data);
  736. /* Status check: this byte must be 0 or 1 */
  737. if (rxbyte > DM9000_PKT_RDY) {
  738. dev_warn(db->dev, "status check fail: %d\n", rxbyte);
  739. iow(db, DM9000_RCR, 0x00); /* Stop Device */
  740. iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
  741. return;
  742. }
  743. if (rxbyte != DM9000_PKT_RDY)
  744. return;
  745. /* A packet ready now & Get status/length */
  746. GoodPacket = true;
  747. writeb(DM9000_MRCMD, db->io_addr);
  748. (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
  749. RxLen = le16_to_cpu(rxhdr.RxLen);
  750. /* Packet Status check */
  751. if (RxLen < 0x40) {
  752. GoodPacket = false;
  753. dev_dbg(db->dev, "Bad Packet received (runt)\n");
  754. }
  755. if (RxLen > DM9000_PKT_MAX) {
  756. dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
  757. }
  758. if (rxhdr.RxStatus & 0xbf) {
  759. GoodPacket = false;
  760. if (rxhdr.RxStatus & 0x01) {
  761. dev_dbg(db->dev, "fifo error\n");
  762. dev->stats.rx_fifo_errors++;
  763. }
  764. if (rxhdr.RxStatus & 0x02) {
  765. dev_dbg(db->dev, "crc error\n");
  766. dev->stats.rx_crc_errors++;
  767. }
  768. if (rxhdr.RxStatus & 0x80) {
  769. dev_dbg(db->dev, "length error\n");
  770. dev->stats.rx_length_errors++;
  771. }
  772. }
  773. /* Move data from DM9000 */
  774. if (GoodPacket
  775. && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
  776. skb_reserve(skb, 2);
  777. rdptr = (u8 *) skb_put(skb, RxLen - 4);
  778. /* Read received packet from RX SRAM */
  779. (db->inblk)(db->io_data, rdptr, RxLen);
  780. dev->stats.rx_bytes += RxLen;
  781. /* Pass to upper layer */
  782. skb->protocol = eth_type_trans(skb, dev);
  783. netif_rx(skb);
  784. dev->stats.rx_packets++;
  785. } else {
  786. /* need to dump the packet's data */
  787. (db->dumpblk)(db->io_data, RxLen);
  788. }
  789. } while (rxbyte == DM9000_PKT_RDY);
  790. }
  791. /*
  792. * Read a word data from SROM
  793. */
  794. static u16
  795. read_srom_word(board_info_t * db, int offset)
  796. {
  797. iow(db, DM9000_EPAR, offset);
  798. iow(db, DM9000_EPCR, EPCR_ERPRR);
  799. mdelay(8); /* according to the datasheet 200us should be enough,
  800. but it doesn't work */
  801. iow(db, DM9000_EPCR, 0x0);
  802. return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
  803. }
  804. #ifdef DM9000_PROGRAM_EEPROM
  805. /*
  806. * Write a word data to SROM
  807. */
  808. static void
  809. write_srom_word(board_info_t * db, int offset, u16 val)
  810. {
  811. iow(db, DM9000_EPAR, offset);
  812. iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
  813. iow(db, DM9000_EPDRL, (val & 0xff));
  814. iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
  815. mdelay(8); /* same shit */
  816. iow(db, DM9000_EPCR, 0);
  817. }
  818. /*
  819. * Only for development:
  820. * Here we write static data to the eeprom in case
  821. * we don't have valid content on a new board
  822. */
  823. static void
  824. program_eeprom(board_info_t * db)
  825. {
  826. u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
  827. 0x0000, /* Autoload: accept nothing */
  828. 0x0a46, 0x9000, /* Vendor / Product ID */
  829. 0x0000, /* pin control */
  830. 0x0000,
  831. }; /* Wake-up mode control */
  832. int i;
  833. for (i = 0; i < 8; i++)
  834. write_srom_word(db, i, eeprom[i]);
  835. }
  836. #endif
  837. /*
  838. * Calculate the CRC valude of the Rx packet
  839. * flag = 1 : return the reverse CRC (for the received packet CRC)
  840. * 0 : return the normal CRC (for Hash Table index)
  841. */
  842. static unsigned long
  843. cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
  844. {
  845. u32 crc = ether_crc_le(Len, Data);
  846. if (flag)
  847. return ~crc;
  848. return crc;
  849. }
  850. /*
  851. * Set DM9000 multicast address
  852. */
  853. static void
  854. dm9000_hash_table(struct net_device *dev)
  855. {
  856. board_info_t *db = (board_info_t *) dev->priv;
  857. struct dev_mc_list *mcptr = dev->mc_list;
  858. int mc_cnt = dev->mc_count;
  859. u32 hash_val;
  860. u16 i, oft, hash_table[4];
  861. unsigned long flags;
  862. dm9000_dbg(db, 1, "entering %s\n", __func__);
  863. spin_lock_irqsave(&db->lock,flags);
  864. for (i = 0, oft = 0x10; i < 6; i++, oft++)
  865. iow(db, oft, dev->dev_addr[i]);
  866. /* Clear Hash Table */
  867. for (i = 0; i < 4; i++)
  868. hash_table[i] = 0x0;
  869. /* broadcast address */
  870. hash_table[3] = 0x8000;
  871. /* the multicast address in Hash Table : 64 bits */
  872. for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
  873. hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
  874. hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
  875. }
  876. /* Write the hash table to MAC MD table */
  877. for (i = 0, oft = 0x16; i < 4; i++) {
  878. iow(db, oft++, hash_table[i] & 0xff);
  879. iow(db, oft++, (hash_table[i] >> 8) & 0xff);
  880. }
  881. spin_unlock_irqrestore(&db->lock,flags);
  882. }
  883. /*
  884. * Read a word from phyxcer
  885. */
  886. static int
  887. dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
  888. {
  889. board_info_t *db = (board_info_t *) dev->priv;
  890. unsigned long flags;
  891. unsigned int reg_save;
  892. int ret;
  893. spin_lock_irqsave(&db->lock,flags);
  894. /* Save previous register address */
  895. reg_save = readb(db->io_addr);
  896. /* Fill the phyxcer register into REG_0C */
  897. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  898. iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
  899. udelay(100); /* Wait read complete */
  900. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
  901. /* The read data keeps on REG_0D & REG_0E */
  902. ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
  903. /* restore the previous address */
  904. writeb(reg_save, db->io_addr);
  905. spin_unlock_irqrestore(&db->lock,flags);
  906. return ret;
  907. }
  908. /*
  909. * Write a word to phyxcer
  910. */
  911. static void
  912. dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
  913. {
  914. board_info_t *db = (board_info_t *) dev->priv;
  915. unsigned long flags;
  916. unsigned long reg_save;
  917. spin_lock_irqsave(&db->lock,flags);
  918. /* Save previous register address */
  919. reg_save = readb(db->io_addr);
  920. /* Fill the phyxcer register into REG_0C */
  921. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  922. /* Fill the written data into REG_0D & REG_0E */
  923. iow(db, DM9000_EPDRL, (value & 0xff));
  924. iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
  925. iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
  926. udelay(500); /* Wait write complete */
  927. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
  928. /* restore the previous address */
  929. writeb(reg_save, db->io_addr);
  930. spin_unlock_irqrestore(&db->lock,flags);
  931. }
  932. static int
  933. dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
  934. {
  935. struct net_device *ndev = platform_get_drvdata(dev);
  936. if (ndev) {
  937. if (netif_running(ndev)) {
  938. netif_device_detach(ndev);
  939. dm9000_shutdown(ndev);
  940. }
  941. }
  942. return 0;
  943. }
  944. static int
  945. dm9000_drv_resume(struct platform_device *dev)
  946. {
  947. struct net_device *ndev = platform_get_drvdata(dev);
  948. board_info_t *db = (board_info_t *) ndev->priv;
  949. if (ndev) {
  950. if (netif_running(ndev)) {
  951. dm9000_reset(db);
  952. dm9000_init_dm9000(ndev);
  953. netif_device_attach(ndev);
  954. }
  955. }
  956. return 0;
  957. }
  958. static int
  959. dm9000_drv_remove(struct platform_device *pdev)
  960. {
  961. struct net_device *ndev = platform_get_drvdata(pdev);
  962. platform_set_drvdata(pdev, NULL);
  963. unregister_netdev(ndev);
  964. dm9000_release_board(pdev, (board_info_t *) ndev->priv);
  965. free_netdev(ndev); /* free device structure */
  966. dev_dbg(&pdev->dev, "released and freed device\n");
  967. return 0;
  968. }
  969. static struct platform_driver dm9000_driver = {
  970. .driver = {
  971. .name = "dm9000",
  972. .owner = THIS_MODULE,
  973. },
  974. .probe = dm9000_probe,
  975. .remove = dm9000_drv_remove,
  976. .suspend = dm9000_drv_suspend,
  977. .resume = dm9000_drv_resume,
  978. };
  979. static int __init
  980. dm9000_init(void)
  981. {
  982. printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
  983. return platform_driver_register(&dm9000_driver); /* search board and register */
  984. }
  985. static void __exit
  986. dm9000_cleanup(void)
  987. {
  988. platform_driver_unregister(&dm9000_driver);
  989. }
  990. module_init(dm9000_init);
  991. module_exit(dm9000_cleanup);
  992. MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
  993. MODULE_DESCRIPTION("Davicom DM9000 network driver");
  994. MODULE_LICENSE("GPL");