mach-universal_c210.c 19 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/fb.h>
  16. #include <linux/mfd/max8998.h>
  17. #include <linux/regulator/machine.h>
  18. #include <linux/regulator/fixed.h>
  19. #include <linux/regulator/max8952.h>
  20. #include <linux/mmc/host.h>
  21. #include <linux/i2c-gpio.h>
  22. #include <linux/i2c/mcs.h>
  23. #include <linux/i2c/atmel_mxt_ts.h>
  24. #include <asm/mach/arch.h>
  25. #include <asm/mach-types.h>
  26. #include <plat/regs-serial.h>
  27. #include <plat/exynos4.h>
  28. #include <plat/cpu.h>
  29. #include <plat/devs.h>
  30. #include <plat/iic.h>
  31. #include <plat/gpio-cfg.h>
  32. #include <plat/fb.h>
  33. #include <plat/mfc.h>
  34. #include <plat/sdhci.h>
  35. #include <plat/pd.h>
  36. #include <plat/regs-fb-v4.h>
  37. #include <mach/map.h>
  38. /* Following are default values for UCON, ULCON and UFCON UART registers */
  39. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  40. S3C2410_UCON_RXILEVEL | \
  41. S3C2410_UCON_TXIRQMODE | \
  42. S3C2410_UCON_RXIRQMODE | \
  43. S3C2410_UCON_RXFIFO_TOI | \
  44. S3C2443_UCON_RXERR_IRQEN)
  45. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  46. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  47. S5PV210_UFCON_TXTRIG256 | \
  48. S5PV210_UFCON_RXTRIG256)
  49. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  50. [0] = {
  51. .hwport = 0,
  52. .ucon = UNIVERSAL_UCON_DEFAULT,
  53. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  54. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  55. },
  56. [1] = {
  57. .hwport = 1,
  58. .ucon = UNIVERSAL_UCON_DEFAULT,
  59. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  60. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  61. },
  62. [2] = {
  63. .hwport = 2,
  64. .ucon = UNIVERSAL_UCON_DEFAULT,
  65. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  66. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  67. },
  68. [3] = {
  69. .hwport = 3,
  70. .ucon = UNIVERSAL_UCON_DEFAULT,
  71. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  72. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  73. },
  74. };
  75. static struct regulator_consumer_supply max8952_consumer =
  76. REGULATOR_SUPPLY("vdd_arm", NULL);
  77. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  78. .gpio_vid0 = EXYNOS4_GPX0(3),
  79. .gpio_vid1 = EXYNOS4_GPX0(4),
  80. .gpio_en = -1, /* Not controllable, set "Always High" */
  81. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  82. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  83. .sync_freq = 0, /* default: fastest */
  84. .ramp_speed = 0, /* default: fastest */
  85. .reg_data = {
  86. .constraints = {
  87. .name = "VARM_1.2V",
  88. .min_uV = 770000,
  89. .max_uV = 1400000,
  90. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  91. .always_on = 1,
  92. .boot_on = 1,
  93. },
  94. .num_consumer_supplies = 1,
  95. .consumer_supplies = &max8952_consumer,
  96. },
  97. };
  98. static struct regulator_consumer_supply lp3974_buck1_consumer =
  99. REGULATOR_SUPPLY("vdd_int", NULL);
  100. static struct regulator_consumer_supply lp3974_buck2_consumer =
  101. REGULATOR_SUPPLY("vddg3d", NULL);
  102. static struct regulator_init_data lp3974_buck1_data = {
  103. .constraints = {
  104. .name = "VINT_1.1V",
  105. .min_uV = 750000,
  106. .max_uV = 1500000,
  107. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  108. REGULATOR_CHANGE_STATUS,
  109. .boot_on = 1,
  110. .state_mem = {
  111. .disabled = 1,
  112. },
  113. },
  114. .num_consumer_supplies = 1,
  115. .consumer_supplies = &lp3974_buck1_consumer,
  116. };
  117. static struct regulator_init_data lp3974_buck2_data = {
  118. .constraints = {
  119. .name = "VG3D_1.1V",
  120. .min_uV = 750000,
  121. .max_uV = 1500000,
  122. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  123. REGULATOR_CHANGE_STATUS,
  124. .boot_on = 1,
  125. .state_mem = {
  126. .disabled = 1,
  127. },
  128. },
  129. .num_consumer_supplies = 1,
  130. .consumer_supplies = &lp3974_buck2_consumer,
  131. };
  132. static struct regulator_init_data lp3974_buck3_data = {
  133. .constraints = {
  134. .name = "VCC_1.8V",
  135. .min_uV = 1800000,
  136. .max_uV = 1800000,
  137. .apply_uV = 1,
  138. .always_on = 1,
  139. .state_mem = {
  140. .enabled = 1,
  141. },
  142. },
  143. };
  144. static struct regulator_init_data lp3974_buck4_data = {
  145. .constraints = {
  146. .name = "VMEM_1.2V",
  147. .min_uV = 1200000,
  148. .max_uV = 1200000,
  149. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  150. .apply_uV = 1,
  151. .state_mem = {
  152. .disabled = 1,
  153. },
  154. },
  155. };
  156. static struct regulator_init_data lp3974_ldo2_data = {
  157. .constraints = {
  158. .name = "VALIVE_1.2V",
  159. .min_uV = 1200000,
  160. .max_uV = 1200000,
  161. .apply_uV = 1,
  162. .always_on = 1,
  163. .state_mem = {
  164. .enabled = 1,
  165. },
  166. },
  167. };
  168. static struct regulator_init_data lp3974_ldo3_data = {
  169. .constraints = {
  170. .name = "VUSB+MIPI_1.1V",
  171. .min_uV = 1100000,
  172. .max_uV = 1100000,
  173. .apply_uV = 1,
  174. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  175. .state_mem = {
  176. .disabled = 1,
  177. },
  178. },
  179. };
  180. static struct regulator_init_data lp3974_ldo4_data = {
  181. .constraints = {
  182. .name = "VADC_3.3V",
  183. .min_uV = 3300000,
  184. .max_uV = 3300000,
  185. .apply_uV = 1,
  186. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  187. .state_mem = {
  188. .disabled = 1,
  189. },
  190. },
  191. };
  192. static struct regulator_init_data lp3974_ldo5_data = {
  193. .constraints = {
  194. .name = "VTF_2.8V",
  195. .min_uV = 2800000,
  196. .max_uV = 2800000,
  197. .apply_uV = 1,
  198. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  199. .state_mem = {
  200. .disabled = 1,
  201. },
  202. },
  203. };
  204. static struct regulator_init_data lp3974_ldo6_data = {
  205. .constraints = {
  206. .name = "LDO6",
  207. .min_uV = 2000000,
  208. .max_uV = 2000000,
  209. .apply_uV = 1,
  210. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  211. .state_mem = {
  212. .disabled = 1,
  213. },
  214. },
  215. };
  216. static struct regulator_init_data lp3974_ldo7_data = {
  217. .constraints = {
  218. .name = "VLCD+VMIPI_1.8V",
  219. .min_uV = 1800000,
  220. .max_uV = 1800000,
  221. .apply_uV = 1,
  222. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  223. .state_mem = {
  224. .disabled = 1,
  225. },
  226. },
  227. };
  228. static struct regulator_init_data lp3974_ldo8_data = {
  229. .constraints = {
  230. .name = "VUSB+VDAC_3.3V",
  231. .min_uV = 3300000,
  232. .max_uV = 3300000,
  233. .apply_uV = 1,
  234. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  235. .state_mem = {
  236. .disabled = 1,
  237. },
  238. },
  239. };
  240. static struct regulator_init_data lp3974_ldo9_data = {
  241. .constraints = {
  242. .name = "VCC_2.8V",
  243. .min_uV = 2800000,
  244. .max_uV = 2800000,
  245. .apply_uV = 1,
  246. .always_on = 1,
  247. .state_mem = {
  248. .enabled = 1,
  249. },
  250. },
  251. };
  252. static struct regulator_init_data lp3974_ldo10_data = {
  253. .constraints = {
  254. .name = "VPLL_1.1V",
  255. .min_uV = 1100000,
  256. .max_uV = 1100000,
  257. .boot_on = 1,
  258. .apply_uV = 1,
  259. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  260. .state_mem = {
  261. .disabled = 1,
  262. },
  263. },
  264. };
  265. static struct regulator_init_data lp3974_ldo11_data = {
  266. .constraints = {
  267. .name = "CAM_AF_3.3V",
  268. .min_uV = 3300000,
  269. .max_uV = 3300000,
  270. .apply_uV = 1,
  271. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  272. .state_mem = {
  273. .disabled = 1,
  274. },
  275. },
  276. };
  277. static struct regulator_init_data lp3974_ldo12_data = {
  278. .constraints = {
  279. .name = "PS_2.8V",
  280. .min_uV = 2800000,
  281. .max_uV = 2800000,
  282. .apply_uV = 1,
  283. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  284. .state_mem = {
  285. .disabled = 1,
  286. },
  287. },
  288. };
  289. static struct regulator_init_data lp3974_ldo13_data = {
  290. .constraints = {
  291. .name = "VHIC_1.2V",
  292. .min_uV = 1200000,
  293. .max_uV = 1200000,
  294. .apply_uV = 1,
  295. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  296. .state_mem = {
  297. .disabled = 1,
  298. },
  299. },
  300. };
  301. static struct regulator_init_data lp3974_ldo14_data = {
  302. .constraints = {
  303. .name = "CAM_I_HOST_1.8V",
  304. .min_uV = 1800000,
  305. .max_uV = 1800000,
  306. .apply_uV = 1,
  307. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  308. .state_mem = {
  309. .disabled = 1,
  310. },
  311. },
  312. };
  313. static struct regulator_init_data lp3974_ldo15_data = {
  314. .constraints = {
  315. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  316. .min_uV = 1200000,
  317. .max_uV = 1200000,
  318. .apply_uV = 1,
  319. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  320. .state_mem = {
  321. .disabled = 1,
  322. },
  323. },
  324. };
  325. static struct regulator_init_data lp3974_ldo16_data = {
  326. .constraints = {
  327. .name = "CAM_S_ANA_2.8V",
  328. .min_uV = 2800000,
  329. .max_uV = 2800000,
  330. .apply_uV = 1,
  331. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  332. .state_mem = {
  333. .disabled = 1,
  334. },
  335. },
  336. };
  337. static struct regulator_init_data lp3974_ldo17_data = {
  338. .constraints = {
  339. .name = "VCC_3.0V_LCD",
  340. .min_uV = 3000000,
  341. .max_uV = 3000000,
  342. .apply_uV = 1,
  343. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  344. .boot_on = 1,
  345. .state_mem = {
  346. .disabled = 1,
  347. },
  348. },
  349. };
  350. static struct regulator_init_data lp3974_32khz_ap_data = {
  351. .constraints = {
  352. .name = "32KHz AP",
  353. .always_on = 1,
  354. .state_mem = {
  355. .enabled = 1,
  356. },
  357. },
  358. };
  359. static struct regulator_init_data lp3974_32khz_cp_data = {
  360. .constraints = {
  361. .name = "32KHz CP",
  362. .state_mem = {
  363. .disabled = 1,
  364. },
  365. },
  366. };
  367. static struct regulator_init_data lp3974_vichg_data = {
  368. .constraints = {
  369. .name = "VICHG",
  370. .state_mem = {
  371. .disabled = 1,
  372. },
  373. },
  374. };
  375. static struct regulator_init_data lp3974_esafeout1_data = {
  376. .constraints = {
  377. .name = "SAFEOUT1",
  378. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  379. .state_mem = {
  380. .enabled = 1,
  381. },
  382. },
  383. };
  384. static struct regulator_init_data lp3974_esafeout2_data = {
  385. .constraints = {
  386. .name = "SAFEOUT2",
  387. .boot_on = 1,
  388. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  389. .state_mem = {
  390. .enabled = 1,
  391. },
  392. },
  393. };
  394. static struct max8998_regulator_data lp3974_regulators[] = {
  395. { MAX8998_LDO2, &lp3974_ldo2_data },
  396. { MAX8998_LDO3, &lp3974_ldo3_data },
  397. { MAX8998_LDO4, &lp3974_ldo4_data },
  398. { MAX8998_LDO5, &lp3974_ldo5_data },
  399. { MAX8998_LDO6, &lp3974_ldo6_data },
  400. { MAX8998_LDO7, &lp3974_ldo7_data },
  401. { MAX8998_LDO8, &lp3974_ldo8_data },
  402. { MAX8998_LDO9, &lp3974_ldo9_data },
  403. { MAX8998_LDO10, &lp3974_ldo10_data },
  404. { MAX8998_LDO11, &lp3974_ldo11_data },
  405. { MAX8998_LDO12, &lp3974_ldo12_data },
  406. { MAX8998_LDO13, &lp3974_ldo13_data },
  407. { MAX8998_LDO14, &lp3974_ldo14_data },
  408. { MAX8998_LDO15, &lp3974_ldo15_data },
  409. { MAX8998_LDO16, &lp3974_ldo16_data },
  410. { MAX8998_LDO17, &lp3974_ldo17_data },
  411. { MAX8998_BUCK1, &lp3974_buck1_data },
  412. { MAX8998_BUCK2, &lp3974_buck2_data },
  413. { MAX8998_BUCK3, &lp3974_buck3_data },
  414. { MAX8998_BUCK4, &lp3974_buck4_data },
  415. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  416. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  417. { MAX8998_ENVICHG, &lp3974_vichg_data },
  418. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  419. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  420. };
  421. static struct max8998_platform_data universal_lp3974_pdata = {
  422. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  423. .regulators = lp3974_regulators,
  424. .buck1_voltage1 = 1100000, /* INT */
  425. .buck1_voltage2 = 1000000,
  426. .buck1_voltage3 = 1100000,
  427. .buck1_voltage4 = 1000000,
  428. .buck1_set1 = EXYNOS4_GPX0(5),
  429. .buck1_set2 = EXYNOS4_GPX0(6),
  430. .buck2_voltage1 = 1200000, /* G3D */
  431. .buck2_voltage2 = 1100000,
  432. .buck1_default_idx = 0,
  433. .buck2_set3 = EXYNOS4_GPE2(0),
  434. .buck2_default_idx = 0,
  435. .wakeup = true,
  436. };
  437. /* GPIO I2C 5 (PMIC) */
  438. static struct i2c_board_info i2c5_devs[] __initdata = {
  439. {
  440. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  441. .platform_data = &universal_max8952_pdata,
  442. }, {
  443. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  444. .platform_data = &universal_lp3974_pdata,
  445. },
  446. };
  447. /* I2C3 (TSP) */
  448. static struct mxt_platform_data qt602240_platform_data = {
  449. .x_line = 19,
  450. .y_line = 11,
  451. .x_size = 800,
  452. .y_size = 480,
  453. .blen = 0x11,
  454. .threshold = 0x28,
  455. .voltage = 2800000, /* 2.8V */
  456. .orient = MXT_DIAGONAL,
  457. };
  458. static struct i2c_board_info i2c3_devs[] __initdata = {
  459. {
  460. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  461. .platform_data = &qt602240_platform_data,
  462. },
  463. };
  464. static void __init universal_tsp_init(void)
  465. {
  466. int gpio;
  467. /* TSP_LDO_ON: XMDMADDR_11 */
  468. gpio = EXYNOS4_GPE2(3);
  469. gpio_request(gpio, "TSP_LDO_ON");
  470. gpio_direction_output(gpio, 1);
  471. gpio_export(gpio, 0);
  472. /* TSP_INT: XMDMADDR_7 */
  473. gpio = EXYNOS4_GPE1(7);
  474. gpio_request(gpio, "TSP_INT");
  475. s5p_register_gpio_interrupt(gpio);
  476. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  477. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  478. i2c3_devs[0].irq = gpio_to_irq(gpio);
  479. }
  480. /* GPIO I2C 12 (3 Touchkey) */
  481. static uint32_t touchkey_keymap[] = {
  482. /* MCS_KEY_MAP(value, keycode) */
  483. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  484. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  485. };
  486. static struct mcs_platform_data touchkey_data = {
  487. .keymap = touchkey_keymap,
  488. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  489. .key_maxval = 2,
  490. };
  491. /* GPIO I2C 3_TOUCH 2.8V */
  492. #define I2C_GPIO_BUS_12 12
  493. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  494. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  495. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  496. };
  497. static struct platform_device i2c_gpio12 = {
  498. .name = "i2c-gpio",
  499. .id = I2C_GPIO_BUS_12,
  500. .dev = {
  501. .platform_data = &i2c_gpio12_data,
  502. },
  503. };
  504. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  505. {
  506. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  507. .platform_data = &touchkey_data,
  508. },
  509. };
  510. static void __init universal_touchkey_init(void)
  511. {
  512. int gpio;
  513. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  514. gpio_request(gpio, "3_TOUCH_INT");
  515. s5p_register_gpio_interrupt(gpio);
  516. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  517. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  518. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  519. gpio_request(gpio, "3_TOUCH_EN");
  520. gpio_direction_output(gpio, 1);
  521. }
  522. /* GPIO KEYS */
  523. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  524. {
  525. .code = KEY_VOLUMEUP,
  526. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  527. .desc = "gpio-keys: KEY_VOLUMEUP",
  528. .type = EV_KEY,
  529. .active_low = 1,
  530. .debounce_interval = 1,
  531. }, {
  532. .code = KEY_VOLUMEDOWN,
  533. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  534. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  535. .type = EV_KEY,
  536. .active_low = 1,
  537. .debounce_interval = 1,
  538. }, {
  539. .code = KEY_CONFIG,
  540. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  541. .desc = "gpio-keys: KEY_CONFIG",
  542. .type = EV_KEY,
  543. .active_low = 1,
  544. .debounce_interval = 1,
  545. }, {
  546. .code = KEY_CAMERA,
  547. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  548. .desc = "gpio-keys: KEY_CAMERA",
  549. .type = EV_KEY,
  550. .active_low = 1,
  551. .debounce_interval = 1,
  552. }, {
  553. .code = KEY_OK,
  554. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  555. .desc = "gpio-keys: KEY_OK",
  556. .type = EV_KEY,
  557. .active_low = 1,
  558. .debounce_interval = 1,
  559. },
  560. };
  561. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  562. .buttons = universal_gpio_keys_tables,
  563. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  564. };
  565. static struct platform_device universal_gpio_keys = {
  566. .name = "gpio-keys",
  567. .dev = {
  568. .platform_data = &universal_gpio_keys_data,
  569. },
  570. };
  571. /* eMMC */
  572. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  573. .max_width = 8,
  574. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  575. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  576. MMC_CAP_DISABLE),
  577. .cd_type = S3C_SDHCI_CD_PERMANENT,
  578. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  579. };
  580. static struct regulator_consumer_supply mmc0_supplies[] = {
  581. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  582. };
  583. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  584. .constraints = {
  585. .name = "VMEM_VDD_2.8V",
  586. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  587. },
  588. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  589. .consumer_supplies = mmc0_supplies,
  590. };
  591. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  592. .supply_name = "MASSMEMORY_EN",
  593. .microvolts = 2800000,
  594. .gpio = EXYNOS4_GPE1(3),
  595. .enable_high = true,
  596. .init_data = &mmc0_fixed_voltage_init_data,
  597. };
  598. static struct platform_device mmc0_fixed_voltage = {
  599. .name = "reg-fixed-voltage",
  600. .id = 0,
  601. .dev = {
  602. .platform_data = &mmc0_fixed_voltage_config,
  603. },
  604. };
  605. /* SD */
  606. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  607. .max_width = 4,
  608. .host_caps = MMC_CAP_4_BIT_DATA |
  609. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  610. MMC_CAP_DISABLE,
  611. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  612. .ext_cd_gpio_invert = 1,
  613. .cd_type = S3C_SDHCI_CD_GPIO,
  614. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  615. };
  616. /* WiFi */
  617. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  618. .max_width = 4,
  619. .host_caps = MMC_CAP_4_BIT_DATA |
  620. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  621. MMC_CAP_DISABLE,
  622. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  623. };
  624. static void __init universal_sdhci_init(void)
  625. {
  626. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  627. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  628. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  629. }
  630. /* I2C0 */
  631. static struct i2c_board_info i2c0_devs[] __initdata = {
  632. /* Camera, To be updated */
  633. };
  634. /* I2C1 */
  635. static struct i2c_board_info i2c1_devs[] __initdata = {
  636. /* Gyro, To be updated */
  637. };
  638. /* Frame Buffer */
  639. static struct s3c_fb_pd_win universal_fb_win0 = {
  640. .win_mode = {
  641. .left_margin = 16,
  642. .right_margin = 16,
  643. .upper_margin = 2,
  644. .lower_margin = 28,
  645. .hsync_len = 2,
  646. .vsync_len = 1,
  647. .xres = 480,
  648. .yres = 800,
  649. .refresh = 55,
  650. },
  651. .max_bpp = 32,
  652. .default_bpp = 16,
  653. };
  654. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  655. .win[0] = &universal_fb_win0,
  656. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  657. VIDCON0_CLKSEL_LCD,
  658. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  659. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  660. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  661. };
  662. static struct platform_device *universal_devices[] __initdata = {
  663. /* Samsung Platform Devices */
  664. &s5p_device_fimc0,
  665. &s5p_device_fimc1,
  666. &s5p_device_fimc2,
  667. &s5p_device_fimc3,
  668. &mmc0_fixed_voltage,
  669. &s3c_device_hsmmc0,
  670. &s3c_device_hsmmc2,
  671. &s3c_device_hsmmc3,
  672. &s3c_device_i2c3,
  673. &s3c_device_i2c5,
  674. /* Universal Devices */
  675. &i2c_gpio12,
  676. &universal_gpio_keys,
  677. &s5p_device_onenand,
  678. &s5p_device_fimd0,
  679. &s5p_device_mfc,
  680. &s5p_device_mfc_l,
  681. &s5p_device_mfc_r,
  682. &exynos4_device_pd[PD_MFC],
  683. &exynos4_device_pd[PD_LCD0],
  684. };
  685. static void __init universal_map_io(void)
  686. {
  687. s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  688. s3c24xx_init_clocks(24000000);
  689. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  690. }
  691. static void __init universal_reserve(void)
  692. {
  693. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  694. }
  695. static void __init universal_machine_init(void)
  696. {
  697. universal_sdhci_init();
  698. i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
  699. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  700. universal_tsp_init();
  701. s3c_i2c3_set_platdata(NULL);
  702. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  703. s3c_i2c5_set_platdata(NULL);
  704. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  705. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  706. universal_touchkey_init();
  707. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  708. ARRAY_SIZE(i2c_gpio12_devs));
  709. /* Last */
  710. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  711. s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
  712. s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
  713. }
  714. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  715. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  716. .boot_params = S5P_PA_SDRAM + 0x100,
  717. .init_irq = exynos4_init_irq,
  718. .map_io = universal_map_io,
  719. .init_machine = universal_machine_init,
  720. .timer = &exynos4_timer,
  721. .reserve = &universal_reserve,
  722. MACHINE_END