mach-origen.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679
  1. /* linux/arch/arm/mach-exynos4/mach-origen.c
  2. *
  3. * Copyright (c) 2011 Insignal Co., Ltd.
  4. * http://www.insignal.co.kr/
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/serial_core.h>
  11. #include <linux/gpio.h>
  12. #include <linux/mmc/host.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/io.h>
  15. #include <linux/input.h>
  16. #include <linux/pwm_backlight.h>
  17. #include <linux/gpio_keys.h>
  18. #include <linux/i2c.h>
  19. #include <linux/regulator/machine.h>
  20. #include <linux/mfd/max8997.h>
  21. #include <linux/lcd.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/mach-types.h>
  24. #include <video/platform_lcd.h>
  25. #include <plat/regs-serial.h>
  26. #include <plat/regs-fb-v4.h>
  27. #include <plat/exynos4.h>
  28. #include <plat/cpu.h>
  29. #include <plat/devs.h>
  30. #include <plat/sdhci.h>
  31. #include <plat/iic.h>
  32. #include <plat/ehci.h>
  33. #include <plat/clock.h>
  34. #include <plat/gpio-cfg.h>
  35. #include <plat/backlight.h>
  36. #include <plat/pd.h>
  37. #include <plat/fb.h>
  38. #include <mach/map.h>
  39. /* Following are default values for UCON, ULCON and UFCON UART registers */
  40. #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  41. S3C2410_UCON_RXILEVEL | \
  42. S3C2410_UCON_TXIRQMODE | \
  43. S3C2410_UCON_RXIRQMODE | \
  44. S3C2410_UCON_RXFIFO_TOI | \
  45. S3C2443_UCON_RXERR_IRQEN)
  46. #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
  47. #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  48. S5PV210_UFCON_TXTRIG4 | \
  49. S5PV210_UFCON_RXTRIG4)
  50. static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
  51. [0] = {
  52. .hwport = 0,
  53. .flags = 0,
  54. .ucon = ORIGEN_UCON_DEFAULT,
  55. .ulcon = ORIGEN_ULCON_DEFAULT,
  56. .ufcon = ORIGEN_UFCON_DEFAULT,
  57. },
  58. [1] = {
  59. .hwport = 1,
  60. .flags = 0,
  61. .ucon = ORIGEN_UCON_DEFAULT,
  62. .ulcon = ORIGEN_ULCON_DEFAULT,
  63. .ufcon = ORIGEN_UFCON_DEFAULT,
  64. },
  65. [2] = {
  66. .hwport = 2,
  67. .flags = 0,
  68. .ucon = ORIGEN_UCON_DEFAULT,
  69. .ulcon = ORIGEN_ULCON_DEFAULT,
  70. .ufcon = ORIGEN_UFCON_DEFAULT,
  71. },
  72. [3] = {
  73. .hwport = 3,
  74. .flags = 0,
  75. .ucon = ORIGEN_UCON_DEFAULT,
  76. .ulcon = ORIGEN_ULCON_DEFAULT,
  77. .ufcon = ORIGEN_UFCON_DEFAULT,
  78. },
  79. };
  80. static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
  81. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
  82. };
  83. static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
  84. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
  85. };
  86. static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
  87. REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
  88. };
  89. static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
  90. REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
  91. };
  92. static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
  93. REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
  94. };
  95. static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
  96. REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
  97. };
  98. static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
  99. REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
  100. };
  101. static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
  102. REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
  103. };
  104. static struct regulator_consumer_supply __initdata buck1_consumer[] = {
  105. REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
  106. };
  107. static struct regulator_consumer_supply __initdata buck2_consumer[] = {
  108. REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
  109. };
  110. static struct regulator_consumer_supply __initdata buck3_consumer[] = {
  111. REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
  112. };
  113. static struct regulator_consumer_supply __initdata buck7_consumer[] = {
  114. REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
  115. };
  116. static struct regulator_init_data __initdata max8997_ldo1_data = {
  117. .constraints = {
  118. .name = "VDD_ABB_3.3V",
  119. .min_uV = 3300000,
  120. .max_uV = 3300000,
  121. .apply_uV = 1,
  122. .state_mem = {
  123. .disabled = 1,
  124. },
  125. },
  126. };
  127. static struct regulator_init_data __initdata max8997_ldo2_data = {
  128. .constraints = {
  129. .name = "VDD_ALIVE_1.1V",
  130. .min_uV = 1100000,
  131. .max_uV = 1100000,
  132. .apply_uV = 1,
  133. .always_on = 1,
  134. .state_mem = {
  135. .enabled = 1,
  136. },
  137. },
  138. };
  139. static struct regulator_init_data __initdata max8997_ldo3_data = {
  140. .constraints = {
  141. .name = "VMIPI_1.1V",
  142. .min_uV = 1100000,
  143. .max_uV = 1100000,
  144. .apply_uV = 1,
  145. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  146. .state_mem = {
  147. .disabled = 1,
  148. },
  149. },
  150. .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
  151. .consumer_supplies = ldo3_consumer,
  152. };
  153. static struct regulator_init_data __initdata max8997_ldo4_data = {
  154. .constraints = {
  155. .name = "VDD_RTC_1.8V",
  156. .min_uV = 1800000,
  157. .max_uV = 1800000,
  158. .apply_uV = 1,
  159. .always_on = 1,
  160. .state_mem = {
  161. .disabled = 1,
  162. },
  163. },
  164. };
  165. static struct regulator_init_data __initdata max8997_ldo6_data = {
  166. .constraints = {
  167. .name = "VMIPI_1.8V",
  168. .min_uV = 1800000,
  169. .max_uV = 1800000,
  170. .apply_uV = 1,
  171. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  172. .state_mem = {
  173. .disabled = 1,
  174. },
  175. },
  176. .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
  177. .consumer_supplies = ldo6_consumer,
  178. };
  179. static struct regulator_init_data __initdata max8997_ldo7_data = {
  180. .constraints = {
  181. .name = "VDD_AUD_1.8V",
  182. .min_uV = 1800000,
  183. .max_uV = 1800000,
  184. .apply_uV = 1,
  185. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  186. .state_mem = {
  187. .disabled = 1,
  188. },
  189. },
  190. .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
  191. .consumer_supplies = ldo7_consumer,
  192. };
  193. static struct regulator_init_data __initdata max8997_ldo8_data = {
  194. .constraints = {
  195. .name = "VADC_3.3V",
  196. .min_uV = 3300000,
  197. .max_uV = 3300000,
  198. .apply_uV = 1,
  199. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  200. .state_mem = {
  201. .disabled = 1,
  202. },
  203. },
  204. .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
  205. .consumer_supplies = ldo8_consumer,
  206. };
  207. static struct regulator_init_data __initdata max8997_ldo9_data = {
  208. .constraints = {
  209. .name = "DVDD_SWB_2.8V",
  210. .min_uV = 2800000,
  211. .max_uV = 2800000,
  212. .apply_uV = 1,
  213. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  214. .state_mem = {
  215. .disabled = 1,
  216. },
  217. },
  218. .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
  219. .consumer_supplies = ldo9_consumer,
  220. };
  221. static struct regulator_init_data __initdata max8997_ldo10_data = {
  222. .constraints = {
  223. .name = "VDD_PLL_1.1V",
  224. .min_uV = 1100000,
  225. .max_uV = 1100000,
  226. .apply_uV = 1,
  227. .always_on = 1,
  228. .state_mem = {
  229. .disabled = 1,
  230. },
  231. },
  232. };
  233. static struct regulator_init_data __initdata max8997_ldo11_data = {
  234. .constraints = {
  235. .name = "VDD_AUD_3V",
  236. .min_uV = 3000000,
  237. .max_uV = 3000000,
  238. .apply_uV = 1,
  239. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  240. .state_mem = {
  241. .disabled = 1,
  242. },
  243. },
  244. .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
  245. .consumer_supplies = ldo11_consumer,
  246. };
  247. static struct regulator_init_data __initdata max8997_ldo14_data = {
  248. .constraints = {
  249. .name = "AVDD18_SWB_1.8V",
  250. .min_uV = 1800000,
  251. .max_uV = 1800000,
  252. .apply_uV = 1,
  253. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  254. .state_mem = {
  255. .disabled = 1,
  256. },
  257. },
  258. .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
  259. .consumer_supplies = ldo14_consumer,
  260. };
  261. static struct regulator_init_data __initdata max8997_ldo17_data = {
  262. .constraints = {
  263. .name = "VDD_SWB_3.3V",
  264. .min_uV = 3300000,
  265. .max_uV = 3300000,
  266. .apply_uV = 1,
  267. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  268. .state_mem = {
  269. .disabled = 1,
  270. },
  271. },
  272. .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
  273. .consumer_supplies = ldo17_consumer,
  274. };
  275. static struct regulator_init_data __initdata max8997_ldo21_data = {
  276. .constraints = {
  277. .name = "VDD_MIF_1.2V",
  278. .min_uV = 1200000,
  279. .max_uV = 1200000,
  280. .apply_uV = 1,
  281. .always_on = 1,
  282. .state_mem = {
  283. .disabled = 1,
  284. },
  285. },
  286. };
  287. static struct regulator_init_data __initdata max8997_buck1_data = {
  288. .constraints = {
  289. .name = "VDD_ARM_1.2V",
  290. .min_uV = 950000,
  291. .max_uV = 1350000,
  292. .always_on = 1,
  293. .boot_on = 1,
  294. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  295. .state_mem = {
  296. .disabled = 1,
  297. },
  298. },
  299. .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
  300. .consumer_supplies = buck1_consumer,
  301. };
  302. static struct regulator_init_data __initdata max8997_buck2_data = {
  303. .constraints = {
  304. .name = "VDD_INT_1.1V",
  305. .min_uV = 900000,
  306. .max_uV = 1100000,
  307. .always_on = 1,
  308. .boot_on = 1,
  309. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  310. .state_mem = {
  311. .disabled = 1,
  312. },
  313. },
  314. .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
  315. .consumer_supplies = buck2_consumer,
  316. };
  317. static struct regulator_init_data __initdata max8997_buck3_data = {
  318. .constraints = {
  319. .name = "VDD_G3D_1.1V",
  320. .min_uV = 900000,
  321. .max_uV = 1100000,
  322. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  323. REGULATOR_CHANGE_STATUS,
  324. .state_mem = {
  325. .disabled = 1,
  326. },
  327. },
  328. .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
  329. .consumer_supplies = buck3_consumer,
  330. };
  331. static struct regulator_init_data __initdata max8997_buck5_data = {
  332. .constraints = {
  333. .name = "VDDQ_M1M2_1.2V",
  334. .min_uV = 1200000,
  335. .max_uV = 1200000,
  336. .apply_uV = 1,
  337. .always_on = 1,
  338. .state_mem = {
  339. .disabled = 1,
  340. },
  341. },
  342. };
  343. static struct regulator_init_data __initdata max8997_buck7_data = {
  344. .constraints = {
  345. .name = "VDD_LCD_3.3V",
  346. .min_uV = 3300000,
  347. .max_uV = 3300000,
  348. .boot_on = 1,
  349. .apply_uV = 1,
  350. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  351. .state_mem = {
  352. .disabled = 1
  353. },
  354. },
  355. .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
  356. .consumer_supplies = buck7_consumer,
  357. };
  358. static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
  359. { MAX8997_LDO1, &max8997_ldo1_data },
  360. { MAX8997_LDO2, &max8997_ldo2_data },
  361. { MAX8997_LDO3, &max8997_ldo3_data },
  362. { MAX8997_LDO4, &max8997_ldo4_data },
  363. { MAX8997_LDO6, &max8997_ldo6_data },
  364. { MAX8997_LDO7, &max8997_ldo7_data },
  365. { MAX8997_LDO8, &max8997_ldo8_data },
  366. { MAX8997_LDO9, &max8997_ldo9_data },
  367. { MAX8997_LDO10, &max8997_ldo10_data },
  368. { MAX8997_LDO11, &max8997_ldo11_data },
  369. { MAX8997_LDO14, &max8997_ldo14_data },
  370. { MAX8997_LDO17, &max8997_ldo17_data },
  371. { MAX8997_LDO21, &max8997_ldo21_data },
  372. { MAX8997_BUCK1, &max8997_buck1_data },
  373. { MAX8997_BUCK2, &max8997_buck2_data },
  374. { MAX8997_BUCK3, &max8997_buck3_data },
  375. { MAX8997_BUCK5, &max8997_buck5_data },
  376. { MAX8997_BUCK7, &max8997_buck7_data },
  377. };
  378. struct max8997_platform_data __initdata origen_max8997_pdata = {
  379. .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
  380. .regulators = origen_max8997_regulators,
  381. .wakeup = true,
  382. .buck1_gpiodvs = false,
  383. .buck2_gpiodvs = false,
  384. .buck5_gpiodvs = false,
  385. .irq_base = IRQ_GPIO_END + 1,
  386. .ignore_gpiodvs_side_effect = true,
  387. .buck125_default_idx = 0x0,
  388. .buck125_gpios[0] = EXYNOS4_GPX0(0),
  389. .buck125_gpios[1] = EXYNOS4_GPX0(1),
  390. .buck125_gpios[2] = EXYNOS4_GPX0(2),
  391. .buck1_voltage[0] = 1350000,
  392. .buck1_voltage[1] = 1300000,
  393. .buck1_voltage[2] = 1250000,
  394. .buck1_voltage[3] = 1200000,
  395. .buck1_voltage[4] = 1150000,
  396. .buck1_voltage[5] = 1100000,
  397. .buck1_voltage[6] = 1000000,
  398. .buck1_voltage[7] = 950000,
  399. .buck2_voltage[0] = 1100000,
  400. .buck2_voltage[1] = 1100000,
  401. .buck2_voltage[2] = 1100000,
  402. .buck2_voltage[3] = 1100000,
  403. .buck2_voltage[4] = 1000000,
  404. .buck2_voltage[5] = 1000000,
  405. .buck2_voltage[6] = 1000000,
  406. .buck2_voltage[7] = 1000000,
  407. .buck5_voltage[0] = 1200000,
  408. .buck5_voltage[1] = 1200000,
  409. .buck5_voltage[2] = 1200000,
  410. .buck5_voltage[3] = 1200000,
  411. .buck5_voltage[4] = 1200000,
  412. .buck5_voltage[5] = 1200000,
  413. .buck5_voltage[6] = 1200000,
  414. .buck5_voltage[7] = 1200000,
  415. };
  416. /* I2C0 */
  417. static struct i2c_board_info i2c0_devs[] __initdata = {
  418. {
  419. I2C_BOARD_INFO("max8997", (0xCC >> 1)),
  420. .platform_data = &origen_max8997_pdata,
  421. .irq = IRQ_EINT(4),
  422. },
  423. };
  424. static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
  425. .cd_type = S3C_SDHCI_CD_INTERNAL,
  426. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  427. };
  428. static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
  429. .cd_type = S3C_SDHCI_CD_INTERNAL,
  430. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  431. };
  432. /* USB EHCI */
  433. static struct s5p_ehci_platdata origen_ehci_pdata;
  434. static void __init origen_ehci_init(void)
  435. {
  436. struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
  437. s5p_ehci_set_platdata(pdata);
  438. }
  439. static struct gpio_keys_button origen_gpio_keys_table[] = {
  440. {
  441. .code = KEY_MENU,
  442. .gpio = EXYNOS4_GPX1(5),
  443. .desc = "gpio-keys: KEY_MENU",
  444. .type = EV_KEY,
  445. .active_low = 1,
  446. .wakeup = 1,
  447. .debounce_interval = 1,
  448. }, {
  449. .code = KEY_HOME,
  450. .gpio = EXYNOS4_GPX1(6),
  451. .desc = "gpio-keys: KEY_HOME",
  452. .type = EV_KEY,
  453. .active_low = 1,
  454. .wakeup = 1,
  455. .debounce_interval = 1,
  456. }, {
  457. .code = KEY_BACK,
  458. .gpio = EXYNOS4_GPX1(7),
  459. .desc = "gpio-keys: KEY_BACK",
  460. .type = EV_KEY,
  461. .active_low = 1,
  462. .wakeup = 1,
  463. .debounce_interval = 1,
  464. }, {
  465. .code = KEY_UP,
  466. .gpio = EXYNOS4_GPX2(0),
  467. .desc = "gpio-keys: KEY_UP",
  468. .type = EV_KEY,
  469. .active_low = 1,
  470. .wakeup = 1,
  471. .debounce_interval = 1,
  472. }, {
  473. .code = KEY_DOWN,
  474. .gpio = EXYNOS4_GPX2(1),
  475. .desc = "gpio-keys: KEY_DOWN",
  476. .type = EV_KEY,
  477. .active_low = 1,
  478. .wakeup = 1,
  479. .debounce_interval = 1,
  480. },
  481. };
  482. static struct gpio_keys_platform_data origen_gpio_keys_data = {
  483. .buttons = origen_gpio_keys_table,
  484. .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
  485. };
  486. static struct platform_device origen_device_gpiokeys = {
  487. .name = "gpio-keys",
  488. .dev = {
  489. .platform_data = &origen_gpio_keys_data,
  490. },
  491. };
  492. static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
  493. {
  494. int ret;
  495. if (power)
  496. ret = gpio_request_one(EXYNOS4_GPE3(4),
  497. GPIOF_OUT_INIT_HIGH, "GPE3_4");
  498. else
  499. ret = gpio_request_one(EXYNOS4_GPE3(4),
  500. GPIOF_OUT_INIT_LOW, "GPE3_4");
  501. gpio_free(EXYNOS4_GPE3(4));
  502. if (ret)
  503. pr_err("failed to request gpio for LCD power: %d\n", ret);
  504. }
  505. static struct plat_lcd_data origen_lcd_hv070wsa_data = {
  506. .set_power = lcd_hv070wsa_set_power,
  507. };
  508. static struct platform_device origen_lcd_hv070wsa = {
  509. .name = "platform-lcd",
  510. .dev.parent = &s5p_device_fimd0.dev,
  511. .dev.platform_data = &origen_lcd_hv070wsa_data,
  512. };
  513. static struct s3c_fb_pd_win origen_fb_win0 = {
  514. .win_mode = {
  515. .left_margin = 64,
  516. .right_margin = 16,
  517. .upper_margin = 64,
  518. .lower_margin = 16,
  519. .hsync_len = 48,
  520. .vsync_len = 3,
  521. .xres = 1024,
  522. .yres = 600,
  523. },
  524. .max_bpp = 32,
  525. .default_bpp = 24,
  526. };
  527. static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
  528. .win[0] = &origen_fb_win0,
  529. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  530. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  531. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  532. };
  533. static struct platform_device *origen_devices[] __initdata = {
  534. &s3c_device_hsmmc2,
  535. &s3c_device_hsmmc0,
  536. &s3c_device_i2c0,
  537. &s3c_device_rtc,
  538. &s3c_device_wdt,
  539. &s5p_device_ehci,
  540. &s5p_device_fimc0,
  541. &s5p_device_fimc1,
  542. &s5p_device_fimc2,
  543. &s5p_device_fimc3,
  544. &s5p_device_fimd0,
  545. &s5p_device_hdmi,
  546. &s5p_device_i2c_hdmiphy,
  547. &s5p_device_mixer,
  548. &exynos4_device_pd[PD_LCD0],
  549. &exynos4_device_pd[PD_TV],
  550. &origen_device_gpiokeys,
  551. &origen_lcd_hv070wsa,
  552. };
  553. /* LCD Backlight data */
  554. static struct samsung_bl_gpio_info origen_bl_gpio_info = {
  555. .no = EXYNOS4_GPD0(0),
  556. .func = S3C_GPIO_SFN(2),
  557. };
  558. static struct platform_pwm_backlight_data origen_bl_data = {
  559. .pwm_id = 0,
  560. .pwm_period_ns = 1000,
  561. };
  562. static void s5p_tv_setup(void)
  563. {
  564. /* Direct HPD to HDMI chip */
  565. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  566. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  567. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  568. }
  569. static void __init origen_map_io(void)
  570. {
  571. s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  572. s3c24xx_init_clocks(24000000);
  573. s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
  574. }
  575. static void __init origen_power_init(void)
  576. {
  577. gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
  578. s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
  579. s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
  580. }
  581. static void __init origen_machine_init(void)
  582. {
  583. origen_power_init();
  584. s3c_i2c0_set_platdata(NULL);
  585. i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
  586. /*
  587. * Since sdhci instance 2 can contain a bootable media,
  588. * sdhci instance 0 is registered after instance 2.
  589. */
  590. s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
  591. s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
  592. origen_ehci_init();
  593. clk_xusbxti.rate = 24000000;
  594. s5p_tv_setup();
  595. s5p_i2c_hdmiphy_set_platdata(NULL);
  596. s5p_fimd0_set_platdata(&origen_lcd_pdata);
  597. platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
  598. s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
  599. s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
  600. s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
  601. samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
  602. }
  603. MACHINE_START(ORIGEN, "ORIGEN")
  604. /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
  605. .boot_params = S5P_PA_SDRAM + 0x100,
  606. .init_irq = exynos4_init_irq,
  607. .map_io = origen_map_io,
  608. .init_machine = origen_machine_init,
  609. .timer = &exynos4_timer,
  610. MACHINE_END