Kconfig 4.5 KB

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  1. if ARCH_IXP4XX
  2. config ARCH_SUPPORTS_BIG_ENDIAN
  3. bool
  4. default y
  5. menu "Intel IXP4xx Implementation Options"
  6. comment "IXP4xx Platforms"
  7. config MACH_NSLU2
  8. bool
  9. prompt "Linksys NSLU2"
  10. select PCI
  11. help
  12. Say 'Y' here if you want your kernel to support Linksys's
  13. NSLU2 NAS device. For more information on this platform,
  14. see http://www.nslu2-linux.org
  15. config ARCH_AVILA
  16. bool "Avila"
  17. select PCI
  18. help
  19. Say 'Y' here if you want your kernel to support the Gateworks
  20. Avila Network Platform. For more information on this platform,
  21. see <file:Documentation/arm/IXP4xx>.
  22. config ARCH_ADI_COYOTE
  23. bool "Coyote"
  24. select PCI
  25. help
  26. Say 'Y' here if you want your kernel to support the ADI
  27. Engineering Coyote Gateway Reference Platform. For more
  28. information on this platform, see <file:Documentation/arm/IXP4xx>.
  29. config ARCH_IXDP425
  30. bool "IXDP425"
  31. select PCI
  32. help
  33. Say 'Y' here if you want your kernel to support Intel's
  34. IXDP425 Development Platform (Also known as Richfield).
  35. For more information on this platform, see <file:Documentation/arm/IXP4xx>.
  36. config MACH_IXDPG425
  37. bool "IXDPG425"
  38. select PCI
  39. help
  40. Say 'Y' here if you want your kernel to support Intel's
  41. IXDPG425 Development Platform (Also known as Montajade).
  42. For more information on this platform, see <file:Documentation/arm/IXP4xx>.
  43. config MACH_IXDP465
  44. bool "IXDP465"
  45. select PCI
  46. help
  47. Say 'Y' here if you want your kernel to support Intel's
  48. IXDP465 Development Platform (Also known as BMP).
  49. For more information on this platform, see <file:Documentation/arm/IXP4xx>.
  50. #
  51. # IXCDP1100 is the exact same HW as IXDP425, but with a different machine
  52. # number from the bootloader due to marketing monkeys, so we just enable it
  53. # by default if IXDP425 is enabled.
  54. #
  55. config ARCH_IXCDP1100
  56. bool
  57. depends on ARCH_IXDP425
  58. default y
  59. config ARCH_PRPMC1100
  60. bool "PrPMC1100"
  61. help
  62. Say 'Y' here if you want your kernel to support the Motorola
  63. PrPCM1100 Processor Mezanine Module. For more information on
  64. this platform, see <file:Documentation/arm/IXP4xx>.
  65. config MACH_NAS100D
  66. bool
  67. prompt "NAS100D"
  68. select PCI
  69. help
  70. Say 'Y' here if you want your kernel to support Iomega's
  71. NAS 100d device. For more information on this platform,
  72. see http://www.nslu2-linux.org/wiki/NAS100d/HomePage
  73. #
  74. # Avila and IXDP share the same source for now. Will change in future
  75. #
  76. config ARCH_IXDP4XX
  77. bool
  78. depends on ARCH_IXDP425 || ARCH_AVILA || MACH_IXDP465
  79. default y
  80. #
  81. # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
  82. #
  83. config CPU_IXP46X
  84. bool
  85. depends on MACH_IXDP465
  86. default y
  87. config MACH_GTWX5715
  88. bool "Gemtek WX5715 (Linksys WRV54G)"
  89. depends on ARCH_IXP4XX
  90. select PCI
  91. help
  92. This board is currently inside the Linksys WRV54G Gateways.
  93. IXP425 - 266mhz
  94. 32mb SDRAM
  95. 8mb Flash
  96. miniPCI slot 0 does not have a card connector soldered to the board
  97. miniPCI slot 1 has an ISL3880 802.11g card (Prism54)
  98. npe0 is connected to a Kendin KS8995M Switch (4 ports)
  99. npe1 is the "wan" port
  100. "Console" UART is available on J11 as console
  101. "High Speed" UART is n/c (as far as I can tell)
  102. 20 Pin ARM/Xscale JTAG interface on J2
  103. comment "IXP4xx Options"
  104. config DMABOUNCE
  105. bool
  106. default y
  107. depends on PCI
  108. config IXP4XX_INDIRECT_PCI
  109. bool "Use indirect PCI memory access"
  110. depends on PCI
  111. help
  112. IXP4xx provides two methods of accessing PCI memory space:
  113. 1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB).
  114. To access PCI via this space, we simply ioremap() the BAR
  115. into the kernel and we can use the standard read[bwl]/write[bwl]
  116. macros. This is the preferred method due to speed but it
  117. limits the system to just 64MB of PCI memory. This can be
  118. problamatic if using video cards and other memory-heavy devices.
  119. 2) If > 64MB of memory space is required, the IXP4xx can be
  120. configured to use indirect registers to access PCI This allows
  121. for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
  122. The disadvantadge of this is that every PCI access requires
  123. three local register accesses plus a spinlock, but in some
  124. cases the performance hit is acceptable. In addition, you cannot
  125. mmap() PCI devices in this case due to the indirect nature
  126. of the PCI window.
  127. By default, the direct method is used. Choose this option if you
  128. need to use the indirect method instead. If you don't know
  129. what you need, leave this option unselected.
  130. endmenu
  131. endif