ufshcd.c 70 KB

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  1. /*
  2. * Universal Flash Storage Host controller driver Core
  3. *
  4. * This code is based on drivers/scsi/ufs/ufshcd.c
  5. * Copyright (C) 2011-2013 Samsung India Software Operations
  6. *
  7. * Authors:
  8. * Santosh Yaraganavi <santosh.sy@samsung.com>
  9. * Vinayak Holikatti <h.vinayak@samsung.com>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. * See the COPYING file in the top-level directory or visit
  16. * <http://www.gnu.org/licenses/gpl-2.0.html>
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * This program is provided "AS IS" and "WITH ALL FAULTS" and
  24. * without warranty of any kind. You are solely responsible for
  25. * determining the appropriateness of using and distributing
  26. * the program and assume all risks associated with your exercise
  27. * of rights with respect to the program, including but not limited
  28. * to infringement of third party rights, the risks and costs of
  29. * program errors, damage to or loss of data, programs or equipment,
  30. * and unavailability or interruption of operations. Under no
  31. * circumstances will the contributor of this Program be liable for
  32. * any damages of any kind arising from your use or distribution of
  33. * this program.
  34. */
  35. #include <linux/async.h>
  36. #include "ufshcd.h"
  37. #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
  38. UTP_TASK_REQ_COMPL |\
  39. UFSHCD_ERROR_MASK)
  40. /* UIC command timeout, unit: ms */
  41. #define UIC_CMD_TIMEOUT 500
  42. /* NOP OUT retries waiting for NOP IN response */
  43. #define NOP_OUT_RETRIES 10
  44. /* Timeout after 30 msecs if NOP OUT hangs without response */
  45. #define NOP_OUT_TIMEOUT 30 /* msecs */
  46. /* Query request retries */
  47. #define QUERY_REQ_RETRIES 10
  48. /* Query request timeout */
  49. #define QUERY_REQ_TIMEOUT 30 /* msec */
  50. /* Expose the flag value from utp_upiu_query.value */
  51. #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  52. /* Interrupt aggregation default timeout, unit: 40us */
  53. #define INT_AGGR_DEF_TO 0x02
  54. enum {
  55. UFSHCD_MAX_CHANNEL = 0,
  56. UFSHCD_MAX_ID = 1,
  57. UFSHCD_MAX_LUNS = 8,
  58. UFSHCD_CMD_PER_LUN = 32,
  59. UFSHCD_CAN_QUEUE = 32,
  60. };
  61. /* UFSHCD states */
  62. enum {
  63. UFSHCD_STATE_OPERATIONAL,
  64. UFSHCD_STATE_RESET,
  65. UFSHCD_STATE_ERROR,
  66. };
  67. /* Interrupt configuration options */
  68. enum {
  69. UFSHCD_INT_DISABLE,
  70. UFSHCD_INT_ENABLE,
  71. UFSHCD_INT_CLEAR,
  72. };
  73. /*
  74. * ufshcd_wait_for_register - wait for register value to change
  75. * @hba - per-adapter interface
  76. * @reg - mmio register offset
  77. * @mask - mask to apply to read register value
  78. * @val - wait condition
  79. * @interval_us - polling interval in microsecs
  80. * @timeout_ms - timeout in millisecs
  81. *
  82. * Returns -ETIMEDOUT on error, zero on success
  83. */
  84. static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
  85. u32 val, unsigned long interval_us, unsigned long timeout_ms)
  86. {
  87. int err = 0;
  88. unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
  89. /* ignore bits that we don't intend to wait on */
  90. val = val & mask;
  91. while ((ufshcd_readl(hba, reg) & mask) != val) {
  92. /* wakeup within 50us of expiry */
  93. usleep_range(interval_us, interval_us + 50);
  94. if (time_after(jiffies, timeout)) {
  95. if ((ufshcd_readl(hba, reg) & mask) != val)
  96. err = -ETIMEDOUT;
  97. break;
  98. }
  99. }
  100. return err;
  101. }
  102. /**
  103. * ufshcd_get_intr_mask - Get the interrupt bit mask
  104. * @hba - Pointer to adapter instance
  105. *
  106. * Returns interrupt bit mask per version
  107. */
  108. static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
  109. {
  110. if (hba->ufs_version == UFSHCI_VERSION_10)
  111. return INTERRUPT_MASK_ALL_VER_10;
  112. else
  113. return INTERRUPT_MASK_ALL_VER_11;
  114. }
  115. /**
  116. * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
  117. * @hba - Pointer to adapter instance
  118. *
  119. * Returns UFSHCI version supported by the controller
  120. */
  121. static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
  122. {
  123. return ufshcd_readl(hba, REG_UFS_VERSION);
  124. }
  125. /**
  126. * ufshcd_is_device_present - Check if any device connected to
  127. * the host controller
  128. * @reg_hcs - host controller status register value
  129. *
  130. * Returns 1 if device present, 0 if no device detected
  131. */
  132. static inline int ufshcd_is_device_present(u32 reg_hcs)
  133. {
  134. return (DEVICE_PRESENT & reg_hcs) ? 1 : 0;
  135. }
  136. /**
  137. * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
  138. * @lrb: pointer to local command reference block
  139. *
  140. * This function is used to get the OCS field from UTRD
  141. * Returns the OCS field in the UTRD
  142. */
  143. static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
  144. {
  145. return lrbp->utr_descriptor_ptr->header.dword_2 & MASK_OCS;
  146. }
  147. /**
  148. * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
  149. * @task_req_descp: pointer to utp_task_req_desc structure
  150. *
  151. * This function is used to get the OCS field from UTMRD
  152. * Returns the OCS field in the UTMRD
  153. */
  154. static inline int
  155. ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
  156. {
  157. return task_req_descp->header.dword_2 & MASK_OCS;
  158. }
  159. /**
  160. * ufshcd_get_tm_free_slot - get a free slot for task management request
  161. * @hba: per adapter instance
  162. *
  163. * Returns maximum number of task management request slots in case of
  164. * task management queue full or returns the free slot number
  165. */
  166. static inline int ufshcd_get_tm_free_slot(struct ufs_hba *hba)
  167. {
  168. return find_first_zero_bit(&hba->outstanding_tasks, hba->nutmrs);
  169. }
  170. /**
  171. * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
  172. * @hba: per adapter instance
  173. * @pos: position of the bit to be cleared
  174. */
  175. static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
  176. {
  177. ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
  178. }
  179. /**
  180. * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
  181. * @reg: Register value of host controller status
  182. *
  183. * Returns integer, 0 on Success and positive value if failed
  184. */
  185. static inline int ufshcd_get_lists_status(u32 reg)
  186. {
  187. /*
  188. * The mask 0xFF is for the following HCS register bits
  189. * Bit Description
  190. * 0 Device Present
  191. * 1 UTRLRDY
  192. * 2 UTMRLRDY
  193. * 3 UCRDY
  194. * 4 HEI
  195. * 5 DEI
  196. * 6-7 reserved
  197. */
  198. return (((reg) & (0xFF)) >> 1) ^ (0x07);
  199. }
  200. /**
  201. * ufshcd_get_uic_cmd_result - Get the UIC command result
  202. * @hba: Pointer to adapter instance
  203. *
  204. * This function gets the result of UIC command completion
  205. * Returns 0 on success, non zero value on error
  206. */
  207. static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
  208. {
  209. return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
  210. MASK_UIC_COMMAND_RESULT;
  211. }
  212. /**
  213. * ufshcd_get_req_rsp - returns the TR response transaction type
  214. * @ucd_rsp_ptr: pointer to response UPIU
  215. */
  216. static inline int
  217. ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
  218. {
  219. return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
  220. }
  221. /**
  222. * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
  223. * @ucd_rsp_ptr: pointer to response UPIU
  224. *
  225. * This function gets the response status and scsi_status from response UPIU
  226. * Returns the response result code.
  227. */
  228. static inline int
  229. ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
  230. {
  231. return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
  232. }
  233. /*
  234. * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
  235. * from response UPIU
  236. * @ucd_rsp_ptr: pointer to response UPIU
  237. *
  238. * Return the data segment length.
  239. */
  240. static inline unsigned int
  241. ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
  242. {
  243. return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
  244. MASK_RSP_UPIU_DATA_SEG_LEN;
  245. }
  246. /**
  247. * ufshcd_is_exception_event - Check if the device raised an exception event
  248. * @ucd_rsp_ptr: pointer to response UPIU
  249. *
  250. * The function checks if the device raised an exception event indicated in
  251. * the Device Information field of response UPIU.
  252. *
  253. * Returns true if exception is raised, false otherwise.
  254. */
  255. static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
  256. {
  257. return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
  258. MASK_RSP_EXCEPTION_EVENT ? true : false;
  259. }
  260. /**
  261. * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
  262. * @hba: per adapter instance
  263. */
  264. static inline void
  265. ufshcd_reset_intr_aggr(struct ufs_hba *hba)
  266. {
  267. ufshcd_writel(hba, INT_AGGR_ENABLE |
  268. INT_AGGR_COUNTER_AND_TIMER_RESET,
  269. REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
  270. }
  271. /**
  272. * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
  273. * @hba: per adapter instance
  274. * @cnt: Interrupt aggregation counter threshold
  275. * @tmout: Interrupt aggregation timeout value
  276. */
  277. static inline void
  278. ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
  279. {
  280. ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
  281. INT_AGGR_COUNTER_THLD_VAL(cnt) |
  282. INT_AGGR_TIMEOUT_VAL(tmout),
  283. REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
  284. }
  285. /**
  286. * ufshcd_enable_run_stop_reg - Enable run-stop registers,
  287. * When run-stop registers are set to 1, it indicates the
  288. * host controller that it can process the requests
  289. * @hba: per adapter instance
  290. */
  291. static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
  292. {
  293. ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
  294. REG_UTP_TASK_REQ_LIST_RUN_STOP);
  295. ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
  296. REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
  297. }
  298. /**
  299. * ufshcd_hba_start - Start controller initialization sequence
  300. * @hba: per adapter instance
  301. */
  302. static inline void ufshcd_hba_start(struct ufs_hba *hba)
  303. {
  304. ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
  305. }
  306. /**
  307. * ufshcd_is_hba_active - Get controller state
  308. * @hba: per adapter instance
  309. *
  310. * Returns zero if controller is active, 1 otherwise
  311. */
  312. static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
  313. {
  314. return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
  315. }
  316. /**
  317. * ufshcd_send_command - Send SCSI or device management commands
  318. * @hba: per adapter instance
  319. * @task_tag: Task tag of the command
  320. */
  321. static inline
  322. void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
  323. {
  324. __set_bit(task_tag, &hba->outstanding_reqs);
  325. ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
  326. }
  327. /**
  328. * ufshcd_copy_sense_data - Copy sense data in case of check condition
  329. * @lrb - pointer to local reference block
  330. */
  331. static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
  332. {
  333. int len;
  334. if (lrbp->sense_buffer &&
  335. ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
  336. len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
  337. memcpy(lrbp->sense_buffer,
  338. lrbp->ucd_rsp_ptr->sr.sense_data,
  339. min_t(int, len, SCSI_SENSE_BUFFERSIZE));
  340. }
  341. }
  342. /**
  343. * ufshcd_query_to_cpu() - formats the buffer to native cpu endian
  344. * @response: upiu query response to convert
  345. */
  346. static inline void ufshcd_query_to_cpu(struct utp_upiu_query *response)
  347. {
  348. response->length = be16_to_cpu(response->length);
  349. response->value = be32_to_cpu(response->value);
  350. }
  351. /**
  352. * ufshcd_query_to_be() - formats the buffer to big endian
  353. * @request: upiu query request to convert
  354. */
  355. static inline void ufshcd_query_to_be(struct utp_upiu_query *request)
  356. {
  357. request->length = cpu_to_be16(request->length);
  358. request->value = cpu_to_be32(request->value);
  359. }
  360. /**
  361. * ufshcd_copy_query_response() - Copy the Query Response and the data
  362. * descriptor
  363. * @hba: per adapter instance
  364. * @lrb - pointer to local reference block
  365. */
  366. static
  367. void ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  368. {
  369. struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
  370. /* Get the UPIU response */
  371. query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
  372. UPIU_RSP_CODE_OFFSET;
  373. memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
  374. ufshcd_query_to_cpu(&query_res->upiu_res);
  375. /* Get the descriptor */
  376. if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
  377. u8 *descp = (u8 *)&lrbp->ucd_rsp_ptr +
  378. GENERAL_UPIU_REQUEST_SIZE;
  379. u16 len;
  380. /* data segment length */
  381. len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
  382. MASK_QUERY_DATA_SEG_LEN;
  383. memcpy(hba->dev_cmd.query.descriptor, descp,
  384. min_t(u16, len, QUERY_DESC_MAX_SIZE));
  385. }
  386. }
  387. /**
  388. * ufshcd_hba_capabilities - Read controller capabilities
  389. * @hba: per adapter instance
  390. */
  391. static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
  392. {
  393. hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
  394. /* nutrs and nutmrs are 0 based values */
  395. hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
  396. hba->nutmrs =
  397. ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
  398. }
  399. /**
  400. * ufshcd_ready_for_uic_cmd - Check if controller is ready
  401. * to accept UIC commands
  402. * @hba: per adapter instance
  403. * Return true on success, else false
  404. */
  405. static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
  406. {
  407. if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
  408. return true;
  409. else
  410. return false;
  411. }
  412. /**
  413. * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
  414. * @hba: per adapter instance
  415. * @uic_cmd: UIC command
  416. *
  417. * Mutex must be held.
  418. */
  419. static inline void
  420. ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  421. {
  422. WARN_ON(hba->active_uic_cmd);
  423. hba->active_uic_cmd = uic_cmd;
  424. /* Write Args */
  425. ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
  426. ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
  427. ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
  428. /* Write UIC Cmd */
  429. ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
  430. REG_UIC_COMMAND);
  431. }
  432. /**
  433. * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
  434. * @hba: per adapter instance
  435. * @uic_command: UIC command
  436. *
  437. * Must be called with mutex held.
  438. * Returns 0 only if success.
  439. */
  440. static int
  441. ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  442. {
  443. int ret;
  444. unsigned long flags;
  445. if (wait_for_completion_timeout(&uic_cmd->done,
  446. msecs_to_jiffies(UIC_CMD_TIMEOUT)))
  447. ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
  448. else
  449. ret = -ETIMEDOUT;
  450. spin_lock_irqsave(hba->host->host_lock, flags);
  451. hba->active_uic_cmd = NULL;
  452. spin_unlock_irqrestore(hba->host->host_lock, flags);
  453. return ret;
  454. }
  455. /**
  456. * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
  457. * @hba: per adapter instance
  458. * @uic_cmd: UIC command
  459. *
  460. * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
  461. * with mutex held.
  462. * Returns 0 only if success.
  463. */
  464. static int
  465. __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  466. {
  467. int ret;
  468. unsigned long flags;
  469. if (!ufshcd_ready_for_uic_cmd(hba)) {
  470. dev_err(hba->dev,
  471. "Controller not ready to accept UIC commands\n");
  472. return -EIO;
  473. }
  474. init_completion(&uic_cmd->done);
  475. spin_lock_irqsave(hba->host->host_lock, flags);
  476. ufshcd_dispatch_uic_cmd(hba, uic_cmd);
  477. spin_unlock_irqrestore(hba->host->host_lock, flags);
  478. ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
  479. return ret;
  480. }
  481. /**
  482. * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
  483. * @hba: per adapter instance
  484. * @uic_cmd: UIC command
  485. *
  486. * Returns 0 only if success.
  487. */
  488. static int
  489. ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  490. {
  491. int ret;
  492. mutex_lock(&hba->uic_cmd_mutex);
  493. ret = __ufshcd_send_uic_cmd(hba, uic_cmd);
  494. mutex_unlock(&hba->uic_cmd_mutex);
  495. return ret;
  496. }
  497. /**
  498. * ufshcd_map_sg - Map scatter-gather list to prdt
  499. * @lrbp - pointer to local reference block
  500. *
  501. * Returns 0 in case of success, non-zero value in case of failure
  502. */
  503. static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
  504. {
  505. struct ufshcd_sg_entry *prd_table;
  506. struct scatterlist *sg;
  507. struct scsi_cmnd *cmd;
  508. int sg_segments;
  509. int i;
  510. cmd = lrbp->cmd;
  511. sg_segments = scsi_dma_map(cmd);
  512. if (sg_segments < 0)
  513. return sg_segments;
  514. if (sg_segments) {
  515. lrbp->utr_descriptor_ptr->prd_table_length =
  516. cpu_to_le16((u16) (sg_segments));
  517. prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
  518. scsi_for_each_sg(cmd, sg, sg_segments, i) {
  519. prd_table[i].size =
  520. cpu_to_le32(((u32) sg_dma_len(sg))-1);
  521. prd_table[i].base_addr =
  522. cpu_to_le32(lower_32_bits(sg->dma_address));
  523. prd_table[i].upper_addr =
  524. cpu_to_le32(upper_32_bits(sg->dma_address));
  525. }
  526. } else {
  527. lrbp->utr_descriptor_ptr->prd_table_length = 0;
  528. }
  529. return 0;
  530. }
  531. /**
  532. * ufshcd_enable_intr - enable interrupts
  533. * @hba: per adapter instance
  534. * @intrs: interrupt bits
  535. */
  536. static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
  537. {
  538. u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
  539. if (hba->ufs_version == UFSHCI_VERSION_10) {
  540. u32 rw;
  541. rw = set & INTERRUPT_MASK_RW_VER_10;
  542. set = rw | ((set ^ intrs) & intrs);
  543. } else {
  544. set |= intrs;
  545. }
  546. ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
  547. }
  548. /**
  549. * ufshcd_disable_intr - disable interrupts
  550. * @hba: per adapter instance
  551. * @intrs: interrupt bits
  552. */
  553. static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
  554. {
  555. u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
  556. if (hba->ufs_version == UFSHCI_VERSION_10) {
  557. u32 rw;
  558. rw = (set & INTERRUPT_MASK_RW_VER_10) &
  559. ~(intrs & INTERRUPT_MASK_RW_VER_10);
  560. set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
  561. } else {
  562. set &= ~intrs;
  563. }
  564. ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
  565. }
  566. /**
  567. * ufshcd_prepare_req_desc_hdr() - Fills the requests header
  568. * descriptor according to request
  569. * @lrbp: pointer to local reference block
  570. * @upiu_flags: flags required in the header
  571. * @cmd_dir: requests data direction
  572. */
  573. static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
  574. u32 *upiu_flags, enum dma_data_direction cmd_dir)
  575. {
  576. struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
  577. u32 data_direction;
  578. u32 dword_0;
  579. if (cmd_dir == DMA_FROM_DEVICE) {
  580. data_direction = UTP_DEVICE_TO_HOST;
  581. *upiu_flags = UPIU_CMD_FLAGS_READ;
  582. } else if (cmd_dir == DMA_TO_DEVICE) {
  583. data_direction = UTP_HOST_TO_DEVICE;
  584. *upiu_flags = UPIU_CMD_FLAGS_WRITE;
  585. } else {
  586. data_direction = UTP_NO_DATA_TRANSFER;
  587. *upiu_flags = UPIU_CMD_FLAGS_NONE;
  588. }
  589. dword_0 = data_direction | (lrbp->command_type
  590. << UPIU_COMMAND_TYPE_OFFSET);
  591. if (lrbp->intr_cmd)
  592. dword_0 |= UTP_REQ_DESC_INT_CMD;
  593. /* Transfer request descriptor header fields */
  594. req_desc->header.dword_0 = cpu_to_le32(dword_0);
  595. /*
  596. * assigning invalid value for command status. Controller
  597. * updates OCS on command completion, with the command
  598. * status
  599. */
  600. req_desc->header.dword_2 =
  601. cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
  602. }
  603. /**
  604. * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
  605. * for scsi commands
  606. * @lrbp - local reference block pointer
  607. * @upiu_flags - flags
  608. */
  609. static
  610. void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
  611. {
  612. struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
  613. /* command descriptor fields */
  614. ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
  615. UPIU_TRANSACTION_COMMAND, upiu_flags,
  616. lrbp->lun, lrbp->task_tag);
  617. ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
  618. UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
  619. /* Total EHS length and Data segment length will be zero */
  620. ucd_req_ptr->header.dword_2 = 0;
  621. ucd_req_ptr->sc.exp_data_transfer_len =
  622. cpu_to_be32(lrbp->cmd->sdb.length);
  623. memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd,
  624. (min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE)));
  625. }
  626. /**
  627. * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
  628. * for query requsts
  629. * @hba: UFS hba
  630. * @lrbp: local reference block pointer
  631. * @upiu_flags: flags
  632. */
  633. static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
  634. struct ufshcd_lrb *lrbp, u32 upiu_flags)
  635. {
  636. struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
  637. struct ufs_query *query = &hba->dev_cmd.query;
  638. u16 len = query->request.upiu_req.length;
  639. u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
  640. /* Query request header */
  641. ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
  642. UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
  643. lrbp->lun, lrbp->task_tag);
  644. ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
  645. 0, query->request.query_func, 0, 0);
  646. /* Data segment length */
  647. ucd_req_ptr->header.dword_2 = UPIU_HEADER_DWORD(
  648. 0, 0, len >> 8, (u8)len);
  649. /* Copy the Query Request buffer as is */
  650. memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
  651. QUERY_OSF_SIZE);
  652. ufshcd_query_to_be(&ucd_req_ptr->qr);
  653. /* Copy the Descriptor */
  654. if ((len > 0) && (query->request.upiu_req.opcode ==
  655. UPIU_QUERY_OPCODE_WRITE_DESC)) {
  656. memcpy(descp, query->descriptor,
  657. min_t(u16, len, QUERY_DESC_MAX_SIZE));
  658. }
  659. }
  660. static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
  661. {
  662. struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
  663. memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
  664. /* command descriptor fields */
  665. ucd_req_ptr->header.dword_0 =
  666. UPIU_HEADER_DWORD(
  667. UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
  668. }
  669. /**
  670. * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
  671. * @hba - per adapter instance
  672. * @lrb - pointer to local reference block
  673. */
  674. static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  675. {
  676. u32 upiu_flags;
  677. int ret = 0;
  678. switch (lrbp->command_type) {
  679. case UTP_CMD_TYPE_SCSI:
  680. if (likely(lrbp->cmd)) {
  681. ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
  682. lrbp->cmd->sc_data_direction);
  683. ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
  684. } else {
  685. ret = -EINVAL;
  686. }
  687. break;
  688. case UTP_CMD_TYPE_DEV_MANAGE:
  689. ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
  690. if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
  691. ufshcd_prepare_utp_query_req_upiu(
  692. hba, lrbp, upiu_flags);
  693. else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
  694. ufshcd_prepare_utp_nop_upiu(lrbp);
  695. else
  696. ret = -EINVAL;
  697. break;
  698. case UTP_CMD_TYPE_UFS:
  699. /* For UFS native command implementation */
  700. ret = -ENOTSUPP;
  701. dev_err(hba->dev, "%s: UFS native command are not supported\n",
  702. __func__);
  703. break;
  704. default:
  705. ret = -ENOTSUPP;
  706. dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
  707. __func__, lrbp->command_type);
  708. break;
  709. } /* end of switch */
  710. return ret;
  711. }
  712. /**
  713. * ufshcd_queuecommand - main entry point for SCSI requests
  714. * @cmd: command from SCSI Midlayer
  715. * @done: call back function
  716. *
  717. * Returns 0 for success, non-zero in case of failure
  718. */
  719. static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
  720. {
  721. struct ufshcd_lrb *lrbp;
  722. struct ufs_hba *hba;
  723. unsigned long flags;
  724. int tag;
  725. int err = 0;
  726. hba = shost_priv(host);
  727. tag = cmd->request->tag;
  728. if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
  729. err = SCSI_MLQUEUE_HOST_BUSY;
  730. goto out;
  731. }
  732. /* acquire the tag to make sure device cmds don't use it */
  733. if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
  734. /*
  735. * Dev manage command in progress, requeue the command.
  736. * Requeuing the command helps in cases where the request *may*
  737. * find different tag instead of waiting for dev manage command
  738. * completion.
  739. */
  740. err = SCSI_MLQUEUE_HOST_BUSY;
  741. goto out;
  742. }
  743. lrbp = &hba->lrb[tag];
  744. WARN_ON(lrbp->cmd);
  745. lrbp->cmd = cmd;
  746. lrbp->sense_bufflen = SCSI_SENSE_BUFFERSIZE;
  747. lrbp->sense_buffer = cmd->sense_buffer;
  748. lrbp->task_tag = tag;
  749. lrbp->lun = cmd->device->lun;
  750. lrbp->intr_cmd = false;
  751. lrbp->command_type = UTP_CMD_TYPE_SCSI;
  752. /* form UPIU before issuing the command */
  753. ufshcd_compose_upiu(hba, lrbp);
  754. err = ufshcd_map_sg(lrbp);
  755. if (err) {
  756. lrbp->cmd = NULL;
  757. clear_bit_unlock(tag, &hba->lrb_in_use);
  758. goto out;
  759. }
  760. /* issue command to the controller */
  761. spin_lock_irqsave(hba->host->host_lock, flags);
  762. ufshcd_send_command(hba, tag);
  763. spin_unlock_irqrestore(hba->host->host_lock, flags);
  764. out:
  765. return err;
  766. }
  767. static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
  768. struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
  769. {
  770. lrbp->cmd = NULL;
  771. lrbp->sense_bufflen = 0;
  772. lrbp->sense_buffer = NULL;
  773. lrbp->task_tag = tag;
  774. lrbp->lun = 0; /* device management cmd is not specific to any LUN */
  775. lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
  776. lrbp->intr_cmd = true; /* No interrupt aggregation */
  777. hba->dev_cmd.type = cmd_type;
  778. return ufshcd_compose_upiu(hba, lrbp);
  779. }
  780. static int
  781. ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
  782. {
  783. int err = 0;
  784. unsigned long flags;
  785. u32 mask = 1 << tag;
  786. /* clear outstanding transaction before retry */
  787. spin_lock_irqsave(hba->host->host_lock, flags);
  788. ufshcd_utrl_clear(hba, tag);
  789. spin_unlock_irqrestore(hba->host->host_lock, flags);
  790. /*
  791. * wait for for h/w to clear corresponding bit in door-bell.
  792. * max. wait is 1 sec.
  793. */
  794. err = ufshcd_wait_for_register(hba,
  795. REG_UTP_TRANSFER_REQ_DOOR_BELL,
  796. mask, ~mask, 1000, 1000);
  797. return err;
  798. }
  799. /**
  800. * ufshcd_dev_cmd_completion() - handles device management command responses
  801. * @hba: per adapter instance
  802. * @lrbp: pointer to local reference block
  803. */
  804. static int
  805. ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  806. {
  807. int resp;
  808. int err = 0;
  809. resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
  810. switch (resp) {
  811. case UPIU_TRANSACTION_NOP_IN:
  812. if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
  813. err = -EINVAL;
  814. dev_err(hba->dev, "%s: unexpected response %x\n",
  815. __func__, resp);
  816. }
  817. break;
  818. case UPIU_TRANSACTION_QUERY_RSP:
  819. ufshcd_copy_query_response(hba, lrbp);
  820. break;
  821. case UPIU_TRANSACTION_REJECT_UPIU:
  822. /* TODO: handle Reject UPIU Response */
  823. err = -EPERM;
  824. dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
  825. __func__);
  826. break;
  827. default:
  828. err = -EINVAL;
  829. dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
  830. __func__, resp);
  831. break;
  832. }
  833. return err;
  834. }
  835. static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
  836. struct ufshcd_lrb *lrbp, int max_timeout)
  837. {
  838. int err = 0;
  839. unsigned long time_left;
  840. unsigned long flags;
  841. time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
  842. msecs_to_jiffies(max_timeout));
  843. spin_lock_irqsave(hba->host->host_lock, flags);
  844. hba->dev_cmd.complete = NULL;
  845. if (likely(time_left)) {
  846. err = ufshcd_get_tr_ocs(lrbp);
  847. if (!err)
  848. err = ufshcd_dev_cmd_completion(hba, lrbp);
  849. }
  850. spin_unlock_irqrestore(hba->host->host_lock, flags);
  851. if (!time_left) {
  852. err = -ETIMEDOUT;
  853. if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
  854. /* sucessfully cleared the command, retry if needed */
  855. err = -EAGAIN;
  856. }
  857. return err;
  858. }
  859. /**
  860. * ufshcd_get_dev_cmd_tag - Get device management command tag
  861. * @hba: per-adapter instance
  862. * @tag: pointer to variable with available slot value
  863. *
  864. * Get a free slot and lock it until device management command
  865. * completes.
  866. *
  867. * Returns false if free slot is unavailable for locking, else
  868. * return true with tag value in @tag.
  869. */
  870. static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
  871. {
  872. int tag;
  873. bool ret = false;
  874. unsigned long tmp;
  875. if (!tag_out)
  876. goto out;
  877. do {
  878. tmp = ~hba->lrb_in_use;
  879. tag = find_last_bit(&tmp, hba->nutrs);
  880. if (tag >= hba->nutrs)
  881. goto out;
  882. } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
  883. *tag_out = tag;
  884. ret = true;
  885. out:
  886. return ret;
  887. }
  888. static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
  889. {
  890. clear_bit_unlock(tag, &hba->lrb_in_use);
  891. }
  892. /**
  893. * ufshcd_exec_dev_cmd - API for sending device management requests
  894. * @hba - UFS hba
  895. * @cmd_type - specifies the type (NOP, Query...)
  896. * @timeout - time in seconds
  897. *
  898. * NOTE: Since there is only one available tag for device management commands,
  899. * it is expected you hold the hba->dev_cmd.lock mutex.
  900. */
  901. static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
  902. enum dev_cmd_type cmd_type, int timeout)
  903. {
  904. struct ufshcd_lrb *lrbp;
  905. int err;
  906. int tag;
  907. struct completion wait;
  908. unsigned long flags;
  909. /*
  910. * Get free slot, sleep if slots are unavailable.
  911. * Even though we use wait_event() which sleeps indefinitely,
  912. * the maximum wait time is bounded by SCSI request timeout.
  913. */
  914. wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
  915. init_completion(&wait);
  916. lrbp = &hba->lrb[tag];
  917. WARN_ON(lrbp->cmd);
  918. err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
  919. if (unlikely(err))
  920. goto out_put_tag;
  921. hba->dev_cmd.complete = &wait;
  922. spin_lock_irqsave(hba->host->host_lock, flags);
  923. ufshcd_send_command(hba, tag);
  924. spin_unlock_irqrestore(hba->host->host_lock, flags);
  925. err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
  926. out_put_tag:
  927. ufshcd_put_dev_cmd_tag(hba, tag);
  928. wake_up(&hba->dev_cmd.tag_wq);
  929. return err;
  930. }
  931. /**
  932. * ufshcd_query_flag() - API function for sending flag query requests
  933. * hba: per-adapter instance
  934. * query_opcode: flag query to perform
  935. * idn: flag idn to access
  936. * flag_res: the flag value after the query request completes
  937. *
  938. * Returns 0 for success, non-zero in case of failure
  939. */
  940. static int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
  941. enum flag_idn idn, bool *flag_res)
  942. {
  943. struct ufs_query_req *request;
  944. struct ufs_query_res *response;
  945. int err;
  946. BUG_ON(!hba);
  947. mutex_lock(&hba->dev_cmd.lock);
  948. request = &hba->dev_cmd.query.request;
  949. response = &hba->dev_cmd.query.response;
  950. memset(request, 0, sizeof(struct ufs_query_req));
  951. memset(response, 0, sizeof(struct ufs_query_res));
  952. switch (opcode) {
  953. case UPIU_QUERY_OPCODE_SET_FLAG:
  954. case UPIU_QUERY_OPCODE_CLEAR_FLAG:
  955. case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
  956. request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
  957. break;
  958. case UPIU_QUERY_OPCODE_READ_FLAG:
  959. request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
  960. if (!flag_res) {
  961. /* No dummy reads */
  962. dev_err(hba->dev, "%s: Invalid argument for read request\n",
  963. __func__);
  964. err = -EINVAL;
  965. goto out_unlock;
  966. }
  967. break;
  968. default:
  969. dev_err(hba->dev,
  970. "%s: Expected query flag opcode but got = %d\n",
  971. __func__, opcode);
  972. err = -EINVAL;
  973. goto out_unlock;
  974. }
  975. request->upiu_req.opcode = opcode;
  976. request->upiu_req.idn = idn;
  977. /* Send query request */
  978. err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY,
  979. QUERY_REQ_TIMEOUT);
  980. if (err) {
  981. dev_err(hba->dev,
  982. "%s: Sending flag query for idn %d failed, err = %d\n",
  983. __func__, idn, err);
  984. goto out_unlock;
  985. }
  986. if (flag_res)
  987. *flag_res = (response->upiu_res.value &
  988. MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
  989. out_unlock:
  990. mutex_unlock(&hba->dev_cmd.lock);
  991. return err;
  992. }
  993. /**
  994. * ufshcd_query_attr - API function for sending attribute requests
  995. * hba: per-adapter instance
  996. * opcode: attribute opcode
  997. * idn: attribute idn to access
  998. * index: index field
  999. * selector: selector field
  1000. * attr_val: the attribute value after the query request completes
  1001. *
  1002. * Returns 0 for success, non-zero in case of failure
  1003. */
  1004. int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
  1005. enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
  1006. {
  1007. struct ufs_query_req *request;
  1008. struct ufs_query_res *response;
  1009. int err;
  1010. BUG_ON(!hba);
  1011. if (!attr_val) {
  1012. dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
  1013. __func__, opcode);
  1014. err = -EINVAL;
  1015. goto out;
  1016. }
  1017. mutex_lock(&hba->dev_cmd.lock);
  1018. request = &hba->dev_cmd.query.request;
  1019. response = &hba->dev_cmd.query.response;
  1020. memset(request, 0, sizeof(struct ufs_query_req));
  1021. memset(response, 0, sizeof(struct ufs_query_res));
  1022. switch (opcode) {
  1023. case UPIU_QUERY_OPCODE_WRITE_ATTR:
  1024. request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
  1025. request->upiu_req.value = *attr_val;
  1026. break;
  1027. case UPIU_QUERY_OPCODE_READ_ATTR:
  1028. request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
  1029. break;
  1030. default:
  1031. dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
  1032. __func__, opcode);
  1033. err = -EINVAL;
  1034. goto out_unlock;
  1035. }
  1036. request->upiu_req.opcode = opcode;
  1037. request->upiu_req.idn = idn;
  1038. request->upiu_req.index = index;
  1039. request->upiu_req.selector = selector;
  1040. /* Send query request */
  1041. err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY,
  1042. QUERY_REQ_TIMEOUT);
  1043. if (err) {
  1044. dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
  1045. __func__, opcode, idn, err);
  1046. goto out_unlock;
  1047. }
  1048. *attr_val = response->upiu_res.value;
  1049. out_unlock:
  1050. mutex_unlock(&hba->dev_cmd.lock);
  1051. out:
  1052. return err;
  1053. }
  1054. /**
  1055. * ufshcd_memory_alloc - allocate memory for host memory space data structures
  1056. * @hba: per adapter instance
  1057. *
  1058. * 1. Allocate DMA memory for Command Descriptor array
  1059. * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
  1060. * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
  1061. * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
  1062. * (UTMRDL)
  1063. * 4. Allocate memory for local reference block(lrb).
  1064. *
  1065. * Returns 0 for success, non-zero in case of failure
  1066. */
  1067. static int ufshcd_memory_alloc(struct ufs_hba *hba)
  1068. {
  1069. size_t utmrdl_size, utrdl_size, ucdl_size;
  1070. /* Allocate memory for UTP command descriptors */
  1071. ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
  1072. hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
  1073. ucdl_size,
  1074. &hba->ucdl_dma_addr,
  1075. GFP_KERNEL);
  1076. /*
  1077. * UFSHCI requires UTP command descriptor to be 128 byte aligned.
  1078. * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
  1079. * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
  1080. * be aligned to 128 bytes as well
  1081. */
  1082. if (!hba->ucdl_base_addr ||
  1083. WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
  1084. dev_err(hba->dev,
  1085. "Command Descriptor Memory allocation failed\n");
  1086. goto out;
  1087. }
  1088. /*
  1089. * Allocate memory for UTP Transfer descriptors
  1090. * UFSHCI requires 1024 byte alignment of UTRD
  1091. */
  1092. utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
  1093. hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
  1094. utrdl_size,
  1095. &hba->utrdl_dma_addr,
  1096. GFP_KERNEL);
  1097. if (!hba->utrdl_base_addr ||
  1098. WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
  1099. dev_err(hba->dev,
  1100. "Transfer Descriptor Memory allocation failed\n");
  1101. goto out;
  1102. }
  1103. /*
  1104. * Allocate memory for UTP Task Management descriptors
  1105. * UFSHCI requires 1024 byte alignment of UTMRD
  1106. */
  1107. utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
  1108. hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
  1109. utmrdl_size,
  1110. &hba->utmrdl_dma_addr,
  1111. GFP_KERNEL);
  1112. if (!hba->utmrdl_base_addr ||
  1113. WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
  1114. dev_err(hba->dev,
  1115. "Task Management Descriptor Memory allocation failed\n");
  1116. goto out;
  1117. }
  1118. /* Allocate memory for local reference block */
  1119. hba->lrb = devm_kzalloc(hba->dev,
  1120. hba->nutrs * sizeof(struct ufshcd_lrb),
  1121. GFP_KERNEL);
  1122. if (!hba->lrb) {
  1123. dev_err(hba->dev, "LRB Memory allocation failed\n");
  1124. goto out;
  1125. }
  1126. return 0;
  1127. out:
  1128. return -ENOMEM;
  1129. }
  1130. /**
  1131. * ufshcd_host_memory_configure - configure local reference block with
  1132. * memory offsets
  1133. * @hba: per adapter instance
  1134. *
  1135. * Configure Host memory space
  1136. * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
  1137. * address.
  1138. * 2. Update each UTRD with Response UPIU offset, Response UPIU length
  1139. * and PRDT offset.
  1140. * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
  1141. * into local reference block.
  1142. */
  1143. static void ufshcd_host_memory_configure(struct ufs_hba *hba)
  1144. {
  1145. struct utp_transfer_cmd_desc *cmd_descp;
  1146. struct utp_transfer_req_desc *utrdlp;
  1147. dma_addr_t cmd_desc_dma_addr;
  1148. dma_addr_t cmd_desc_element_addr;
  1149. u16 response_offset;
  1150. u16 prdt_offset;
  1151. int cmd_desc_size;
  1152. int i;
  1153. utrdlp = hba->utrdl_base_addr;
  1154. cmd_descp = hba->ucdl_base_addr;
  1155. response_offset =
  1156. offsetof(struct utp_transfer_cmd_desc, response_upiu);
  1157. prdt_offset =
  1158. offsetof(struct utp_transfer_cmd_desc, prd_table);
  1159. cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
  1160. cmd_desc_dma_addr = hba->ucdl_dma_addr;
  1161. for (i = 0; i < hba->nutrs; i++) {
  1162. /* Configure UTRD with command descriptor base address */
  1163. cmd_desc_element_addr =
  1164. (cmd_desc_dma_addr + (cmd_desc_size * i));
  1165. utrdlp[i].command_desc_base_addr_lo =
  1166. cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
  1167. utrdlp[i].command_desc_base_addr_hi =
  1168. cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
  1169. /* Response upiu and prdt offset should be in double words */
  1170. utrdlp[i].response_upiu_offset =
  1171. cpu_to_le16((response_offset >> 2));
  1172. utrdlp[i].prd_table_offset =
  1173. cpu_to_le16((prdt_offset >> 2));
  1174. utrdlp[i].response_upiu_length =
  1175. cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
  1176. hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
  1177. hba->lrb[i].ucd_req_ptr =
  1178. (struct utp_upiu_req *)(cmd_descp + i);
  1179. hba->lrb[i].ucd_rsp_ptr =
  1180. (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
  1181. hba->lrb[i].ucd_prdt_ptr =
  1182. (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
  1183. }
  1184. }
  1185. /**
  1186. * ufshcd_dme_link_startup - Notify Unipro to perform link startup
  1187. * @hba: per adapter instance
  1188. *
  1189. * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
  1190. * in order to initialize the Unipro link startup procedure.
  1191. * Once the Unipro links are up, the device connected to the controller
  1192. * is detected.
  1193. *
  1194. * Returns 0 on success, non-zero value on failure
  1195. */
  1196. static int ufshcd_dme_link_startup(struct ufs_hba *hba)
  1197. {
  1198. struct uic_command uic_cmd = {0};
  1199. int ret;
  1200. uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
  1201. ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
  1202. if (ret)
  1203. dev_err(hba->dev,
  1204. "dme-link-startup: error code %d\n", ret);
  1205. return ret;
  1206. }
  1207. /**
  1208. * ufshcd_complete_dev_init() - checks device readiness
  1209. * hba: per-adapter instance
  1210. *
  1211. * Set fDeviceInit flag and poll until device toggles it.
  1212. */
  1213. static int ufshcd_complete_dev_init(struct ufs_hba *hba)
  1214. {
  1215. int i, retries, err = 0;
  1216. bool flag_res = 1;
  1217. for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
  1218. /* Set the fDeviceInit flag */
  1219. err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_SET_FLAG,
  1220. QUERY_FLAG_IDN_FDEVICEINIT, NULL);
  1221. if (!err || err == -ETIMEDOUT)
  1222. break;
  1223. dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
  1224. }
  1225. if (err) {
  1226. dev_err(hba->dev,
  1227. "%s setting fDeviceInit flag failed with error %d\n",
  1228. __func__, err);
  1229. goto out;
  1230. }
  1231. /* poll for max. 100 iterations for fDeviceInit flag to clear */
  1232. for (i = 0; i < 100 && !err && flag_res; i++) {
  1233. for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
  1234. err = ufshcd_query_flag(hba,
  1235. UPIU_QUERY_OPCODE_READ_FLAG,
  1236. QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
  1237. if (!err || err == -ETIMEDOUT)
  1238. break;
  1239. dev_dbg(hba->dev, "%s: error %d retrying\n", __func__,
  1240. err);
  1241. }
  1242. }
  1243. if (err)
  1244. dev_err(hba->dev,
  1245. "%s reading fDeviceInit flag failed with error %d\n",
  1246. __func__, err);
  1247. else if (flag_res)
  1248. dev_err(hba->dev,
  1249. "%s fDeviceInit was not cleared by the device\n",
  1250. __func__);
  1251. out:
  1252. return err;
  1253. }
  1254. /**
  1255. * ufshcd_make_hba_operational - Make UFS controller operational
  1256. * @hba: per adapter instance
  1257. *
  1258. * To bring UFS host controller to operational state,
  1259. * 1. Check if device is present
  1260. * 2. Enable required interrupts
  1261. * 3. Configure interrupt aggregation
  1262. * 4. Program UTRL and UTMRL base addres
  1263. * 5. Configure run-stop-registers
  1264. *
  1265. * Returns 0 on success, non-zero value on failure
  1266. */
  1267. static int ufshcd_make_hba_operational(struct ufs_hba *hba)
  1268. {
  1269. int err = 0;
  1270. u32 reg;
  1271. /* check if device present */
  1272. reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
  1273. if (!ufshcd_is_device_present(reg)) {
  1274. dev_err(hba->dev, "cc: Device not present\n");
  1275. err = -ENXIO;
  1276. goto out;
  1277. }
  1278. /* Enable required interrupts */
  1279. ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
  1280. /* Configure interrupt aggregation */
  1281. ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
  1282. /* Configure UTRL and UTMRL base address registers */
  1283. ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
  1284. REG_UTP_TRANSFER_REQ_LIST_BASE_L);
  1285. ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
  1286. REG_UTP_TRANSFER_REQ_LIST_BASE_H);
  1287. ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
  1288. REG_UTP_TASK_REQ_LIST_BASE_L);
  1289. ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
  1290. REG_UTP_TASK_REQ_LIST_BASE_H);
  1291. /*
  1292. * UCRDY, UTMRLDY and UTRLRDY bits must be 1
  1293. * DEI, HEI bits must be 0
  1294. */
  1295. if (!(ufshcd_get_lists_status(reg))) {
  1296. ufshcd_enable_run_stop_reg(hba);
  1297. } else {
  1298. dev_err(hba->dev,
  1299. "Host controller not ready to process requests");
  1300. err = -EIO;
  1301. goto out;
  1302. }
  1303. if (hba->ufshcd_state == UFSHCD_STATE_RESET)
  1304. scsi_unblock_requests(hba->host);
  1305. hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
  1306. out:
  1307. return err;
  1308. }
  1309. /**
  1310. * ufshcd_hba_enable - initialize the controller
  1311. * @hba: per adapter instance
  1312. *
  1313. * The controller resets itself and controller firmware initialization
  1314. * sequence kicks off. When controller is ready it will set
  1315. * the Host Controller Enable bit to 1.
  1316. *
  1317. * Returns 0 on success, non-zero value on failure
  1318. */
  1319. static int ufshcd_hba_enable(struct ufs_hba *hba)
  1320. {
  1321. int retry;
  1322. /*
  1323. * msleep of 1 and 5 used in this function might result in msleep(20),
  1324. * but it was necessary to send the UFS FPGA to reset mode during
  1325. * development and testing of this driver. msleep can be changed to
  1326. * mdelay and retry count can be reduced based on the controller.
  1327. */
  1328. if (!ufshcd_is_hba_active(hba)) {
  1329. /* change controller state to "reset state" */
  1330. ufshcd_hba_stop(hba);
  1331. /*
  1332. * This delay is based on the testing done with UFS host
  1333. * controller FPGA. The delay can be changed based on the
  1334. * host controller used.
  1335. */
  1336. msleep(5);
  1337. }
  1338. /* start controller initialization sequence */
  1339. ufshcd_hba_start(hba);
  1340. /*
  1341. * To initialize a UFS host controller HCE bit must be set to 1.
  1342. * During initialization the HCE bit value changes from 1->0->1.
  1343. * When the host controller completes initialization sequence
  1344. * it sets the value of HCE bit to 1. The same HCE bit is read back
  1345. * to check if the controller has completed initialization sequence.
  1346. * So without this delay the value HCE = 1, set in the previous
  1347. * instruction might be read back.
  1348. * This delay can be changed based on the controller.
  1349. */
  1350. msleep(1);
  1351. /* wait for the host controller to complete initialization */
  1352. retry = 10;
  1353. while (ufshcd_is_hba_active(hba)) {
  1354. if (retry) {
  1355. retry--;
  1356. } else {
  1357. dev_err(hba->dev,
  1358. "Controller enable failed\n");
  1359. return -EIO;
  1360. }
  1361. msleep(5);
  1362. }
  1363. return 0;
  1364. }
  1365. /**
  1366. * ufshcd_link_startup - Initialize unipro link startup
  1367. * @hba: per adapter instance
  1368. *
  1369. * Returns 0 for success, non-zero in case of failure
  1370. */
  1371. static int ufshcd_link_startup(struct ufs_hba *hba)
  1372. {
  1373. int ret;
  1374. /* enable UIC related interrupts */
  1375. ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
  1376. ret = ufshcd_dme_link_startup(hba);
  1377. if (ret)
  1378. goto out;
  1379. ret = ufshcd_make_hba_operational(hba);
  1380. out:
  1381. if (ret)
  1382. dev_err(hba->dev, "link startup failed %d\n", ret);
  1383. return ret;
  1384. }
  1385. /**
  1386. * ufshcd_verify_dev_init() - Verify device initialization
  1387. * @hba: per-adapter instance
  1388. *
  1389. * Send NOP OUT UPIU and wait for NOP IN response to check whether the
  1390. * device Transport Protocol (UTP) layer is ready after a reset.
  1391. * If the UTP layer at the device side is not initialized, it may
  1392. * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
  1393. * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
  1394. */
  1395. static int ufshcd_verify_dev_init(struct ufs_hba *hba)
  1396. {
  1397. int err = 0;
  1398. int retries;
  1399. mutex_lock(&hba->dev_cmd.lock);
  1400. for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
  1401. err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
  1402. NOP_OUT_TIMEOUT);
  1403. if (!err || err == -ETIMEDOUT)
  1404. break;
  1405. dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
  1406. }
  1407. mutex_unlock(&hba->dev_cmd.lock);
  1408. if (err)
  1409. dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
  1410. return err;
  1411. }
  1412. /**
  1413. * ufshcd_do_reset - reset the host controller
  1414. * @hba: per adapter instance
  1415. *
  1416. * Returns SUCCESS/FAILED
  1417. */
  1418. static int ufshcd_do_reset(struct ufs_hba *hba)
  1419. {
  1420. struct ufshcd_lrb *lrbp;
  1421. unsigned long flags;
  1422. int tag;
  1423. /* block commands from midlayer */
  1424. scsi_block_requests(hba->host);
  1425. spin_lock_irqsave(hba->host->host_lock, flags);
  1426. hba->ufshcd_state = UFSHCD_STATE_RESET;
  1427. /* send controller to reset state */
  1428. ufshcd_hba_stop(hba);
  1429. spin_unlock_irqrestore(hba->host->host_lock, flags);
  1430. /* abort outstanding commands */
  1431. for (tag = 0; tag < hba->nutrs; tag++) {
  1432. if (test_bit(tag, &hba->outstanding_reqs)) {
  1433. lrbp = &hba->lrb[tag];
  1434. if (lrbp->cmd) {
  1435. scsi_dma_unmap(lrbp->cmd);
  1436. lrbp->cmd->result = DID_RESET << 16;
  1437. lrbp->cmd->scsi_done(lrbp->cmd);
  1438. lrbp->cmd = NULL;
  1439. clear_bit_unlock(tag, &hba->lrb_in_use);
  1440. }
  1441. }
  1442. }
  1443. /* complete device management command */
  1444. if (hba->dev_cmd.complete)
  1445. complete(hba->dev_cmd.complete);
  1446. /* clear outstanding request/task bit maps */
  1447. hba->outstanding_reqs = 0;
  1448. hba->outstanding_tasks = 0;
  1449. /* Host controller enable */
  1450. if (ufshcd_hba_enable(hba)) {
  1451. dev_err(hba->dev,
  1452. "Reset: Controller initialization failed\n");
  1453. return FAILED;
  1454. }
  1455. if (ufshcd_link_startup(hba)) {
  1456. dev_err(hba->dev,
  1457. "Reset: Link start-up failed\n");
  1458. return FAILED;
  1459. }
  1460. return SUCCESS;
  1461. }
  1462. /**
  1463. * ufshcd_slave_alloc - handle initial SCSI device configurations
  1464. * @sdev: pointer to SCSI device
  1465. *
  1466. * Returns success
  1467. */
  1468. static int ufshcd_slave_alloc(struct scsi_device *sdev)
  1469. {
  1470. struct ufs_hba *hba;
  1471. hba = shost_priv(sdev->host);
  1472. sdev->tagged_supported = 1;
  1473. /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
  1474. sdev->use_10_for_ms = 1;
  1475. scsi_set_tag_type(sdev, MSG_SIMPLE_TAG);
  1476. /*
  1477. * Inform SCSI Midlayer that the LUN queue depth is same as the
  1478. * controller queue depth. If a LUN queue depth is less than the
  1479. * controller queue depth and if the LUN reports
  1480. * SAM_STAT_TASK_SET_FULL, the LUN queue depth will be adjusted
  1481. * with scsi_adjust_queue_depth.
  1482. */
  1483. scsi_activate_tcq(sdev, hba->nutrs);
  1484. return 0;
  1485. }
  1486. /**
  1487. * ufshcd_slave_destroy - remove SCSI device configurations
  1488. * @sdev: pointer to SCSI device
  1489. */
  1490. static void ufshcd_slave_destroy(struct scsi_device *sdev)
  1491. {
  1492. struct ufs_hba *hba;
  1493. hba = shost_priv(sdev->host);
  1494. scsi_deactivate_tcq(sdev, hba->nutrs);
  1495. }
  1496. /**
  1497. * ufshcd_task_req_compl - handle task management request completion
  1498. * @hba: per adapter instance
  1499. * @index: index of the completed request
  1500. *
  1501. * Returns SUCCESS/FAILED
  1502. */
  1503. static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index)
  1504. {
  1505. struct utp_task_req_desc *task_req_descp;
  1506. struct utp_upiu_task_rsp *task_rsp_upiup;
  1507. unsigned long flags;
  1508. int ocs_value;
  1509. int task_result;
  1510. spin_lock_irqsave(hba->host->host_lock, flags);
  1511. /* Clear completed tasks from outstanding_tasks */
  1512. __clear_bit(index, &hba->outstanding_tasks);
  1513. task_req_descp = hba->utmrdl_base_addr;
  1514. ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
  1515. if (ocs_value == OCS_SUCCESS) {
  1516. task_rsp_upiup = (struct utp_upiu_task_rsp *)
  1517. task_req_descp[index].task_rsp_upiu;
  1518. task_result = be32_to_cpu(task_rsp_upiup->header.dword_1);
  1519. task_result = ((task_result & MASK_TASK_RESPONSE) >> 8);
  1520. if (task_result != UPIU_TASK_MANAGEMENT_FUNC_COMPL &&
  1521. task_result != UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED)
  1522. task_result = FAILED;
  1523. else
  1524. task_result = SUCCESS;
  1525. } else {
  1526. task_result = FAILED;
  1527. dev_err(hba->dev,
  1528. "trc: Invalid ocs = %x\n", ocs_value);
  1529. }
  1530. spin_unlock_irqrestore(hba->host->host_lock, flags);
  1531. return task_result;
  1532. }
  1533. /**
  1534. * ufshcd_adjust_lun_qdepth - Update LUN queue depth if device responds with
  1535. * SAM_STAT_TASK_SET_FULL SCSI command status.
  1536. * @cmd: pointer to SCSI command
  1537. */
  1538. static void ufshcd_adjust_lun_qdepth(struct scsi_cmnd *cmd)
  1539. {
  1540. struct ufs_hba *hba;
  1541. int i;
  1542. int lun_qdepth = 0;
  1543. hba = shost_priv(cmd->device->host);
  1544. /*
  1545. * LUN queue depth can be obtained by counting outstanding commands
  1546. * on the LUN.
  1547. */
  1548. for (i = 0; i < hba->nutrs; i++) {
  1549. if (test_bit(i, &hba->outstanding_reqs)) {
  1550. /*
  1551. * Check if the outstanding command belongs
  1552. * to the LUN which reported SAM_STAT_TASK_SET_FULL.
  1553. */
  1554. if (cmd->device->lun == hba->lrb[i].lun)
  1555. lun_qdepth++;
  1556. }
  1557. }
  1558. /*
  1559. * LUN queue depth will be total outstanding commands, except the
  1560. * command for which the LUN reported SAM_STAT_TASK_SET_FULL.
  1561. */
  1562. scsi_adjust_queue_depth(cmd->device, MSG_SIMPLE_TAG, lun_qdepth - 1);
  1563. }
  1564. /**
  1565. * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
  1566. * @lrb: pointer to local reference block of completed command
  1567. * @scsi_status: SCSI command status
  1568. *
  1569. * Returns value base on SCSI command status
  1570. */
  1571. static inline int
  1572. ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
  1573. {
  1574. int result = 0;
  1575. switch (scsi_status) {
  1576. case SAM_STAT_CHECK_CONDITION:
  1577. ufshcd_copy_sense_data(lrbp);
  1578. case SAM_STAT_GOOD:
  1579. result |= DID_OK << 16 |
  1580. COMMAND_COMPLETE << 8 |
  1581. scsi_status;
  1582. break;
  1583. case SAM_STAT_TASK_SET_FULL:
  1584. /*
  1585. * If a LUN reports SAM_STAT_TASK_SET_FULL, then the LUN queue
  1586. * depth needs to be adjusted to the exact number of
  1587. * outstanding commands the LUN can handle at any given time.
  1588. */
  1589. ufshcd_adjust_lun_qdepth(lrbp->cmd);
  1590. case SAM_STAT_BUSY:
  1591. case SAM_STAT_TASK_ABORTED:
  1592. ufshcd_copy_sense_data(lrbp);
  1593. result |= scsi_status;
  1594. break;
  1595. default:
  1596. result |= DID_ERROR << 16;
  1597. break;
  1598. } /* end of switch */
  1599. return result;
  1600. }
  1601. /**
  1602. * ufshcd_transfer_rsp_status - Get overall status of the response
  1603. * @hba: per adapter instance
  1604. * @lrb: pointer to local reference block of completed command
  1605. *
  1606. * Returns result of the command to notify SCSI midlayer
  1607. */
  1608. static inline int
  1609. ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  1610. {
  1611. int result = 0;
  1612. int scsi_status;
  1613. int ocs;
  1614. /* overall command status of utrd */
  1615. ocs = ufshcd_get_tr_ocs(lrbp);
  1616. switch (ocs) {
  1617. case OCS_SUCCESS:
  1618. result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
  1619. switch (result) {
  1620. case UPIU_TRANSACTION_RESPONSE:
  1621. /*
  1622. * get the response UPIU result to extract
  1623. * the SCSI command status
  1624. */
  1625. result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
  1626. /*
  1627. * get the result based on SCSI status response
  1628. * to notify the SCSI midlayer of the command status
  1629. */
  1630. scsi_status = result & MASK_SCSI_STATUS;
  1631. result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
  1632. if (ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
  1633. schedule_work(&hba->eeh_work);
  1634. break;
  1635. case UPIU_TRANSACTION_REJECT_UPIU:
  1636. /* TODO: handle Reject UPIU Response */
  1637. result = DID_ERROR << 16;
  1638. dev_err(hba->dev,
  1639. "Reject UPIU not fully implemented\n");
  1640. break;
  1641. default:
  1642. result = DID_ERROR << 16;
  1643. dev_err(hba->dev,
  1644. "Unexpected request response code = %x\n",
  1645. result);
  1646. break;
  1647. }
  1648. break;
  1649. case OCS_ABORTED:
  1650. result |= DID_ABORT << 16;
  1651. break;
  1652. case OCS_INVALID_CMD_TABLE_ATTR:
  1653. case OCS_INVALID_PRDT_ATTR:
  1654. case OCS_MISMATCH_DATA_BUF_SIZE:
  1655. case OCS_MISMATCH_RESP_UPIU_SIZE:
  1656. case OCS_PEER_COMM_FAILURE:
  1657. case OCS_FATAL_ERROR:
  1658. default:
  1659. result |= DID_ERROR << 16;
  1660. dev_err(hba->dev,
  1661. "OCS error from controller = %x\n", ocs);
  1662. break;
  1663. } /* end of switch */
  1664. return result;
  1665. }
  1666. /**
  1667. * ufshcd_uic_cmd_compl - handle completion of uic command
  1668. * @hba: per adapter instance
  1669. */
  1670. static void ufshcd_uic_cmd_compl(struct ufs_hba *hba)
  1671. {
  1672. if (hba->active_uic_cmd) {
  1673. hba->active_uic_cmd->argument2 |=
  1674. ufshcd_get_uic_cmd_result(hba);
  1675. complete(&hba->active_uic_cmd->done);
  1676. }
  1677. }
  1678. /**
  1679. * ufshcd_transfer_req_compl - handle SCSI and query command completion
  1680. * @hba: per adapter instance
  1681. */
  1682. static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
  1683. {
  1684. struct ufshcd_lrb *lrbp;
  1685. struct scsi_cmnd *cmd;
  1686. unsigned long completed_reqs;
  1687. u32 tr_doorbell;
  1688. int result;
  1689. int index;
  1690. bool int_aggr_reset = false;
  1691. tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
  1692. completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
  1693. for (index = 0; index < hba->nutrs; index++) {
  1694. if (test_bit(index, &completed_reqs)) {
  1695. lrbp = &hba->lrb[index];
  1696. cmd = lrbp->cmd;
  1697. /*
  1698. * Don't skip resetting interrupt aggregation counters
  1699. * if a regular command is present.
  1700. */
  1701. int_aggr_reset |= !lrbp->intr_cmd;
  1702. if (cmd) {
  1703. result = ufshcd_transfer_rsp_status(hba, lrbp);
  1704. scsi_dma_unmap(cmd);
  1705. cmd->result = result;
  1706. /* Mark completed command as NULL in LRB */
  1707. lrbp->cmd = NULL;
  1708. clear_bit_unlock(index, &hba->lrb_in_use);
  1709. /* Do not touch lrbp after scsi done */
  1710. cmd->scsi_done(cmd);
  1711. } else if (lrbp->command_type ==
  1712. UTP_CMD_TYPE_DEV_MANAGE) {
  1713. if (hba->dev_cmd.complete)
  1714. complete(hba->dev_cmd.complete);
  1715. }
  1716. } /* end of if */
  1717. } /* end of for */
  1718. /* clear corresponding bits of completed commands */
  1719. hba->outstanding_reqs ^= completed_reqs;
  1720. /* we might have free'd some tags above */
  1721. wake_up(&hba->dev_cmd.tag_wq);
  1722. /* Reset interrupt aggregation counters */
  1723. if (int_aggr_reset)
  1724. ufshcd_reset_intr_aggr(hba);
  1725. }
  1726. /**
  1727. * ufshcd_disable_ee - disable exception event
  1728. * @hba: per-adapter instance
  1729. * @mask: exception event to disable
  1730. *
  1731. * Disables exception event in the device so that the EVENT_ALERT
  1732. * bit is not set.
  1733. *
  1734. * Returns zero on success, non-zero error value on failure.
  1735. */
  1736. static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
  1737. {
  1738. int err = 0;
  1739. u32 val;
  1740. if (!(hba->ee_ctrl_mask & mask))
  1741. goto out;
  1742. val = hba->ee_ctrl_mask & ~mask;
  1743. val &= 0xFFFF; /* 2 bytes */
  1744. err = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
  1745. QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
  1746. if (!err)
  1747. hba->ee_ctrl_mask &= ~mask;
  1748. out:
  1749. return err;
  1750. }
  1751. /**
  1752. * ufshcd_enable_ee - enable exception event
  1753. * @hba: per-adapter instance
  1754. * @mask: exception event to enable
  1755. *
  1756. * Enable corresponding exception event in the device to allow
  1757. * device to alert host in critical scenarios.
  1758. *
  1759. * Returns zero on success, non-zero error value on failure.
  1760. */
  1761. static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
  1762. {
  1763. int err = 0;
  1764. u32 val;
  1765. if (hba->ee_ctrl_mask & mask)
  1766. goto out;
  1767. val = hba->ee_ctrl_mask | mask;
  1768. val &= 0xFFFF; /* 2 bytes */
  1769. err = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
  1770. QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
  1771. if (!err)
  1772. hba->ee_ctrl_mask |= mask;
  1773. out:
  1774. return err;
  1775. }
  1776. /**
  1777. * ufshcd_enable_auto_bkops - Allow device managed BKOPS
  1778. * @hba: per-adapter instance
  1779. *
  1780. * Allow device to manage background operations on its own. Enabling
  1781. * this might lead to inconsistent latencies during normal data transfers
  1782. * as the device is allowed to manage its own way of handling background
  1783. * operations.
  1784. *
  1785. * Returns zero on success, non-zero on failure.
  1786. */
  1787. static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
  1788. {
  1789. int err = 0;
  1790. if (hba->auto_bkops_enabled)
  1791. goto out;
  1792. err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_SET_FLAG,
  1793. QUERY_FLAG_IDN_BKOPS_EN, NULL);
  1794. if (err) {
  1795. dev_err(hba->dev, "%s: failed to enable bkops %d\n",
  1796. __func__, err);
  1797. goto out;
  1798. }
  1799. hba->auto_bkops_enabled = true;
  1800. /* No need of URGENT_BKOPS exception from the device */
  1801. err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
  1802. if (err)
  1803. dev_err(hba->dev, "%s: failed to disable exception event %d\n",
  1804. __func__, err);
  1805. out:
  1806. return err;
  1807. }
  1808. /**
  1809. * ufshcd_disable_auto_bkops - block device in doing background operations
  1810. * @hba: per-adapter instance
  1811. *
  1812. * Disabling background operations improves command response latency but
  1813. * has drawback of device moving into critical state where the device is
  1814. * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
  1815. * host is idle so that BKOPS are managed effectively without any negative
  1816. * impacts.
  1817. *
  1818. * Returns zero on success, non-zero on failure.
  1819. */
  1820. static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
  1821. {
  1822. int err = 0;
  1823. if (!hba->auto_bkops_enabled)
  1824. goto out;
  1825. /*
  1826. * If host assisted BKOPs is to be enabled, make sure
  1827. * urgent bkops exception is allowed.
  1828. */
  1829. err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
  1830. if (err) {
  1831. dev_err(hba->dev, "%s: failed to enable exception event %d\n",
  1832. __func__, err);
  1833. goto out;
  1834. }
  1835. err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
  1836. QUERY_FLAG_IDN_BKOPS_EN, NULL);
  1837. if (err) {
  1838. dev_err(hba->dev, "%s: failed to disable bkops %d\n",
  1839. __func__, err);
  1840. ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
  1841. goto out;
  1842. }
  1843. hba->auto_bkops_enabled = false;
  1844. out:
  1845. return err;
  1846. }
  1847. /**
  1848. * ufshcd_force_reset_auto_bkops - force enable of auto bkops
  1849. * @hba: per adapter instance
  1850. *
  1851. * After a device reset the device may toggle the BKOPS_EN flag
  1852. * to default value. The s/w tracking variables should be updated
  1853. * as well. Do this by forcing enable of auto bkops.
  1854. */
  1855. static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
  1856. {
  1857. hba->auto_bkops_enabled = false;
  1858. hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
  1859. ufshcd_enable_auto_bkops(hba);
  1860. }
  1861. static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
  1862. {
  1863. return ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_READ_ATTR,
  1864. QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
  1865. }
  1866. /**
  1867. * ufshcd_urgent_bkops - handle urgent bkops exception event
  1868. * @hba: per-adapter instance
  1869. *
  1870. * Enable fBackgroundOpsEn flag in the device to permit background
  1871. * operations.
  1872. */
  1873. static int ufshcd_urgent_bkops(struct ufs_hba *hba)
  1874. {
  1875. int err;
  1876. u32 status = 0;
  1877. err = ufshcd_get_bkops_status(hba, &status);
  1878. if (err) {
  1879. dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
  1880. __func__, err);
  1881. goto out;
  1882. }
  1883. status = status & 0xF;
  1884. /* handle only if status indicates performance impact or critical */
  1885. if (status >= BKOPS_STATUS_PERF_IMPACT)
  1886. err = ufshcd_enable_auto_bkops(hba);
  1887. out:
  1888. return err;
  1889. }
  1890. static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
  1891. {
  1892. return ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_READ_ATTR,
  1893. QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
  1894. }
  1895. /**
  1896. * ufshcd_exception_event_handler - handle exceptions raised by device
  1897. * @work: pointer to work data
  1898. *
  1899. * Read bExceptionEventStatus attribute from the device and handle the
  1900. * exception event accordingly.
  1901. */
  1902. static void ufshcd_exception_event_handler(struct work_struct *work)
  1903. {
  1904. struct ufs_hba *hba;
  1905. int err;
  1906. u32 status = 0;
  1907. hba = container_of(work, struct ufs_hba, eeh_work);
  1908. pm_runtime_get_sync(hba->dev);
  1909. err = ufshcd_get_ee_status(hba, &status);
  1910. if (err) {
  1911. dev_err(hba->dev, "%s: failed to get exception status %d\n",
  1912. __func__, err);
  1913. goto out;
  1914. }
  1915. status &= hba->ee_ctrl_mask;
  1916. if (status & MASK_EE_URGENT_BKOPS) {
  1917. err = ufshcd_urgent_bkops(hba);
  1918. if (err)
  1919. dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
  1920. __func__, err);
  1921. }
  1922. out:
  1923. pm_runtime_put_sync(hba->dev);
  1924. return;
  1925. }
  1926. /**
  1927. * ufshcd_fatal_err_handler - handle fatal errors
  1928. * @hba: per adapter instance
  1929. */
  1930. static void ufshcd_fatal_err_handler(struct work_struct *work)
  1931. {
  1932. struct ufs_hba *hba;
  1933. hba = container_of(work, struct ufs_hba, feh_workq);
  1934. pm_runtime_get_sync(hba->dev);
  1935. /* check if reset is already in progress */
  1936. if (hba->ufshcd_state != UFSHCD_STATE_RESET)
  1937. ufshcd_do_reset(hba);
  1938. pm_runtime_put_sync(hba->dev);
  1939. }
  1940. /**
  1941. * ufshcd_err_handler - Check for fatal errors
  1942. * @work: pointer to a work queue structure
  1943. */
  1944. static void ufshcd_err_handler(struct ufs_hba *hba)
  1945. {
  1946. u32 reg;
  1947. if (hba->errors & INT_FATAL_ERRORS)
  1948. goto fatal_eh;
  1949. if (hba->errors & UIC_ERROR) {
  1950. reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
  1951. if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
  1952. goto fatal_eh;
  1953. }
  1954. return;
  1955. fatal_eh:
  1956. hba->ufshcd_state = UFSHCD_STATE_ERROR;
  1957. schedule_work(&hba->feh_workq);
  1958. }
  1959. /**
  1960. * ufshcd_tmc_handler - handle task management function completion
  1961. * @hba: per adapter instance
  1962. */
  1963. static void ufshcd_tmc_handler(struct ufs_hba *hba)
  1964. {
  1965. u32 tm_doorbell;
  1966. tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
  1967. hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
  1968. wake_up_interruptible(&hba->ufshcd_tm_wait_queue);
  1969. }
  1970. /**
  1971. * ufshcd_sl_intr - Interrupt service routine
  1972. * @hba: per adapter instance
  1973. * @intr_status: contains interrupts generated by the controller
  1974. */
  1975. static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
  1976. {
  1977. hba->errors = UFSHCD_ERROR_MASK & intr_status;
  1978. if (hba->errors)
  1979. ufshcd_err_handler(hba);
  1980. if (intr_status & UIC_COMMAND_COMPL)
  1981. ufshcd_uic_cmd_compl(hba);
  1982. if (intr_status & UTP_TASK_REQ_COMPL)
  1983. ufshcd_tmc_handler(hba);
  1984. if (intr_status & UTP_TRANSFER_REQ_COMPL)
  1985. ufshcd_transfer_req_compl(hba);
  1986. }
  1987. /**
  1988. * ufshcd_intr - Main interrupt service routine
  1989. * @irq: irq number
  1990. * @__hba: pointer to adapter instance
  1991. *
  1992. * Returns IRQ_HANDLED - If interrupt is valid
  1993. * IRQ_NONE - If invalid interrupt
  1994. */
  1995. static irqreturn_t ufshcd_intr(int irq, void *__hba)
  1996. {
  1997. u32 intr_status;
  1998. irqreturn_t retval = IRQ_NONE;
  1999. struct ufs_hba *hba = __hba;
  2000. spin_lock(hba->host->host_lock);
  2001. intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
  2002. if (intr_status) {
  2003. ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
  2004. ufshcd_sl_intr(hba, intr_status);
  2005. retval = IRQ_HANDLED;
  2006. }
  2007. spin_unlock(hba->host->host_lock);
  2008. return retval;
  2009. }
  2010. /**
  2011. * ufshcd_issue_tm_cmd - issues task management commands to controller
  2012. * @hba: per adapter instance
  2013. * @lrbp: pointer to local reference block
  2014. *
  2015. * Returns SUCCESS/FAILED
  2016. */
  2017. static int
  2018. ufshcd_issue_tm_cmd(struct ufs_hba *hba,
  2019. struct ufshcd_lrb *lrbp,
  2020. u8 tm_function)
  2021. {
  2022. struct utp_task_req_desc *task_req_descp;
  2023. struct utp_upiu_task_req *task_req_upiup;
  2024. struct Scsi_Host *host;
  2025. unsigned long flags;
  2026. int free_slot = 0;
  2027. int err;
  2028. host = hba->host;
  2029. spin_lock_irqsave(host->host_lock, flags);
  2030. /* If task management queue is full */
  2031. free_slot = ufshcd_get_tm_free_slot(hba);
  2032. if (free_slot >= hba->nutmrs) {
  2033. spin_unlock_irqrestore(host->host_lock, flags);
  2034. dev_err(hba->dev, "Task management queue full\n");
  2035. err = FAILED;
  2036. goto out;
  2037. }
  2038. task_req_descp = hba->utmrdl_base_addr;
  2039. task_req_descp += free_slot;
  2040. /* Configure task request descriptor */
  2041. task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
  2042. task_req_descp->header.dword_2 =
  2043. cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
  2044. /* Configure task request UPIU */
  2045. task_req_upiup =
  2046. (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
  2047. task_req_upiup->header.dword_0 =
  2048. UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
  2049. lrbp->lun, lrbp->task_tag);
  2050. task_req_upiup->header.dword_1 =
  2051. UPIU_HEADER_DWORD(0, tm_function, 0, 0);
  2052. task_req_upiup->input_param1 = lrbp->lun;
  2053. task_req_upiup->input_param1 =
  2054. cpu_to_be32(task_req_upiup->input_param1);
  2055. task_req_upiup->input_param2 = lrbp->task_tag;
  2056. task_req_upiup->input_param2 =
  2057. cpu_to_be32(task_req_upiup->input_param2);
  2058. /* send command to the controller */
  2059. __set_bit(free_slot, &hba->outstanding_tasks);
  2060. ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
  2061. spin_unlock_irqrestore(host->host_lock, flags);
  2062. /* wait until the task management command is completed */
  2063. err =
  2064. wait_event_interruptible_timeout(hba->ufshcd_tm_wait_queue,
  2065. (test_bit(free_slot,
  2066. &hba->tm_condition) != 0),
  2067. 60 * HZ);
  2068. if (!err) {
  2069. dev_err(hba->dev,
  2070. "Task management command timed-out\n");
  2071. err = FAILED;
  2072. goto out;
  2073. }
  2074. clear_bit(free_slot, &hba->tm_condition);
  2075. err = ufshcd_task_req_compl(hba, free_slot);
  2076. out:
  2077. return err;
  2078. }
  2079. /**
  2080. * ufshcd_device_reset - reset device and abort all the pending commands
  2081. * @cmd: SCSI command pointer
  2082. *
  2083. * Returns SUCCESS/FAILED
  2084. */
  2085. static int ufshcd_device_reset(struct scsi_cmnd *cmd)
  2086. {
  2087. struct Scsi_Host *host;
  2088. struct ufs_hba *hba;
  2089. unsigned int tag;
  2090. u32 pos;
  2091. int err;
  2092. host = cmd->device->host;
  2093. hba = shost_priv(host);
  2094. tag = cmd->request->tag;
  2095. err = ufshcd_issue_tm_cmd(hba, &hba->lrb[tag], UFS_LOGICAL_RESET);
  2096. if (err == FAILED)
  2097. goto out;
  2098. for (pos = 0; pos < hba->nutrs; pos++) {
  2099. if (test_bit(pos, &hba->outstanding_reqs) &&
  2100. (hba->lrb[tag].lun == hba->lrb[pos].lun)) {
  2101. /* clear the respective UTRLCLR register bit */
  2102. ufshcd_utrl_clear(hba, pos);
  2103. clear_bit(pos, &hba->outstanding_reqs);
  2104. if (hba->lrb[pos].cmd) {
  2105. scsi_dma_unmap(hba->lrb[pos].cmd);
  2106. hba->lrb[pos].cmd->result =
  2107. DID_ABORT << 16;
  2108. hba->lrb[pos].cmd->scsi_done(cmd);
  2109. hba->lrb[pos].cmd = NULL;
  2110. clear_bit_unlock(pos, &hba->lrb_in_use);
  2111. wake_up(&hba->dev_cmd.tag_wq);
  2112. }
  2113. }
  2114. } /* end of for */
  2115. out:
  2116. return err;
  2117. }
  2118. /**
  2119. * ufshcd_host_reset - Main reset function registered with scsi layer
  2120. * @cmd: SCSI command pointer
  2121. *
  2122. * Returns SUCCESS/FAILED
  2123. */
  2124. static int ufshcd_host_reset(struct scsi_cmnd *cmd)
  2125. {
  2126. struct ufs_hba *hba;
  2127. hba = shost_priv(cmd->device->host);
  2128. if (hba->ufshcd_state == UFSHCD_STATE_RESET)
  2129. return SUCCESS;
  2130. return ufshcd_do_reset(hba);
  2131. }
  2132. /**
  2133. * ufshcd_abort - abort a specific command
  2134. * @cmd: SCSI command pointer
  2135. *
  2136. * Returns SUCCESS/FAILED
  2137. */
  2138. static int ufshcd_abort(struct scsi_cmnd *cmd)
  2139. {
  2140. struct Scsi_Host *host;
  2141. struct ufs_hba *hba;
  2142. unsigned long flags;
  2143. unsigned int tag;
  2144. int err;
  2145. host = cmd->device->host;
  2146. hba = shost_priv(host);
  2147. tag = cmd->request->tag;
  2148. spin_lock_irqsave(host->host_lock, flags);
  2149. /* check if command is still pending */
  2150. if (!(test_bit(tag, &hba->outstanding_reqs))) {
  2151. err = FAILED;
  2152. spin_unlock_irqrestore(host->host_lock, flags);
  2153. goto out;
  2154. }
  2155. spin_unlock_irqrestore(host->host_lock, flags);
  2156. err = ufshcd_issue_tm_cmd(hba, &hba->lrb[tag], UFS_ABORT_TASK);
  2157. if (err == FAILED)
  2158. goto out;
  2159. scsi_dma_unmap(cmd);
  2160. spin_lock_irqsave(host->host_lock, flags);
  2161. /* clear the respective UTRLCLR register bit */
  2162. ufshcd_utrl_clear(hba, tag);
  2163. __clear_bit(tag, &hba->outstanding_reqs);
  2164. hba->lrb[tag].cmd = NULL;
  2165. spin_unlock_irqrestore(host->host_lock, flags);
  2166. clear_bit_unlock(tag, &hba->lrb_in_use);
  2167. wake_up(&hba->dev_cmd.tag_wq);
  2168. out:
  2169. return err;
  2170. }
  2171. /**
  2172. * ufshcd_async_scan - asynchronous execution for link startup
  2173. * @data: data pointer to pass to this function
  2174. * @cookie: cookie data
  2175. */
  2176. static void ufshcd_async_scan(void *data, async_cookie_t cookie)
  2177. {
  2178. struct ufs_hba *hba = (struct ufs_hba *)data;
  2179. int ret;
  2180. ret = ufshcd_link_startup(hba);
  2181. if (ret)
  2182. goto out;
  2183. ret = ufshcd_verify_dev_init(hba);
  2184. if (ret)
  2185. goto out;
  2186. ret = ufshcd_complete_dev_init(hba);
  2187. if (ret)
  2188. goto out;
  2189. ufshcd_force_reset_auto_bkops(hba);
  2190. scsi_scan_host(hba->host);
  2191. pm_runtime_put_sync(hba->dev);
  2192. out:
  2193. return;
  2194. }
  2195. static struct scsi_host_template ufshcd_driver_template = {
  2196. .module = THIS_MODULE,
  2197. .name = UFSHCD,
  2198. .proc_name = UFSHCD,
  2199. .queuecommand = ufshcd_queuecommand,
  2200. .slave_alloc = ufshcd_slave_alloc,
  2201. .slave_destroy = ufshcd_slave_destroy,
  2202. .eh_abort_handler = ufshcd_abort,
  2203. .eh_device_reset_handler = ufshcd_device_reset,
  2204. .eh_host_reset_handler = ufshcd_host_reset,
  2205. .this_id = -1,
  2206. .sg_tablesize = SG_ALL,
  2207. .cmd_per_lun = UFSHCD_CMD_PER_LUN,
  2208. .can_queue = UFSHCD_CAN_QUEUE,
  2209. };
  2210. /**
  2211. * ufshcd_suspend - suspend power management function
  2212. * @hba: per adapter instance
  2213. * @state: power state
  2214. *
  2215. * Returns -ENOSYS
  2216. */
  2217. int ufshcd_suspend(struct ufs_hba *hba, pm_message_t state)
  2218. {
  2219. /*
  2220. * TODO:
  2221. * 1. Block SCSI requests from SCSI midlayer
  2222. * 2. Change the internal driver state to non operational
  2223. * 3. Set UTRLRSR and UTMRLRSR bits to zero
  2224. * 4. Wait until outstanding commands are completed
  2225. * 5. Set HCE to zero to send the UFS host controller to reset state
  2226. */
  2227. return -ENOSYS;
  2228. }
  2229. EXPORT_SYMBOL_GPL(ufshcd_suspend);
  2230. /**
  2231. * ufshcd_resume - resume power management function
  2232. * @hba: per adapter instance
  2233. *
  2234. * Returns -ENOSYS
  2235. */
  2236. int ufshcd_resume(struct ufs_hba *hba)
  2237. {
  2238. /*
  2239. * TODO:
  2240. * 1. Set HCE to 1, to start the UFS host controller
  2241. * initialization process
  2242. * 2. Set UTRLRSR and UTMRLRSR bits to 1
  2243. * 3. Change the internal driver state to operational
  2244. * 4. Unblock SCSI requests from SCSI midlayer
  2245. */
  2246. return -ENOSYS;
  2247. }
  2248. EXPORT_SYMBOL_GPL(ufshcd_resume);
  2249. int ufshcd_runtime_suspend(struct ufs_hba *hba)
  2250. {
  2251. if (!hba)
  2252. return 0;
  2253. /*
  2254. * The device is idle with no requests in the queue,
  2255. * allow background operations.
  2256. */
  2257. return ufshcd_enable_auto_bkops(hba);
  2258. }
  2259. EXPORT_SYMBOL(ufshcd_runtime_suspend);
  2260. int ufshcd_runtime_resume(struct ufs_hba *hba)
  2261. {
  2262. if (!hba)
  2263. return 0;
  2264. return ufshcd_disable_auto_bkops(hba);
  2265. }
  2266. EXPORT_SYMBOL(ufshcd_runtime_resume);
  2267. int ufshcd_runtime_idle(struct ufs_hba *hba)
  2268. {
  2269. return 0;
  2270. }
  2271. EXPORT_SYMBOL(ufshcd_runtime_idle);
  2272. /**
  2273. * ufshcd_remove - de-allocate SCSI host and host memory space
  2274. * data structure memory
  2275. * @hba - per adapter instance
  2276. */
  2277. void ufshcd_remove(struct ufs_hba *hba)
  2278. {
  2279. scsi_remove_host(hba->host);
  2280. /* disable interrupts */
  2281. ufshcd_disable_intr(hba, hba->intr_mask);
  2282. ufshcd_hba_stop(hba);
  2283. scsi_host_put(hba->host);
  2284. }
  2285. EXPORT_SYMBOL_GPL(ufshcd_remove);
  2286. /**
  2287. * ufshcd_init - Driver initialization routine
  2288. * @dev: pointer to device handle
  2289. * @hba_handle: driver private handle
  2290. * @mmio_base: base register address
  2291. * @irq: Interrupt line of device
  2292. * Returns 0 on success, non-zero value on failure
  2293. */
  2294. int ufshcd_init(struct device *dev, struct ufs_hba **hba_handle,
  2295. void __iomem *mmio_base, unsigned int irq)
  2296. {
  2297. struct Scsi_Host *host;
  2298. struct ufs_hba *hba;
  2299. int err;
  2300. if (!dev) {
  2301. dev_err(dev,
  2302. "Invalid memory reference for dev is NULL\n");
  2303. err = -ENODEV;
  2304. goto out_error;
  2305. }
  2306. if (!mmio_base) {
  2307. dev_err(dev,
  2308. "Invalid memory reference for mmio_base is NULL\n");
  2309. err = -ENODEV;
  2310. goto out_error;
  2311. }
  2312. host = scsi_host_alloc(&ufshcd_driver_template,
  2313. sizeof(struct ufs_hba));
  2314. if (!host) {
  2315. dev_err(dev, "scsi_host_alloc failed\n");
  2316. err = -ENOMEM;
  2317. goto out_error;
  2318. }
  2319. hba = shost_priv(host);
  2320. hba->host = host;
  2321. hba->dev = dev;
  2322. hba->mmio_base = mmio_base;
  2323. hba->irq = irq;
  2324. /* Read capabilities registers */
  2325. ufshcd_hba_capabilities(hba);
  2326. /* Get UFS version supported by the controller */
  2327. hba->ufs_version = ufshcd_get_ufs_version(hba);
  2328. /* Get Interrupt bit mask per version */
  2329. hba->intr_mask = ufshcd_get_intr_mask(hba);
  2330. /* Allocate memory for host memory space */
  2331. err = ufshcd_memory_alloc(hba);
  2332. if (err) {
  2333. dev_err(hba->dev, "Memory allocation failed\n");
  2334. goto out_disable;
  2335. }
  2336. /* Configure LRB */
  2337. ufshcd_host_memory_configure(hba);
  2338. host->can_queue = hba->nutrs;
  2339. host->cmd_per_lun = hba->nutrs;
  2340. host->max_id = UFSHCD_MAX_ID;
  2341. host->max_lun = UFSHCD_MAX_LUNS;
  2342. host->max_channel = UFSHCD_MAX_CHANNEL;
  2343. host->unique_id = host->host_no;
  2344. host->max_cmd_len = MAX_CDB_SIZE;
  2345. /* Initailize wait queue for task management */
  2346. init_waitqueue_head(&hba->ufshcd_tm_wait_queue);
  2347. /* Initialize work queues */
  2348. INIT_WORK(&hba->feh_workq, ufshcd_fatal_err_handler);
  2349. INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
  2350. /* Initialize UIC command mutex */
  2351. mutex_init(&hba->uic_cmd_mutex);
  2352. /* Initialize mutex for device management commands */
  2353. mutex_init(&hba->dev_cmd.lock);
  2354. /* Initialize device management tag acquire wait queue */
  2355. init_waitqueue_head(&hba->dev_cmd.tag_wq);
  2356. /* IRQ registration */
  2357. err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
  2358. if (err) {
  2359. dev_err(hba->dev, "request irq failed\n");
  2360. goto out_disable;
  2361. }
  2362. /* Enable SCSI tag mapping */
  2363. err = scsi_init_shared_tag_map(host, host->can_queue);
  2364. if (err) {
  2365. dev_err(hba->dev, "init shared queue failed\n");
  2366. goto out_disable;
  2367. }
  2368. err = scsi_add_host(host, hba->dev);
  2369. if (err) {
  2370. dev_err(hba->dev, "scsi_add_host failed\n");
  2371. goto out_disable;
  2372. }
  2373. /* Host controller enable */
  2374. err = ufshcd_hba_enable(hba);
  2375. if (err) {
  2376. dev_err(hba->dev, "Host controller enable failed\n");
  2377. goto out_remove_scsi_host;
  2378. }
  2379. *hba_handle = hba;
  2380. /* Hold auto suspend until async scan completes */
  2381. pm_runtime_get_sync(dev);
  2382. async_schedule(ufshcd_async_scan, hba);
  2383. return 0;
  2384. out_remove_scsi_host:
  2385. scsi_remove_host(hba->host);
  2386. out_disable:
  2387. scsi_host_put(host);
  2388. out_error:
  2389. return err;
  2390. }
  2391. EXPORT_SYMBOL_GPL(ufshcd_init);
  2392. MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
  2393. MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
  2394. MODULE_DESCRIPTION("Generic UFS host controller driver Core");
  2395. MODULE_LICENSE("GPL");
  2396. MODULE_VERSION(UFSHCD_DRIVER_VERSION);