spear1310.dtsi 5.0 KB

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  1. /*
  2. * DTS file for all SPEAr1310 SoCs
  3. *
  4. * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "spear13xx.dtsi"
  14. / {
  15. compatible = "st,spear1310";
  16. ahb {
  17. spics: spics@e0700000{
  18. compatible = "st,spear-spics-gpio";
  19. reg = <0xe0700000 0x1000>;
  20. st-spics,peripcfg-reg = <0x3b0>;
  21. st-spics,sw-enable-bit = <12>;
  22. st-spics,cs-value-bit = <11>;
  23. st-spics,cs-enable-mask = <3>;
  24. st-spics,cs-enable-shift = <8>;
  25. gpio-controller;
  26. #gpio-cells = <2>;
  27. };
  28. ahci@b1000000 {
  29. compatible = "snps,spear-ahci";
  30. reg = <0xb1000000 0x10000>;
  31. interrupts = <0 68 0x4>;
  32. status = "disabled";
  33. };
  34. ahci@b1800000 {
  35. compatible = "snps,spear-ahci";
  36. reg = <0xb1800000 0x10000>;
  37. interrupts = <0 69 0x4>;
  38. status = "disabled";
  39. };
  40. ahci@b4000000 {
  41. compatible = "snps,spear-ahci";
  42. reg = <0xb4000000 0x10000>;
  43. interrupts = <0 70 0x4>;
  44. status = "disabled";
  45. };
  46. gmac1: eth@5c400000 {
  47. compatible = "st,spear600-gmac";
  48. reg = <0x5c400000 0x8000>;
  49. interrupts = <0 95 0x4>;
  50. interrupt-names = "macirq";
  51. status = "disabled";
  52. };
  53. gmac2: eth@5c500000 {
  54. compatible = "st,spear600-gmac";
  55. reg = <0x5c500000 0x8000>;
  56. interrupts = <0 96 0x4>;
  57. interrupt-names = "macirq";
  58. status = "disabled";
  59. };
  60. gmac3: eth@5c600000 {
  61. compatible = "st,spear600-gmac";
  62. reg = <0x5c600000 0x8000>;
  63. interrupts = <0 97 0x4>;
  64. interrupt-names = "macirq";
  65. status = "disabled";
  66. };
  67. gmac4: eth@5c700000 {
  68. compatible = "st,spear600-gmac";
  69. reg = <0x5c700000 0x8000>;
  70. interrupts = <0 98 0x4>;
  71. interrupt-names = "macirq";
  72. status = "disabled";
  73. };
  74. pinmux: pinmux@e0700000 {
  75. compatible = "st,spear1310-pinmux";
  76. reg = <0xe0700000 0x1000>;
  77. #gpio-range-cells = <2>;
  78. };
  79. spi1: spi@5d400000 {
  80. compatible = "arm,pl022", "arm,primecell";
  81. reg = <0x5d400000 0x1000>;
  82. interrupts = <0 99 0x4>;
  83. status = "disabled";
  84. };
  85. apb {
  86. i2c1: i2c@5cd00000 {
  87. #address-cells = <1>;
  88. #size-cells = <0>;
  89. compatible = "snps,designware-i2c";
  90. reg = <0x5cd00000 0x1000>;
  91. interrupts = <0 87 0x4>;
  92. status = "disabled";
  93. };
  94. i2c2: i2c@5ce00000 {
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. compatible = "snps,designware-i2c";
  98. reg = <0x5ce00000 0x1000>;
  99. interrupts = <0 88 0x4>;
  100. status = "disabled";
  101. };
  102. i2c3: i2c@5cf00000 {
  103. #address-cells = <1>;
  104. #size-cells = <0>;
  105. compatible = "snps,designware-i2c";
  106. reg = <0x5cf00000 0x1000>;
  107. interrupts = <0 89 0x4>;
  108. status = "disabled";
  109. };
  110. i2c4: i2c@5d000000 {
  111. #address-cells = <1>;
  112. #size-cells = <0>;
  113. compatible = "snps,designware-i2c";
  114. reg = <0x5d000000 0x1000>;
  115. interrupts = <0 90 0x4>;
  116. status = "disabled";
  117. };
  118. i2c5: i2c@5d100000 {
  119. #address-cells = <1>;
  120. #size-cells = <0>;
  121. compatible = "snps,designware-i2c";
  122. reg = <0x5d100000 0x1000>;
  123. interrupts = <0 91 0x4>;
  124. status = "disabled";
  125. };
  126. i2c6: i2c@5d200000 {
  127. #address-cells = <1>;
  128. #size-cells = <0>;
  129. compatible = "snps,designware-i2c";
  130. reg = <0x5d200000 0x1000>;
  131. interrupts = <0 92 0x4>;
  132. status = "disabled";
  133. };
  134. i2c7: i2c@5d300000 {
  135. #address-cells = <1>;
  136. #size-cells = <0>;
  137. compatible = "snps,designware-i2c";
  138. reg = <0x5d300000 0x1000>;
  139. interrupts = <0 93 0x4>;
  140. status = "disabled";
  141. };
  142. serial@5c800000 {
  143. compatible = "arm,pl011", "arm,primecell";
  144. reg = <0x5c800000 0x1000>;
  145. interrupts = <0 82 0x4>;
  146. status = "disabled";
  147. };
  148. serial@5c900000 {
  149. compatible = "arm,pl011", "arm,primecell";
  150. reg = <0x5c900000 0x1000>;
  151. interrupts = <0 83 0x4>;
  152. status = "disabled";
  153. };
  154. serial@5ca00000 {
  155. compatible = "arm,pl011", "arm,primecell";
  156. reg = <0x5ca00000 0x1000>;
  157. interrupts = <0 84 0x4>;
  158. status = "disabled";
  159. };
  160. serial@5cb00000 {
  161. compatible = "arm,pl011", "arm,primecell";
  162. reg = <0x5cb00000 0x1000>;
  163. interrupts = <0 85 0x4>;
  164. status = "disabled";
  165. };
  166. serial@5cc00000 {
  167. compatible = "arm,pl011", "arm,primecell";
  168. reg = <0x5cc00000 0x1000>;
  169. interrupts = <0 86 0x4>;
  170. status = "disabled";
  171. };
  172. thermal@e07008c4 {
  173. st,thermal-flags = <0x7000>;
  174. };
  175. gpiopinctrl: gpio@d8400000 {
  176. compatible = "st,spear-plgpio";
  177. reg = <0xd8400000 0x1000>;
  178. interrupts = <0 100 0x4>;
  179. #interrupt-cells = <1>;
  180. interrupt-controller;
  181. gpio-controller;
  182. #gpio-cells = <2>;
  183. gpio-ranges = <&pinmux 0 246>;
  184. status = "disabled";
  185. st-plgpio,ngpio = <246>;
  186. st-plgpio,enb-reg = <0xd0>;
  187. st-plgpio,wdata-reg = <0x90>;
  188. st-plgpio,dir-reg = <0xb0>;
  189. st-plgpio,ie-reg = <0x30>;
  190. st-plgpio,rdata-reg = <0x70>;
  191. st-plgpio,mis-reg = <0x10>;
  192. st-plgpio,eit-reg = <0x50>;
  193. };
  194. };
  195. };
  196. };