mmu_decl.h 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687
  1. /*
  2. * Declarations of procedures and variables shared between files
  3. * in arch/ppc/mm/.
  4. *
  5. * Derived from arch/ppc/mm/init.c:
  6. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  7. *
  8. * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  9. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  10. * Copyright (C) 1996 Paul Mackerras
  11. * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
  12. *
  13. * Derived from "arch/i386/mm/init.c"
  14. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License
  18. * as published by the Free Software Foundation; either version
  19. * 2 of the License, or (at your option) any later version.
  20. *
  21. */
  22. #include <asm/tlbflush.h>
  23. #include <asm/mmu.h>
  24. extern void mapin_ram(void);
  25. extern int map_page(unsigned long va, phys_addr_t pa, int flags);
  26. extern void setbat(int index, unsigned long virt, unsigned long phys,
  27. unsigned int size, int flags);
  28. extern void reserve_phys_mem(unsigned long start, unsigned long size);
  29. extern void settlbcam(int index, unsigned long virt, phys_addr_t phys,
  30. unsigned int size, int flags, unsigned int pid);
  31. extern void invalidate_tlbcam_entry(int index);
  32. extern int __map_without_bats;
  33. extern unsigned long ioremap_base;
  34. extern unsigned long ioremap_bot;
  35. extern unsigned int rtas_data, rtas_size;
  36. extern unsigned long __max_low_memory;
  37. extern unsigned long __initial_memory_limit;
  38. extern unsigned long total_memory;
  39. extern unsigned long total_lowmem;
  40. extern int mem_init_done;
  41. extern PTE *Hash, *Hash_end;
  42. extern unsigned long Hash_size, Hash_mask;
  43. extern unsigned int num_tlbcam_entries;
  44. /* ...and now those things that may be slightly different between processor
  45. * architectures. -- Dan
  46. */
  47. #if defined(CONFIG_8xx)
  48. #define flush_HPTE(X, va, pg) _tlbie(va)
  49. #define MMU_init_hw() do { } while(0)
  50. #define mmu_mapin_ram() (0UL)
  51. #elif defined(CONFIG_4xx)
  52. #define flush_HPTE(X, va, pg) _tlbie(va)
  53. extern void MMU_init_hw(void);
  54. extern unsigned long mmu_mapin_ram(void);
  55. #elif defined(CONFIG_FSL_BOOKE)
  56. #define flush_HPTE(X, va, pg) _tlbie(va)
  57. extern void MMU_init_hw(void);
  58. extern unsigned long mmu_mapin_ram(void);
  59. extern void adjust_total_lowmem(void);
  60. #else
  61. /* anything except 4xx or 8xx */
  62. extern void MMU_init_hw(void);
  63. extern unsigned long mmu_mapin_ram(void);
  64. /* Be careful....this needs to be updated if we ever encounter 603 SMPs,
  65. * which includes all new 82xx processors. We need tlbie/tlbsync here
  66. * in that case (I think). -- Dan.
  67. */
  68. static inline void flush_HPTE(unsigned context, unsigned long va,
  69. unsigned long pdval)
  70. {
  71. if ((Hash != 0) &&
  72. cpu_has_feature(CPU_FTR_HPTE_TABLE))
  73. flush_hash_pages(0, va, pdval, 1);
  74. else
  75. _tlbie(va);
  76. }
  77. #endif