i2s.c 26 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186
  1. /* sound/soc/samsung/i2s.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6. * Jaswinder Singh <jassisinghbrar@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/slab.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/pm_runtime.h>
  18. #include <sound/soc.h>
  19. #include <sound/pcm_params.h>
  20. #include <linux/platform_data/asoc-s3c.h>
  21. #include "dma.h"
  22. #include "idma.h"
  23. #include "i2s.h"
  24. #include "i2s-regs.h"
  25. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  26. enum samsung_dai_type {
  27. TYPE_PRI,
  28. TYPE_SEC,
  29. };
  30. struct i2s_dai {
  31. /* Platform device for this DAI */
  32. struct platform_device *pdev;
  33. /* IOREMAP'd SFRs */
  34. void __iomem *addr;
  35. /* Physical base address of SFRs */
  36. u32 base;
  37. /* Rate of RCLK source clock */
  38. unsigned long rclk_srcrate;
  39. /* Frame Clock */
  40. unsigned frmclk;
  41. /*
  42. * Specifically requested RCLK,BCLK by MACHINE Driver.
  43. * 0 indicates CPU driver is free to choose any value.
  44. */
  45. unsigned rfs, bfs;
  46. /* I2S Controller's core clock */
  47. struct clk *clk;
  48. /* Clock for generating I2S signals */
  49. struct clk *op_clk;
  50. /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  51. struct i2s_dai *pri_dai;
  52. /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  53. struct i2s_dai *sec_dai;
  54. #define DAI_OPENED (1 << 0) /* Dai is opened */
  55. #define DAI_MANAGER (1 << 1) /* Dai is the manager */
  56. unsigned mode;
  57. /* Driver for this DAI */
  58. struct snd_soc_dai_driver i2s_dai_drv;
  59. /* DMA parameters */
  60. struct s3c_dma_params dma_playback;
  61. struct s3c_dma_params dma_capture;
  62. struct s3c_dma_params idma_playback;
  63. u32 quirks;
  64. u32 suspend_i2smod;
  65. u32 suspend_i2scon;
  66. u32 suspend_i2spsr;
  67. };
  68. /* Lock for cross i/f checks */
  69. static DEFINE_SPINLOCK(lock);
  70. /* If this is the 'overlay' stereo DAI */
  71. static inline bool is_secondary(struct i2s_dai *i2s)
  72. {
  73. return i2s->pri_dai ? true : false;
  74. }
  75. /* If operating in SoC-Slave mode */
  76. static inline bool is_slave(struct i2s_dai *i2s)
  77. {
  78. return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
  79. }
  80. /* If this interface of the controller is transmitting data */
  81. static inline bool tx_active(struct i2s_dai *i2s)
  82. {
  83. u32 active;
  84. if (!i2s)
  85. return false;
  86. active = readl(i2s->addr + I2SCON);
  87. if (is_secondary(i2s))
  88. active &= CON_TXSDMA_ACTIVE;
  89. else
  90. active &= CON_TXDMA_ACTIVE;
  91. return active ? true : false;
  92. }
  93. /* If the other interface of the controller is transmitting data */
  94. static inline bool other_tx_active(struct i2s_dai *i2s)
  95. {
  96. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  97. return tx_active(other);
  98. }
  99. /* If any interface of the controller is transmitting data */
  100. static inline bool any_tx_active(struct i2s_dai *i2s)
  101. {
  102. return tx_active(i2s) || other_tx_active(i2s);
  103. }
  104. /* If this interface of the controller is receiving data */
  105. static inline bool rx_active(struct i2s_dai *i2s)
  106. {
  107. u32 active;
  108. if (!i2s)
  109. return false;
  110. active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
  111. return active ? true : false;
  112. }
  113. /* If the other interface of the controller is receiving data */
  114. static inline bool other_rx_active(struct i2s_dai *i2s)
  115. {
  116. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  117. return rx_active(other);
  118. }
  119. /* If any interface of the controller is receiving data */
  120. static inline bool any_rx_active(struct i2s_dai *i2s)
  121. {
  122. return rx_active(i2s) || other_rx_active(i2s);
  123. }
  124. /* If the other DAI is transmitting or receiving data */
  125. static inline bool other_active(struct i2s_dai *i2s)
  126. {
  127. return other_rx_active(i2s) || other_tx_active(i2s);
  128. }
  129. /* If this DAI is transmitting or receiving data */
  130. static inline bool this_active(struct i2s_dai *i2s)
  131. {
  132. return tx_active(i2s) || rx_active(i2s);
  133. }
  134. /* If the controller is active anyway */
  135. static inline bool any_active(struct i2s_dai *i2s)
  136. {
  137. return this_active(i2s) || other_active(i2s);
  138. }
  139. static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
  140. {
  141. return snd_soc_dai_get_drvdata(dai);
  142. }
  143. static inline bool is_opened(struct i2s_dai *i2s)
  144. {
  145. if (i2s && (i2s->mode & DAI_OPENED))
  146. return true;
  147. else
  148. return false;
  149. }
  150. static inline bool is_manager(struct i2s_dai *i2s)
  151. {
  152. if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
  153. return true;
  154. else
  155. return false;
  156. }
  157. /* Read RCLK of I2S (in multiples of LRCLK) */
  158. static inline unsigned get_rfs(struct i2s_dai *i2s)
  159. {
  160. u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3;
  161. switch (rfs) {
  162. case 3: return 768;
  163. case 2: return 384;
  164. case 1: return 512;
  165. default: return 256;
  166. }
  167. }
  168. /* Write RCLK of I2S (in multiples of LRCLK) */
  169. static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
  170. {
  171. u32 mod = readl(i2s->addr + I2SMOD);
  172. mod &= ~MOD_RCLK_MASK;
  173. switch (rfs) {
  174. case 768:
  175. mod |= MOD_RCLK_768FS;
  176. break;
  177. case 512:
  178. mod |= MOD_RCLK_512FS;
  179. break;
  180. case 384:
  181. mod |= MOD_RCLK_384FS;
  182. break;
  183. default:
  184. mod |= MOD_RCLK_256FS;
  185. break;
  186. }
  187. writel(mod, i2s->addr + I2SMOD);
  188. }
  189. /* Read Bit-Clock of I2S (in multiples of LRCLK) */
  190. static inline unsigned get_bfs(struct i2s_dai *i2s)
  191. {
  192. u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3;
  193. switch (bfs) {
  194. case 3: return 24;
  195. case 2: return 16;
  196. case 1: return 48;
  197. default: return 32;
  198. }
  199. }
  200. /* Write Bit-Clock of I2S (in multiples of LRCLK) */
  201. static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
  202. {
  203. u32 mod = readl(i2s->addr + I2SMOD);
  204. mod &= ~MOD_BCLK_MASK;
  205. switch (bfs) {
  206. case 48:
  207. mod |= MOD_BCLK_48FS;
  208. break;
  209. case 32:
  210. mod |= MOD_BCLK_32FS;
  211. break;
  212. case 24:
  213. mod |= MOD_BCLK_24FS;
  214. break;
  215. case 16:
  216. mod |= MOD_BCLK_16FS;
  217. break;
  218. default:
  219. dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
  220. return;
  221. }
  222. writel(mod, i2s->addr + I2SMOD);
  223. }
  224. /* Sample-Size */
  225. static inline int get_blc(struct i2s_dai *i2s)
  226. {
  227. int blc = readl(i2s->addr + I2SMOD);
  228. blc = (blc >> 13) & 0x3;
  229. switch (blc) {
  230. case 2: return 24;
  231. case 1: return 8;
  232. default: return 16;
  233. }
  234. }
  235. /* TX Channel Control */
  236. static void i2s_txctrl(struct i2s_dai *i2s, int on)
  237. {
  238. void __iomem *addr = i2s->addr;
  239. u32 con = readl(addr + I2SCON);
  240. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  241. if (on) {
  242. con |= CON_ACTIVE;
  243. con &= ~CON_TXCH_PAUSE;
  244. if (is_secondary(i2s)) {
  245. con |= CON_TXSDMA_ACTIVE;
  246. con &= ~CON_TXSDMA_PAUSE;
  247. } else {
  248. con |= CON_TXDMA_ACTIVE;
  249. con &= ~CON_TXDMA_PAUSE;
  250. }
  251. if (any_rx_active(i2s))
  252. mod |= MOD_TXRX;
  253. else
  254. mod |= MOD_TXONLY;
  255. } else {
  256. if (is_secondary(i2s)) {
  257. con |= CON_TXSDMA_PAUSE;
  258. con &= ~CON_TXSDMA_ACTIVE;
  259. } else {
  260. con |= CON_TXDMA_PAUSE;
  261. con &= ~CON_TXDMA_ACTIVE;
  262. }
  263. if (other_tx_active(i2s)) {
  264. writel(con, addr + I2SCON);
  265. return;
  266. }
  267. con |= CON_TXCH_PAUSE;
  268. if (any_rx_active(i2s))
  269. mod |= MOD_RXONLY;
  270. else
  271. con &= ~CON_ACTIVE;
  272. }
  273. writel(mod, addr + I2SMOD);
  274. writel(con, addr + I2SCON);
  275. }
  276. /* RX Channel Control */
  277. static void i2s_rxctrl(struct i2s_dai *i2s, int on)
  278. {
  279. void __iomem *addr = i2s->addr;
  280. u32 con = readl(addr + I2SCON);
  281. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  282. if (on) {
  283. con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
  284. con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
  285. if (any_tx_active(i2s))
  286. mod |= MOD_TXRX;
  287. else
  288. mod |= MOD_RXONLY;
  289. } else {
  290. con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
  291. con &= ~CON_RXDMA_ACTIVE;
  292. if (any_tx_active(i2s))
  293. mod |= MOD_TXONLY;
  294. else
  295. con &= ~CON_ACTIVE;
  296. }
  297. writel(mod, addr + I2SMOD);
  298. writel(con, addr + I2SCON);
  299. }
  300. /* Flush FIFO of an interface */
  301. static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
  302. {
  303. void __iomem *fic;
  304. u32 val;
  305. if (!i2s)
  306. return;
  307. if (is_secondary(i2s))
  308. fic = i2s->addr + I2SFICS;
  309. else
  310. fic = i2s->addr + I2SFIC;
  311. /* Flush the FIFO */
  312. writel(readl(fic) | flush, fic);
  313. /* Be patient */
  314. val = msecs_to_loops(1) / 1000; /* 1 usec */
  315. while (--val)
  316. cpu_relax();
  317. writel(readl(fic) & ~flush, fic);
  318. }
  319. static int i2s_set_sysclk(struct snd_soc_dai *dai,
  320. int clk_id, unsigned int rfs, int dir)
  321. {
  322. struct i2s_dai *i2s = to_info(dai);
  323. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  324. u32 mod = readl(i2s->addr + I2SMOD);
  325. switch (clk_id) {
  326. case SAMSUNG_I2S_CDCLK:
  327. /* Shouldn't matter in GATING(CLOCK_IN) mode */
  328. if (dir == SND_SOC_CLOCK_IN)
  329. rfs = 0;
  330. if ((rfs && other->rfs && (other->rfs != rfs)) ||
  331. (any_active(i2s) &&
  332. (((dir == SND_SOC_CLOCK_IN)
  333. && !(mod & MOD_CDCLKCON)) ||
  334. ((dir == SND_SOC_CLOCK_OUT)
  335. && (mod & MOD_CDCLKCON))))) {
  336. dev_err(&i2s->pdev->dev,
  337. "%s:%d Other DAI busy\n", __func__, __LINE__);
  338. return -EAGAIN;
  339. }
  340. if (dir == SND_SOC_CLOCK_IN)
  341. mod |= MOD_CDCLKCON;
  342. else
  343. mod &= ~MOD_CDCLKCON;
  344. i2s->rfs = rfs;
  345. break;
  346. case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
  347. case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
  348. if ((i2s->quirks & QUIRK_NO_MUXPSR)
  349. || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
  350. clk_id = 0;
  351. else
  352. clk_id = 1;
  353. if (!any_active(i2s)) {
  354. if (i2s->op_clk) {
  355. if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
  356. (!clk_id && (mod & MOD_IMS_SYSMUX))) {
  357. clk_disable_unprepare(i2s->op_clk);
  358. clk_put(i2s->op_clk);
  359. } else {
  360. i2s->rclk_srcrate =
  361. clk_get_rate(i2s->op_clk);
  362. return 0;
  363. }
  364. }
  365. if (clk_id)
  366. i2s->op_clk = clk_get(&i2s->pdev->dev,
  367. "i2s_opclk1");
  368. else
  369. i2s->op_clk = clk_get(&i2s->pdev->dev,
  370. "i2s_opclk0");
  371. clk_prepare_enable(i2s->op_clk);
  372. i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
  373. /* Over-ride the other's */
  374. if (other) {
  375. other->op_clk = i2s->op_clk;
  376. other->rclk_srcrate = i2s->rclk_srcrate;
  377. }
  378. } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
  379. || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
  380. dev_err(&i2s->pdev->dev,
  381. "%s:%d Other DAI busy\n", __func__, __LINE__);
  382. return -EAGAIN;
  383. } else {
  384. /* Call can't be on the active DAI */
  385. i2s->op_clk = other->op_clk;
  386. i2s->rclk_srcrate = other->rclk_srcrate;
  387. return 0;
  388. }
  389. if (clk_id == 0)
  390. mod &= ~MOD_IMS_SYSMUX;
  391. else
  392. mod |= MOD_IMS_SYSMUX;
  393. break;
  394. default:
  395. dev_err(&i2s->pdev->dev, "We don't serve that!\n");
  396. return -EINVAL;
  397. }
  398. writel(mod, i2s->addr + I2SMOD);
  399. return 0;
  400. }
  401. static int i2s_set_fmt(struct snd_soc_dai *dai,
  402. unsigned int fmt)
  403. {
  404. struct i2s_dai *i2s = to_info(dai);
  405. u32 mod = readl(i2s->addr + I2SMOD);
  406. u32 tmp = 0;
  407. /* Format is priority */
  408. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  409. case SND_SOC_DAIFMT_RIGHT_J:
  410. tmp |= MOD_LR_RLOW;
  411. tmp |= MOD_SDF_MSB;
  412. break;
  413. case SND_SOC_DAIFMT_LEFT_J:
  414. tmp |= MOD_LR_RLOW;
  415. tmp |= MOD_SDF_LSB;
  416. break;
  417. case SND_SOC_DAIFMT_I2S:
  418. tmp |= MOD_SDF_IIS;
  419. break;
  420. default:
  421. dev_err(&i2s->pdev->dev, "Format not supported\n");
  422. return -EINVAL;
  423. }
  424. /*
  425. * INV flag is relative to the FORMAT flag - if set it simply
  426. * flips the polarity specified by the Standard
  427. */
  428. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  429. case SND_SOC_DAIFMT_NB_NF:
  430. break;
  431. case SND_SOC_DAIFMT_NB_IF:
  432. if (tmp & MOD_LR_RLOW)
  433. tmp &= ~MOD_LR_RLOW;
  434. else
  435. tmp |= MOD_LR_RLOW;
  436. break;
  437. default:
  438. dev_err(&i2s->pdev->dev, "Polarity not supported\n");
  439. return -EINVAL;
  440. }
  441. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  442. case SND_SOC_DAIFMT_CBM_CFM:
  443. tmp |= MOD_SLAVE;
  444. break;
  445. case SND_SOC_DAIFMT_CBS_CFS:
  446. /* Set default source clock in Master mode */
  447. if (i2s->rclk_srcrate == 0)
  448. i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
  449. 0, SND_SOC_CLOCK_IN);
  450. break;
  451. default:
  452. dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
  453. return -EINVAL;
  454. }
  455. if (any_active(i2s) &&
  456. ((mod & (MOD_SDF_MASK | MOD_LR_RLOW
  457. | MOD_SLAVE)) != tmp)) {
  458. dev_err(&i2s->pdev->dev,
  459. "%s:%d Other DAI busy\n", __func__, __LINE__);
  460. return -EAGAIN;
  461. }
  462. mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE);
  463. mod |= tmp;
  464. writel(mod, i2s->addr + I2SMOD);
  465. return 0;
  466. }
  467. static int i2s_hw_params(struct snd_pcm_substream *substream,
  468. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  469. {
  470. struct i2s_dai *i2s = to_info(dai);
  471. u32 mod = readl(i2s->addr + I2SMOD);
  472. if (!is_secondary(i2s))
  473. mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
  474. switch (params_channels(params)) {
  475. case 6:
  476. mod |= MOD_DC2_EN;
  477. case 4:
  478. mod |= MOD_DC1_EN;
  479. break;
  480. case 2:
  481. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  482. i2s->dma_playback.dma_size = 4;
  483. else
  484. i2s->dma_capture.dma_size = 4;
  485. break;
  486. case 1:
  487. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  488. i2s->dma_playback.dma_size = 2;
  489. else
  490. i2s->dma_capture.dma_size = 2;
  491. break;
  492. default:
  493. dev_err(&i2s->pdev->dev, "%d channels not supported\n",
  494. params_channels(params));
  495. return -EINVAL;
  496. }
  497. if (is_secondary(i2s))
  498. mod &= ~MOD_BLCS_MASK;
  499. else
  500. mod &= ~MOD_BLCP_MASK;
  501. if (is_manager(i2s))
  502. mod &= ~MOD_BLC_MASK;
  503. switch (params_format(params)) {
  504. case SNDRV_PCM_FORMAT_S8:
  505. if (is_secondary(i2s))
  506. mod |= MOD_BLCS_8BIT;
  507. else
  508. mod |= MOD_BLCP_8BIT;
  509. if (is_manager(i2s))
  510. mod |= MOD_BLC_8BIT;
  511. break;
  512. case SNDRV_PCM_FORMAT_S16_LE:
  513. if (is_secondary(i2s))
  514. mod |= MOD_BLCS_16BIT;
  515. else
  516. mod |= MOD_BLCP_16BIT;
  517. if (is_manager(i2s))
  518. mod |= MOD_BLC_16BIT;
  519. break;
  520. case SNDRV_PCM_FORMAT_S24_LE:
  521. if (is_secondary(i2s))
  522. mod |= MOD_BLCS_24BIT;
  523. else
  524. mod |= MOD_BLCP_24BIT;
  525. if (is_manager(i2s))
  526. mod |= MOD_BLC_24BIT;
  527. break;
  528. default:
  529. dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
  530. params_format(params));
  531. return -EINVAL;
  532. }
  533. writel(mod, i2s->addr + I2SMOD);
  534. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  535. snd_soc_dai_set_dma_data(dai, substream,
  536. (void *)&i2s->dma_playback);
  537. else
  538. snd_soc_dai_set_dma_data(dai, substream,
  539. (void *)&i2s->dma_capture);
  540. i2s->frmclk = params_rate(params);
  541. return 0;
  542. }
  543. /* We set constraints on the substream acc to the version of I2S */
  544. static int i2s_startup(struct snd_pcm_substream *substream,
  545. struct snd_soc_dai *dai)
  546. {
  547. struct i2s_dai *i2s = to_info(dai);
  548. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  549. unsigned long flags;
  550. spin_lock_irqsave(&lock, flags);
  551. i2s->mode |= DAI_OPENED;
  552. if (is_manager(other))
  553. i2s->mode &= ~DAI_MANAGER;
  554. else
  555. i2s->mode |= DAI_MANAGER;
  556. /* Enforce set_sysclk in Master mode */
  557. i2s->rclk_srcrate = 0;
  558. spin_unlock_irqrestore(&lock, flags);
  559. return 0;
  560. }
  561. static void i2s_shutdown(struct snd_pcm_substream *substream,
  562. struct snd_soc_dai *dai)
  563. {
  564. struct i2s_dai *i2s = to_info(dai);
  565. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  566. unsigned long flags;
  567. spin_lock_irqsave(&lock, flags);
  568. i2s->mode &= ~DAI_OPENED;
  569. i2s->mode &= ~DAI_MANAGER;
  570. if (is_opened(other))
  571. other->mode |= DAI_MANAGER;
  572. /* Reset any constraint on RFS and BFS */
  573. i2s->rfs = 0;
  574. i2s->bfs = 0;
  575. spin_unlock_irqrestore(&lock, flags);
  576. /* Gate CDCLK by default */
  577. if (!is_opened(other))
  578. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  579. 0, SND_SOC_CLOCK_IN);
  580. }
  581. static int config_setup(struct i2s_dai *i2s)
  582. {
  583. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  584. unsigned rfs, bfs, blc;
  585. u32 psr;
  586. blc = get_blc(i2s);
  587. bfs = i2s->bfs;
  588. if (!bfs && other)
  589. bfs = other->bfs;
  590. /* Select least possible multiple(2) if no constraint set */
  591. if (!bfs)
  592. bfs = blc * 2;
  593. rfs = i2s->rfs;
  594. if (!rfs && other)
  595. rfs = other->rfs;
  596. if ((rfs == 256 || rfs == 512) && (blc == 24)) {
  597. dev_err(&i2s->pdev->dev,
  598. "%d-RFS not supported for 24-blc\n", rfs);
  599. return -EINVAL;
  600. }
  601. if (!rfs) {
  602. if (bfs == 16 || bfs == 32)
  603. rfs = 256;
  604. else
  605. rfs = 384;
  606. }
  607. /* If already setup and running */
  608. if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
  609. dev_err(&i2s->pdev->dev,
  610. "%s:%d Other DAI busy\n", __func__, __LINE__);
  611. return -EAGAIN;
  612. }
  613. /* Don't bother RFS, BFS & PSR in Slave mode */
  614. if (is_slave(i2s))
  615. return 0;
  616. set_bfs(i2s, bfs);
  617. set_rfs(i2s, rfs);
  618. if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
  619. psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
  620. writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
  621. dev_dbg(&i2s->pdev->dev,
  622. "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
  623. i2s->rclk_srcrate, psr, rfs, bfs);
  624. }
  625. return 0;
  626. }
  627. static int i2s_trigger(struct snd_pcm_substream *substream,
  628. int cmd, struct snd_soc_dai *dai)
  629. {
  630. int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
  631. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  632. struct i2s_dai *i2s = to_info(rtd->cpu_dai);
  633. unsigned long flags;
  634. switch (cmd) {
  635. case SNDRV_PCM_TRIGGER_START:
  636. case SNDRV_PCM_TRIGGER_RESUME:
  637. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  638. local_irq_save(flags);
  639. if (config_setup(i2s)) {
  640. local_irq_restore(flags);
  641. return -EINVAL;
  642. }
  643. if (capture)
  644. i2s_rxctrl(i2s, 1);
  645. else
  646. i2s_txctrl(i2s, 1);
  647. local_irq_restore(flags);
  648. break;
  649. case SNDRV_PCM_TRIGGER_STOP:
  650. case SNDRV_PCM_TRIGGER_SUSPEND:
  651. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  652. local_irq_save(flags);
  653. if (capture) {
  654. i2s_rxctrl(i2s, 0);
  655. i2s_fifo(i2s, FIC_RXFLUSH);
  656. } else {
  657. i2s_txctrl(i2s, 0);
  658. i2s_fifo(i2s, FIC_TXFLUSH);
  659. }
  660. local_irq_restore(flags);
  661. break;
  662. }
  663. return 0;
  664. }
  665. static int i2s_set_clkdiv(struct snd_soc_dai *dai,
  666. int div_id, int div)
  667. {
  668. struct i2s_dai *i2s = to_info(dai);
  669. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  670. switch (div_id) {
  671. case SAMSUNG_I2S_DIV_BCLK:
  672. if ((any_active(i2s) && div && (get_bfs(i2s) != div))
  673. || (other && other->bfs && (other->bfs != div))) {
  674. dev_err(&i2s->pdev->dev,
  675. "%s:%d Other DAI busy\n", __func__, __LINE__);
  676. return -EAGAIN;
  677. }
  678. i2s->bfs = div;
  679. break;
  680. default:
  681. dev_err(&i2s->pdev->dev,
  682. "Invalid clock divider(%d)\n", div_id);
  683. return -EINVAL;
  684. }
  685. return 0;
  686. }
  687. static snd_pcm_sframes_t
  688. i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
  689. {
  690. struct i2s_dai *i2s = to_info(dai);
  691. u32 reg = readl(i2s->addr + I2SFIC);
  692. snd_pcm_sframes_t delay;
  693. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  694. delay = FIC_RXCOUNT(reg);
  695. else if (is_secondary(i2s))
  696. delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
  697. else
  698. delay = FIC_TXCOUNT(reg);
  699. return delay;
  700. }
  701. #ifdef CONFIG_PM
  702. static int i2s_suspend(struct snd_soc_dai *dai)
  703. {
  704. struct i2s_dai *i2s = to_info(dai);
  705. if (dai->active) {
  706. i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
  707. i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
  708. i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
  709. }
  710. return 0;
  711. }
  712. static int i2s_resume(struct snd_soc_dai *dai)
  713. {
  714. struct i2s_dai *i2s = to_info(dai);
  715. if (dai->active) {
  716. writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
  717. writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
  718. writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
  719. }
  720. return 0;
  721. }
  722. #else
  723. #define i2s_suspend NULL
  724. #define i2s_resume NULL
  725. #endif
  726. static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
  727. {
  728. struct i2s_dai *i2s = to_info(dai);
  729. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  730. if (other && other->clk) /* If this is probe on secondary */
  731. goto probe_exit;
  732. i2s->addr = ioremap(i2s->base, 0x100);
  733. if (i2s->addr == NULL) {
  734. dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
  735. return -ENXIO;
  736. }
  737. i2s->clk = clk_get(&i2s->pdev->dev, "iis");
  738. if (IS_ERR(i2s->clk)) {
  739. dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
  740. iounmap(i2s->addr);
  741. return -ENOENT;
  742. }
  743. clk_prepare_enable(i2s->clk);
  744. if (other) {
  745. other->addr = i2s->addr;
  746. other->clk = i2s->clk;
  747. }
  748. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  749. writel(CON_RSTCLR, i2s->addr + I2SCON);
  750. if (i2s->quirks & QUIRK_SEC_DAI)
  751. idma_reg_addr_init(i2s->addr,
  752. i2s->sec_dai->idma_playback.dma_addr);
  753. probe_exit:
  754. /* Reset any constraint on RFS and BFS */
  755. i2s->rfs = 0;
  756. i2s->bfs = 0;
  757. i2s_txctrl(i2s, 0);
  758. i2s_rxctrl(i2s, 0);
  759. i2s_fifo(i2s, FIC_TXFLUSH);
  760. i2s_fifo(other, FIC_TXFLUSH);
  761. i2s_fifo(i2s, FIC_RXFLUSH);
  762. /* Gate CDCLK by default */
  763. if (!is_opened(other))
  764. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  765. 0, SND_SOC_CLOCK_IN);
  766. return 0;
  767. }
  768. static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
  769. {
  770. struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
  771. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  772. if (!other || !other->clk) {
  773. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  774. writel(0, i2s->addr + I2SCON);
  775. clk_disable_unprepare(i2s->clk);
  776. clk_put(i2s->clk);
  777. iounmap(i2s->addr);
  778. }
  779. i2s->clk = NULL;
  780. return 0;
  781. }
  782. static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
  783. .trigger = i2s_trigger,
  784. .hw_params = i2s_hw_params,
  785. .set_fmt = i2s_set_fmt,
  786. .set_clkdiv = i2s_set_clkdiv,
  787. .set_sysclk = i2s_set_sysclk,
  788. .startup = i2s_startup,
  789. .shutdown = i2s_shutdown,
  790. .delay = i2s_delay,
  791. };
  792. #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
  793. #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
  794. SNDRV_PCM_FMTBIT_S16_LE | \
  795. SNDRV_PCM_FMTBIT_S24_LE)
  796. static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
  797. {
  798. struct i2s_dai *i2s;
  799. i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
  800. if (i2s == NULL)
  801. return NULL;
  802. i2s->pdev = pdev;
  803. i2s->pri_dai = NULL;
  804. i2s->sec_dai = NULL;
  805. i2s->i2s_dai_drv.symmetric_rates = 1;
  806. i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
  807. i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
  808. i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
  809. i2s->i2s_dai_drv.suspend = i2s_suspend;
  810. i2s->i2s_dai_drv.resume = i2s_resume;
  811. i2s->i2s_dai_drv.playback.channels_min = 2;
  812. i2s->i2s_dai_drv.playback.channels_max = 2;
  813. i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
  814. i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
  815. if (!sec) {
  816. i2s->i2s_dai_drv.capture.channels_min = 1;
  817. i2s->i2s_dai_drv.capture.channels_max = 2;
  818. i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
  819. i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
  820. } else { /* Create a new platform_device for Secondary */
  821. i2s->pdev = platform_device_register_resndata(NULL,
  822. "samsung-i2s-sec", -1, NULL, 0, NULL, 0);
  823. if (IS_ERR(i2s->pdev))
  824. return NULL;
  825. }
  826. /* Pre-assign snd_soc_dai_set_drvdata */
  827. dev_set_drvdata(&i2s->pdev->dev, i2s);
  828. return i2s;
  829. }
  830. static inline int samsung_i2s_get_driver_data(struct platform_device *pdev)
  831. {
  832. return platform_get_device_id(pdev)->driver_data;
  833. }
  834. static int samsung_i2s_probe(struct platform_device *pdev)
  835. {
  836. u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan;
  837. struct i2s_dai *pri_dai, *sec_dai = NULL;
  838. struct s3c_audio_pdata *i2s_pdata;
  839. struct samsung_i2s *i2s_cfg;
  840. struct resource *res;
  841. u32 regs_base, quirks;
  842. enum samsung_dai_type samsung_dai_type;
  843. int ret = 0;
  844. /* Call during Seconday interface registration */
  845. samsung_dai_type = samsung_i2s_get_driver_data(pdev);
  846. if (samsung_dai_type == TYPE_SEC) {
  847. sec_dai = dev_get_drvdata(&pdev->dev);
  848. snd_soc_register_dai(&sec_dai->pdev->dev,
  849. &sec_dai->i2s_dai_drv);
  850. asoc_dma_platform_register(&pdev->dev);
  851. return 0;
  852. }
  853. i2s_pdata = pdev->dev.platform_data;
  854. if (i2s_pdata == NULL) {
  855. dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
  856. return -EINVAL;
  857. }
  858. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  859. if (!res) {
  860. dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n");
  861. return -ENXIO;
  862. }
  863. dma_pl_chan = res->start;
  864. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  865. if (!res) {
  866. dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n");
  867. return -ENXIO;
  868. }
  869. dma_cp_chan = res->start;
  870. res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
  871. if (res)
  872. dma_pl_sec_chan = res->start;
  873. else
  874. dma_pl_sec_chan = 0;
  875. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  876. if (!res) {
  877. dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
  878. return -ENXIO;
  879. }
  880. if (!request_mem_region(res->start, resource_size(res),
  881. "samsung-i2s")) {
  882. dev_err(&pdev->dev, "Unable to request SFR region\n");
  883. return -EBUSY;
  884. }
  885. regs_base = res->start;
  886. i2s_cfg = &i2s_pdata->type.i2s;
  887. quirks = i2s_cfg->quirks;
  888. pri_dai = i2s_alloc_dai(pdev, false);
  889. if (!pri_dai) {
  890. dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
  891. ret = -ENOMEM;
  892. goto err;
  893. }
  894. pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
  895. pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
  896. pri_dai->dma_playback.client =
  897. (struct s3c2410_dma_client *)&pri_dai->dma_playback;
  898. pri_dai->dma_capture.client =
  899. (struct s3c2410_dma_client *)&pri_dai->dma_capture;
  900. pri_dai->dma_playback.channel = dma_pl_chan;
  901. pri_dai->dma_capture.channel = dma_cp_chan;
  902. pri_dai->dma_playback.dma_size = 4;
  903. pri_dai->dma_capture.dma_size = 4;
  904. pri_dai->base = regs_base;
  905. pri_dai->quirks = quirks;
  906. if (quirks & QUIRK_PRI_6CHAN)
  907. pri_dai->i2s_dai_drv.playback.channels_max = 6;
  908. if (quirks & QUIRK_SEC_DAI) {
  909. sec_dai = i2s_alloc_dai(pdev, true);
  910. if (!sec_dai) {
  911. dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
  912. ret = -ENOMEM;
  913. goto err;
  914. }
  915. sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
  916. sec_dai->dma_playback.client =
  917. (struct s3c2410_dma_client *)&sec_dai->dma_playback;
  918. /* Use iDMA always if SysDMA not provided */
  919. sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1;
  920. sec_dai->dma_playback.dma_size = 4;
  921. sec_dai->base = regs_base;
  922. sec_dai->quirks = quirks;
  923. sec_dai->idma_playback.dma_addr = i2s_cfg->idma_addr;
  924. sec_dai->pri_dai = pri_dai;
  925. pri_dai->sec_dai = sec_dai;
  926. }
  927. if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
  928. dev_err(&pdev->dev, "Unable to configure gpio\n");
  929. ret = -EINVAL;
  930. goto err;
  931. }
  932. snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv);
  933. pm_runtime_enable(&pdev->dev);
  934. asoc_dma_platform_register(&pdev->dev);
  935. return 0;
  936. err:
  937. release_mem_region(regs_base, resource_size(res));
  938. return ret;
  939. }
  940. static int samsung_i2s_remove(struct platform_device *pdev)
  941. {
  942. struct i2s_dai *i2s, *other;
  943. struct resource *res;
  944. i2s = dev_get_drvdata(&pdev->dev);
  945. other = i2s->pri_dai ? : i2s->sec_dai;
  946. if (other) {
  947. other->pri_dai = NULL;
  948. other->sec_dai = NULL;
  949. } else {
  950. pm_runtime_disable(&pdev->dev);
  951. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  952. if (res)
  953. release_mem_region(res->start, resource_size(res));
  954. }
  955. i2s->pri_dai = NULL;
  956. i2s->sec_dai = NULL;
  957. asoc_dma_platform_unregister(&pdev->dev);
  958. snd_soc_unregister_dai(&pdev->dev);
  959. return 0;
  960. }
  961. static struct platform_device_id samsung_i2s_driver_ids[] = {
  962. {
  963. .name = "samsung-i2s",
  964. .driver_data = TYPE_PRI,
  965. }, {
  966. .name = "samsung-i2s-sec",
  967. .driver_data = TYPE_SEC,
  968. },
  969. {},
  970. };
  971. MODULE_DEVICE_TABLE(platform, samsung-i2s-driver-ids);
  972. static struct platform_driver samsung_i2s_driver = {
  973. .probe = samsung_i2s_probe,
  974. .remove = samsung_i2s_remove,
  975. .id_table = samsung_i2s_driver_ids,
  976. .driver = {
  977. .name = "samsung-i2s",
  978. .owner = THIS_MODULE,
  979. },
  980. };
  981. module_platform_driver(samsung_i2s_driver);
  982. /* Module information */
  983. MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
  984. MODULE_DESCRIPTION("Samsung I2S Interface");
  985. MODULE_ALIAS("platform:samsung-i2s");
  986. MODULE_LICENSE("GPL");