iwl-core.c 67 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <net/mac80211.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-dev.h"
  36. #include "iwl-debug.h"
  37. #include "iwl-core.h"
  38. #include "iwl-io.h"
  39. #include "iwl-power.h"
  40. #include "iwl-sta.h"
  41. #include "iwl-helpers.h"
  42. MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
  43. MODULE_VERSION(IWLWIFI_VERSION);
  44. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  45. MODULE_LICENSE("GPL");
  46. /*
  47. * set bt_coex_active to true, uCode will do kill/defer
  48. * every time the priority line is asserted (BT is sending signals on the
  49. * priority line in the PCIx).
  50. * set bt_coex_active to false, uCode will ignore the BT activity and
  51. * perform the normal operation
  52. *
  53. * User might experience transmit issue on some platform due to WiFi/BT
  54. * co-exist problem. The possible behaviors are:
  55. * Able to scan and finding all the available AP
  56. * Not able to associate with any AP
  57. * On those platforms, WiFi communication can be restored by set
  58. * "bt_coex_active" module parameter to "false"
  59. *
  60. * default: bt_coex_active = true (BT_COEX_ENABLE)
  61. */
  62. static bool bt_coex_active = true;
  63. module_param(bt_coex_active, bool, S_IRUGO);
  64. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  65. u32 il_debug_level;
  66. EXPORT_SYMBOL(il_debug_level);
  67. const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  68. EXPORT_SYMBOL(il_bcast_addr);
  69. /* This function both allocates and initializes hw and il. */
  70. struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg)
  71. {
  72. struct il_priv *il;
  73. /* mac80211 allocates memory for this device instance, including
  74. * space for this driver's ilate structure */
  75. struct ieee80211_hw *hw;
  76. hw = ieee80211_alloc_hw(sizeof(struct il_priv),
  77. cfg->ops->ieee80211_ops);
  78. if (hw == NULL) {
  79. pr_err("%s: Can not allocate network device\n",
  80. cfg->name);
  81. goto out;
  82. }
  83. il = hw->priv;
  84. il->hw = hw;
  85. out:
  86. return hw;
  87. }
  88. EXPORT_SYMBOL(il_alloc_all);
  89. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  90. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  91. static void il_init_ht_hw_capab(const struct il_priv *il,
  92. struct ieee80211_sta_ht_cap *ht_info,
  93. enum ieee80211_band band)
  94. {
  95. u16 max_bit_rate = 0;
  96. u8 rx_chains_num = il->hw_params.rx_chains_num;
  97. u8 tx_chains_num = il->hw_params.tx_chains_num;
  98. ht_info->cap = 0;
  99. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  100. ht_info->ht_supported = true;
  101. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  102. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  103. if (il->hw_params.ht40_channel & BIT(band)) {
  104. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  105. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  106. ht_info->mcs.rx_mask[4] = 0x01;
  107. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  108. }
  109. if (il->cfg->mod_params->amsdu_size_8K)
  110. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  111. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  112. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  113. ht_info->mcs.rx_mask[0] = 0xFF;
  114. if (rx_chains_num >= 2)
  115. ht_info->mcs.rx_mask[1] = 0xFF;
  116. if (rx_chains_num >= 3)
  117. ht_info->mcs.rx_mask[2] = 0xFF;
  118. /* Highest supported Rx data rate */
  119. max_bit_rate *= rx_chains_num;
  120. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  121. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  122. /* Tx MCS capabilities */
  123. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  124. if (tx_chains_num != rx_chains_num) {
  125. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  126. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  127. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  128. }
  129. }
  130. /**
  131. * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
  132. */
  133. int il_init_geos(struct il_priv *il)
  134. {
  135. struct il_channel_info *ch;
  136. struct ieee80211_supported_band *sband;
  137. struct ieee80211_channel *channels;
  138. struct ieee80211_channel *geo_ch;
  139. struct ieee80211_rate *rates;
  140. int i = 0;
  141. s8 max_tx_power = 0;
  142. if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  143. il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  144. D_INFO("Geography modes already initialized.\n");
  145. set_bit(STATUS_GEO_CONFIGURED, &il->status);
  146. return 0;
  147. }
  148. channels = kzalloc(sizeof(struct ieee80211_channel) *
  149. il->channel_count, GFP_KERNEL);
  150. if (!channels)
  151. return -ENOMEM;
  152. rates = kzalloc((sizeof(struct ieee80211_rate) * IL_RATE_COUNT_LEGACY),
  153. GFP_KERNEL);
  154. if (!rates) {
  155. kfree(channels);
  156. return -ENOMEM;
  157. }
  158. /* 5.2GHz channels start after the 2.4GHz channels */
  159. sband = &il->bands[IEEE80211_BAND_5GHZ];
  160. sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
  161. /* just OFDM */
  162. sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
  163. sband->n_bitrates = IL_RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
  164. if (il->cfg->sku & IL_SKU_N)
  165. il_init_ht_hw_capab(il, &sband->ht_cap,
  166. IEEE80211_BAND_5GHZ);
  167. sband = &il->bands[IEEE80211_BAND_2GHZ];
  168. sband->channels = channels;
  169. /* OFDM & CCK */
  170. sband->bitrates = rates;
  171. sband->n_bitrates = IL_RATE_COUNT_LEGACY;
  172. if (il->cfg->sku & IL_SKU_N)
  173. il_init_ht_hw_capab(il, &sband->ht_cap,
  174. IEEE80211_BAND_2GHZ);
  175. il->ieee_channels = channels;
  176. il->ieee_rates = rates;
  177. for (i = 0; i < il->channel_count; i++) {
  178. ch = &il->channel_info[i];
  179. if (!il_is_channel_valid(ch))
  180. continue;
  181. sband = &il->bands[ch->band];
  182. geo_ch = &sband->channels[sband->n_channels++];
  183. geo_ch->center_freq =
  184. ieee80211_channel_to_frequency(ch->channel, ch->band);
  185. geo_ch->max_power = ch->max_power_avg;
  186. geo_ch->max_antenna_gain = 0xff;
  187. geo_ch->hw_value = ch->channel;
  188. if (il_is_channel_valid(ch)) {
  189. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  190. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  191. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  192. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  193. if (ch->flags & EEPROM_CHANNEL_RADAR)
  194. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  195. geo_ch->flags |= ch->ht40_extension_channel;
  196. if (ch->max_power_avg > max_tx_power)
  197. max_tx_power = ch->max_power_avg;
  198. } else {
  199. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  200. }
  201. D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  202. ch->channel, geo_ch->center_freq,
  203. il_is_channel_a_band(ch) ? "5.2" : "2.4",
  204. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  205. "restricted" : "valid",
  206. geo_ch->flags);
  207. }
  208. il->tx_power_device_lmt = max_tx_power;
  209. il->tx_power_user_lmt = max_tx_power;
  210. il->tx_power_next = max_tx_power;
  211. if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
  212. (il->cfg->sku & IL_SKU_A)) {
  213. IL_INFO("Incorrectly detected BG card as ABG. "
  214. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  215. il->pci_dev->device,
  216. il->pci_dev->subsystem_device);
  217. il->cfg->sku &= ~IL_SKU_A;
  218. }
  219. IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  220. il->bands[IEEE80211_BAND_2GHZ].n_channels,
  221. il->bands[IEEE80211_BAND_5GHZ].n_channels);
  222. set_bit(STATUS_GEO_CONFIGURED, &il->status);
  223. return 0;
  224. }
  225. EXPORT_SYMBOL(il_init_geos);
  226. /*
  227. * il_free_geos - undo allocations in il_init_geos
  228. */
  229. void il_free_geos(struct il_priv *il)
  230. {
  231. kfree(il->ieee_channels);
  232. kfree(il->ieee_rates);
  233. clear_bit(STATUS_GEO_CONFIGURED, &il->status);
  234. }
  235. EXPORT_SYMBOL(il_free_geos);
  236. static bool il_is_channel_extension(struct il_priv *il,
  237. enum ieee80211_band band,
  238. u16 channel, u8 extension_chan_offset)
  239. {
  240. const struct il_channel_info *ch_info;
  241. ch_info = il_get_channel_info(il, band, channel);
  242. if (!il_is_channel_valid(ch_info))
  243. return false;
  244. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  245. return !(ch_info->ht40_extension_channel &
  246. IEEE80211_CHAN_NO_HT40PLUS);
  247. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  248. return !(ch_info->ht40_extension_channel &
  249. IEEE80211_CHAN_NO_HT40MINUS);
  250. return false;
  251. }
  252. bool il_is_ht40_tx_allowed(struct il_priv *il,
  253. struct il_rxon_context *ctx,
  254. struct ieee80211_sta_ht_cap *ht_cap)
  255. {
  256. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  257. return false;
  258. /*
  259. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  260. * the bit will not set if it is pure 40MHz case
  261. */
  262. if (ht_cap && !ht_cap->ht_supported)
  263. return false;
  264. #ifdef CONFIG_IWLEGACY_DEBUGFS
  265. if (il->disable_ht40)
  266. return false;
  267. #endif
  268. return il_is_channel_extension(il, il->band,
  269. le16_to_cpu(ctx->staging.channel),
  270. ctx->ht.extension_chan_offset);
  271. }
  272. EXPORT_SYMBOL(il_is_ht40_tx_allowed);
  273. static u16 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  274. {
  275. u16 new_val;
  276. u16 beacon_factor;
  277. /*
  278. * If mac80211 hasn't given us a beacon interval, program
  279. * the default into the device.
  280. */
  281. if (!beacon_val)
  282. return DEFAULT_BEACON_INTERVAL;
  283. /*
  284. * If the beacon interval we obtained from the peer
  285. * is too large, we'll have to wake up more often
  286. * (and in IBSS case, we'll beacon too much)
  287. *
  288. * For example, if max_beacon_val is 4096, and the
  289. * requested beacon interval is 7000, we'll have to
  290. * use 3500 to be able to wake up on the beacons.
  291. *
  292. * This could badly influence beacon detection stats.
  293. */
  294. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  295. new_val = beacon_val / beacon_factor;
  296. if (!new_val)
  297. new_val = max_beacon_val;
  298. return new_val;
  299. }
  300. int
  301. il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
  302. {
  303. u64 tsf;
  304. s32 interval_tm, rem;
  305. struct ieee80211_conf *conf = NULL;
  306. u16 beacon_int;
  307. struct ieee80211_vif *vif = ctx->vif;
  308. conf = il_ieee80211_get_hw_conf(il->hw);
  309. lockdep_assert_held(&il->mutex);
  310. memset(&ctx->timing, 0, sizeof(struct il_rxon_time_cmd));
  311. ctx->timing.timestamp = cpu_to_le64(il->timestamp);
  312. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  313. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  314. /*
  315. * TODO: For IBSS we need to get atim_window from mac80211,
  316. * for now just always use 0
  317. */
  318. ctx->timing.atim_window = 0;
  319. beacon_int = il_adjust_beacon_interval(beacon_int,
  320. il->hw_params.max_beacon_itrvl * TIME_UNIT);
  321. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  322. tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
  323. interval_tm = beacon_int * TIME_UNIT;
  324. rem = do_div(tsf, interval_tm);
  325. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  326. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  327. D_ASSOC(
  328. "beacon interval %d beacon timer %d beacon tim %d\n",
  329. le16_to_cpu(ctx->timing.beacon_interval),
  330. le32_to_cpu(ctx->timing.beacon_init_val),
  331. le16_to_cpu(ctx->timing.atim_window));
  332. return il_send_cmd_pdu(il, ctx->rxon_timing_cmd,
  333. sizeof(ctx->timing), &ctx->timing);
  334. }
  335. EXPORT_SYMBOL(il_send_rxon_timing);
  336. void
  337. il_set_rxon_hwcrypto(struct il_priv *il,
  338. struct il_rxon_context *ctx,
  339. int hw_decrypt)
  340. {
  341. struct il_rxon_cmd *rxon = &ctx->staging;
  342. if (hw_decrypt)
  343. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  344. else
  345. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  346. }
  347. EXPORT_SYMBOL(il_set_rxon_hwcrypto);
  348. /* validate RXON structure is valid */
  349. int
  350. il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx)
  351. {
  352. struct il_rxon_cmd *rxon = &ctx->staging;
  353. bool error = false;
  354. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  355. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  356. IL_WARN("check 2.4G: wrong narrow\n");
  357. error = true;
  358. }
  359. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  360. IL_WARN("check 2.4G: wrong radar\n");
  361. error = true;
  362. }
  363. } else {
  364. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  365. IL_WARN("check 5.2G: not short slot!\n");
  366. error = true;
  367. }
  368. if (rxon->flags & RXON_FLG_CCK_MSK) {
  369. IL_WARN("check 5.2G: CCK!\n");
  370. error = true;
  371. }
  372. }
  373. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  374. IL_WARN("mac/bssid mcast!\n");
  375. error = true;
  376. }
  377. /* make sure basic rates 6Mbps and 1Mbps are supported */
  378. if ((rxon->ofdm_basic_rates & IL_RATE_6M_MASK) == 0 &&
  379. (rxon->cck_basic_rates & IL_RATE_1M_MASK) == 0) {
  380. IL_WARN("neither 1 nor 6 are basic\n");
  381. error = true;
  382. }
  383. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  384. IL_WARN("aid > 2007\n");
  385. error = true;
  386. }
  387. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  388. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  389. IL_WARN("CCK and short slot\n");
  390. error = true;
  391. }
  392. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  393. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  394. IL_WARN("CCK and auto detect");
  395. error = true;
  396. }
  397. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  398. RXON_FLG_TGG_PROTECT_MSK)) ==
  399. RXON_FLG_TGG_PROTECT_MSK) {
  400. IL_WARN("TGg but no auto-detect\n");
  401. error = true;
  402. }
  403. if (error)
  404. IL_WARN("Tuning to channel %d\n",
  405. le16_to_cpu(rxon->channel));
  406. if (error) {
  407. IL_ERR("Invalid RXON\n");
  408. return -EINVAL;
  409. }
  410. return 0;
  411. }
  412. EXPORT_SYMBOL(il_check_rxon_cmd);
  413. /**
  414. * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  415. * @il: staging_rxon is compared to active_rxon
  416. *
  417. * If the RXON structure is changing enough to require a new tune,
  418. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  419. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  420. */
  421. int il_full_rxon_required(struct il_priv *il,
  422. struct il_rxon_context *ctx)
  423. {
  424. const struct il_rxon_cmd *staging = &ctx->staging;
  425. const struct il_rxon_cmd *active = &ctx->active;
  426. #define CHK(cond) \
  427. if ((cond)) { \
  428. D_INFO("need full RXON - " #cond "\n"); \
  429. return 1; \
  430. }
  431. #define CHK_NEQ(c1, c2) \
  432. if ((c1) != (c2)) { \
  433. D_INFO("need full RXON - " \
  434. #c1 " != " #c2 " - %d != %d\n", \
  435. (c1), (c2)); \
  436. return 1; \
  437. }
  438. /* These items are only settable from the full RXON command */
  439. CHK(!il_is_associated_ctx(ctx));
  440. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  441. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  442. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  443. active->wlap_bssid_addr));
  444. CHK_NEQ(staging->dev_type, active->dev_type);
  445. CHK_NEQ(staging->channel, active->channel);
  446. CHK_NEQ(staging->air_propagation, active->air_propagation);
  447. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  448. active->ofdm_ht_single_stream_basic_rates);
  449. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  450. active->ofdm_ht_dual_stream_basic_rates);
  451. CHK_NEQ(staging->assoc_id, active->assoc_id);
  452. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  453. * be updated with the RXON_ASSOC command -- however only some
  454. * flag transitions are allowed using RXON_ASSOC */
  455. /* Check if we are not switching bands */
  456. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  457. active->flags & RXON_FLG_BAND_24G_MSK);
  458. /* Check if we are switching association toggle */
  459. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  460. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  461. #undef CHK
  462. #undef CHK_NEQ
  463. return 0;
  464. }
  465. EXPORT_SYMBOL(il_full_rxon_required);
  466. u8 il_get_lowest_plcp(struct il_priv *il,
  467. struct il_rxon_context *ctx)
  468. {
  469. /*
  470. * Assign the lowest rate -- should really get this from
  471. * the beacon skb from mac80211.
  472. */
  473. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  474. return IL_RATE_1M_PLCP;
  475. else
  476. return IL_RATE_6M_PLCP;
  477. }
  478. EXPORT_SYMBOL(il_get_lowest_plcp);
  479. static void _il_set_rxon_ht(struct il_priv *il,
  480. struct il_ht_config *ht_conf,
  481. struct il_rxon_context *ctx)
  482. {
  483. struct il_rxon_cmd *rxon = &ctx->staging;
  484. if (!ctx->ht.enabled) {
  485. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  486. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  487. RXON_FLG_HT40_PROT_MSK |
  488. RXON_FLG_HT_PROT_MSK);
  489. return;
  490. }
  491. rxon->flags |= cpu_to_le32(ctx->ht.protection <<
  492. RXON_FLG_HT_OPERATING_MODE_POS);
  493. /* Set up channel bandwidth:
  494. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  495. /* clear the HT channel mode before set the mode */
  496. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  497. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  498. if (il_is_ht40_tx_allowed(il, ctx, NULL)) {
  499. /* pure ht40 */
  500. if (ctx->ht.protection ==
  501. IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  502. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  503. /* Note: control channel is opposite of extension channel */
  504. switch (ctx->ht.extension_chan_offset) {
  505. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  506. rxon->flags &=
  507. ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  508. break;
  509. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  510. rxon->flags |=
  511. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  512. break;
  513. }
  514. } else {
  515. /* Note: control channel is opposite of extension channel */
  516. switch (ctx->ht.extension_chan_offset) {
  517. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  518. rxon->flags &=
  519. ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  520. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  521. break;
  522. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  523. rxon->flags |=
  524. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  525. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  526. break;
  527. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  528. default:
  529. /* channel location only valid if in Mixed mode */
  530. IL_ERR(
  531. "invalid extension channel offset\n");
  532. break;
  533. }
  534. }
  535. } else {
  536. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  537. }
  538. if (il->cfg->ops->hcmd->set_rxon_chain)
  539. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  540. D_ASSOC("rxon flags 0x%X operation mode :0x%X "
  541. "extension channel offset 0x%x\n",
  542. le32_to_cpu(rxon->flags), ctx->ht.protection,
  543. ctx->ht.extension_chan_offset);
  544. }
  545. void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  546. {
  547. struct il_rxon_context *ctx;
  548. for_each_context(il, ctx)
  549. _il_set_rxon_ht(il, ht_conf, ctx);
  550. }
  551. EXPORT_SYMBOL(il_set_rxon_ht);
  552. /* Return valid, unused, channel for a passive scan to reset the RF */
  553. u8 il_get_single_channel_number(struct il_priv *il,
  554. enum ieee80211_band band)
  555. {
  556. const struct il_channel_info *ch_info;
  557. int i;
  558. u8 channel = 0;
  559. u8 min, max;
  560. struct il_rxon_context *ctx;
  561. if (band == IEEE80211_BAND_5GHZ) {
  562. min = 14;
  563. max = il->channel_count;
  564. } else {
  565. min = 0;
  566. max = 14;
  567. }
  568. for (i = min; i < max; i++) {
  569. bool busy = false;
  570. for_each_context(il, ctx) {
  571. busy = il->channel_info[i].channel ==
  572. le16_to_cpu(ctx->staging.channel);
  573. if (busy)
  574. break;
  575. }
  576. if (busy)
  577. continue;
  578. channel = il->channel_info[i].channel;
  579. ch_info = il_get_channel_info(il, band, channel);
  580. if (il_is_channel_valid(ch_info))
  581. break;
  582. }
  583. return channel;
  584. }
  585. EXPORT_SYMBOL(il_get_single_channel_number);
  586. /**
  587. * il_set_rxon_channel - Set the band and channel values in staging RXON
  588. * @ch: requested channel as a pointer to struct ieee80211_channel
  589. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  590. * in the staging RXON flag structure based on the ch->band
  591. */
  592. int
  593. il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
  594. struct il_rxon_context *ctx)
  595. {
  596. enum ieee80211_band band = ch->band;
  597. u16 channel = ch->hw_value;
  598. if (le16_to_cpu(ctx->staging.channel) == channel && il->band == band)
  599. return 0;
  600. ctx->staging.channel = cpu_to_le16(channel);
  601. if (band == IEEE80211_BAND_5GHZ)
  602. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  603. else
  604. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  605. il->band = band;
  606. D_INFO("Staging channel set to %d [%d]\n", channel, band);
  607. return 0;
  608. }
  609. EXPORT_SYMBOL(il_set_rxon_channel);
  610. void il_set_flags_for_band(struct il_priv *il,
  611. struct il_rxon_context *ctx,
  612. enum ieee80211_band band,
  613. struct ieee80211_vif *vif)
  614. {
  615. if (band == IEEE80211_BAND_5GHZ) {
  616. ctx->staging.flags &=
  617. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  618. | RXON_FLG_CCK_MSK);
  619. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  620. } else {
  621. /* Copied from il_post_associate() */
  622. if (vif && vif->bss_conf.use_short_slot)
  623. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  624. else
  625. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  626. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  627. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  628. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  629. }
  630. }
  631. EXPORT_SYMBOL(il_set_flags_for_band);
  632. /*
  633. * initialize rxon structure with default values from eeprom
  634. */
  635. void il_connection_init_rx_config(struct il_priv *il,
  636. struct il_rxon_context *ctx)
  637. {
  638. const struct il_channel_info *ch_info;
  639. memset(&ctx->staging, 0, sizeof(ctx->staging));
  640. if (!ctx->vif) {
  641. ctx->staging.dev_type = ctx->unused_devtype;
  642. } else
  643. switch (ctx->vif->type) {
  644. case NL80211_IFTYPE_STATION:
  645. ctx->staging.dev_type = ctx->station_devtype;
  646. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  647. break;
  648. case NL80211_IFTYPE_ADHOC:
  649. ctx->staging.dev_type = ctx->ibss_devtype;
  650. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  651. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  652. RXON_FILTER_ACCEPT_GRP_MSK;
  653. break;
  654. default:
  655. IL_ERR("Unsupported interface type %d\n",
  656. ctx->vif->type);
  657. break;
  658. }
  659. #if 0
  660. /* TODO: Figure out when short_preamble would be set and cache from
  661. * that */
  662. if (!hw_to_local(il->hw)->short_preamble)
  663. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  664. else
  665. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  666. #endif
  667. ch_info = il_get_channel_info(il, il->band,
  668. le16_to_cpu(ctx->active.channel));
  669. if (!ch_info)
  670. ch_info = &il->channel_info[0];
  671. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  672. il->band = ch_info->band;
  673. il_set_flags_for_band(il, ctx, il->band, ctx->vif);
  674. ctx->staging.ofdm_basic_rates =
  675. (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  676. ctx->staging.cck_basic_rates =
  677. (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  678. /* clear both MIX and PURE40 mode flag */
  679. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  680. RXON_FLG_CHANNEL_MODE_PURE_40);
  681. if (ctx->vif)
  682. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  683. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  684. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  685. }
  686. EXPORT_SYMBOL(il_connection_init_rx_config);
  687. void il_set_rate(struct il_priv *il)
  688. {
  689. const struct ieee80211_supported_band *hw = NULL;
  690. struct ieee80211_rate *rate;
  691. struct il_rxon_context *ctx;
  692. int i;
  693. hw = il_get_hw_mode(il, il->band);
  694. if (!hw) {
  695. IL_ERR("Failed to set rate: unable to get hw mode\n");
  696. return;
  697. }
  698. il->active_rate = 0;
  699. for (i = 0; i < hw->n_bitrates; i++) {
  700. rate = &(hw->bitrates[i]);
  701. if (rate->hw_value < IL_RATE_COUNT_LEGACY)
  702. il->active_rate |= (1 << rate->hw_value);
  703. }
  704. D_RATE("Set active_rate = %0x\n", il->active_rate);
  705. for_each_context(il, ctx) {
  706. ctx->staging.cck_basic_rates =
  707. (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  708. ctx->staging.ofdm_basic_rates =
  709. (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  710. }
  711. }
  712. EXPORT_SYMBOL(il_set_rate);
  713. void il_chswitch_done(struct il_priv *il, bool is_success)
  714. {
  715. struct il_rxon_context *ctx = &il->ctx;
  716. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  717. return;
  718. if (test_and_clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &il->status))
  719. ieee80211_chswitch_done(ctx->vif, is_success);
  720. }
  721. EXPORT_SYMBOL(il_chswitch_done);
  722. void il_rx_csa(struct il_priv *il, struct il_rx_mem_buffer *rxb)
  723. {
  724. struct il_rx_pkt *pkt = rxb_addr(rxb);
  725. struct il_csa_notification *csa = &(pkt->u.csa_notif);
  726. struct il_rxon_context *ctx = &il->ctx;
  727. struct il_rxon_cmd *rxon = (void *)&ctx->active;
  728. if (!test_bit(STATUS_CHANNEL_SWITCH_PENDING, &il->status))
  729. return;
  730. if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
  731. rxon->channel = csa->channel;
  732. ctx->staging.channel = csa->channel;
  733. D_11H("CSA notif: channel %d\n",
  734. le16_to_cpu(csa->channel));
  735. il_chswitch_done(il, true);
  736. } else {
  737. IL_ERR("CSA notif (fail) : channel %d\n",
  738. le16_to_cpu(csa->channel));
  739. il_chswitch_done(il, false);
  740. }
  741. }
  742. EXPORT_SYMBOL(il_rx_csa);
  743. #ifdef CONFIG_IWLEGACY_DEBUG
  744. void il_print_rx_config_cmd(struct il_priv *il,
  745. struct il_rxon_context *ctx)
  746. {
  747. struct il_rxon_cmd *rxon = &ctx->staging;
  748. D_RADIO("RX CONFIG:\n");
  749. il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  750. D_RADIO("u16 channel: 0x%x\n",
  751. le16_to_cpu(rxon->channel));
  752. D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  753. D_RADIO("u32 filter_flags: 0x%08x\n",
  754. le32_to_cpu(rxon->filter_flags));
  755. D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  756. D_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  757. rxon->ofdm_basic_rates);
  758. D_RADIO("u8 cck_basic_rates: 0x%02x\n",
  759. rxon->cck_basic_rates);
  760. D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  761. D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  762. D_RADIO("u16 assoc_id: 0x%x\n",
  763. le16_to_cpu(rxon->assoc_id));
  764. }
  765. EXPORT_SYMBOL(il_print_rx_config_cmd);
  766. #endif
  767. /**
  768. * il_irq_handle_error - called for HW or SW error interrupt from card
  769. */
  770. void il_irq_handle_error(struct il_priv *il)
  771. {
  772. /* Set the FW error flag -- cleared on il_down */
  773. set_bit(STATUS_FW_ERROR, &il->status);
  774. /* Cancel currently queued command. */
  775. clear_bit(STATUS_HCMD_ACTIVE, &il->status);
  776. IL_ERR("Loaded firmware version: %s\n",
  777. il->hw->wiphy->fw_version);
  778. il->cfg->ops->lib->dump_nic_error_log(il);
  779. if (il->cfg->ops->lib->dump_fh)
  780. il->cfg->ops->lib->dump_fh(il, NULL, false);
  781. #ifdef CONFIG_IWLEGACY_DEBUG
  782. if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
  783. il_print_rx_config_cmd(il,
  784. &il->ctx);
  785. #endif
  786. wake_up(&il->wait_command_queue);
  787. /* Keep the restart process from trying to send host
  788. * commands by clearing the INIT status bit */
  789. clear_bit(STATUS_READY, &il->status);
  790. if (!test_bit(STATUS_EXIT_PENDING, &il->status)) {
  791. IL_DBG(IL_DL_FW_ERRORS,
  792. "Restarting adapter due to uCode error.\n");
  793. if (il->cfg->mod_params->restart_fw)
  794. queue_work(il->workqueue, &il->restart);
  795. }
  796. }
  797. EXPORT_SYMBOL(il_irq_handle_error);
  798. static int il_apm_stop_master(struct il_priv *il)
  799. {
  800. int ret = 0;
  801. /* stop device's busmaster DMA activity */
  802. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  803. ret = _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  804. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  805. if (ret)
  806. IL_WARN("Master Disable Timed Out, 100 usec\n");
  807. D_INFO("stop master\n");
  808. return ret;
  809. }
  810. void il_apm_stop(struct il_priv *il)
  811. {
  812. D_INFO("Stop card, put in low power state\n");
  813. /* Stop device's DMA activity */
  814. il_apm_stop_master(il);
  815. /* Reset the entire device */
  816. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  817. udelay(10);
  818. /*
  819. * Clear "initialization complete" bit to move adapter from
  820. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  821. */
  822. il_clear_bit(il, CSR_GP_CNTRL,
  823. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  824. }
  825. EXPORT_SYMBOL(il_apm_stop);
  826. /*
  827. * Start up NIC's basic functionality after it has been reset
  828. * (e.g. after platform boot, or shutdown via il_apm_stop())
  829. * NOTE: This does not load uCode nor start the embedded processor
  830. */
  831. int il_apm_init(struct il_priv *il)
  832. {
  833. int ret = 0;
  834. u16 lctl;
  835. D_INFO("Init card's basic functions\n");
  836. /*
  837. * Use "set_bit" below rather than "write", to preserve any hardware
  838. * bits already set by default after reset.
  839. */
  840. /* Disable L0S exit timer (platform NMI Work/Around) */
  841. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  842. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  843. /*
  844. * Disable L0s without affecting L1;
  845. * don't wait for ICH L0s (ICH bug W/A)
  846. */
  847. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  848. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  849. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  850. il_set_bit(il, CSR_DBG_HPET_MEM_REG,
  851. CSR_DBG_HPET_MEM_REG_VAL);
  852. /*
  853. * Enable HAP INTA (interrupt from management bus) to
  854. * wake device's PCI Express link L1a -> L0s
  855. * NOTE: This is no-op for 3945 (non-existent bit)
  856. */
  857. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  858. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  859. /*
  860. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  861. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  862. * If so (likely), disable L0S, so device moves directly L0->L1;
  863. * costs negligible amount of power savings.
  864. * If not (unlikely), enable L0S, so there is at least some
  865. * power savings, even without L1.
  866. */
  867. if (il->cfg->base_params->set_l0s) {
  868. lctl = il_pcie_link_ctl(il);
  869. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  870. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  871. /* L1-ASPM enabled; disable(!) L0S */
  872. il_set_bit(il, CSR_GIO_REG,
  873. CSR_GIO_REG_VAL_L0S_ENABLED);
  874. D_POWER("L1 Enabled; Disabling L0S\n");
  875. } else {
  876. /* L1-ASPM disabled; enable(!) L0S */
  877. il_clear_bit(il, CSR_GIO_REG,
  878. CSR_GIO_REG_VAL_L0S_ENABLED);
  879. D_POWER("L1 Disabled; Enabling L0S\n");
  880. }
  881. }
  882. /* Configure analog phase-lock-loop before activating to D0A */
  883. if (il->cfg->base_params->pll_cfg_val)
  884. il_set_bit(il, CSR_ANA_PLL_CFG,
  885. il->cfg->base_params->pll_cfg_val);
  886. /*
  887. * Set "initialization complete" bit to move adapter from
  888. * D0U* --> D0A* (powered-up active) state.
  889. */
  890. il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  891. /*
  892. * Wait for clock stabilization; once stabilized, access to
  893. * device-internal resources is supported, e.g. il_wr_prph()
  894. * and accesses to uCode SRAM.
  895. */
  896. ret = _il_poll_bit(il, CSR_GP_CNTRL,
  897. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  898. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  899. if (ret < 0) {
  900. D_INFO("Failed to init the card\n");
  901. goto out;
  902. }
  903. /*
  904. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  905. * BSM (Boostrap State Machine) is only in 3945 and 4965.
  906. *
  907. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  908. * do not disable clocks. This preserves any hardware bits already
  909. * set by default in "CLK_CTRL_REG" after reset.
  910. */
  911. if (il->cfg->base_params->use_bsm)
  912. il_wr_prph(il, APMG_CLK_EN_REG,
  913. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  914. else
  915. il_wr_prph(il, APMG_CLK_EN_REG,
  916. APMG_CLK_VAL_DMA_CLK_RQT);
  917. udelay(20);
  918. /* Disable L1-Active */
  919. il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
  920. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  921. out:
  922. return ret;
  923. }
  924. EXPORT_SYMBOL(il_apm_init);
  925. int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
  926. {
  927. int ret;
  928. s8 prev_tx_power;
  929. bool defer;
  930. struct il_rxon_context *ctx = &il->ctx;
  931. lockdep_assert_held(&il->mutex);
  932. if (il->tx_power_user_lmt == tx_power && !force)
  933. return 0;
  934. if (!il->cfg->ops->lib->send_tx_power)
  935. return -EOPNOTSUPP;
  936. /* 0 dBm mean 1 milliwatt */
  937. if (tx_power < 0) {
  938. IL_WARN(
  939. "Requested user TXPOWER %d below 1 mW.\n",
  940. tx_power);
  941. return -EINVAL;
  942. }
  943. if (tx_power > il->tx_power_device_lmt) {
  944. IL_WARN(
  945. "Requested user TXPOWER %d above upper limit %d.\n",
  946. tx_power, il->tx_power_device_lmt);
  947. return -EINVAL;
  948. }
  949. if (!il_is_ready_rf(il))
  950. return -EIO;
  951. /* scan complete and commit_rxon use tx_power_next value,
  952. * it always need to be updated for newest request */
  953. il->tx_power_next = tx_power;
  954. /* do not set tx power when scanning or channel changing */
  955. defer = test_bit(STATUS_SCANNING, &il->status) ||
  956. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  957. if (defer && !force) {
  958. D_INFO("Deferring tx power set\n");
  959. return 0;
  960. }
  961. prev_tx_power = il->tx_power_user_lmt;
  962. il->tx_power_user_lmt = tx_power;
  963. ret = il->cfg->ops->lib->send_tx_power(il);
  964. /* if fail to set tx_power, restore the orig. tx power */
  965. if (ret) {
  966. il->tx_power_user_lmt = prev_tx_power;
  967. il->tx_power_next = prev_tx_power;
  968. }
  969. return ret;
  970. }
  971. EXPORT_SYMBOL(il_set_tx_power);
  972. void il_send_bt_config(struct il_priv *il)
  973. {
  974. struct il_bt_cmd bt_cmd = {
  975. .lead_time = BT_LEAD_TIME_DEF,
  976. .max_kill = BT_MAX_KILL_DEF,
  977. .kill_ack_mask = 0,
  978. .kill_cts_mask = 0,
  979. };
  980. if (!bt_coex_active)
  981. bt_cmd.flags = BT_COEX_DISABLE;
  982. else
  983. bt_cmd.flags = BT_COEX_ENABLE;
  984. D_INFO("BT coex %s\n",
  985. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  986. if (il_send_cmd_pdu(il, REPLY_BT_CONFIG,
  987. sizeof(struct il_bt_cmd), &bt_cmd))
  988. IL_ERR("failed to send BT Coex Config\n");
  989. }
  990. EXPORT_SYMBOL(il_send_bt_config);
  991. int il_send_statistics_request(struct il_priv *il, u8 flags, bool clear)
  992. {
  993. struct il_statistics_cmd statistics_cmd = {
  994. .configuration_flags =
  995. clear ? IL_STATS_CONF_CLEAR_STATS : 0,
  996. };
  997. if (flags & CMD_ASYNC)
  998. return il_send_cmd_pdu_async(il, REPLY_STATISTICS_CMD,
  999. sizeof(struct il_statistics_cmd),
  1000. &statistics_cmd, NULL);
  1001. else
  1002. return il_send_cmd_pdu(il, REPLY_STATISTICS_CMD,
  1003. sizeof(struct il_statistics_cmd),
  1004. &statistics_cmd);
  1005. }
  1006. EXPORT_SYMBOL(il_send_statistics_request);
  1007. void il_rx_pm_sleep_notif(struct il_priv *il,
  1008. struct il_rx_mem_buffer *rxb)
  1009. {
  1010. #ifdef CONFIG_IWLEGACY_DEBUG
  1011. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1012. struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1013. D_RX("sleep mode: %d, src: %d\n",
  1014. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1015. #endif
  1016. }
  1017. EXPORT_SYMBOL(il_rx_pm_sleep_notif);
  1018. void il_rx_pm_debug_statistics_notif(struct il_priv *il,
  1019. struct il_rx_mem_buffer *rxb)
  1020. {
  1021. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1022. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1023. D_RADIO("Dumping %d bytes of unhandled "
  1024. "notification for %s:\n", len,
  1025. il_get_cmd_string(pkt->hdr.cmd));
  1026. il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
  1027. }
  1028. EXPORT_SYMBOL(il_rx_pm_debug_statistics_notif);
  1029. void il_rx_reply_error(struct il_priv *il,
  1030. struct il_rx_mem_buffer *rxb)
  1031. {
  1032. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1033. IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
  1034. "seq 0x%04X ser 0x%08X\n",
  1035. le32_to_cpu(pkt->u.err_resp.error_type),
  1036. il_get_cmd_string(pkt->u.err_resp.cmd_id),
  1037. pkt->u.err_resp.cmd_id,
  1038. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1039. le32_to_cpu(pkt->u.err_resp.error_info));
  1040. }
  1041. EXPORT_SYMBOL(il_rx_reply_error);
  1042. void il_clear_isr_stats(struct il_priv *il)
  1043. {
  1044. memset(&il->isr_stats, 0, sizeof(il->isr_stats));
  1045. }
  1046. int il_mac_conf_tx(struct ieee80211_hw *hw,
  1047. struct ieee80211_vif *vif, u16 queue,
  1048. const struct ieee80211_tx_queue_params *params)
  1049. {
  1050. struct il_priv *il = hw->priv;
  1051. struct il_rxon_context *ctx;
  1052. unsigned long flags;
  1053. int q;
  1054. D_MAC80211("enter\n");
  1055. if (!il_is_ready_rf(il)) {
  1056. D_MAC80211("leave - RF not ready\n");
  1057. return -EIO;
  1058. }
  1059. if (queue >= AC_NUM) {
  1060. D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  1061. return 0;
  1062. }
  1063. q = AC_NUM - 1 - queue;
  1064. spin_lock_irqsave(&il->lock, flags);
  1065. for_each_context(il, ctx) {
  1066. ctx->qos_data.def_qos_parm.ac[q].cw_min =
  1067. cpu_to_le16(params->cw_min);
  1068. ctx->qos_data.def_qos_parm.ac[q].cw_max =
  1069. cpu_to_le16(params->cw_max);
  1070. ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1071. ctx->qos_data.def_qos_parm.ac[q].edca_txop =
  1072. cpu_to_le16((params->txop * 32));
  1073. ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1074. }
  1075. spin_unlock_irqrestore(&il->lock, flags);
  1076. D_MAC80211("leave\n");
  1077. return 0;
  1078. }
  1079. EXPORT_SYMBOL(il_mac_conf_tx);
  1080. int il_mac_tx_last_beacon(struct ieee80211_hw *hw)
  1081. {
  1082. struct il_priv *il = hw->priv;
  1083. return il->ibss_manager == IL_IBSS_MANAGER;
  1084. }
  1085. EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
  1086. static int
  1087. il_set_mode(struct il_priv *il, struct il_rxon_context *ctx)
  1088. {
  1089. il_connection_init_rx_config(il, ctx);
  1090. if (il->cfg->ops->hcmd->set_rxon_chain)
  1091. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  1092. return il_commit_rxon(il, ctx);
  1093. }
  1094. static int il_setup_interface(struct il_priv *il,
  1095. struct il_rxon_context *ctx)
  1096. {
  1097. struct ieee80211_vif *vif = ctx->vif;
  1098. int err;
  1099. lockdep_assert_held(&il->mutex);
  1100. /*
  1101. * This variable will be correct only when there's just
  1102. * a single context, but all code using it is for hardware
  1103. * that supports only one context.
  1104. */
  1105. il->iw_mode = vif->type;
  1106. ctx->is_active = true;
  1107. err = il_set_mode(il, ctx);
  1108. if (err) {
  1109. if (!ctx->always_active)
  1110. ctx->is_active = false;
  1111. return err;
  1112. }
  1113. return 0;
  1114. }
  1115. int
  1116. il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1117. {
  1118. struct il_priv *il = hw->priv;
  1119. struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
  1120. struct il_rxon_context *tmp, *ctx = NULL;
  1121. int err;
  1122. D_MAC80211("enter: type %d, addr %pM\n",
  1123. vif->type, vif->addr);
  1124. mutex_lock(&il->mutex);
  1125. if (!il_is_ready_rf(il)) {
  1126. IL_WARN("Try to add interface when device not ready\n");
  1127. err = -EINVAL;
  1128. goto out;
  1129. }
  1130. for_each_context(il, tmp) {
  1131. u32 possible_modes =
  1132. tmp->interface_modes | tmp->exclusive_interface_modes;
  1133. if (tmp->vif) {
  1134. /* check if this busy context is exclusive */
  1135. if (tmp->exclusive_interface_modes &
  1136. BIT(tmp->vif->type)) {
  1137. err = -EINVAL;
  1138. goto out;
  1139. }
  1140. continue;
  1141. }
  1142. if (!(possible_modes & BIT(vif->type)))
  1143. continue;
  1144. /* have maybe usable context w/o interface */
  1145. ctx = tmp;
  1146. break;
  1147. }
  1148. if (!ctx) {
  1149. err = -EOPNOTSUPP;
  1150. goto out;
  1151. }
  1152. vif_priv->ctx = ctx;
  1153. ctx->vif = vif;
  1154. err = il_setup_interface(il, ctx);
  1155. if (!err)
  1156. goto out;
  1157. ctx->vif = NULL;
  1158. il->iw_mode = NL80211_IFTYPE_STATION;
  1159. out:
  1160. mutex_unlock(&il->mutex);
  1161. D_MAC80211("leave\n");
  1162. return err;
  1163. }
  1164. EXPORT_SYMBOL(il_mac_add_interface);
  1165. static void il_teardown_interface(struct il_priv *il,
  1166. struct ieee80211_vif *vif,
  1167. bool mode_change)
  1168. {
  1169. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1170. lockdep_assert_held(&il->mutex);
  1171. if (il->scan_vif == vif) {
  1172. il_scan_cancel_timeout(il, 200);
  1173. il_force_scan_end(il);
  1174. }
  1175. if (!mode_change) {
  1176. il_set_mode(il, ctx);
  1177. if (!ctx->always_active)
  1178. ctx->is_active = false;
  1179. }
  1180. }
  1181. void il_mac_remove_interface(struct ieee80211_hw *hw,
  1182. struct ieee80211_vif *vif)
  1183. {
  1184. struct il_priv *il = hw->priv;
  1185. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1186. D_MAC80211("enter\n");
  1187. mutex_lock(&il->mutex);
  1188. WARN_ON(ctx->vif != vif);
  1189. ctx->vif = NULL;
  1190. il_teardown_interface(il, vif, false);
  1191. memset(il->bssid, 0, ETH_ALEN);
  1192. mutex_unlock(&il->mutex);
  1193. D_MAC80211("leave\n");
  1194. }
  1195. EXPORT_SYMBOL(il_mac_remove_interface);
  1196. int il_alloc_txq_mem(struct il_priv *il)
  1197. {
  1198. if (!il->txq)
  1199. il->txq = kzalloc(
  1200. sizeof(struct il_tx_queue) *
  1201. il->cfg->base_params->num_of_queues,
  1202. GFP_KERNEL);
  1203. if (!il->txq) {
  1204. IL_ERR("Not enough memory for txq\n");
  1205. return -ENOMEM;
  1206. }
  1207. return 0;
  1208. }
  1209. EXPORT_SYMBOL(il_alloc_txq_mem);
  1210. void il_txq_mem(struct il_priv *il)
  1211. {
  1212. kfree(il->txq);
  1213. il->txq = NULL;
  1214. }
  1215. EXPORT_SYMBOL(il_txq_mem);
  1216. #ifdef CONFIG_IWLEGACY_DEBUGFS
  1217. #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES)
  1218. void il_reset_traffic_log(struct il_priv *il)
  1219. {
  1220. il->tx_traffic_idx = 0;
  1221. il->rx_traffic_idx = 0;
  1222. if (il->tx_traffic)
  1223. memset(il->tx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  1224. if (il->rx_traffic)
  1225. memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  1226. }
  1227. int il_alloc_traffic_mem(struct il_priv *il)
  1228. {
  1229. u32 traffic_size = IL_TRAFFIC_DUMP_SIZE;
  1230. if (il_debug_level & IL_DL_TX) {
  1231. if (!il->tx_traffic) {
  1232. il->tx_traffic =
  1233. kzalloc(traffic_size, GFP_KERNEL);
  1234. if (!il->tx_traffic)
  1235. return -ENOMEM;
  1236. }
  1237. }
  1238. if (il_debug_level & IL_DL_RX) {
  1239. if (!il->rx_traffic) {
  1240. il->rx_traffic =
  1241. kzalloc(traffic_size, GFP_KERNEL);
  1242. if (!il->rx_traffic)
  1243. return -ENOMEM;
  1244. }
  1245. }
  1246. il_reset_traffic_log(il);
  1247. return 0;
  1248. }
  1249. EXPORT_SYMBOL(il_alloc_traffic_mem);
  1250. void il_free_traffic_mem(struct il_priv *il)
  1251. {
  1252. kfree(il->tx_traffic);
  1253. il->tx_traffic = NULL;
  1254. kfree(il->rx_traffic);
  1255. il->rx_traffic = NULL;
  1256. }
  1257. EXPORT_SYMBOL(il_free_traffic_mem);
  1258. void il_dbg_log_tx_data_frame(struct il_priv *il,
  1259. u16 length, struct ieee80211_hdr *header)
  1260. {
  1261. __le16 fc;
  1262. u16 len;
  1263. if (likely(!(il_debug_level & IL_DL_TX)))
  1264. return;
  1265. if (!il->tx_traffic)
  1266. return;
  1267. fc = header->frame_control;
  1268. if (ieee80211_is_data(fc)) {
  1269. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  1270. ? IL_TRAFFIC_ENTRY_SIZE : length;
  1271. memcpy((il->tx_traffic +
  1272. (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  1273. header, len);
  1274. il->tx_traffic_idx =
  1275. (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  1276. }
  1277. }
  1278. EXPORT_SYMBOL(il_dbg_log_tx_data_frame);
  1279. void il_dbg_log_rx_data_frame(struct il_priv *il,
  1280. u16 length, struct ieee80211_hdr *header)
  1281. {
  1282. __le16 fc;
  1283. u16 len;
  1284. if (likely(!(il_debug_level & IL_DL_RX)))
  1285. return;
  1286. if (!il->rx_traffic)
  1287. return;
  1288. fc = header->frame_control;
  1289. if (ieee80211_is_data(fc)) {
  1290. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  1291. ? IL_TRAFFIC_ENTRY_SIZE : length;
  1292. memcpy((il->rx_traffic +
  1293. (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  1294. header, len);
  1295. il->rx_traffic_idx =
  1296. (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  1297. }
  1298. }
  1299. EXPORT_SYMBOL(il_dbg_log_rx_data_frame);
  1300. const char *il_get_mgmt_string(int cmd)
  1301. {
  1302. switch (cmd) {
  1303. IL_CMD(MANAGEMENT_ASSOC_REQ);
  1304. IL_CMD(MANAGEMENT_ASSOC_RESP);
  1305. IL_CMD(MANAGEMENT_REASSOC_REQ);
  1306. IL_CMD(MANAGEMENT_REASSOC_RESP);
  1307. IL_CMD(MANAGEMENT_PROBE_REQ);
  1308. IL_CMD(MANAGEMENT_PROBE_RESP);
  1309. IL_CMD(MANAGEMENT_BEACON);
  1310. IL_CMD(MANAGEMENT_ATIM);
  1311. IL_CMD(MANAGEMENT_DISASSOC);
  1312. IL_CMD(MANAGEMENT_AUTH);
  1313. IL_CMD(MANAGEMENT_DEAUTH);
  1314. IL_CMD(MANAGEMENT_ACTION);
  1315. default:
  1316. return "UNKNOWN";
  1317. }
  1318. }
  1319. const char *il_get_ctrl_string(int cmd)
  1320. {
  1321. switch (cmd) {
  1322. IL_CMD(CONTROL_BACK_REQ);
  1323. IL_CMD(CONTROL_BACK);
  1324. IL_CMD(CONTROL_PSPOLL);
  1325. IL_CMD(CONTROL_RTS);
  1326. IL_CMD(CONTROL_CTS);
  1327. IL_CMD(CONTROL_ACK);
  1328. IL_CMD(CONTROL_CFEND);
  1329. IL_CMD(CONTROL_CFENDACK);
  1330. default:
  1331. return "UNKNOWN";
  1332. }
  1333. }
  1334. void il_clear_traffic_stats(struct il_priv *il)
  1335. {
  1336. memset(&il->tx_stats, 0, sizeof(struct traffic_stats));
  1337. memset(&il->rx_stats, 0, sizeof(struct traffic_stats));
  1338. }
  1339. /*
  1340. * if CONFIG_IWLEGACY_DEBUGFS defined,
  1341. * il_update_stats function will
  1342. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass
  1343. * Use debugFs to display the rx/rx_statistics
  1344. * if CONFIG_IWLEGACY_DEBUGFS not being defined, then no MGMT and CTRL
  1345. * information will be recorded, but DATA pkt still will be recorded
  1346. * for the reason of il_led.c need to control the led blinking based on
  1347. * number of tx and rx data.
  1348. *
  1349. */
  1350. void
  1351. il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
  1352. {
  1353. struct traffic_stats *stats;
  1354. if (is_tx)
  1355. stats = &il->tx_stats;
  1356. else
  1357. stats = &il->rx_stats;
  1358. if (ieee80211_is_mgmt(fc)) {
  1359. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1360. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  1361. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  1362. break;
  1363. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  1364. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  1365. break;
  1366. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  1367. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  1368. break;
  1369. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  1370. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  1371. break;
  1372. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  1373. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  1374. break;
  1375. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  1376. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  1377. break;
  1378. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  1379. stats->mgmt[MANAGEMENT_BEACON]++;
  1380. break;
  1381. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  1382. stats->mgmt[MANAGEMENT_ATIM]++;
  1383. break;
  1384. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  1385. stats->mgmt[MANAGEMENT_DISASSOC]++;
  1386. break;
  1387. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  1388. stats->mgmt[MANAGEMENT_AUTH]++;
  1389. break;
  1390. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  1391. stats->mgmt[MANAGEMENT_DEAUTH]++;
  1392. break;
  1393. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  1394. stats->mgmt[MANAGEMENT_ACTION]++;
  1395. break;
  1396. }
  1397. } else if (ieee80211_is_ctl(fc)) {
  1398. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1399. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  1400. stats->ctrl[CONTROL_BACK_REQ]++;
  1401. break;
  1402. case cpu_to_le16(IEEE80211_STYPE_BACK):
  1403. stats->ctrl[CONTROL_BACK]++;
  1404. break;
  1405. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  1406. stats->ctrl[CONTROL_PSPOLL]++;
  1407. break;
  1408. case cpu_to_le16(IEEE80211_STYPE_RTS):
  1409. stats->ctrl[CONTROL_RTS]++;
  1410. break;
  1411. case cpu_to_le16(IEEE80211_STYPE_CTS):
  1412. stats->ctrl[CONTROL_CTS]++;
  1413. break;
  1414. case cpu_to_le16(IEEE80211_STYPE_ACK):
  1415. stats->ctrl[CONTROL_ACK]++;
  1416. break;
  1417. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  1418. stats->ctrl[CONTROL_CFEND]++;
  1419. break;
  1420. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  1421. stats->ctrl[CONTROL_CFENDACK]++;
  1422. break;
  1423. }
  1424. } else {
  1425. /* data */
  1426. stats->data_cnt++;
  1427. stats->data_bytes += len;
  1428. }
  1429. }
  1430. EXPORT_SYMBOL(il_update_stats);
  1431. #endif
  1432. int il_force_reset(struct il_priv *il, bool external)
  1433. {
  1434. struct il_force_reset *force_reset;
  1435. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  1436. return -EINVAL;
  1437. force_reset = &il->force_reset;
  1438. force_reset->reset_request_count++;
  1439. if (!external) {
  1440. if (force_reset->last_force_reset_jiffies &&
  1441. time_after(force_reset->last_force_reset_jiffies +
  1442. force_reset->reset_duration, jiffies)) {
  1443. D_INFO("force reset rejected\n");
  1444. force_reset->reset_reject_count++;
  1445. return -EAGAIN;
  1446. }
  1447. }
  1448. force_reset->reset_success_count++;
  1449. force_reset->last_force_reset_jiffies = jiffies;
  1450. /*
  1451. * if the request is from external(ex: debugfs),
  1452. * then always perform the request in regardless the module
  1453. * parameter setting
  1454. * if the request is from internal (uCode error or driver
  1455. * detect failure), then fw_restart module parameter
  1456. * need to be check before performing firmware reload
  1457. */
  1458. if (!external && !il->cfg->mod_params->restart_fw) {
  1459. D_INFO("Cancel firmware reload based on "
  1460. "module parameter setting\n");
  1461. return 0;
  1462. }
  1463. IL_ERR("On demand firmware reload\n");
  1464. /* Set the FW error flag -- cleared on il_down */
  1465. set_bit(STATUS_FW_ERROR, &il->status);
  1466. wake_up(&il->wait_command_queue);
  1467. /*
  1468. * Keep the restart process from trying to send host
  1469. * commands by clearing the INIT status bit
  1470. */
  1471. clear_bit(STATUS_READY, &il->status);
  1472. queue_work(il->workqueue, &il->restart);
  1473. return 0;
  1474. }
  1475. int
  1476. il_mac_change_interface(struct ieee80211_hw *hw,
  1477. struct ieee80211_vif *vif,
  1478. enum nl80211_iftype newtype, bool newp2p)
  1479. {
  1480. struct il_priv *il = hw->priv;
  1481. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1482. struct il_rxon_context *tmp;
  1483. u32 interface_modes;
  1484. int err;
  1485. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  1486. mutex_lock(&il->mutex);
  1487. if (!ctx->vif || !il_is_ready_rf(il)) {
  1488. /*
  1489. * Huh? But wait ... this can maybe happen when
  1490. * we're in the middle of a firmware restart!
  1491. */
  1492. err = -EBUSY;
  1493. goto out;
  1494. }
  1495. interface_modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  1496. if (!(interface_modes & BIT(newtype))) {
  1497. err = -EBUSY;
  1498. goto out;
  1499. }
  1500. if (ctx->exclusive_interface_modes & BIT(newtype)) {
  1501. for_each_context(il, tmp) {
  1502. if (ctx == tmp)
  1503. continue;
  1504. if (!tmp->vif)
  1505. continue;
  1506. /*
  1507. * The current mode switch would be exclusive, but
  1508. * another context is active ... refuse the switch.
  1509. */
  1510. err = -EBUSY;
  1511. goto out;
  1512. }
  1513. }
  1514. /* success */
  1515. il_teardown_interface(il, vif, true);
  1516. vif->type = newtype;
  1517. vif->p2p = newp2p;
  1518. err = il_setup_interface(il, ctx);
  1519. WARN_ON(err);
  1520. /*
  1521. * We've switched internally, but submitting to the
  1522. * device may have failed for some reason. Mask this
  1523. * error, because otherwise mac80211 will not switch
  1524. * (and set the interface type back) and we'll be
  1525. * out of sync with it.
  1526. */
  1527. err = 0;
  1528. out:
  1529. mutex_unlock(&il->mutex);
  1530. return err;
  1531. }
  1532. EXPORT_SYMBOL(il_mac_change_interface);
  1533. /*
  1534. * On every watchdog tick we check (latest) time stamp. If it does not
  1535. * change during timeout period and queue is not empty we reset firmware.
  1536. */
  1537. static int il_check_stuck_queue(struct il_priv *il, int cnt)
  1538. {
  1539. struct il_tx_queue *txq = &il->txq[cnt];
  1540. struct il_queue *q = &txq->q;
  1541. unsigned long timeout;
  1542. int ret;
  1543. if (q->read_ptr == q->write_ptr) {
  1544. txq->time_stamp = jiffies;
  1545. return 0;
  1546. }
  1547. timeout = txq->time_stamp +
  1548. msecs_to_jiffies(il->cfg->base_params->wd_timeout);
  1549. if (time_after(jiffies, timeout)) {
  1550. IL_ERR("Queue %d stuck for %u ms.\n",
  1551. q->id, il->cfg->base_params->wd_timeout);
  1552. ret = il_force_reset(il, false);
  1553. return (ret == -EAGAIN) ? 0 : 1;
  1554. }
  1555. return 0;
  1556. }
  1557. /*
  1558. * Making watchdog tick be a quarter of timeout assure we will
  1559. * discover the queue hung between timeout and 1.25*timeout
  1560. */
  1561. #define IL_WD_TICK(timeout) ((timeout) / 4)
  1562. /*
  1563. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  1564. * we reset the firmware. If everything is fine just rearm the timer.
  1565. */
  1566. void il_bg_watchdog(unsigned long data)
  1567. {
  1568. struct il_priv *il = (struct il_priv *)data;
  1569. int cnt;
  1570. unsigned long timeout;
  1571. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  1572. return;
  1573. timeout = il->cfg->base_params->wd_timeout;
  1574. if (timeout == 0)
  1575. return;
  1576. /* monitor and check for stuck cmd queue */
  1577. if (il_check_stuck_queue(il, il->cmd_queue))
  1578. return;
  1579. /* monitor and check for other stuck queues */
  1580. if (il_is_any_associated(il)) {
  1581. for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
  1582. /* skip as we already checked the command queue */
  1583. if (cnt == il->cmd_queue)
  1584. continue;
  1585. if (il_check_stuck_queue(il, cnt))
  1586. return;
  1587. }
  1588. }
  1589. mod_timer(&il->watchdog, jiffies +
  1590. msecs_to_jiffies(IL_WD_TICK(timeout)));
  1591. }
  1592. EXPORT_SYMBOL(il_bg_watchdog);
  1593. void il_setup_watchdog(struct il_priv *il)
  1594. {
  1595. unsigned int timeout = il->cfg->base_params->wd_timeout;
  1596. if (timeout)
  1597. mod_timer(&il->watchdog,
  1598. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  1599. else
  1600. del_timer(&il->watchdog);
  1601. }
  1602. EXPORT_SYMBOL(il_setup_watchdog);
  1603. /*
  1604. * extended beacon time format
  1605. * time in usec will be changed into a 32-bit value in extended:internal format
  1606. * the extended part is the beacon counts
  1607. * the internal part is the time in usec within one beacon interval
  1608. */
  1609. u32
  1610. il_usecs_to_beacons(struct il_priv *il,
  1611. u32 usec, u32 beacon_interval)
  1612. {
  1613. u32 quot;
  1614. u32 rem;
  1615. u32 interval = beacon_interval * TIME_UNIT;
  1616. if (!interval || !usec)
  1617. return 0;
  1618. quot = (usec / interval) &
  1619. (il_beacon_time_mask_high(il,
  1620. il->hw_params.beacon_time_tsf_bits) >>
  1621. il->hw_params.beacon_time_tsf_bits);
  1622. rem = (usec % interval) & il_beacon_time_mask_low(il,
  1623. il->hw_params.beacon_time_tsf_bits);
  1624. return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
  1625. }
  1626. EXPORT_SYMBOL(il_usecs_to_beacons);
  1627. /* base is usually what we get from ucode with each received frame,
  1628. * the same as HW timer counter counting down
  1629. */
  1630. __le32 il_add_beacon_time(struct il_priv *il, u32 base,
  1631. u32 addon, u32 beacon_interval)
  1632. {
  1633. u32 base_low = base & il_beacon_time_mask_low(il,
  1634. il->hw_params.beacon_time_tsf_bits);
  1635. u32 addon_low = addon & il_beacon_time_mask_low(il,
  1636. il->hw_params.beacon_time_tsf_bits);
  1637. u32 interval = beacon_interval * TIME_UNIT;
  1638. u32 res = (base & il_beacon_time_mask_high(il,
  1639. il->hw_params.beacon_time_tsf_bits)) +
  1640. (addon & il_beacon_time_mask_high(il,
  1641. il->hw_params.beacon_time_tsf_bits));
  1642. if (base_low > addon_low)
  1643. res += base_low - addon_low;
  1644. else if (base_low < addon_low) {
  1645. res += interval + base_low - addon_low;
  1646. res += (1 << il->hw_params.beacon_time_tsf_bits);
  1647. } else
  1648. res += (1 << il->hw_params.beacon_time_tsf_bits);
  1649. return cpu_to_le32(res);
  1650. }
  1651. EXPORT_SYMBOL(il_add_beacon_time);
  1652. #ifdef CONFIG_PM
  1653. int il_pci_suspend(struct device *device)
  1654. {
  1655. struct pci_dev *pdev = to_pci_dev(device);
  1656. struct il_priv *il = pci_get_drvdata(pdev);
  1657. /*
  1658. * This function is called when system goes into suspend state
  1659. * mac80211 will call il_mac_stop() from the mac80211 suspend function
  1660. * first but since il_mac_stop() has no knowledge of who the caller is,
  1661. * it will not call apm_ops.stop() to stop the DMA operation.
  1662. * Calling apm_ops.stop here to make sure we stop the DMA.
  1663. */
  1664. il_apm_stop(il);
  1665. return 0;
  1666. }
  1667. EXPORT_SYMBOL(il_pci_suspend);
  1668. int il_pci_resume(struct device *device)
  1669. {
  1670. struct pci_dev *pdev = to_pci_dev(device);
  1671. struct il_priv *il = pci_get_drvdata(pdev);
  1672. bool hw_rfkill = false;
  1673. /*
  1674. * We disable the RETRY_TIMEOUT register (0x41) to keep
  1675. * PCI Tx retries from interfering with C3 CPU state.
  1676. */
  1677. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  1678. il_enable_interrupts(il);
  1679. if (!(_il_rd(il, CSR_GP_CNTRL) &
  1680. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  1681. hw_rfkill = true;
  1682. if (hw_rfkill)
  1683. set_bit(STATUS_RF_KILL_HW, &il->status);
  1684. else
  1685. clear_bit(STATUS_RF_KILL_HW, &il->status);
  1686. wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
  1687. return 0;
  1688. }
  1689. EXPORT_SYMBOL(il_pci_resume);
  1690. const struct dev_pm_ops il_pm_ops = {
  1691. .suspend = il_pci_suspend,
  1692. .resume = il_pci_resume,
  1693. .freeze = il_pci_suspend,
  1694. .thaw = il_pci_resume,
  1695. .poweroff = il_pci_suspend,
  1696. .restore = il_pci_resume,
  1697. };
  1698. EXPORT_SYMBOL(il_pm_ops);
  1699. #endif /* CONFIG_PM */
  1700. static void
  1701. il_update_qos(struct il_priv *il, struct il_rxon_context *ctx)
  1702. {
  1703. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  1704. return;
  1705. if (!ctx->is_active)
  1706. return;
  1707. ctx->qos_data.def_qos_parm.qos_flags = 0;
  1708. if (ctx->qos_data.qos_active)
  1709. ctx->qos_data.def_qos_parm.qos_flags |=
  1710. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1711. if (ctx->ht.enabled)
  1712. ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1713. D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1714. ctx->qos_data.qos_active,
  1715. ctx->qos_data.def_qos_parm.qos_flags);
  1716. il_send_cmd_pdu_async(il, ctx->qos_cmd,
  1717. sizeof(struct il_qosparam_cmd),
  1718. &ctx->qos_data.def_qos_parm, NULL);
  1719. }
  1720. /**
  1721. * il_mac_config - mac80211 config callback
  1722. */
  1723. int il_mac_config(struct ieee80211_hw *hw, u32 changed)
  1724. {
  1725. struct il_priv *il = hw->priv;
  1726. const struct il_channel_info *ch_info;
  1727. struct ieee80211_conf *conf = &hw->conf;
  1728. struct ieee80211_channel *channel = conf->channel;
  1729. struct il_ht_config *ht_conf = &il->current_ht_config;
  1730. struct il_rxon_context *ctx;
  1731. unsigned long flags = 0;
  1732. int ret = 0;
  1733. u16 ch;
  1734. int scan_active = 0;
  1735. bool ht_changed = false;
  1736. if (WARN_ON(!il->cfg->ops->legacy))
  1737. return -EOPNOTSUPP;
  1738. mutex_lock(&il->mutex);
  1739. D_MAC80211("enter to channel %d changed 0x%X\n",
  1740. channel->hw_value, changed);
  1741. if (unlikely(test_bit(STATUS_SCANNING, &il->status))) {
  1742. scan_active = 1;
  1743. D_MAC80211("scan active\n");
  1744. }
  1745. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  1746. IEEE80211_CONF_CHANGE_CHANNEL)) {
  1747. /* mac80211 uses static for non-HT which is what we want */
  1748. il->current_ht_config.smps = conf->smps_mode;
  1749. /*
  1750. * Recalculate chain counts.
  1751. *
  1752. * If monitor mode is enabled then mac80211 will
  1753. * set up the SM PS mode to OFF if an HT channel is
  1754. * configured.
  1755. */
  1756. if (il->cfg->ops->hcmd->set_rxon_chain)
  1757. for_each_context(il, ctx)
  1758. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  1759. }
  1760. /* during scanning mac80211 will delay channel setting until
  1761. * scan finish with changed = 0
  1762. */
  1763. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  1764. if (scan_active)
  1765. goto set_ch_out;
  1766. ch = channel->hw_value;
  1767. ch_info = il_get_channel_info(il, channel->band, ch);
  1768. if (!il_is_channel_valid(ch_info)) {
  1769. D_MAC80211("leave - invalid channel\n");
  1770. ret = -EINVAL;
  1771. goto set_ch_out;
  1772. }
  1773. if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
  1774. !il_is_channel_ibss(ch_info)) {
  1775. D_MAC80211("leave - not IBSS channel\n");
  1776. ret = -EINVAL;
  1777. goto set_ch_out;
  1778. }
  1779. spin_lock_irqsave(&il->lock, flags);
  1780. for_each_context(il, ctx) {
  1781. /* Configure HT40 channels */
  1782. if (ctx->ht.enabled != conf_is_ht(conf)) {
  1783. ctx->ht.enabled = conf_is_ht(conf);
  1784. ht_changed = true;
  1785. }
  1786. if (ctx->ht.enabled) {
  1787. if (conf_is_ht40_minus(conf)) {
  1788. ctx->ht.extension_chan_offset =
  1789. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  1790. ctx->ht.is_40mhz = true;
  1791. } else if (conf_is_ht40_plus(conf)) {
  1792. ctx->ht.extension_chan_offset =
  1793. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  1794. ctx->ht.is_40mhz = true;
  1795. } else {
  1796. ctx->ht.extension_chan_offset =
  1797. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  1798. ctx->ht.is_40mhz = false;
  1799. }
  1800. } else
  1801. ctx->ht.is_40mhz = false;
  1802. /*
  1803. * Default to no protection. Protection mode will
  1804. * later be set from BSS config in il_ht_conf
  1805. */
  1806. ctx->ht.protection =
  1807. IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  1808. /* if we are switching from ht to 2.4 clear flags
  1809. * from any ht related info since 2.4 does not
  1810. * support ht */
  1811. if ((le16_to_cpu(ctx->staging.channel) != ch))
  1812. ctx->staging.flags = 0;
  1813. il_set_rxon_channel(il, channel, ctx);
  1814. il_set_rxon_ht(il, ht_conf);
  1815. il_set_flags_for_band(il, ctx, channel->band,
  1816. ctx->vif);
  1817. }
  1818. spin_unlock_irqrestore(&il->lock, flags);
  1819. if (il->cfg->ops->legacy->update_bcast_stations)
  1820. ret =
  1821. il->cfg->ops->legacy->update_bcast_stations(il);
  1822. set_ch_out:
  1823. /* The list of supported rates and rate mask can be different
  1824. * for each band; since the band may have changed, reset
  1825. * the rate mask to what mac80211 lists */
  1826. il_set_rate(il);
  1827. }
  1828. if (changed & (IEEE80211_CONF_CHANGE_PS |
  1829. IEEE80211_CONF_CHANGE_IDLE)) {
  1830. ret = il_power_update_mode(il, false);
  1831. if (ret)
  1832. D_MAC80211("Error setting sleep level\n");
  1833. }
  1834. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1835. D_MAC80211("TX Power old=%d new=%d\n",
  1836. il->tx_power_user_lmt, conf->power_level);
  1837. il_set_tx_power(il, conf->power_level, false);
  1838. }
  1839. if (!il_is_ready(il)) {
  1840. D_MAC80211("leave - not ready\n");
  1841. goto out;
  1842. }
  1843. if (scan_active)
  1844. goto out;
  1845. for_each_context(il, ctx) {
  1846. if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
  1847. il_commit_rxon(il, ctx);
  1848. else
  1849. D_INFO(
  1850. "Not re-sending same RXON configuration.\n");
  1851. if (ht_changed)
  1852. il_update_qos(il, ctx);
  1853. }
  1854. out:
  1855. D_MAC80211("leave\n");
  1856. mutex_unlock(&il->mutex);
  1857. return ret;
  1858. }
  1859. EXPORT_SYMBOL(il_mac_config);
  1860. void il_mac_reset_tsf(struct ieee80211_hw *hw,
  1861. struct ieee80211_vif *vif)
  1862. {
  1863. struct il_priv *il = hw->priv;
  1864. unsigned long flags;
  1865. struct il_rxon_context *ctx = &il->ctx;
  1866. if (WARN_ON(!il->cfg->ops->legacy))
  1867. return;
  1868. mutex_lock(&il->mutex);
  1869. D_MAC80211("enter\n");
  1870. spin_lock_irqsave(&il->lock, flags);
  1871. memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
  1872. spin_unlock_irqrestore(&il->lock, flags);
  1873. spin_lock_irqsave(&il->lock, flags);
  1874. /* new association get rid of ibss beacon skb */
  1875. if (il->beacon_skb)
  1876. dev_kfree_skb(il->beacon_skb);
  1877. il->beacon_skb = NULL;
  1878. il->timestamp = 0;
  1879. spin_unlock_irqrestore(&il->lock, flags);
  1880. il_scan_cancel_timeout(il, 100);
  1881. if (!il_is_ready_rf(il)) {
  1882. D_MAC80211("leave - not ready\n");
  1883. mutex_unlock(&il->mutex);
  1884. return;
  1885. }
  1886. /* we are restarting association process
  1887. * clear RXON_FILTER_ASSOC_MSK bit
  1888. */
  1889. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1890. il_commit_rxon(il, ctx);
  1891. il_set_rate(il);
  1892. mutex_unlock(&il->mutex);
  1893. D_MAC80211("leave\n");
  1894. }
  1895. EXPORT_SYMBOL(il_mac_reset_tsf);
  1896. static void il_ht_conf(struct il_priv *il,
  1897. struct ieee80211_vif *vif)
  1898. {
  1899. struct il_ht_config *ht_conf = &il->current_ht_config;
  1900. struct ieee80211_sta *sta;
  1901. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1902. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1903. D_ASSOC("enter:\n");
  1904. if (!ctx->ht.enabled)
  1905. return;
  1906. ctx->ht.protection =
  1907. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1908. ctx->ht.non_gf_sta_present =
  1909. !!(bss_conf->ht_operation_mode &
  1910. IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1911. ht_conf->single_chain_sufficient = false;
  1912. switch (vif->type) {
  1913. case NL80211_IFTYPE_STATION:
  1914. rcu_read_lock();
  1915. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  1916. if (sta) {
  1917. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  1918. int maxstreams;
  1919. maxstreams = (ht_cap->mcs.tx_params &
  1920. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  1921. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1922. maxstreams += 1;
  1923. if (ht_cap->mcs.rx_mask[1] == 0 &&
  1924. ht_cap->mcs.rx_mask[2] == 0)
  1925. ht_conf->single_chain_sufficient = true;
  1926. if (maxstreams <= 1)
  1927. ht_conf->single_chain_sufficient = true;
  1928. } else {
  1929. /*
  1930. * If at all, this can only happen through a race
  1931. * when the AP disconnects us while we're still
  1932. * setting up the connection, in that case mac80211
  1933. * will soon tell us about that.
  1934. */
  1935. ht_conf->single_chain_sufficient = true;
  1936. }
  1937. rcu_read_unlock();
  1938. break;
  1939. case NL80211_IFTYPE_ADHOC:
  1940. ht_conf->single_chain_sufficient = true;
  1941. break;
  1942. default:
  1943. break;
  1944. }
  1945. D_ASSOC("leave\n");
  1946. }
  1947. static inline void il_set_no_assoc(struct il_priv *il,
  1948. struct ieee80211_vif *vif)
  1949. {
  1950. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1951. /*
  1952. * inform the ucode that there is no longer an
  1953. * association and that no more packets should be
  1954. * sent
  1955. */
  1956. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1957. ctx->staging.assoc_id = 0;
  1958. il_commit_rxon(il, ctx);
  1959. }
  1960. static void il_beacon_update(struct ieee80211_hw *hw,
  1961. struct ieee80211_vif *vif)
  1962. {
  1963. struct il_priv *il = hw->priv;
  1964. unsigned long flags;
  1965. __le64 timestamp;
  1966. struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
  1967. if (!skb)
  1968. return;
  1969. D_MAC80211("enter\n");
  1970. lockdep_assert_held(&il->mutex);
  1971. if (!il->beacon_ctx) {
  1972. IL_ERR("update beacon but no beacon context!\n");
  1973. dev_kfree_skb(skb);
  1974. return;
  1975. }
  1976. spin_lock_irqsave(&il->lock, flags);
  1977. if (il->beacon_skb)
  1978. dev_kfree_skb(il->beacon_skb);
  1979. il->beacon_skb = skb;
  1980. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  1981. il->timestamp = le64_to_cpu(timestamp);
  1982. D_MAC80211("leave\n");
  1983. spin_unlock_irqrestore(&il->lock, flags);
  1984. if (!il_is_ready_rf(il)) {
  1985. D_MAC80211("leave - RF not ready\n");
  1986. return;
  1987. }
  1988. il->cfg->ops->legacy->post_associate(il);
  1989. }
  1990. void il_mac_bss_info_changed(struct ieee80211_hw *hw,
  1991. struct ieee80211_vif *vif,
  1992. struct ieee80211_bss_conf *bss_conf,
  1993. u32 changes)
  1994. {
  1995. struct il_priv *il = hw->priv;
  1996. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1997. int ret;
  1998. if (WARN_ON(!il->cfg->ops->legacy))
  1999. return;
  2000. D_MAC80211("changes = 0x%X\n", changes);
  2001. mutex_lock(&il->mutex);
  2002. if (!il_is_alive(il)) {
  2003. mutex_unlock(&il->mutex);
  2004. return;
  2005. }
  2006. if (changes & BSS_CHANGED_QOS) {
  2007. unsigned long flags;
  2008. spin_lock_irqsave(&il->lock, flags);
  2009. ctx->qos_data.qos_active = bss_conf->qos;
  2010. il_update_qos(il, ctx);
  2011. spin_unlock_irqrestore(&il->lock, flags);
  2012. }
  2013. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  2014. /*
  2015. * the add_interface code must make sure we only ever
  2016. * have a single interface that could be beaconing at
  2017. * any time.
  2018. */
  2019. if (vif->bss_conf.enable_beacon)
  2020. il->beacon_ctx = ctx;
  2021. else
  2022. il->beacon_ctx = NULL;
  2023. }
  2024. if (changes & BSS_CHANGED_BSSID) {
  2025. D_MAC80211("BSSID %pM\n", bss_conf->bssid);
  2026. /*
  2027. * If there is currently a HW scan going on in the
  2028. * background then we need to cancel it else the RXON
  2029. * below/in post_associate will fail.
  2030. */
  2031. if (il_scan_cancel_timeout(il, 100)) {
  2032. IL_WARN(
  2033. "Aborted scan still in progress after 100ms\n");
  2034. D_MAC80211(
  2035. "leaving - scan abort failed.\n");
  2036. mutex_unlock(&il->mutex);
  2037. return;
  2038. }
  2039. /* mac80211 only sets assoc when in STATION mode */
  2040. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  2041. memcpy(ctx->staging.bssid_addr,
  2042. bss_conf->bssid, ETH_ALEN);
  2043. /* currently needed in a few places */
  2044. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  2045. } else {
  2046. ctx->staging.filter_flags &=
  2047. ~RXON_FILTER_ASSOC_MSK;
  2048. }
  2049. }
  2050. /*
  2051. * This needs to be after setting the BSSID in case
  2052. * mac80211 decides to do both changes at once because
  2053. * it will invoke post_associate.
  2054. */
  2055. if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
  2056. il_beacon_update(hw, vif);
  2057. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  2058. D_MAC80211("ERP_PREAMBLE %d\n",
  2059. bss_conf->use_short_preamble);
  2060. if (bss_conf->use_short_preamble)
  2061. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2062. else
  2063. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2064. }
  2065. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  2066. D_MAC80211(
  2067. "ERP_CTS %d\n", bss_conf->use_cts_prot);
  2068. if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
  2069. ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
  2070. else
  2071. ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  2072. if (bss_conf->use_cts_prot)
  2073. ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
  2074. else
  2075. ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
  2076. }
  2077. if (changes & BSS_CHANGED_BASIC_RATES) {
  2078. /* XXX use this information
  2079. *
  2080. * To do that, remove code from il_set_rate() and put something
  2081. * like this here:
  2082. *
  2083. if (A-band)
  2084. ctx->staging.ofdm_basic_rates =
  2085. bss_conf->basic_rates;
  2086. else
  2087. ctx->staging.ofdm_basic_rates =
  2088. bss_conf->basic_rates >> 4;
  2089. ctx->staging.cck_basic_rates =
  2090. bss_conf->basic_rates & 0xF;
  2091. */
  2092. }
  2093. if (changes & BSS_CHANGED_HT) {
  2094. il_ht_conf(il, vif);
  2095. if (il->cfg->ops->hcmd->set_rxon_chain)
  2096. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  2097. }
  2098. if (changes & BSS_CHANGED_ASSOC) {
  2099. D_MAC80211("ASSOC %d\n", bss_conf->assoc);
  2100. if (bss_conf->assoc) {
  2101. il->timestamp = bss_conf->timestamp;
  2102. if (!il_is_rfkill(il))
  2103. il->cfg->ops->legacy->post_associate(il);
  2104. } else
  2105. il_set_no_assoc(il, vif);
  2106. }
  2107. if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) {
  2108. D_MAC80211("Changes (%#x) while associated\n",
  2109. changes);
  2110. ret = il_send_rxon_assoc(il, ctx);
  2111. if (!ret) {
  2112. /* Sync active_rxon with latest change. */
  2113. memcpy((void *)&ctx->active,
  2114. &ctx->staging,
  2115. sizeof(struct il_rxon_cmd));
  2116. }
  2117. }
  2118. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  2119. if (vif->bss_conf.enable_beacon) {
  2120. memcpy(ctx->staging.bssid_addr,
  2121. bss_conf->bssid, ETH_ALEN);
  2122. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  2123. il->cfg->ops->legacy->config_ap(il);
  2124. } else
  2125. il_set_no_assoc(il, vif);
  2126. }
  2127. if (changes & BSS_CHANGED_IBSS) {
  2128. ret = il->cfg->ops->legacy->manage_ibss_station(il, vif,
  2129. bss_conf->ibss_joined);
  2130. if (ret)
  2131. IL_ERR("failed to %s IBSS station %pM\n",
  2132. bss_conf->ibss_joined ? "add" : "remove",
  2133. bss_conf->bssid);
  2134. }
  2135. mutex_unlock(&il->mutex);
  2136. D_MAC80211("leave\n");
  2137. }
  2138. EXPORT_SYMBOL(il_mac_bss_info_changed);
  2139. irqreturn_t il_isr(int irq, void *data)
  2140. {
  2141. struct il_priv *il = data;
  2142. u32 inta, inta_mask;
  2143. u32 inta_fh;
  2144. unsigned long flags;
  2145. if (!il)
  2146. return IRQ_NONE;
  2147. spin_lock_irqsave(&il->lock, flags);
  2148. /* Disable (but don't clear!) interrupts here to avoid
  2149. * back-to-back ISRs and sporadic interrupts from our NIC.
  2150. * If we have something to service, the tasklet will re-enable ints.
  2151. * If we *don't* have something, we'll re-enable before leaving here. */
  2152. inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
  2153. _il_wr(il, CSR_INT_MASK, 0x00000000);
  2154. /* Discover which interrupts are active/pending */
  2155. inta = _il_rd(il, CSR_INT);
  2156. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  2157. /* Ignore interrupt if there's nothing in NIC to service.
  2158. * This may be due to IRQ shared with another device,
  2159. * or due to sporadic interrupts thrown from our NIC. */
  2160. if (!inta && !inta_fh) {
  2161. D_ISR(
  2162. "Ignore interrupt, inta == 0, inta_fh == 0\n");
  2163. goto none;
  2164. }
  2165. if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
  2166. /* Hardware disappeared. It might have already raised
  2167. * an interrupt */
  2168. IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
  2169. goto unplugged;
  2170. }
  2171. D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2172. inta, inta_mask, inta_fh);
  2173. inta &= ~CSR_INT_BIT_SCD;
  2174. /* il_irq_tasklet() will service interrupts and re-enable them */
  2175. if (likely(inta || inta_fh))
  2176. tasklet_schedule(&il->irq_tasklet);
  2177. unplugged:
  2178. spin_unlock_irqrestore(&il->lock, flags);
  2179. return IRQ_HANDLED;
  2180. none:
  2181. /* re-enable interrupts here since we don't have anything to service. */
  2182. /* only Re-enable if disabled by irq */
  2183. if (test_bit(STATUS_INT_ENABLED, &il->status))
  2184. il_enable_interrupts(il);
  2185. spin_unlock_irqrestore(&il->lock, flags);
  2186. return IRQ_NONE;
  2187. }
  2188. EXPORT_SYMBOL(il_isr);
  2189. /*
  2190. * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  2191. * function.
  2192. */
  2193. void il_tx_cmd_protection(struct il_priv *il,
  2194. struct ieee80211_tx_info *info,
  2195. __le16 fc, __le32 *tx_flags)
  2196. {
  2197. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  2198. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  2199. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2200. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2201. if (!ieee80211_is_mgmt(fc))
  2202. return;
  2203. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2204. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2205. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2206. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2207. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2208. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2209. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  2210. break;
  2211. }
  2212. } else if (info->control.rates[0].flags &
  2213. IEEE80211_TX_RC_USE_CTS_PROTECT) {
  2214. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2215. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  2216. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2217. }
  2218. }
  2219. EXPORT_SYMBOL(il_tx_cmd_protection);