saa7164-core.c 31 KB

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  1. /*
  2. * Driver for the NXP SAA7164 PCIe bridge
  3. *
  4. * Copyright (c) 2010 Steven Toth <stoth@kernellabs.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/kmod.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/delay.h>
  30. #include <asm/div64.h>
  31. #include "saa7164.h"
  32. MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
  33. MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
  34. MODULE_LICENSE("GPL");
  35. /*
  36. 1 Basic
  37. 2
  38. 4 i2c
  39. 8 api
  40. 16 cmd
  41. 32 bus
  42. */
  43. unsigned int saa_debug;
  44. module_param_named(debug, saa_debug, int, 0644);
  45. MODULE_PARM_DESC(debug, "enable debug messages");
  46. unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
  47. module_param(encoder_buffers, int, 0644);
  48. MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
  49. unsigned int waitsecs = 10;
  50. module_param(waitsecs, int, 0644);
  51. MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
  52. static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
  53. module_param_array(card, int, NULL, 0444);
  54. MODULE_PARM_DESC(card, "card type");
  55. unsigned int print_histogram = 64;
  56. module_param(print_histogram, int, 0644);
  57. MODULE_PARM_DESC(print_histogram, "print histogram values once");
  58. static unsigned int saa7164_devcount;
  59. static DEFINE_MUTEX(devlist);
  60. LIST_HEAD(saa7164_devlist);
  61. #define INT_SIZE 16
  62. void saa7164_dumphex16FF(struct saa7164_dev *dev, u8 *buf, int len)
  63. {
  64. int i;
  65. u8 tmp[16];
  66. memset(&tmp[0], 0xff, sizeof(tmp));
  67. printk(KERN_INFO "--------------------> "
  68. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  69. for (i = 0; i < len; i += 16) {
  70. if (memcmp(&tmp, buf + i, sizeof(tmp)) != 0) {
  71. printk(KERN_INFO " [0x%08x] "
  72. "%02x %02x %02x %02x %02x %02x %02x %02x "
  73. "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  74. *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3),
  75. *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7),
  76. *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11),
  77. *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15));
  78. }
  79. }
  80. }
  81. static void saa7164_pack_verifier(struct saa7164_buffer *buf)
  82. {
  83. u8 *p = (u8 *)buf->cpu;
  84. int i;
  85. for (i = 0; i < buf->actual_size; i += 2048) {
  86. if ( (*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) || (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA) )
  87. printk(KERN_ERR "No pack at 0x%x\n", i);
  88. }
  89. }
  90. static void saa7164_ts_verifier(struct saa7164_buffer *buf)
  91. {
  92. struct saa7164_port *port = buf->port;
  93. u32 i;
  94. u8 tmp, cc, a;
  95. u8 *bufcpu = (u8 *)buf->cpu;
  96. port->sync_errors = 0;
  97. port->v_cc_errors = 0;
  98. port->a_cc_errors = 0;
  99. for (i = 0; i < buf->actual_size; i += 188) {
  100. if (*(bufcpu + i) != 0x47)
  101. port->sync_errors++;
  102. /* Query pid lower 8 bits */
  103. tmp = *(bufcpu + i + 2);
  104. cc = *(bufcpu + i + 3) & 0x0f;
  105. if (tmp == 0xf1) {
  106. a = ((port->last_v_cc + 1) & 0x0f);
  107. if (a != cc) {
  108. printk(KERN_ERR "video cc last = %x current = %x i = %d\n", port->last_v_cc, cc, i);
  109. port->v_cc_errors++;
  110. }
  111. port->last_v_cc = cc;
  112. } else
  113. if (tmp == 0xf2) {
  114. a = ((port->last_a_cc + 1) & 0x0f);
  115. if (a != cc) {
  116. printk(KERN_ERR "audio cc last = %x current = %x i = %d\n", port->last_a_cc, cc, i);
  117. port->a_cc_errors++;
  118. }
  119. port->last_a_cc = cc;
  120. }
  121. }
  122. if (port->v_cc_errors)
  123. printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
  124. if (port->a_cc_errors)
  125. printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
  126. if (port->sync_errors)
  127. printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
  128. }
  129. static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
  130. {
  131. int i;
  132. memset(hg, 0, sizeof(struct saa7164_histogram));
  133. strcpy(hg->name, name);
  134. /* First 30ms x 1ms */
  135. for (i = 0; i < 30; i++) {
  136. hg->counter1[0 + i].val = i;
  137. }
  138. /* 30 - 200ms x 10ms */
  139. for (i = 0; i < 18; i++) {
  140. hg->counter1[30 + i].val = 30 + (i * 10);
  141. }
  142. /* 200 - 2000ms x 100ms */
  143. for (i = 0; i < 15; i++) {
  144. hg->counter1[48 + i].val = 200 + (i * 200);
  145. }
  146. /* Catch all massive value (2secs) */
  147. hg->counter1[55].val = 2000;
  148. /* Catch all massive value (4secs) */
  149. hg->counter1[56].val = 4000;
  150. /* Catch all massive value (8secs) */
  151. hg->counter1[57].val = 8000;
  152. /* Catch all massive value (15secs) */
  153. hg->counter1[58].val = 15000;
  154. /* Catch all massive value (30secs) */
  155. hg->counter1[59].val = 30000;
  156. /* Catch all massive value (60secs) */
  157. hg->counter1[60].val = 60000;
  158. /* Catch all massive value (5mins) */
  159. hg->counter1[61].val = 300000;
  160. /* Catch all massive value (15mins) */
  161. hg->counter1[62].val = 900000;
  162. /* Catch all massive values (1hr) */
  163. hg->counter1[63].val = 3600000;
  164. }
  165. void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
  166. {
  167. int i;
  168. for (i = 0; i < 64; i++ ) {
  169. if (val <= hg->counter1[i].val) {
  170. hg->counter1[i].count++;
  171. hg->counter1[i].update_time = jiffies;
  172. break;
  173. }
  174. }
  175. }
  176. static void saa7164_histogram_print(struct saa7164_port *port,
  177. struct saa7164_histogram *hg)
  178. {
  179. u32 entries = 0;
  180. int i;
  181. printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
  182. for (i = 0; i < 64; i++ ) {
  183. if (hg->counter1[i].count == 0)
  184. continue;
  185. printk(KERN_ERR " %4d %12d %Ld\n",
  186. hg->counter1[i].val,
  187. hg->counter1[i].count,
  188. hg->counter1[i].update_time);
  189. entries++;
  190. }
  191. printk(KERN_ERR "Total: %d\n", entries);
  192. }
  193. static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
  194. {
  195. struct saa7164_dev *dev = port->dev;
  196. struct saa7164_buffer *buf = 0;
  197. struct saa7164_user_buffer *ubuf = 0;
  198. struct list_head *c, *n;
  199. int i = 0;
  200. mutex_lock(&port->dmaqueue_lock);
  201. list_for_each_safe(c, n, &port->dmaqueue.list) {
  202. buf = list_entry(c, struct saa7164_buffer, list);
  203. if (i++ > port->hwcfg.buffercount) {
  204. printk(KERN_ERR "%s() illegal i count %d\n",
  205. __func__, i);
  206. break;
  207. }
  208. if (buf->idx == bufnr) {
  209. /* Found the buffer, deal with it */
  210. dprintk(DBGLVL_IRQ, "%s() rp: %d\n", __func__, bufnr);
  211. /* Validate the incoming buffer content */
  212. if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
  213. saa7164_ts_verifier(buf);
  214. if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
  215. saa7164_pack_verifier(buf);
  216. /* find a free user buffer and clone to it */
  217. if (!list_empty(&port->list_buf_free.list)) {
  218. /* Pull the first buffer from the used list */
  219. ubuf = list_first_entry(&port->list_buf_free.list,
  220. struct saa7164_user_buffer, list);
  221. if (buf->actual_size <= ubuf->actual_size) {
  222. memcpy_fromio(ubuf->data, buf->cpu,
  223. ubuf->actual_size);
  224. /* Throw a new checksum on the read buffer */
  225. ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
  226. /* Requeue the buffer on the free list */
  227. ubuf->pos = 0;
  228. list_move_tail(&ubuf->list,
  229. &port->list_buf_used.list);
  230. /* Flag any userland waiters */
  231. wake_up_interruptible(&port->wait_read);
  232. } else {
  233. printk(KERN_ERR "buf %p bufsize fails match\n", buf);
  234. }
  235. } else
  236. printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
  237. /* Ensure offset into buffer remains 0, fill buffer
  238. * with known bad data. We check for this data at a later point
  239. * in time. */
  240. saa7164_buffer_zero_offsets(port, bufnr);
  241. memset_io(buf->cpu, 0xff, buf->pci_size);
  242. break;
  243. }
  244. }
  245. mutex_unlock(&port->dmaqueue_lock);
  246. }
  247. static void saa7164_work_enchandler(struct work_struct *w)
  248. {
  249. struct saa7164_port *port =
  250. container_of(w, struct saa7164_port, workenc);
  251. struct saa7164_dev *dev = port->dev;
  252. u32 wp, mcb, rp, cnt = 0;
  253. port->last_svc_msecs_diff = port->last_svc_msecs;
  254. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  255. port->last_svc_msecs_diff = port->last_svc_msecs -
  256. port->last_svc_msecs_diff;
  257. saa7164_histogram_update(&port->svc_interval,
  258. port->last_svc_msecs_diff);
  259. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  260. port->last_irq_msecs;
  261. saa7164_histogram_update(&port->irq_svc_interval,
  262. port->last_irq_svc_msecs_diff);
  263. dprintk(DBGLVL_IRQ,
  264. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  265. __func__,
  266. port->last_svc_msecs_diff,
  267. port->last_irq_svc_msecs_diff,
  268. port->last_svc_wp,
  269. port->last_svc_rp
  270. );
  271. /* Current write position */
  272. wp = saa7164_readl(port->bufcounter);
  273. if (wp > (port->hwcfg.buffercount - 1)) {
  274. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  275. return;
  276. }
  277. /* Most current complete buffer */
  278. if (wp == 0)
  279. mcb = 7;
  280. else
  281. mcb = wp - 1;
  282. while (1) {
  283. rp = (port->last_svc_rp + 1) % 8;
  284. if ((rp < 0) || (rp > 7)) {
  285. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  286. break;
  287. }
  288. saa7164_work_enchandler_helper(port, rp);
  289. port->last_svc_rp = rp;
  290. cnt++;
  291. if (rp == mcb)
  292. break;
  293. }
  294. if (print_histogram == port->nr) {
  295. saa7164_histogram_print(port, &port->irq_interval);
  296. saa7164_histogram_print(port, &port->svc_interval);
  297. saa7164_histogram_print(port, &port->irq_svc_interval);
  298. saa7164_histogram_print(port, &port->read_interval);
  299. saa7164_histogram_print(port, &port->poll_interval);
  300. /* TODO: fix this to preserve any previous state */
  301. print_histogram = 64 + port->nr;
  302. }
  303. }
  304. static void saa7164_work_cmdhandler(struct work_struct *w)
  305. {
  306. struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
  307. /* Wake up any complete commands */
  308. saa7164_irq_dequeue(dev);
  309. }
  310. static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
  311. {
  312. struct saa7164_port *port = buf->port;
  313. /* Feed the transport payload into the kernel demux */
  314. dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
  315. SAA7164_TS_NUMBER_OF_LINES);
  316. }
  317. static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
  318. {
  319. struct saa7164_dev *dev = port->dev;
  320. /* Store old time */
  321. port->last_irq_msecs_diff = port->last_irq_msecs;
  322. /* Collect new stats */
  323. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  324. /* Calculate stats */
  325. port->last_irq_msecs_diff = port->last_irq_msecs -
  326. port->last_irq_msecs_diff;
  327. saa7164_histogram_update(&port->irq_interval,
  328. port->last_irq_msecs_diff);
  329. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  330. port->last_irq_msecs_diff);
  331. schedule_work(&port->workenc);
  332. return 0;
  333. }
  334. static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
  335. {
  336. struct saa7164_dev *dev = port->dev;
  337. struct saa7164_buffer *buf;
  338. struct list_head *c, *n;
  339. int wp, i = 0, rp;
  340. /* Find the current write point from the hardware */
  341. wp = saa7164_readl(port->bufcounter);
  342. if (wp > (port->hwcfg.buffercount - 1))
  343. BUG();
  344. /* Find the previous buffer to the current write point */
  345. if (wp == 0)
  346. rp = 7;
  347. else
  348. rp = wp - 1;
  349. /* Lookup the WP in the buffer list */
  350. /* TODO: turn this into a worker thread */
  351. list_for_each_safe(c, n, &port->dmaqueue.list) {
  352. buf = list_entry(c, struct saa7164_buffer, list);
  353. if (i++ > port->hwcfg.buffercount)
  354. BUG();
  355. if (buf->idx == rp) {
  356. /* Found the buffer, deal with it */
  357. dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
  358. __func__, wp, rp);
  359. saa7164_buffer_deliver(buf);
  360. break;
  361. }
  362. }
  363. return 0;
  364. }
  365. /* Primary IRQ handler and dispatch mechanism */
  366. static irqreturn_t saa7164_irq(int irq, void *dev_id)
  367. {
  368. struct saa7164_dev *dev = dev_id;
  369. struct saa7164_port *porta = &dev->ports[ SAA7164_PORT_TS1 ];
  370. struct saa7164_port *portb = &dev->ports[ SAA7164_PORT_TS2 ];
  371. struct saa7164_port *portc = &dev->ports[ SAA7164_PORT_ENC1 ];
  372. struct saa7164_port *portd = &dev->ports[ SAA7164_PORT_ENC2 ];
  373. u32 intid, intstat[INT_SIZE/4];
  374. int i, handled = 0, bit;
  375. if (dev == 0) {
  376. printk(KERN_ERR "%s() No device specified\n", __func__);
  377. handled = 0;
  378. goto out;
  379. }
  380. /* Check that the hardware is accessable. If the status bytes are
  381. * 0xFF then the device is not accessable, the the IRQ belongs
  382. * to another driver.
  383. * 4 x u32 interrupt registers.
  384. */
  385. for (i = 0; i < INT_SIZE/4; i++) {
  386. /* TODO: Convert into saa7164_readl() */
  387. /* Read the 4 hardware interrupt registers */
  388. intstat[i] = saa7164_readl(dev->int_status + (i * 4));
  389. if (intstat[i])
  390. handled = 1;
  391. }
  392. if (handled == 0)
  393. goto out;
  394. /* For each of the HW interrupt registers */
  395. for (i = 0; i < INT_SIZE/4; i++) {
  396. if (intstat[i]) {
  397. /* Each function of the board has it's own interruptid.
  398. * Find the function that triggered then call
  399. * it's handler.
  400. */
  401. for (bit = 0; bit < 32; bit++) {
  402. if (((intstat[i] >> bit) & 0x00000001) == 0)
  403. continue;
  404. /* Calculate the interrupt id (0x00 to 0x7f) */
  405. intid = (i * 32) + bit;
  406. if (intid == dev->intfdesc.bInterruptId) {
  407. /* A response to an cmd/api call */
  408. schedule_work(&dev->workcmd);
  409. } else if (intid == porta->hwcfg.interruptid) {
  410. /* Transport path 1 */
  411. saa7164_irq_ts(porta);
  412. } else if (intid == portb->hwcfg.interruptid) {
  413. /* Transport path 2 */
  414. saa7164_irq_ts(portb);
  415. } else if (intid == portc->hwcfg.interruptid) {
  416. /* Encoder path 1 */
  417. saa7164_irq_encoder(portc);
  418. } else if (intid == portd->hwcfg.interruptid) {
  419. /* Encoder path 1 */
  420. saa7164_irq_encoder(portd);
  421. } else {
  422. /* Find the function */
  423. dprintk(DBGLVL_IRQ,
  424. "%s() unhandled interrupt "
  425. "reg 0x%x bit 0x%x "
  426. "intid = 0x%x\n",
  427. __func__, i, bit, intid);
  428. }
  429. }
  430. /* Ack it */
  431. saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
  432. }
  433. }
  434. out:
  435. return IRQ_RETVAL(handled);
  436. }
  437. void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
  438. {
  439. struct saa7164_fw_status *s = &dev->fw_status;
  440. dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
  441. dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
  442. dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
  443. dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
  444. dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
  445. dev->fw_status.remainheap =
  446. saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
  447. dprintk(1, "Firmware status:\n");
  448. dprintk(1, " .status = 0x%08x\n", s->status);
  449. dprintk(1, " .mode = 0x%08x\n", s->mode);
  450. dprintk(1, " .spec = 0x%08x\n", s->spec);
  451. dprintk(1, " .inst = 0x%08x\n", s->inst);
  452. dprintk(1, " .cpuload = 0x%08x\n", s->cpuload);
  453. dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
  454. }
  455. u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
  456. {
  457. u32 reg;
  458. reg = saa7164_readl(SAA_DEVICE_VERSION);
  459. dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
  460. (reg & 0x0000fc00) >> 10,
  461. (reg & 0x000003e0) >> 5,
  462. (reg & 0x0000001f),
  463. (reg & 0xffff0000) >> 16,
  464. reg);
  465. return reg;
  466. }
  467. /* TODO: Debugging func, remove */
  468. void saa7164_dumphex16(struct saa7164_dev *dev, u8 *buf, int len)
  469. {
  470. int i;
  471. printk(KERN_INFO "--------------------> "
  472. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  473. for (i = 0; i < len; i += 16)
  474. printk(KERN_INFO " [0x%08x] "
  475. "%02x %02x %02x %02x %02x %02x %02x %02x "
  476. "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  477. *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3),
  478. *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7),
  479. *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11),
  480. *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15));
  481. }
  482. /* TODO: Debugging func, remove */
  483. void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
  484. {
  485. int i;
  486. dprintk(1, "--------------------> "
  487. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  488. for (i = 0; i < 0x100; i += 16)
  489. dprintk(1, "region0[0x%08x] = "
  490. "%02x %02x %02x %02x %02x %02x %02x %02x"
  491. " %02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  492. (u8)saa7164_readb(addr + i + 0),
  493. (u8)saa7164_readb(addr + i + 1),
  494. (u8)saa7164_readb(addr + i + 2),
  495. (u8)saa7164_readb(addr + i + 3),
  496. (u8)saa7164_readb(addr + i + 4),
  497. (u8)saa7164_readb(addr + i + 5),
  498. (u8)saa7164_readb(addr + i + 6),
  499. (u8)saa7164_readb(addr + i + 7),
  500. (u8)saa7164_readb(addr + i + 8),
  501. (u8)saa7164_readb(addr + i + 9),
  502. (u8)saa7164_readb(addr + i + 10),
  503. (u8)saa7164_readb(addr + i + 11),
  504. (u8)saa7164_readb(addr + i + 12),
  505. (u8)saa7164_readb(addr + i + 13),
  506. (u8)saa7164_readb(addr + i + 14),
  507. (u8)saa7164_readb(addr + i + 15)
  508. );
  509. }
  510. static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
  511. {
  512. dprintk(1, "@0x%p hwdesc sizeof(tmComResHWDescr_t) = %d bytes\n",
  513. &dev->hwdesc, (u32)sizeof(tmComResHWDescr_t));
  514. dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
  515. dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
  516. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  517. dev->hwdesc.bDescriptorSubtype);
  518. dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
  519. dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
  520. dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
  521. dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
  522. dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
  523. dev->hwdesc.dwDeviceRegistersLocation);
  524. dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
  525. dev->hwdesc.dwHostMemoryRegion);
  526. dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
  527. dev->hwdesc.dwHostMemoryRegionSize);
  528. dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
  529. dev->hwdesc.dwHostHibernatMemRegion);
  530. dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
  531. dev->hwdesc.dwHostHibernatMemRegionSize);
  532. }
  533. static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
  534. {
  535. dprintk(1, "@0x%p intfdesc "
  536. "sizeof(tmComResInterfaceDescr_t) = %d bytes\n",
  537. &dev->intfdesc, (u32)sizeof(tmComResInterfaceDescr_t));
  538. dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
  539. dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
  540. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  541. dev->intfdesc.bDescriptorSubtype);
  542. dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
  543. dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
  544. dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
  545. dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
  546. dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
  547. dprintk(1, " .bDebugInterruptId = 0x%x\n",
  548. dev->intfdesc.bDebugInterruptId);
  549. dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
  550. }
  551. static void saa7164_dump_busdesc(struct saa7164_dev *dev)
  552. {
  553. dprintk(1, "@0x%p busdesc sizeof(tmComResBusDescr_t) = %d bytes\n",
  554. &dev->busdesc, (u32)sizeof(tmComResBusDescr_t));
  555. dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing);
  556. dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing);
  557. dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite);
  558. dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead);
  559. dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
  560. dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead);
  561. }
  562. /* Much of the hardware configuration and PCI registers are configured
  563. * dynamically depending on firmware. We have to cache some initial
  564. * structures then use these to locate other important structures
  565. * from PCI space.
  566. */
  567. static void saa7164_get_descriptors(struct saa7164_dev *dev)
  568. {
  569. memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(tmComResHWDescr_t));
  570. memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(tmComResHWDescr_t),
  571. sizeof(tmComResInterfaceDescr_t));
  572. memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
  573. sizeof(tmComResBusDescr_t));
  574. if (dev->hwdesc.bLength != sizeof(tmComResHWDescr_t)) {
  575. printk(KERN_ERR "Structure tmComResHWDescr_t is mangled\n");
  576. printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
  577. (u32)sizeof(tmComResHWDescr_t));
  578. } else
  579. saa7164_dump_hwdesc(dev);
  580. if (dev->intfdesc.bLength != sizeof(tmComResInterfaceDescr_t)) {
  581. printk(KERN_ERR "struct tmComResInterfaceDescr_t is mangled\n");
  582. printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
  583. (u32)sizeof(tmComResInterfaceDescr_t));
  584. } else
  585. saa7164_dump_intfdesc(dev);
  586. saa7164_dump_busdesc(dev);
  587. }
  588. static int saa7164_pci_quirks(struct saa7164_dev *dev)
  589. {
  590. return 0;
  591. }
  592. static int get_resources(struct saa7164_dev *dev)
  593. {
  594. if (request_mem_region(pci_resource_start(dev->pci, 0),
  595. pci_resource_len(dev->pci, 0), dev->name)) {
  596. if (request_mem_region(pci_resource_start(dev->pci, 2),
  597. pci_resource_len(dev->pci, 2), dev->name))
  598. return 0;
  599. }
  600. printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
  601. dev->name,
  602. (u64)pci_resource_start(dev->pci, 0),
  603. (u64)pci_resource_start(dev->pci, 2));
  604. return -EBUSY;
  605. }
  606. static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
  607. {
  608. struct saa7164_port *port = 0;
  609. if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
  610. BUG();
  611. port = &dev->ports[ portnr ];
  612. port->dev = dev;
  613. port->nr = portnr;
  614. if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
  615. port->type = SAA7164_MPEG_DVB;
  616. else
  617. if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2))
  618. port->type = SAA7164_MPEG_ENCODER;
  619. else
  620. BUG();
  621. /* Init all the critical resources */
  622. mutex_init(&port->dvb.lock);
  623. INIT_LIST_HEAD(&port->dmaqueue.list);
  624. mutex_init(&port->dmaqueue_lock);
  625. INIT_LIST_HEAD(&port->list_buf_used.list);
  626. INIT_LIST_HEAD(&port->list_buf_free.list);
  627. init_waitqueue_head(&port->wait_read);
  628. /* We need a deferred interrupt handler for cmd handling */
  629. INIT_WORK(&port->workenc, saa7164_work_enchandler);
  630. saa7164_histogram_reset(&port->irq_interval, "irq intervals");
  631. saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
  632. saa7164_histogram_reset(&port->irq_svc_interval,
  633. "irq to deferred intervals");
  634. saa7164_histogram_reset(&port->read_interval,
  635. "encoder read() intervals");
  636. saa7164_histogram_reset(&port->poll_interval,
  637. "encoder poll() intervals");
  638. return 0;
  639. }
  640. static int saa7164_dev_setup(struct saa7164_dev *dev)
  641. {
  642. int i;
  643. mutex_init(&dev->lock);
  644. atomic_inc(&dev->refcount);
  645. dev->nr = saa7164_devcount++;
  646. sprintf(dev->name, "saa7164[%d]", dev->nr);
  647. mutex_lock(&devlist);
  648. list_add_tail(&dev->devlist, &saa7164_devlist);
  649. mutex_unlock(&devlist);
  650. /* board config */
  651. dev->board = UNSET;
  652. if (card[dev->nr] < saa7164_bcount)
  653. dev->board = card[dev->nr];
  654. for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++)
  655. if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
  656. dev->pci->subsystem_device ==
  657. saa7164_subids[i].subdevice)
  658. dev->board = saa7164_subids[i].card;
  659. if (UNSET == dev->board) {
  660. dev->board = SAA7164_BOARD_UNKNOWN;
  661. saa7164_card_list(dev);
  662. }
  663. dev->pci_bus = dev->pci->bus->number;
  664. dev->pci_slot = PCI_SLOT(dev->pci->devfn);
  665. /* I2C Defaults / setup */
  666. dev->i2c_bus[0].dev = dev;
  667. dev->i2c_bus[0].nr = 0;
  668. dev->i2c_bus[1].dev = dev;
  669. dev->i2c_bus[1].nr = 1;
  670. dev->i2c_bus[2].dev = dev;
  671. dev->i2c_bus[2].nr = 2;
  672. /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
  673. saa7164_port_init(dev, SAA7164_PORT_TS1);
  674. saa7164_port_init(dev, SAA7164_PORT_TS2);
  675. saa7164_port_init(dev, SAA7164_PORT_ENC1);
  676. saa7164_port_init(dev, SAA7164_PORT_ENC2);
  677. if (get_resources(dev) < 0) {
  678. printk(KERN_ERR "CORE %s No more PCIe resources for "
  679. "subsystem: %04x:%04x\n",
  680. dev->name, dev->pci->subsystem_vendor,
  681. dev->pci->subsystem_device);
  682. saa7164_devcount--;
  683. return -ENODEV;
  684. }
  685. /* PCI/e allocations */
  686. dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
  687. pci_resource_len(dev->pci, 0));
  688. dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
  689. pci_resource_len(dev->pci, 2));
  690. dev->bmmio = (u8 __iomem *)dev->lmmio;
  691. dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
  692. /* Inerrupt and ack register locations offset of bmmio */
  693. dev->int_status = 0x183000 + 0xf80;
  694. dev->int_ack = 0x183000 + 0xf90;
  695. printk(KERN_INFO
  696. "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
  697. dev->name, dev->pci->subsystem_vendor,
  698. dev->pci->subsystem_device, saa7164_boards[dev->board].name,
  699. dev->board, card[dev->nr] == dev->board ?
  700. "insmod option" : "autodetected");
  701. saa7164_pci_quirks(dev);
  702. return 0;
  703. }
  704. static void saa7164_dev_unregister(struct saa7164_dev *dev)
  705. {
  706. dprintk(1, "%s()\n", __func__);
  707. release_mem_region(pci_resource_start(dev->pci, 0),
  708. pci_resource_len(dev->pci, 0));
  709. release_mem_region(pci_resource_start(dev->pci, 2),
  710. pci_resource_len(dev->pci, 2));
  711. if (!atomic_dec_and_test(&dev->refcount))
  712. return;
  713. iounmap(dev->lmmio);
  714. iounmap(dev->lmmio2);
  715. return;
  716. }
  717. static int __devinit saa7164_initdev(struct pci_dev *pci_dev,
  718. const struct pci_device_id *pci_id)
  719. {
  720. struct saa7164_dev *dev;
  721. int err, i;
  722. u32 version;
  723. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  724. if (NULL == dev)
  725. return -ENOMEM;
  726. /* pci init */
  727. dev->pci = pci_dev;
  728. if (pci_enable_device(pci_dev)) {
  729. err = -EIO;
  730. goto fail_free;
  731. }
  732. if (saa7164_dev_setup(dev) < 0) {
  733. err = -EINVAL;
  734. goto fail_free;
  735. }
  736. /* print pci info */
  737. pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
  738. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  739. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  740. "latency: %d, mmio: 0x%llx\n", dev->name,
  741. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  742. dev->pci_lat,
  743. (unsigned long long)pci_resource_start(pci_dev, 0));
  744. pci_set_master(pci_dev);
  745. /* TODO */
  746. if (!pci_dma_supported(pci_dev, 0xffffffff)) {
  747. printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
  748. err = -EIO;
  749. goto fail_irq;
  750. }
  751. err = request_irq(pci_dev->irq, saa7164_irq,
  752. IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
  753. if (err < 0) {
  754. printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
  755. pci_dev->irq);
  756. err = -EIO;
  757. goto fail_irq;
  758. }
  759. pci_set_drvdata(pci_dev, dev);
  760. /* Init the internal command list */
  761. for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
  762. dev->cmds[i].seqno = i;
  763. dev->cmds[i].inuse = 0;
  764. mutex_init(&dev->cmds[i].lock);
  765. init_waitqueue_head(&dev->cmds[i].wait);
  766. }
  767. /* We need a deferred interrupt handler for cmd handling */
  768. INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
  769. /* Only load the firmware if we know the board */
  770. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  771. err = saa7164_downloadfirmware(dev);
  772. if (err < 0) {
  773. printk(KERN_ERR
  774. "Failed to boot firmware, no features "
  775. "registered\n");
  776. goto fail_fw;
  777. }
  778. saa7164_get_descriptors(dev);
  779. saa7164_dumpregs(dev, 0);
  780. saa7164_getcurrentfirmwareversion(dev);
  781. saa7164_getfirmwarestatus(dev);
  782. err = saa7164_bus_setup(dev);
  783. if (err < 0)
  784. printk(KERN_ERR
  785. "Failed to setup the bus, will continue\n");
  786. saa7164_bus_dump(dev);
  787. /* Ping the running firmware via the command bus and get the
  788. * firmware version, this checks the bus is running OK.
  789. */
  790. version = 0;
  791. if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
  792. dprintk(1, "Bus is operating correctly using "
  793. "version %d.%d.%d.%d (0x%x)\n",
  794. (version & 0x0000fc00) >> 10,
  795. (version & 0x000003e0) >> 5,
  796. (version & 0x0000001f),
  797. (version & 0xffff0000) >> 16,
  798. version);
  799. else
  800. printk(KERN_ERR
  801. "Failed to communicate with the firmware\n");
  802. /* Bring up the I2C buses */
  803. saa7164_i2c_register(&dev->i2c_bus[0]);
  804. saa7164_i2c_register(&dev->i2c_bus[1]);
  805. saa7164_i2c_register(&dev->i2c_bus[2]);
  806. saa7164_gpio_setup(dev);
  807. saa7164_card_setup(dev);
  808. /* Parse the dynamic device configuration, find various
  809. * media endpoints (MPEG, WMV, PS, TS) and cache their
  810. * configuration details into the driver, so we can
  811. * reference them later during simething_register() func,
  812. * interrupt handlers, deferred work handlers etc.
  813. */
  814. saa7164_api_enum_subdevs(dev);
  815. /* Begin to create the video sub-systems and register funcs */
  816. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
  817. if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS1 ]) < 0) {
  818. printk(KERN_ERR "%s() Failed to register "
  819. "dvb adapters on porta\n",
  820. __func__);
  821. }
  822. }
  823. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
  824. if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS2 ]) < 0) {
  825. printk(KERN_ERR"%s() Failed to register "
  826. "dvb adapters on portb\n",
  827. __func__);
  828. }
  829. }
  830. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
  831. if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC1 ]) < 0) {
  832. printk(KERN_ERR"%s() Failed to register "
  833. "mpeg encoder\n", __func__);
  834. }
  835. }
  836. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
  837. if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC2 ]) < 0) {
  838. printk(KERN_ERR"%s() Failed to register "
  839. "mpeg encoder\n", __func__);
  840. }
  841. }
  842. } /* != BOARD_UNKNOWN */
  843. else
  844. printk(KERN_ERR "%s() Unsupported board detected, "
  845. "registering without firmware\n", __func__);
  846. dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
  847. dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
  848. fail_fw:
  849. return 0;
  850. fail_irq:
  851. saa7164_dev_unregister(dev);
  852. fail_free:
  853. kfree(dev);
  854. return err;
  855. }
  856. static void saa7164_shutdown(struct saa7164_dev *dev)
  857. {
  858. dprintk(1, "%s()\n", __func__);
  859. }
  860. static void __devexit saa7164_finidev(struct pci_dev *pci_dev)
  861. {
  862. struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
  863. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  864. &dev->ports[ SAA7164_PORT_ENC1 ].irq_interval);
  865. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  866. &dev->ports[ SAA7164_PORT_ENC1 ].svc_interval);
  867. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  868. &dev->ports[ SAA7164_PORT_ENC1 ].irq_svc_interval);
  869. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  870. &dev->ports[ SAA7164_PORT_ENC1 ].read_interval);
  871. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  872. &dev->ports[ SAA7164_PORT_ENC1 ].poll_interval);
  873. saa7164_shutdown(dev);
  874. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
  875. saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS1 ]);
  876. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
  877. saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS2 ]);
  878. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
  879. saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC1 ]);
  880. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
  881. saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC2 ]);
  882. saa7164_i2c_unregister(&dev->i2c_bus[0]);
  883. saa7164_i2c_unregister(&dev->i2c_bus[1]);
  884. saa7164_i2c_unregister(&dev->i2c_bus[2]);
  885. pci_disable_device(pci_dev);
  886. /* unregister stuff */
  887. free_irq(pci_dev->irq, dev);
  888. pci_set_drvdata(pci_dev, NULL);
  889. mutex_lock(&devlist);
  890. list_del(&dev->devlist);
  891. mutex_unlock(&devlist);
  892. saa7164_dev_unregister(dev);
  893. kfree(dev);
  894. }
  895. static struct pci_device_id saa7164_pci_tbl[] = {
  896. {
  897. /* SAA7164 */
  898. .vendor = 0x1131,
  899. .device = 0x7164,
  900. .subvendor = PCI_ANY_ID,
  901. .subdevice = PCI_ANY_ID,
  902. }, {
  903. /* --- end of list --- */
  904. }
  905. };
  906. MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
  907. static struct pci_driver saa7164_pci_driver = {
  908. .name = "saa7164",
  909. .id_table = saa7164_pci_tbl,
  910. .probe = saa7164_initdev,
  911. .remove = __devexit_p(saa7164_finidev),
  912. /* TODO */
  913. .suspend = NULL,
  914. .resume = NULL,
  915. };
  916. static int __init saa7164_init(void)
  917. {
  918. printk(KERN_INFO "saa7164 driver loaded\n");
  919. return pci_register_driver(&saa7164_pci_driver);
  920. }
  921. static void __exit saa7164_fini(void)
  922. {
  923. pci_unregister_driver(&saa7164_pci_driver);
  924. }
  925. module_init(saa7164_init);
  926. module_exit(saa7164_fini);