iwl3945-base.c 120 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/sched.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/ieee80211_radiotap.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. #include "iwl-spectrum.h"
  55. /*
  56. * module name, copyright, version, etc.
  57. */
  58. #define DRV_DESCRIPTION \
  59. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  60. #ifdef CONFIG_IWLWIFI_DEBUG
  61. #define VD "d"
  62. #else
  63. #define VD
  64. #endif
  65. /*
  66. * add "s" to indicate spectrum measurement included.
  67. * we add it here to be consistent with previous releases in which
  68. * this was configurable.
  69. */
  70. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  71. #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
  72. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .sw_crypto = 1,
  80. .restart_fw = 1,
  81. /* the rest are 0 by default */
  82. };
  83. /**
  84. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  85. * @priv: eeprom and antenna fields are used to determine antenna flags
  86. *
  87. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  88. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  89. *
  90. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  91. * IWL_ANTENNA_MAIN - Force MAIN antenna
  92. * IWL_ANTENNA_AUX - Force AUX antenna
  93. */
  94. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  95. {
  96. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  97. switch (iwl3945_mod_params.antenna) {
  98. case IWL_ANTENNA_DIVERSITY:
  99. return 0;
  100. case IWL_ANTENNA_MAIN:
  101. if (eeprom->antenna_switch_type)
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  104. case IWL_ANTENNA_AUX:
  105. if (eeprom->antenna_switch_type)
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  108. }
  109. /* bad antenna selector value */
  110. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  111. iwl3945_mod_params.antenna);
  112. return 0; /* "diversity" is default if error */
  113. }
  114. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  115. struct ieee80211_key_conf *keyconf,
  116. u8 sta_id)
  117. {
  118. unsigned long flags;
  119. __le16 key_flags = 0;
  120. int ret;
  121. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  122. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  123. if (sta_id == priv->hw_params.bcast_sta_id)
  124. key_flags |= STA_KEY_MULTICAST_MSK;
  125. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  126. keyconf->hw_key_idx = keyconf->keyidx;
  127. key_flags &= ~STA_KEY_FLG_INVALID;
  128. spin_lock_irqsave(&priv->sta_lock, flags);
  129. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  130. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  131. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  132. keyconf->keylen);
  133. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  134. keyconf->keylen);
  135. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  136. == STA_KEY_FLG_NO_ENC)
  137. priv->stations[sta_id].sta.key.key_offset =
  138. iwl_get_free_ucode_key_index(priv);
  139. /* else, we are overriding an existing key => no need to allocated room
  140. * in uCode. */
  141. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  142. "no space for a new key");
  143. priv->stations[sta_id].sta.key.key_flags = key_flags;
  144. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  145. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  146. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  147. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  148. spin_unlock_irqrestore(&priv->sta_lock, flags);
  149. return ret;
  150. }
  151. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  152. struct ieee80211_key_conf *keyconf,
  153. u8 sta_id)
  154. {
  155. return -EOPNOTSUPP;
  156. }
  157. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  158. struct ieee80211_key_conf *keyconf,
  159. u8 sta_id)
  160. {
  161. return -EOPNOTSUPP;
  162. }
  163. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  164. {
  165. unsigned long flags;
  166. spin_lock_irqsave(&priv->sta_lock, flags);
  167. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  168. memset(&priv->stations[sta_id].sta.key, 0,
  169. sizeof(struct iwl4965_keyinfo));
  170. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  171. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  172. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  173. spin_unlock_irqrestore(&priv->sta_lock, flags);
  174. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  175. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  176. return 0;
  177. }
  178. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  179. struct ieee80211_key_conf *keyconf, u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->alg) {
  184. case ALG_CCMP:
  185. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  186. break;
  187. case ALG_TKIP:
  188. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  189. break;
  190. case ALG_WEP:
  191. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  192. break;
  193. default:
  194. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  195. ret = -EINVAL;
  196. }
  197. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  198. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  199. sta_id, ret);
  200. return ret;
  201. }
  202. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  203. {
  204. int ret = -EOPNOTSUPP;
  205. return ret;
  206. }
  207. static int iwl3945_set_static_key(struct iwl_priv *priv,
  208. struct ieee80211_key_conf *key)
  209. {
  210. if (key->alg == ALG_WEP)
  211. return -EOPNOTSUPP;
  212. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  213. return -EINVAL;
  214. }
  215. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  216. {
  217. struct list_head *element;
  218. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  219. priv->frames_count);
  220. while (!list_empty(&priv->free_frames)) {
  221. element = priv->free_frames.next;
  222. list_del(element);
  223. kfree(list_entry(element, struct iwl3945_frame, list));
  224. priv->frames_count--;
  225. }
  226. if (priv->frames_count) {
  227. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  228. priv->frames_count);
  229. priv->frames_count = 0;
  230. }
  231. }
  232. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  233. {
  234. struct iwl3945_frame *frame;
  235. struct list_head *element;
  236. if (list_empty(&priv->free_frames)) {
  237. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  238. if (!frame) {
  239. IWL_ERR(priv, "Could not allocate frame!\n");
  240. return NULL;
  241. }
  242. priv->frames_count++;
  243. return frame;
  244. }
  245. element = priv->free_frames.next;
  246. list_del(element);
  247. return list_entry(element, struct iwl3945_frame, list);
  248. }
  249. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  250. {
  251. memset(frame, 0, sizeof(*frame));
  252. list_add(&frame->list, &priv->free_frames);
  253. }
  254. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  255. struct ieee80211_hdr *hdr,
  256. int left)
  257. {
  258. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  259. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  260. (priv->iw_mode != NL80211_IFTYPE_AP)))
  261. return 0;
  262. if (priv->ibss_beacon->len > left)
  263. return 0;
  264. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  265. return priv->ibss_beacon->len;
  266. }
  267. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  268. {
  269. struct iwl3945_frame *frame;
  270. unsigned int frame_size;
  271. int rc;
  272. u8 rate;
  273. frame = iwl3945_get_free_frame(priv);
  274. if (!frame) {
  275. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  276. "command.\n");
  277. return -ENOMEM;
  278. }
  279. rate = iwl_rate_get_lowest_plcp(priv);
  280. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  281. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  282. &frame->u.cmd[0]);
  283. iwl3945_free_frame(priv, frame);
  284. return rc;
  285. }
  286. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  287. {
  288. if (priv->shared_virt)
  289. pci_free_consistent(priv->pci_dev,
  290. sizeof(struct iwl3945_shared),
  291. priv->shared_virt,
  292. priv->shared_phys);
  293. }
  294. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  295. struct ieee80211_tx_info *info,
  296. struct iwl_device_cmd *cmd,
  297. struct sk_buff *skb_frag,
  298. int sta_id)
  299. {
  300. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  301. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  302. switch (keyinfo->alg) {
  303. case ALG_CCMP:
  304. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  305. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  306. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  307. break;
  308. case ALG_TKIP:
  309. break;
  310. case ALG_WEP:
  311. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  312. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  313. if (keyinfo->keylen == 13)
  314. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  315. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  316. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  317. "with key %d\n", info->control.hw_key->hw_key_idx);
  318. break;
  319. default:
  320. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  321. break;
  322. }
  323. }
  324. /*
  325. * handle build REPLY_TX command notification.
  326. */
  327. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  328. struct iwl_device_cmd *cmd,
  329. struct ieee80211_tx_info *info,
  330. struct ieee80211_hdr *hdr, u8 std_id)
  331. {
  332. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  333. __le32 tx_flags = tx_cmd->tx_flags;
  334. __le16 fc = hdr->frame_control;
  335. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  336. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  337. tx_flags |= TX_CMD_FLG_ACK_MSK;
  338. if (ieee80211_is_mgmt(fc))
  339. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  340. if (ieee80211_is_probe_resp(fc) &&
  341. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  342. tx_flags |= TX_CMD_FLG_TSF_MSK;
  343. } else {
  344. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  345. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  346. }
  347. tx_cmd->sta_id = std_id;
  348. if (ieee80211_has_morefrags(fc))
  349. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  350. if (ieee80211_is_data_qos(fc)) {
  351. u8 *qc = ieee80211_get_qos_ctl(hdr);
  352. tx_cmd->tid_tspec = qc[0] & 0xf;
  353. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  354. } else {
  355. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  356. }
  357. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  358. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  359. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  360. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  361. if (ieee80211_is_mgmt(fc)) {
  362. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  363. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  364. else
  365. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  366. } else {
  367. tx_cmd->timeout.pm_frame_timeout = 0;
  368. }
  369. tx_cmd->driver_txop = 0;
  370. tx_cmd->tx_flags = tx_flags;
  371. tx_cmd->next_frame_len = 0;
  372. }
  373. /*
  374. * start REPLY_TX command process
  375. */
  376. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  377. {
  378. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  379. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  380. struct iwl3945_tx_cmd *tx_cmd;
  381. struct iwl_tx_queue *txq = NULL;
  382. struct iwl_queue *q = NULL;
  383. struct iwl_device_cmd *out_cmd;
  384. struct iwl_cmd_meta *out_meta;
  385. dma_addr_t phys_addr;
  386. dma_addr_t txcmd_phys;
  387. int txq_id = skb_get_queue_mapping(skb);
  388. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  389. u8 id;
  390. u8 unicast;
  391. u8 sta_id;
  392. u8 tid = 0;
  393. u16 seq_number = 0;
  394. __le16 fc;
  395. u8 wait_write_ptr = 0;
  396. u8 *qc = NULL;
  397. unsigned long flags;
  398. spin_lock_irqsave(&priv->lock, flags);
  399. if (iwl_is_rfkill(priv)) {
  400. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  401. goto drop_unlock;
  402. }
  403. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  404. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  405. goto drop_unlock;
  406. }
  407. unicast = !is_multicast_ether_addr(hdr->addr1);
  408. id = 0;
  409. fc = hdr->frame_control;
  410. #ifdef CONFIG_IWLWIFI_DEBUG
  411. if (ieee80211_is_auth(fc))
  412. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  413. else if (ieee80211_is_assoc_req(fc))
  414. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  415. else if (ieee80211_is_reassoc_req(fc))
  416. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  417. #endif
  418. /* drop all non-injected data frame if we are not associated */
  419. if (ieee80211_is_data(fc) &&
  420. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  421. (!iwl_is_associated(priv) ||
  422. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  423. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  424. goto drop_unlock;
  425. }
  426. spin_unlock_irqrestore(&priv->lock, flags);
  427. hdr_len = ieee80211_hdrlen(fc);
  428. /* Find (or create) index into station table for destination station */
  429. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  430. sta_id = priv->hw_params.bcast_sta_id;
  431. else
  432. sta_id = iwl_get_sta_id(priv, hdr);
  433. if (sta_id == IWL_INVALID_STATION) {
  434. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  435. hdr->addr1);
  436. goto drop;
  437. }
  438. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  439. if (ieee80211_is_data_qos(fc)) {
  440. qc = ieee80211_get_qos_ctl(hdr);
  441. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  442. if (unlikely(tid >= MAX_TID_COUNT))
  443. goto drop;
  444. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  445. IEEE80211_SCTL_SEQ;
  446. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  447. (hdr->seq_ctrl &
  448. cpu_to_le16(IEEE80211_SCTL_FRAG));
  449. seq_number += 0x10;
  450. }
  451. /* Descriptor for chosen Tx queue */
  452. txq = &priv->txq[txq_id];
  453. q = &txq->q;
  454. if ((iwl_queue_space(q) < q->high_mark))
  455. goto drop;
  456. spin_lock_irqsave(&priv->lock, flags);
  457. idx = get_cmd_index(q, q->write_ptr, 0);
  458. /* Set up driver data for this TFD */
  459. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  460. txq->txb[q->write_ptr].skb[0] = skb;
  461. /* Init first empty entry in queue's array of Tx/cmd buffers */
  462. out_cmd = txq->cmd[idx];
  463. out_meta = &txq->meta[idx];
  464. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  465. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  466. memset(tx_cmd, 0, sizeof(*tx_cmd));
  467. /*
  468. * Set up the Tx-command (not MAC!) header.
  469. * Store the chosen Tx queue and TFD index within the sequence field;
  470. * after Tx, uCode's Tx response will return this value so driver can
  471. * locate the frame within the tx queue and do post-tx processing.
  472. */
  473. out_cmd->hdr.cmd = REPLY_TX;
  474. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  475. INDEX_TO_SEQ(q->write_ptr)));
  476. /* Copy MAC header from skb into command buffer */
  477. memcpy(tx_cmd->hdr, hdr, hdr_len);
  478. if (info->control.hw_key)
  479. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  480. /* TODO need this for burst mode later on */
  481. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  482. /* set is_hcca to 0; it probably will never be implemented */
  483. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  484. /* Total # bytes to be transmitted */
  485. len = (u16)skb->len;
  486. tx_cmd->len = cpu_to_le16(len);
  487. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  488. iwl_update_stats(priv, true, fc, len);
  489. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  490. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  491. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  492. txq->need_update = 1;
  493. if (qc)
  494. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  495. } else {
  496. wait_write_ptr = 1;
  497. txq->need_update = 0;
  498. }
  499. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  500. le16_to_cpu(out_cmd->hdr.sequence));
  501. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
  502. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  503. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  504. ieee80211_hdrlen(fc));
  505. /*
  506. * Use the first empty entry in this queue's command buffer array
  507. * to contain the Tx command and MAC header concatenated together
  508. * (payload data will be in another buffer).
  509. * Size of this varies, due to varying MAC header length.
  510. * If end is not dword aligned, we'll have 2 extra bytes at the end
  511. * of the MAC header (device reads on dword boundaries).
  512. * We'll tell device about this padding later.
  513. */
  514. len = sizeof(struct iwl3945_tx_cmd) +
  515. sizeof(struct iwl_cmd_header) + hdr_len;
  516. len_org = len;
  517. len = (len + 3) & ~3;
  518. if (len_org != len)
  519. len_org = 1;
  520. else
  521. len_org = 0;
  522. /* Physical address of this Tx command's header (not MAC header!),
  523. * within command buffer array. */
  524. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  525. len, PCI_DMA_TODEVICE);
  526. /* we do not map meta data ... so we can safely access address to
  527. * provide to unmap command*/
  528. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  529. pci_unmap_len_set(out_meta, len, len);
  530. /* Add buffer containing Tx command and MAC(!) header to TFD's
  531. * first entry */
  532. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  533. txcmd_phys, len, 1, 0);
  534. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  535. * if any (802.11 null frames have no payload). */
  536. len = skb->len - hdr_len;
  537. if (len) {
  538. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  539. len, PCI_DMA_TODEVICE);
  540. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  541. phys_addr, len,
  542. 0, U32_PAD(len));
  543. }
  544. /* Tell device the write index *just past* this latest filled TFD */
  545. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  546. iwl_txq_update_write_ptr(priv, txq);
  547. spin_unlock_irqrestore(&priv->lock, flags);
  548. if ((iwl_queue_space(q) < q->high_mark)
  549. && priv->mac80211_registered) {
  550. if (wait_write_ptr) {
  551. spin_lock_irqsave(&priv->lock, flags);
  552. txq->need_update = 1;
  553. iwl_txq_update_write_ptr(priv, txq);
  554. spin_unlock_irqrestore(&priv->lock, flags);
  555. }
  556. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  557. }
  558. return 0;
  559. drop_unlock:
  560. spin_unlock_irqrestore(&priv->lock, flags);
  561. drop:
  562. return -1;
  563. }
  564. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  565. #define BEACON_TIME_MASK_HIGH 0xFF000000
  566. #define TIME_UNIT 1024
  567. /*
  568. * extended beacon time format
  569. * time in usec will be changed into a 32-bit value in 8:24 format
  570. * the high 1 byte is the beacon counts
  571. * the lower 3 bytes is the time in usec within one beacon interval
  572. */
  573. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  574. {
  575. u32 quot;
  576. u32 rem;
  577. u32 interval = beacon_interval * 1024;
  578. if (!interval || !usec)
  579. return 0;
  580. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  581. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  582. return (quot << 24) + rem;
  583. }
  584. /* base is usually what we get from ucode with each received frame,
  585. * the same as HW timer counter counting down
  586. */
  587. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  588. {
  589. u32 base_low = base & BEACON_TIME_MASK_LOW;
  590. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  591. u32 interval = beacon_interval * TIME_UNIT;
  592. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  593. (addon & BEACON_TIME_MASK_HIGH);
  594. if (base_low > addon_low)
  595. res += base_low - addon_low;
  596. else if (base_low < addon_low) {
  597. res += interval + base_low - addon_low;
  598. res += (1 << 24);
  599. } else
  600. res += (1 << 24);
  601. return cpu_to_le32(res);
  602. }
  603. static int iwl3945_get_measurement(struct iwl_priv *priv,
  604. struct ieee80211_measurement_params *params,
  605. u8 type)
  606. {
  607. struct iwl_spectrum_cmd spectrum;
  608. struct iwl_rx_packet *pkt;
  609. struct iwl_host_cmd cmd = {
  610. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  611. .data = (void *)&spectrum,
  612. .flags = CMD_WANT_SKB,
  613. };
  614. u32 add_time = le64_to_cpu(params->start_time);
  615. int rc;
  616. int spectrum_resp_status;
  617. int duration = le16_to_cpu(params->duration);
  618. if (iwl_is_associated(priv))
  619. add_time =
  620. iwl3945_usecs_to_beacons(
  621. le64_to_cpu(params->start_time) - priv->last_tsf,
  622. le16_to_cpu(priv->rxon_timing.beacon_interval));
  623. memset(&spectrum, 0, sizeof(spectrum));
  624. spectrum.channel_count = cpu_to_le16(1);
  625. spectrum.flags =
  626. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  627. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  628. cmd.len = sizeof(spectrum);
  629. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  630. if (iwl_is_associated(priv))
  631. spectrum.start_time =
  632. iwl3945_add_beacon_time(priv->last_beacon_time,
  633. add_time,
  634. le16_to_cpu(priv->rxon_timing.beacon_interval));
  635. else
  636. spectrum.start_time = 0;
  637. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  638. spectrum.channels[0].channel = params->channel;
  639. spectrum.channels[0].type = type;
  640. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  641. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  642. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  643. rc = iwl_send_cmd_sync(priv, &cmd);
  644. if (rc)
  645. return rc;
  646. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  647. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  648. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  649. rc = -EIO;
  650. }
  651. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  652. switch (spectrum_resp_status) {
  653. case 0: /* Command will be handled */
  654. if (pkt->u.spectrum.id != 0xff) {
  655. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  656. pkt->u.spectrum.id);
  657. priv->measurement_status &= ~MEASUREMENT_READY;
  658. }
  659. priv->measurement_status |= MEASUREMENT_ACTIVE;
  660. rc = 0;
  661. break;
  662. case 1: /* Command will not be handled */
  663. rc = -EAGAIN;
  664. break;
  665. }
  666. iwl_free_pages(priv, cmd.reply_page);
  667. return rc;
  668. }
  669. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  670. struct iwl_rx_mem_buffer *rxb)
  671. {
  672. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  673. struct iwl_alive_resp *palive;
  674. struct delayed_work *pwork;
  675. palive = &pkt->u.alive_frame;
  676. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  677. "0x%01X 0x%01X\n",
  678. palive->is_valid, palive->ver_type,
  679. palive->ver_subtype);
  680. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  681. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  682. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  683. sizeof(struct iwl_alive_resp));
  684. pwork = &priv->init_alive_start;
  685. } else {
  686. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  687. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  688. sizeof(struct iwl_alive_resp));
  689. pwork = &priv->alive_start;
  690. iwl3945_disable_events(priv);
  691. }
  692. /* We delay the ALIVE response by 5ms to
  693. * give the HW RF Kill time to activate... */
  694. if (palive->is_valid == UCODE_VALID_OK)
  695. queue_delayed_work(priv->workqueue, pwork,
  696. msecs_to_jiffies(5));
  697. else
  698. IWL_WARN(priv, "uCode did not respond OK.\n");
  699. }
  700. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  701. struct iwl_rx_mem_buffer *rxb)
  702. {
  703. #ifdef CONFIG_IWLWIFI_DEBUG
  704. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  705. #endif
  706. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  707. return;
  708. }
  709. static void iwl3945_bg_beacon_update(struct work_struct *work)
  710. {
  711. struct iwl_priv *priv =
  712. container_of(work, struct iwl_priv, beacon_update);
  713. struct sk_buff *beacon;
  714. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  715. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  716. if (!beacon) {
  717. IWL_ERR(priv, "update beacon failed\n");
  718. return;
  719. }
  720. mutex_lock(&priv->mutex);
  721. /* new beacon skb is allocated every time; dispose previous.*/
  722. if (priv->ibss_beacon)
  723. dev_kfree_skb(priv->ibss_beacon);
  724. priv->ibss_beacon = beacon;
  725. mutex_unlock(&priv->mutex);
  726. iwl3945_send_beacon_cmd(priv);
  727. }
  728. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  729. struct iwl_rx_mem_buffer *rxb)
  730. {
  731. #ifdef CONFIG_IWLWIFI_DEBUG
  732. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  733. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  734. u8 rate = beacon->beacon_notify_hdr.rate;
  735. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  736. "tsf %d %d rate %d\n",
  737. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  738. beacon->beacon_notify_hdr.failure_frame,
  739. le32_to_cpu(beacon->ibss_mgr_status),
  740. le32_to_cpu(beacon->high_tsf),
  741. le32_to_cpu(beacon->low_tsf), rate);
  742. #endif
  743. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  744. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  745. queue_work(priv->workqueue, &priv->beacon_update);
  746. }
  747. /* Handle notification from uCode that card's power state is changing
  748. * due to software, hardware, or critical temperature RFKILL */
  749. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  750. struct iwl_rx_mem_buffer *rxb)
  751. {
  752. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  753. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  754. unsigned long status = priv->status;
  755. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  756. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  757. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  758. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  759. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  760. if (flags & HW_CARD_DISABLED)
  761. set_bit(STATUS_RF_KILL_HW, &priv->status);
  762. else
  763. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  764. iwl_scan_cancel(priv);
  765. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  766. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  767. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  768. test_bit(STATUS_RF_KILL_HW, &priv->status));
  769. else
  770. wake_up_interruptible(&priv->wait_command_queue);
  771. }
  772. /**
  773. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  774. *
  775. * Setup the RX handlers for each of the reply types sent from the uCode
  776. * to the host.
  777. *
  778. * This function chains into the hardware specific files for them to setup
  779. * any hardware specific handlers as well.
  780. */
  781. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  782. {
  783. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  784. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  785. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  786. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  787. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  788. iwl_rx_spectrum_measure_notif;
  789. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  790. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  791. iwl_rx_pm_debug_statistics_notif;
  792. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  793. /*
  794. * The same handler is used for both the REPLY to a discrete
  795. * statistics request from the host as well as for the periodic
  796. * statistics notifications (after received beacons) from the uCode.
  797. */
  798. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  799. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  800. iwl_setup_rx_scan_handlers(priv);
  801. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  802. /* Set up hardware specific Rx handlers */
  803. iwl3945_hw_rx_handler_setup(priv);
  804. }
  805. /************************** RX-FUNCTIONS ****************************/
  806. /*
  807. * Rx theory of operation
  808. *
  809. * The host allocates 32 DMA target addresses and passes the host address
  810. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  811. * 0 to 31
  812. *
  813. * Rx Queue Indexes
  814. * The host/firmware share two index registers for managing the Rx buffers.
  815. *
  816. * The READ index maps to the first position that the firmware may be writing
  817. * to -- the driver can read up to (but not including) this position and get
  818. * good data.
  819. * The READ index is managed by the firmware once the card is enabled.
  820. *
  821. * The WRITE index maps to the last position the driver has read from -- the
  822. * position preceding WRITE is the last slot the firmware can place a packet.
  823. *
  824. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  825. * WRITE = READ.
  826. *
  827. * During initialization, the host sets up the READ queue position to the first
  828. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  829. *
  830. * When the firmware places a packet in a buffer, it will advance the READ index
  831. * and fire the RX interrupt. The driver can then query the READ index and
  832. * process as many packets as possible, moving the WRITE index forward as it
  833. * resets the Rx queue buffers with new memory.
  834. *
  835. * The management in the driver is as follows:
  836. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  837. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  838. * to replenish the iwl->rxq->rx_free.
  839. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  840. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  841. * 'processed' and 'read' driver indexes as well)
  842. * + A received packet is processed and handed to the kernel network stack,
  843. * detached from the iwl->rxq. The driver 'processed' index is updated.
  844. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  845. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  846. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  847. * were enough free buffers and RX_STALLED is set it is cleared.
  848. *
  849. *
  850. * Driver sequence:
  851. *
  852. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  853. * iwl3945_rx_queue_restock
  854. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  855. * queue, updates firmware pointers, and updates
  856. * the WRITE index. If insufficient rx_free buffers
  857. * are available, schedules iwl3945_rx_replenish
  858. *
  859. * -- enable interrupts --
  860. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  861. * READ INDEX, detaching the SKB from the pool.
  862. * Moves the packet buffer from queue to rx_used.
  863. * Calls iwl3945_rx_queue_restock to refill any empty
  864. * slots.
  865. * ...
  866. *
  867. */
  868. /**
  869. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  870. */
  871. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  872. dma_addr_t dma_addr)
  873. {
  874. return cpu_to_le32((u32)dma_addr);
  875. }
  876. /**
  877. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  878. *
  879. * If there are slots in the RX queue that need to be restocked,
  880. * and we have free pre-allocated buffers, fill the ranks as much
  881. * as we can, pulling from rx_free.
  882. *
  883. * This moves the 'write' index forward to catch up with 'processed', and
  884. * also updates the memory address in the firmware to reference the new
  885. * target buffer.
  886. */
  887. static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
  888. {
  889. struct iwl_rx_queue *rxq = &priv->rxq;
  890. struct list_head *element;
  891. struct iwl_rx_mem_buffer *rxb;
  892. unsigned long flags;
  893. int write;
  894. spin_lock_irqsave(&rxq->lock, flags);
  895. write = rxq->write & ~0x7;
  896. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  897. /* Get next free Rx buffer, remove from free list */
  898. element = rxq->rx_free.next;
  899. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  900. list_del(element);
  901. /* Point to Rx buffer via next RBD in circular buffer */
  902. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  903. rxq->queue[rxq->write] = rxb;
  904. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  905. rxq->free_count--;
  906. }
  907. spin_unlock_irqrestore(&rxq->lock, flags);
  908. /* If the pre-allocated buffer pool is dropping low, schedule to
  909. * refill it */
  910. if (rxq->free_count <= RX_LOW_WATERMARK)
  911. queue_work(priv->workqueue, &priv->rx_replenish);
  912. /* If we've added more space for the firmware to place data, tell it.
  913. * Increment device's write pointer in multiples of 8. */
  914. if ((rxq->write_actual != (rxq->write & ~0x7))
  915. || (abs(rxq->write - rxq->read) > 7)) {
  916. spin_lock_irqsave(&rxq->lock, flags);
  917. rxq->need_update = 1;
  918. spin_unlock_irqrestore(&rxq->lock, flags);
  919. iwl_rx_queue_update_write_ptr(priv, rxq);
  920. }
  921. }
  922. /**
  923. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  924. *
  925. * When moving to rx_free an SKB is allocated for the slot.
  926. *
  927. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  928. * This is called as a scheduled work item (except for during initialization)
  929. */
  930. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  931. {
  932. struct iwl_rx_queue *rxq = &priv->rxq;
  933. struct list_head *element;
  934. struct iwl_rx_mem_buffer *rxb;
  935. struct page *page;
  936. unsigned long flags;
  937. gfp_t gfp_mask = priority;
  938. while (1) {
  939. spin_lock_irqsave(&rxq->lock, flags);
  940. if (list_empty(&rxq->rx_used)) {
  941. spin_unlock_irqrestore(&rxq->lock, flags);
  942. return;
  943. }
  944. spin_unlock_irqrestore(&rxq->lock, flags);
  945. if (rxq->free_count > RX_LOW_WATERMARK)
  946. gfp_mask |= __GFP_NOWARN;
  947. if (priv->hw_params.rx_page_order > 0)
  948. gfp_mask |= __GFP_COMP;
  949. /* Alloc a new receive buffer */
  950. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  951. if (!page) {
  952. if (net_ratelimit())
  953. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  954. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  955. net_ratelimit())
  956. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  957. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  958. rxq->free_count);
  959. /* We don't reschedule replenish work here -- we will
  960. * call the restock method and if it still needs
  961. * more buffers it will schedule replenish */
  962. break;
  963. }
  964. spin_lock_irqsave(&rxq->lock, flags);
  965. if (list_empty(&rxq->rx_used)) {
  966. spin_unlock_irqrestore(&rxq->lock, flags);
  967. __free_pages(page, priv->hw_params.rx_page_order);
  968. return;
  969. }
  970. element = rxq->rx_used.next;
  971. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  972. list_del(element);
  973. spin_unlock_irqrestore(&rxq->lock, flags);
  974. rxb->page = page;
  975. /* Get physical address of RB/SKB */
  976. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  977. PAGE_SIZE << priv->hw_params.rx_page_order,
  978. PCI_DMA_FROMDEVICE);
  979. spin_lock_irqsave(&rxq->lock, flags);
  980. list_add_tail(&rxb->list, &rxq->rx_free);
  981. rxq->free_count++;
  982. priv->alloc_rxb_page++;
  983. spin_unlock_irqrestore(&rxq->lock, flags);
  984. }
  985. }
  986. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  987. {
  988. unsigned long flags;
  989. int i;
  990. spin_lock_irqsave(&rxq->lock, flags);
  991. INIT_LIST_HEAD(&rxq->rx_free);
  992. INIT_LIST_HEAD(&rxq->rx_used);
  993. /* Fill the rx_used queue with _all_ of the Rx buffers */
  994. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  995. /* In the reset function, these buffers may have been allocated
  996. * to an SKB, so we need to unmap and free potential storage */
  997. if (rxq->pool[i].page != NULL) {
  998. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  999. PAGE_SIZE << priv->hw_params.rx_page_order,
  1000. PCI_DMA_FROMDEVICE);
  1001. __iwl_free_pages(priv, rxq->pool[i].page);
  1002. rxq->pool[i].page = NULL;
  1003. }
  1004. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1005. }
  1006. /* Set us so that we have processed and used all buffers, but have
  1007. * not restocked the Rx queue with fresh buffers */
  1008. rxq->read = rxq->write = 0;
  1009. rxq->write_actual = 0;
  1010. rxq->free_count = 0;
  1011. spin_unlock_irqrestore(&rxq->lock, flags);
  1012. }
  1013. void iwl3945_rx_replenish(void *data)
  1014. {
  1015. struct iwl_priv *priv = data;
  1016. unsigned long flags;
  1017. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1018. spin_lock_irqsave(&priv->lock, flags);
  1019. iwl3945_rx_queue_restock(priv);
  1020. spin_unlock_irqrestore(&priv->lock, flags);
  1021. }
  1022. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1023. {
  1024. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1025. iwl3945_rx_queue_restock(priv);
  1026. }
  1027. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1028. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1029. * This free routine walks the list of POOL entries and if SKB is set to
  1030. * non NULL it is unmapped and freed
  1031. */
  1032. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1033. {
  1034. int i;
  1035. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1036. if (rxq->pool[i].page != NULL) {
  1037. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1038. PAGE_SIZE << priv->hw_params.rx_page_order,
  1039. PCI_DMA_FROMDEVICE);
  1040. __iwl_free_pages(priv, rxq->pool[i].page);
  1041. rxq->pool[i].page = NULL;
  1042. }
  1043. }
  1044. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1045. rxq->dma_addr);
  1046. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1047. rxq->rb_stts, rxq->rb_stts_dma);
  1048. rxq->bd = NULL;
  1049. rxq->rb_stts = NULL;
  1050. }
  1051. /* Convert linear signal-to-noise ratio into dB */
  1052. static u8 ratio2dB[100] = {
  1053. /* 0 1 2 3 4 5 6 7 8 9 */
  1054. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1055. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1056. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1057. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1058. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1059. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1060. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1061. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1062. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1063. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1064. };
  1065. /* Calculates a relative dB value from a ratio of linear
  1066. * (i.e. not dB) signal levels.
  1067. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1068. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1069. {
  1070. /* 1000:1 or higher just report as 60 dB */
  1071. if (sig_ratio >= 1000)
  1072. return 60;
  1073. /* 100:1 or higher, divide by 10 and use table,
  1074. * add 20 dB to make up for divide by 10 */
  1075. if (sig_ratio >= 100)
  1076. return 20 + (int)ratio2dB[sig_ratio/10];
  1077. /* We shouldn't see this */
  1078. if (sig_ratio < 1)
  1079. return 0;
  1080. /* Use table for ratios 1:1 - 99:1 */
  1081. return (int)ratio2dB[sig_ratio];
  1082. }
  1083. /**
  1084. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1085. *
  1086. * Uses the priv->rx_handlers callback function array to invoke
  1087. * the appropriate handlers, including command responses,
  1088. * frame-received notifications, and other notifications.
  1089. */
  1090. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1091. {
  1092. struct iwl_rx_mem_buffer *rxb;
  1093. struct iwl_rx_packet *pkt;
  1094. struct iwl_rx_queue *rxq = &priv->rxq;
  1095. u32 r, i;
  1096. int reclaim;
  1097. unsigned long flags;
  1098. u8 fill_rx = 0;
  1099. u32 count = 8;
  1100. int total_empty = 0;
  1101. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1102. * buffer that the driver may process (last buffer filled by ucode). */
  1103. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1104. i = rxq->read;
  1105. /* calculate total frames need to be restock after handling RX */
  1106. total_empty = r - rxq->write_actual;
  1107. if (total_empty < 0)
  1108. total_empty += RX_QUEUE_SIZE;
  1109. if (total_empty > (RX_QUEUE_SIZE / 2))
  1110. fill_rx = 1;
  1111. /* Rx interrupt, but nothing sent from uCode */
  1112. if (i == r)
  1113. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1114. while (i != r) {
  1115. rxb = rxq->queue[i];
  1116. /* If an RXB doesn't have a Rx queue slot associated with it,
  1117. * then a bug has been introduced in the queue refilling
  1118. * routines -- catch it here */
  1119. BUG_ON(rxb == NULL);
  1120. rxq->queue[i] = NULL;
  1121. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1122. PAGE_SIZE << priv->hw_params.rx_page_order,
  1123. PCI_DMA_FROMDEVICE);
  1124. pkt = rxb_addr(rxb);
  1125. trace_iwlwifi_dev_rx(priv, pkt,
  1126. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1127. /* Reclaim a command buffer only if this packet is a response
  1128. * to a (driver-originated) command.
  1129. * If the packet (e.g. Rx frame) originated from uCode,
  1130. * there is no command buffer to reclaim.
  1131. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1132. * but apparently a few don't get set; catch them here. */
  1133. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1134. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1135. (pkt->hdr.cmd != REPLY_TX);
  1136. /* Based on type of command response or notification,
  1137. * handle those that need handling via function in
  1138. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1139. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1140. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1141. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1142. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1143. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1144. } else {
  1145. /* No handling needed */
  1146. IWL_DEBUG_RX(priv,
  1147. "r %d i %d No handler needed for %s, 0x%02x\n",
  1148. r, i, get_cmd_string(pkt->hdr.cmd),
  1149. pkt->hdr.cmd);
  1150. }
  1151. /*
  1152. * XXX: After here, we should always check rxb->page
  1153. * against NULL before touching it or its virtual
  1154. * memory (pkt). Because some rx_handler might have
  1155. * already taken or freed the pages.
  1156. */
  1157. if (reclaim) {
  1158. /* Invoke any callbacks, transfer the buffer to caller,
  1159. * and fire off the (possibly) blocking iwl_send_cmd()
  1160. * as we reclaim the driver command queue */
  1161. if (rxb->page)
  1162. iwl_tx_cmd_complete(priv, rxb);
  1163. else
  1164. IWL_WARN(priv, "Claim null rxb?\n");
  1165. }
  1166. /* Reuse the page if possible. For notification packets and
  1167. * SKBs that fail to Rx correctly, add them back into the
  1168. * rx_free list for reuse later. */
  1169. spin_lock_irqsave(&rxq->lock, flags);
  1170. if (rxb->page != NULL) {
  1171. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1172. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1173. PCI_DMA_FROMDEVICE);
  1174. list_add_tail(&rxb->list, &rxq->rx_free);
  1175. rxq->free_count++;
  1176. } else
  1177. list_add_tail(&rxb->list, &rxq->rx_used);
  1178. spin_unlock_irqrestore(&rxq->lock, flags);
  1179. i = (i + 1) & RX_QUEUE_MASK;
  1180. /* If there are a lot of unused frames,
  1181. * restock the Rx queue so ucode won't assert. */
  1182. if (fill_rx) {
  1183. count++;
  1184. if (count >= 8) {
  1185. rxq->read = i;
  1186. iwl3945_rx_replenish_now(priv);
  1187. count = 0;
  1188. }
  1189. }
  1190. }
  1191. /* Backtrack one entry */
  1192. rxq->read = i;
  1193. if (fill_rx)
  1194. iwl3945_rx_replenish_now(priv);
  1195. else
  1196. iwl3945_rx_queue_restock(priv);
  1197. }
  1198. /* call this function to flush any scheduled tasklet */
  1199. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1200. {
  1201. /* wait to make sure we flush pending tasklet*/
  1202. synchronize_irq(priv->pci_dev->irq);
  1203. tasklet_kill(&priv->irq_tasklet);
  1204. }
  1205. static const char *desc_lookup(int i)
  1206. {
  1207. switch (i) {
  1208. case 1:
  1209. return "FAIL";
  1210. case 2:
  1211. return "BAD_PARAM";
  1212. case 3:
  1213. return "BAD_CHECKSUM";
  1214. case 4:
  1215. return "NMI_INTERRUPT";
  1216. case 5:
  1217. return "SYSASSERT";
  1218. case 6:
  1219. return "FATAL_ERROR";
  1220. }
  1221. return "UNKNOWN";
  1222. }
  1223. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1224. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1225. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1226. {
  1227. u32 i;
  1228. u32 desc, time, count, base, data1;
  1229. u32 blink1, blink2, ilink1, ilink2;
  1230. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1231. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1232. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1233. return;
  1234. }
  1235. count = iwl_read_targ_mem(priv, base);
  1236. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1237. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1238. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1239. priv->status, count);
  1240. }
  1241. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1242. "ilink1 nmiPC Line\n");
  1243. for (i = ERROR_START_OFFSET;
  1244. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1245. i += ERROR_ELEM_SIZE) {
  1246. desc = iwl_read_targ_mem(priv, base + i);
  1247. time =
  1248. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1249. blink1 =
  1250. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1251. blink2 =
  1252. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1253. ilink1 =
  1254. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1255. ilink2 =
  1256. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1257. data1 =
  1258. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1259. IWL_ERR(priv,
  1260. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1261. desc_lookup(desc), desc, time, blink1, blink2,
  1262. ilink1, ilink2, data1);
  1263. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1264. 0, blink1, blink2, ilink1, ilink2);
  1265. }
  1266. }
  1267. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1268. /**
  1269. * iwl3945_print_event_log - Dump error event log to syslog
  1270. *
  1271. */
  1272. static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1273. u32 num_events, u32 mode,
  1274. int pos, char **buf, size_t bufsz)
  1275. {
  1276. u32 i;
  1277. u32 base; /* SRAM byte address of event log header */
  1278. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1279. u32 ptr; /* SRAM byte address of log data */
  1280. u32 ev, time, data; /* event log data */
  1281. unsigned long reg_flags;
  1282. if (num_events == 0)
  1283. return pos;
  1284. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1285. if (mode == 0)
  1286. event_size = 2 * sizeof(u32);
  1287. else
  1288. event_size = 3 * sizeof(u32);
  1289. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1290. /* Make sure device is powered up for SRAM reads */
  1291. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1292. iwl_grab_nic_access(priv);
  1293. /* Set starting address; reads will auto-increment */
  1294. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1295. rmb();
  1296. /* "time" is actually "data" for mode 0 (no timestamp).
  1297. * place event id # at far right for easier visual parsing. */
  1298. for (i = 0; i < num_events; i++) {
  1299. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1300. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1301. if (mode == 0) {
  1302. /* data, ev */
  1303. if (bufsz) {
  1304. pos += scnprintf(*buf + pos, bufsz - pos,
  1305. "0x%08x:%04u\n",
  1306. time, ev);
  1307. } else {
  1308. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1309. trace_iwlwifi_dev_ucode_event(priv, 0,
  1310. time, ev);
  1311. }
  1312. } else {
  1313. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1314. if (bufsz) {
  1315. pos += scnprintf(*buf + pos, bufsz - pos,
  1316. "%010u:0x%08x:%04u\n",
  1317. time, data, ev);
  1318. } else {
  1319. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
  1320. time, data, ev);
  1321. trace_iwlwifi_dev_ucode_event(priv, time,
  1322. data, ev);
  1323. }
  1324. }
  1325. }
  1326. /* Allow device to power down */
  1327. iwl_release_nic_access(priv);
  1328. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1329. return pos;
  1330. }
  1331. /**
  1332. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1333. */
  1334. static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1335. u32 num_wraps, u32 next_entry,
  1336. u32 size, u32 mode,
  1337. int pos, char **buf, size_t bufsz)
  1338. {
  1339. /*
  1340. * display the newest DEFAULT_LOG_ENTRIES entries
  1341. * i.e the entries just before the next ont that uCode would fill.
  1342. */
  1343. if (num_wraps) {
  1344. if (next_entry < size) {
  1345. pos = iwl3945_print_event_log(priv,
  1346. capacity - (size - next_entry),
  1347. size - next_entry, mode,
  1348. pos, buf, bufsz);
  1349. pos = iwl3945_print_event_log(priv, 0,
  1350. next_entry, mode,
  1351. pos, buf, bufsz);
  1352. } else
  1353. pos = iwl3945_print_event_log(priv, next_entry - size,
  1354. size, mode,
  1355. pos, buf, bufsz);
  1356. } else {
  1357. if (next_entry < size)
  1358. pos = iwl3945_print_event_log(priv, 0,
  1359. next_entry, mode,
  1360. pos, buf, bufsz);
  1361. else
  1362. pos = iwl3945_print_event_log(priv, next_entry - size,
  1363. size, mode,
  1364. pos, buf, bufsz);
  1365. }
  1366. return pos;
  1367. }
  1368. /* For sanity check only. Actual size is determined by uCode, typ. 512 */
  1369. #define IWL3945_MAX_EVENT_LOG_SIZE (512)
  1370. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1371. int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1372. char **buf, bool display)
  1373. {
  1374. u32 base; /* SRAM byte address of event log header */
  1375. u32 capacity; /* event log capacity in # entries */
  1376. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1377. u32 num_wraps; /* # times uCode wrapped to top of log */
  1378. u32 next_entry; /* index of next entry to be written by uCode */
  1379. u32 size; /* # entries that we'll print */
  1380. int pos = 0;
  1381. size_t bufsz = 0;
  1382. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1383. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1384. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1385. return -EINVAL;
  1386. }
  1387. /* event log header */
  1388. capacity = iwl_read_targ_mem(priv, base);
  1389. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1390. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1391. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1392. if (capacity > IWL3945_MAX_EVENT_LOG_SIZE) {
  1393. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1394. capacity, IWL3945_MAX_EVENT_LOG_SIZE);
  1395. capacity = IWL3945_MAX_EVENT_LOG_SIZE;
  1396. }
  1397. if (next_entry > IWL3945_MAX_EVENT_LOG_SIZE) {
  1398. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1399. next_entry, IWL3945_MAX_EVENT_LOG_SIZE);
  1400. next_entry = IWL3945_MAX_EVENT_LOG_SIZE;
  1401. }
  1402. size = num_wraps ? capacity : next_entry;
  1403. /* bail out if nothing in log */
  1404. if (size == 0) {
  1405. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1406. return pos;
  1407. }
  1408. #ifdef CONFIG_IWLWIFI_DEBUG
  1409. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1410. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1411. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1412. #else
  1413. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1414. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1415. #endif
  1416. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1417. size);
  1418. #ifdef CONFIG_IWLWIFI_DEBUG
  1419. if (display) {
  1420. if (full_log)
  1421. bufsz = capacity * 48;
  1422. else
  1423. bufsz = size * 48;
  1424. *buf = kmalloc(bufsz, GFP_KERNEL);
  1425. if (!*buf)
  1426. return -ENOMEM;
  1427. }
  1428. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1429. /* if uCode has wrapped back to top of log,
  1430. * start at the oldest entry,
  1431. * i.e the next one that uCode would fill.
  1432. */
  1433. if (num_wraps)
  1434. pos = iwl3945_print_event_log(priv, next_entry,
  1435. capacity - next_entry, mode,
  1436. pos, buf, bufsz);
  1437. /* (then/else) start at top of log */
  1438. pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
  1439. pos, buf, bufsz);
  1440. } else
  1441. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1442. next_entry, size, mode,
  1443. pos, buf, bufsz);
  1444. #else
  1445. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1446. next_entry, size, mode,
  1447. pos, buf, bufsz);
  1448. #endif
  1449. return pos;
  1450. }
  1451. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1452. {
  1453. u32 inta, handled = 0;
  1454. u32 inta_fh;
  1455. unsigned long flags;
  1456. #ifdef CONFIG_IWLWIFI_DEBUG
  1457. u32 inta_mask;
  1458. #endif
  1459. spin_lock_irqsave(&priv->lock, flags);
  1460. /* Ack/clear/reset pending uCode interrupts.
  1461. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1462. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1463. inta = iwl_read32(priv, CSR_INT);
  1464. iwl_write32(priv, CSR_INT, inta);
  1465. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1466. * Any new interrupts that happen after this, either while we're
  1467. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1468. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1469. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1470. #ifdef CONFIG_IWLWIFI_DEBUG
  1471. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1472. /* just for debug */
  1473. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1474. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1475. inta, inta_mask, inta_fh);
  1476. }
  1477. #endif
  1478. spin_unlock_irqrestore(&priv->lock, flags);
  1479. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1480. * atomic, make sure that inta covers all the interrupts that
  1481. * we've discovered, even if FH interrupt came in just after
  1482. * reading CSR_INT. */
  1483. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1484. inta |= CSR_INT_BIT_FH_RX;
  1485. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1486. inta |= CSR_INT_BIT_FH_TX;
  1487. /* Now service all interrupt bits discovered above. */
  1488. if (inta & CSR_INT_BIT_HW_ERR) {
  1489. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1490. /* Tell the device to stop sending interrupts */
  1491. iwl_disable_interrupts(priv);
  1492. priv->isr_stats.hw++;
  1493. iwl_irq_handle_error(priv);
  1494. handled |= CSR_INT_BIT_HW_ERR;
  1495. return;
  1496. }
  1497. #ifdef CONFIG_IWLWIFI_DEBUG
  1498. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1499. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1500. if (inta & CSR_INT_BIT_SCD) {
  1501. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1502. "the frame/frames.\n");
  1503. priv->isr_stats.sch++;
  1504. }
  1505. /* Alive notification via Rx interrupt will do the real work */
  1506. if (inta & CSR_INT_BIT_ALIVE) {
  1507. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1508. priv->isr_stats.alive++;
  1509. }
  1510. }
  1511. #endif
  1512. /* Safely ignore these bits for debug checks below */
  1513. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1514. /* Error detected by uCode */
  1515. if (inta & CSR_INT_BIT_SW_ERR) {
  1516. IWL_ERR(priv, "Microcode SW error detected. "
  1517. "Restarting 0x%X.\n", inta);
  1518. priv->isr_stats.sw++;
  1519. priv->isr_stats.sw_err = inta;
  1520. iwl_irq_handle_error(priv);
  1521. handled |= CSR_INT_BIT_SW_ERR;
  1522. }
  1523. /* uCode wakes up after power-down sleep */
  1524. if (inta & CSR_INT_BIT_WAKEUP) {
  1525. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1526. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1527. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1528. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1529. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1530. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1531. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1532. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1533. priv->isr_stats.wakeup++;
  1534. handled |= CSR_INT_BIT_WAKEUP;
  1535. }
  1536. /* All uCode command responses, including Tx command responses,
  1537. * Rx "responses" (frame-received notification), and other
  1538. * notifications from uCode come through here*/
  1539. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1540. iwl3945_rx_handle(priv);
  1541. priv->isr_stats.rx++;
  1542. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1543. }
  1544. if (inta & CSR_INT_BIT_FH_TX) {
  1545. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1546. priv->isr_stats.tx++;
  1547. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1548. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1549. (FH39_SRVC_CHNL), 0x0);
  1550. handled |= CSR_INT_BIT_FH_TX;
  1551. }
  1552. if (inta & ~handled) {
  1553. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1554. priv->isr_stats.unhandled++;
  1555. }
  1556. if (inta & ~priv->inta_mask) {
  1557. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1558. inta & ~priv->inta_mask);
  1559. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1560. }
  1561. /* Re-enable all interrupts */
  1562. /* only Re-enable if disabled by irq */
  1563. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1564. iwl_enable_interrupts(priv);
  1565. #ifdef CONFIG_IWLWIFI_DEBUG
  1566. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1567. inta = iwl_read32(priv, CSR_INT);
  1568. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1569. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1570. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1571. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1572. }
  1573. #endif
  1574. }
  1575. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1576. enum ieee80211_band band,
  1577. u8 is_active, u8 n_probes,
  1578. struct iwl3945_scan_channel *scan_ch)
  1579. {
  1580. struct ieee80211_channel *chan;
  1581. const struct ieee80211_supported_band *sband;
  1582. const struct iwl_channel_info *ch_info;
  1583. u16 passive_dwell = 0;
  1584. u16 active_dwell = 0;
  1585. int added, i;
  1586. sband = iwl_get_hw_mode(priv, band);
  1587. if (!sband)
  1588. return 0;
  1589. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1590. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1591. if (passive_dwell <= active_dwell)
  1592. passive_dwell = active_dwell + 1;
  1593. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1594. chan = priv->scan_request->channels[i];
  1595. if (chan->band != band)
  1596. continue;
  1597. scan_ch->channel = chan->hw_value;
  1598. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1599. if (!is_channel_valid(ch_info)) {
  1600. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1601. scan_ch->channel);
  1602. continue;
  1603. }
  1604. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1605. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1606. /* If passive , set up for auto-switch
  1607. * and use long active_dwell time.
  1608. */
  1609. if (!is_active || is_channel_passive(ch_info) ||
  1610. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1611. scan_ch->type = 0; /* passive */
  1612. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1613. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1614. } else {
  1615. scan_ch->type = 1; /* active */
  1616. }
  1617. /* Set direct probe bits. These may be used both for active
  1618. * scan channels (probes gets sent right away),
  1619. * or for passive channels (probes get se sent only after
  1620. * hearing clear Rx packet).*/
  1621. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1622. if (n_probes)
  1623. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1624. } else {
  1625. /* uCode v1 does not allow setting direct probe bits on
  1626. * passive channel. */
  1627. if ((scan_ch->type & 1) && n_probes)
  1628. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1629. }
  1630. /* Set txpower levels to defaults */
  1631. scan_ch->tpc.dsp_atten = 110;
  1632. /* scan_pwr_info->tpc.dsp_atten; */
  1633. /*scan_pwr_info->tpc.tx_gain; */
  1634. if (band == IEEE80211_BAND_5GHZ)
  1635. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1636. else {
  1637. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1638. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1639. * power level:
  1640. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1641. */
  1642. }
  1643. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1644. scan_ch->channel,
  1645. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1646. (scan_ch->type & 1) ?
  1647. active_dwell : passive_dwell);
  1648. scan_ch++;
  1649. added++;
  1650. }
  1651. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1652. return added;
  1653. }
  1654. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1655. struct ieee80211_rate *rates)
  1656. {
  1657. int i;
  1658. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1659. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1660. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1661. rates[i].hw_value_short = i;
  1662. rates[i].flags = 0;
  1663. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1664. /*
  1665. * If CCK != 1M then set short preamble rate flag.
  1666. */
  1667. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1668. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1669. }
  1670. }
  1671. }
  1672. /******************************************************************************
  1673. *
  1674. * uCode download functions
  1675. *
  1676. ******************************************************************************/
  1677. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1678. {
  1679. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1680. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1681. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1682. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1683. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1684. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1685. }
  1686. /**
  1687. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1688. * looking at all data.
  1689. */
  1690. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1691. {
  1692. u32 val;
  1693. u32 save_len = len;
  1694. int rc = 0;
  1695. u32 errcnt;
  1696. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1697. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1698. IWL39_RTC_INST_LOWER_BOUND);
  1699. errcnt = 0;
  1700. for (; len > 0; len -= sizeof(u32), image++) {
  1701. /* read data comes through single port, auto-incr addr */
  1702. /* NOTE: Use the debugless read so we don't flood kernel log
  1703. * if IWL_DL_IO is set */
  1704. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1705. if (val != le32_to_cpu(*image)) {
  1706. IWL_ERR(priv, "uCode INST section is invalid at "
  1707. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1708. save_len - len, val, le32_to_cpu(*image));
  1709. rc = -EIO;
  1710. errcnt++;
  1711. if (errcnt >= 20)
  1712. break;
  1713. }
  1714. }
  1715. if (!errcnt)
  1716. IWL_DEBUG_INFO(priv,
  1717. "ucode image in INSTRUCTION memory is good\n");
  1718. return rc;
  1719. }
  1720. /**
  1721. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1722. * using sample data 100 bytes apart. If these sample points are good,
  1723. * it's a pretty good bet that everything between them is good, too.
  1724. */
  1725. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1726. {
  1727. u32 val;
  1728. int rc = 0;
  1729. u32 errcnt = 0;
  1730. u32 i;
  1731. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1732. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1733. /* read data comes through single port, auto-incr addr */
  1734. /* NOTE: Use the debugless read so we don't flood kernel log
  1735. * if IWL_DL_IO is set */
  1736. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1737. i + IWL39_RTC_INST_LOWER_BOUND);
  1738. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1739. if (val != le32_to_cpu(*image)) {
  1740. #if 0 /* Enable this if you want to see details */
  1741. IWL_ERR(priv, "uCode INST section is invalid at "
  1742. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1743. i, val, *image);
  1744. #endif
  1745. rc = -EIO;
  1746. errcnt++;
  1747. if (errcnt >= 3)
  1748. break;
  1749. }
  1750. }
  1751. return rc;
  1752. }
  1753. /**
  1754. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1755. * and verify its contents
  1756. */
  1757. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1758. {
  1759. __le32 *image;
  1760. u32 len;
  1761. int rc = 0;
  1762. /* Try bootstrap */
  1763. image = (__le32 *)priv->ucode_boot.v_addr;
  1764. len = priv->ucode_boot.len;
  1765. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1766. if (rc == 0) {
  1767. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1768. return 0;
  1769. }
  1770. /* Try initialize */
  1771. image = (__le32 *)priv->ucode_init.v_addr;
  1772. len = priv->ucode_init.len;
  1773. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1774. if (rc == 0) {
  1775. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1776. return 0;
  1777. }
  1778. /* Try runtime/protocol */
  1779. image = (__le32 *)priv->ucode_code.v_addr;
  1780. len = priv->ucode_code.len;
  1781. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1782. if (rc == 0) {
  1783. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1784. return 0;
  1785. }
  1786. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1787. /* Since nothing seems to match, show first several data entries in
  1788. * instruction SRAM, so maybe visual inspection will give a clue.
  1789. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1790. image = (__le32 *)priv->ucode_boot.v_addr;
  1791. len = priv->ucode_boot.len;
  1792. rc = iwl3945_verify_inst_full(priv, image, len);
  1793. return rc;
  1794. }
  1795. static void iwl3945_nic_start(struct iwl_priv *priv)
  1796. {
  1797. /* Remove all resets to allow NIC to operate */
  1798. iwl_write32(priv, CSR_RESET, 0);
  1799. }
  1800. /**
  1801. * iwl3945_read_ucode - Read uCode images from disk file.
  1802. *
  1803. * Copy into buffers for card to fetch via bus-mastering
  1804. */
  1805. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1806. {
  1807. const struct iwl_ucode_header *ucode;
  1808. int ret = -EINVAL, index;
  1809. const struct firmware *ucode_raw;
  1810. /* firmware file name contains uCode/driver compatibility version */
  1811. const char *name_pre = priv->cfg->fw_name_pre;
  1812. const unsigned int api_max = priv->cfg->ucode_api_max;
  1813. const unsigned int api_min = priv->cfg->ucode_api_min;
  1814. char buf[25];
  1815. u8 *src;
  1816. size_t len;
  1817. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1818. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1819. * request_firmware() is synchronous, file is in memory on return. */
  1820. for (index = api_max; index >= api_min; index--) {
  1821. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1822. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1823. if (ret < 0) {
  1824. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1825. buf, ret);
  1826. if (ret == -ENOENT)
  1827. continue;
  1828. else
  1829. goto error;
  1830. } else {
  1831. if (index < api_max)
  1832. IWL_ERR(priv, "Loaded firmware %s, "
  1833. "which is deprecated. "
  1834. " Please use API v%u instead.\n",
  1835. buf, api_max);
  1836. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1837. "(%zd bytes) from disk\n",
  1838. buf, ucode_raw->size);
  1839. break;
  1840. }
  1841. }
  1842. if (ret < 0)
  1843. goto error;
  1844. /* Make sure that we got at least our header! */
  1845. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1846. IWL_ERR(priv, "File size way too small!\n");
  1847. ret = -EINVAL;
  1848. goto err_release;
  1849. }
  1850. /* Data from ucode file: header followed by uCode images */
  1851. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1852. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1853. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1854. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1855. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1856. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1857. init_data_size =
  1858. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1859. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1860. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1861. /* api_ver should match the api version forming part of the
  1862. * firmware filename ... but we don't check for that and only rely
  1863. * on the API version read from firmware header from here on forward */
  1864. if (api_ver < api_min || api_ver > api_max) {
  1865. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1866. "Driver supports v%u, firmware is v%u.\n",
  1867. api_max, api_ver);
  1868. priv->ucode_ver = 0;
  1869. ret = -EINVAL;
  1870. goto err_release;
  1871. }
  1872. if (api_ver != api_max)
  1873. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1874. "got %u. New firmware can be obtained "
  1875. "from http://www.intellinuxwireless.org.\n",
  1876. api_max, api_ver);
  1877. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1878. IWL_UCODE_MAJOR(priv->ucode_ver),
  1879. IWL_UCODE_MINOR(priv->ucode_ver),
  1880. IWL_UCODE_API(priv->ucode_ver),
  1881. IWL_UCODE_SERIAL(priv->ucode_ver));
  1882. snprintf(priv->hw->wiphy->fw_version,
  1883. sizeof(priv->hw->wiphy->fw_version),
  1884. "%u.%u.%u.%u",
  1885. IWL_UCODE_MAJOR(priv->ucode_ver),
  1886. IWL_UCODE_MINOR(priv->ucode_ver),
  1887. IWL_UCODE_API(priv->ucode_ver),
  1888. IWL_UCODE_SERIAL(priv->ucode_ver));
  1889. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1890. priv->ucode_ver);
  1891. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1892. inst_size);
  1893. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1894. data_size);
  1895. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1896. init_size);
  1897. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1898. init_data_size);
  1899. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1900. boot_size);
  1901. /* Verify size of file vs. image size info in file's header */
  1902. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1903. inst_size + data_size + init_size +
  1904. init_data_size + boot_size) {
  1905. IWL_DEBUG_INFO(priv,
  1906. "uCode file size %zd does not match expected size\n",
  1907. ucode_raw->size);
  1908. ret = -EINVAL;
  1909. goto err_release;
  1910. }
  1911. /* Verify that uCode images will fit in card's SRAM */
  1912. if (inst_size > IWL39_MAX_INST_SIZE) {
  1913. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1914. inst_size);
  1915. ret = -EINVAL;
  1916. goto err_release;
  1917. }
  1918. if (data_size > IWL39_MAX_DATA_SIZE) {
  1919. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1920. data_size);
  1921. ret = -EINVAL;
  1922. goto err_release;
  1923. }
  1924. if (init_size > IWL39_MAX_INST_SIZE) {
  1925. IWL_DEBUG_INFO(priv,
  1926. "uCode init instr len %d too large to fit in\n",
  1927. init_size);
  1928. ret = -EINVAL;
  1929. goto err_release;
  1930. }
  1931. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1932. IWL_DEBUG_INFO(priv,
  1933. "uCode init data len %d too large to fit in\n",
  1934. init_data_size);
  1935. ret = -EINVAL;
  1936. goto err_release;
  1937. }
  1938. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1939. IWL_DEBUG_INFO(priv,
  1940. "uCode boot instr len %d too large to fit in\n",
  1941. boot_size);
  1942. ret = -EINVAL;
  1943. goto err_release;
  1944. }
  1945. /* Allocate ucode buffers for card's bus-master loading ... */
  1946. /* Runtime instructions and 2 copies of data:
  1947. * 1) unmodified from disk
  1948. * 2) backup cache for save/restore during power-downs */
  1949. priv->ucode_code.len = inst_size;
  1950. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1951. priv->ucode_data.len = data_size;
  1952. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1953. priv->ucode_data_backup.len = data_size;
  1954. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1955. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1956. !priv->ucode_data_backup.v_addr)
  1957. goto err_pci_alloc;
  1958. /* Initialization instructions and data */
  1959. if (init_size && init_data_size) {
  1960. priv->ucode_init.len = init_size;
  1961. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1962. priv->ucode_init_data.len = init_data_size;
  1963. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1964. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1965. goto err_pci_alloc;
  1966. }
  1967. /* Bootstrap (instructions only, no data) */
  1968. if (boot_size) {
  1969. priv->ucode_boot.len = boot_size;
  1970. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1971. if (!priv->ucode_boot.v_addr)
  1972. goto err_pci_alloc;
  1973. }
  1974. /* Copy images into buffers for card's bus-master reads ... */
  1975. /* Runtime instructions (first block of data in file) */
  1976. len = inst_size;
  1977. IWL_DEBUG_INFO(priv,
  1978. "Copying (but not loading) uCode instr len %zd\n", len);
  1979. memcpy(priv->ucode_code.v_addr, src, len);
  1980. src += len;
  1981. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1982. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1983. /* Runtime data (2nd block)
  1984. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1985. len = data_size;
  1986. IWL_DEBUG_INFO(priv,
  1987. "Copying (but not loading) uCode data len %zd\n", len);
  1988. memcpy(priv->ucode_data.v_addr, src, len);
  1989. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1990. src += len;
  1991. /* Initialization instructions (3rd block) */
  1992. if (init_size) {
  1993. len = init_size;
  1994. IWL_DEBUG_INFO(priv,
  1995. "Copying (but not loading) init instr len %zd\n", len);
  1996. memcpy(priv->ucode_init.v_addr, src, len);
  1997. src += len;
  1998. }
  1999. /* Initialization data (4th block) */
  2000. if (init_data_size) {
  2001. len = init_data_size;
  2002. IWL_DEBUG_INFO(priv,
  2003. "Copying (but not loading) init data len %zd\n", len);
  2004. memcpy(priv->ucode_init_data.v_addr, src, len);
  2005. src += len;
  2006. }
  2007. /* Bootstrap instructions (5th block) */
  2008. len = boot_size;
  2009. IWL_DEBUG_INFO(priv,
  2010. "Copying (but not loading) boot instr len %zd\n", len);
  2011. memcpy(priv->ucode_boot.v_addr, src, len);
  2012. /* We have our copies now, allow OS release its copies */
  2013. release_firmware(ucode_raw);
  2014. return 0;
  2015. err_pci_alloc:
  2016. IWL_ERR(priv, "failed to allocate pci memory\n");
  2017. ret = -ENOMEM;
  2018. iwl3945_dealloc_ucode_pci(priv);
  2019. err_release:
  2020. release_firmware(ucode_raw);
  2021. error:
  2022. return ret;
  2023. }
  2024. /**
  2025. * iwl3945_set_ucode_ptrs - Set uCode address location
  2026. *
  2027. * Tell initialization uCode where to find runtime uCode.
  2028. *
  2029. * BSM registers initially contain pointers to initialization uCode.
  2030. * We need to replace them to load runtime uCode inst and data,
  2031. * and to save runtime data when powering down.
  2032. */
  2033. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2034. {
  2035. dma_addr_t pinst;
  2036. dma_addr_t pdata;
  2037. /* bits 31:0 for 3945 */
  2038. pinst = priv->ucode_code.p_addr;
  2039. pdata = priv->ucode_data_backup.p_addr;
  2040. /* Tell bootstrap uCode where to find image to load */
  2041. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2042. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2043. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2044. priv->ucode_data.len);
  2045. /* Inst byte count must be last to set up, bit 31 signals uCode
  2046. * that all new ptr/size info is in place */
  2047. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2048. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2049. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2050. return 0;
  2051. }
  2052. /**
  2053. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2054. *
  2055. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2056. *
  2057. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2058. */
  2059. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2060. {
  2061. /* Check alive response for "valid" sign from uCode */
  2062. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2063. /* We had an error bringing up the hardware, so take it
  2064. * all the way back down so we can try again */
  2065. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2066. goto restart;
  2067. }
  2068. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2069. * This is a paranoid check, because we would not have gotten the
  2070. * "initialize" alive if code weren't properly loaded. */
  2071. if (iwl3945_verify_ucode(priv)) {
  2072. /* Runtime instruction load was bad;
  2073. * take it all the way back down so we can try again */
  2074. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2075. goto restart;
  2076. }
  2077. /* Send pointers to protocol/runtime uCode image ... init code will
  2078. * load and launch runtime uCode, which will send us another "Alive"
  2079. * notification. */
  2080. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2081. if (iwl3945_set_ucode_ptrs(priv)) {
  2082. /* Runtime instruction load won't happen;
  2083. * take it all the way back down so we can try again */
  2084. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2085. goto restart;
  2086. }
  2087. return;
  2088. restart:
  2089. queue_work(priv->workqueue, &priv->restart);
  2090. }
  2091. /**
  2092. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2093. * from protocol/runtime uCode (initialization uCode's
  2094. * Alive gets handled by iwl3945_init_alive_start()).
  2095. */
  2096. static void iwl3945_alive_start(struct iwl_priv *priv)
  2097. {
  2098. int thermal_spin = 0;
  2099. u32 rfkill;
  2100. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2101. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2102. /* We had an error bringing up the hardware, so take it
  2103. * all the way back down so we can try again */
  2104. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2105. goto restart;
  2106. }
  2107. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2108. * This is a paranoid check, because we would not have gotten the
  2109. * "runtime" alive if code weren't properly loaded. */
  2110. if (iwl3945_verify_ucode(priv)) {
  2111. /* Runtime instruction load was bad;
  2112. * take it all the way back down so we can try again */
  2113. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2114. goto restart;
  2115. }
  2116. iwl_clear_stations_table(priv);
  2117. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2118. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2119. if (rfkill & 0x1) {
  2120. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2121. /* if RFKILL is not on, then wait for thermal
  2122. * sensor in adapter to kick in */
  2123. while (iwl3945_hw_get_temperature(priv) == 0) {
  2124. thermal_spin++;
  2125. udelay(10);
  2126. }
  2127. if (thermal_spin)
  2128. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2129. thermal_spin * 10);
  2130. } else
  2131. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2132. /* After the ALIVE response, we can send commands to 3945 uCode */
  2133. set_bit(STATUS_ALIVE, &priv->status);
  2134. if (iwl_is_rfkill(priv))
  2135. return;
  2136. ieee80211_wake_queues(priv->hw);
  2137. priv->active_rate = priv->rates_mask;
  2138. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2139. iwl_power_update_mode(priv, true);
  2140. if (iwl_is_associated(priv)) {
  2141. struct iwl3945_rxon_cmd *active_rxon =
  2142. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2143. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2144. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2145. } else {
  2146. /* Initialize our rx_config data */
  2147. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2148. }
  2149. /* Configure Bluetooth device coexistence support */
  2150. iwl_send_bt_config(priv);
  2151. /* Configure the adapter for unassociated operation */
  2152. iwlcore_commit_rxon(priv);
  2153. iwl3945_reg_txpower_periodic(priv);
  2154. iwl_leds_init(priv);
  2155. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2156. set_bit(STATUS_READY, &priv->status);
  2157. wake_up_interruptible(&priv->wait_command_queue);
  2158. /* reassociate for ADHOC mode */
  2159. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2160. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2161. priv->vif);
  2162. if (beacon)
  2163. iwl_mac_beacon_update(priv->hw, beacon);
  2164. }
  2165. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2166. iwl_set_mode(priv, priv->iw_mode);
  2167. return;
  2168. restart:
  2169. queue_work(priv->workqueue, &priv->restart);
  2170. }
  2171. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2172. static void __iwl3945_down(struct iwl_priv *priv)
  2173. {
  2174. unsigned long flags;
  2175. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2176. struct ieee80211_conf *conf = NULL;
  2177. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2178. conf = ieee80211_get_hw_conf(priv->hw);
  2179. if (!exit_pending)
  2180. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2181. iwl_clear_stations_table(priv);
  2182. /* Unblock any waiting calls */
  2183. wake_up_interruptible_all(&priv->wait_command_queue);
  2184. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2185. * exiting the module */
  2186. if (!exit_pending)
  2187. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2188. /* stop and reset the on-board processor */
  2189. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2190. /* tell the device to stop sending interrupts */
  2191. spin_lock_irqsave(&priv->lock, flags);
  2192. iwl_disable_interrupts(priv);
  2193. spin_unlock_irqrestore(&priv->lock, flags);
  2194. iwl_synchronize_irq(priv);
  2195. if (priv->mac80211_registered)
  2196. ieee80211_stop_queues(priv->hw);
  2197. /* If we have not previously called iwl3945_init() then
  2198. * clear all bits but the RF Kill bits and return */
  2199. if (!iwl_is_init(priv)) {
  2200. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2201. STATUS_RF_KILL_HW |
  2202. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2203. STATUS_GEO_CONFIGURED |
  2204. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2205. STATUS_EXIT_PENDING;
  2206. goto exit;
  2207. }
  2208. /* ...otherwise clear out all the status bits but the RF Kill
  2209. * bit and continue taking the NIC down. */
  2210. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2211. STATUS_RF_KILL_HW |
  2212. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2213. STATUS_GEO_CONFIGURED |
  2214. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2215. STATUS_FW_ERROR |
  2216. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2217. STATUS_EXIT_PENDING;
  2218. iwl3945_hw_txq_ctx_stop(priv);
  2219. iwl3945_hw_rxq_stop(priv);
  2220. /* Power-down device's busmaster DMA clocks */
  2221. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2222. udelay(5);
  2223. /* Stop the device, and put it in low power state */
  2224. priv->cfg->ops->lib->apm_ops.stop(priv);
  2225. exit:
  2226. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2227. if (priv->ibss_beacon)
  2228. dev_kfree_skb(priv->ibss_beacon);
  2229. priv->ibss_beacon = NULL;
  2230. /* clear out any free frames */
  2231. iwl3945_clear_free_frames(priv);
  2232. }
  2233. static void iwl3945_down(struct iwl_priv *priv)
  2234. {
  2235. mutex_lock(&priv->mutex);
  2236. __iwl3945_down(priv);
  2237. mutex_unlock(&priv->mutex);
  2238. iwl3945_cancel_deferred_work(priv);
  2239. }
  2240. #define MAX_HW_RESTARTS 5
  2241. static int __iwl3945_up(struct iwl_priv *priv)
  2242. {
  2243. int rc, i;
  2244. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2245. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2246. return -EIO;
  2247. }
  2248. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2249. IWL_ERR(priv, "ucode not available for device bring up\n");
  2250. return -EIO;
  2251. }
  2252. /* If platform's RF_KILL switch is NOT set to KILL */
  2253. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2254. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2255. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2256. else {
  2257. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2258. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2259. return -ENODEV;
  2260. }
  2261. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2262. rc = iwl3945_hw_nic_init(priv);
  2263. if (rc) {
  2264. IWL_ERR(priv, "Unable to int nic\n");
  2265. return rc;
  2266. }
  2267. /* make sure rfkill handshake bits are cleared */
  2268. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2269. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2270. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2271. /* clear (again), then enable host interrupts */
  2272. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2273. iwl_enable_interrupts(priv);
  2274. /* really make sure rfkill handshake bits are cleared */
  2275. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2276. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2277. /* Copy original ucode data image from disk into backup cache.
  2278. * This will be used to initialize the on-board processor's
  2279. * data SRAM for a clean start when the runtime program first loads. */
  2280. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2281. priv->ucode_data.len);
  2282. /* We return success when we resume from suspend and rf_kill is on. */
  2283. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2284. return 0;
  2285. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2286. iwl_clear_stations_table(priv);
  2287. /* load bootstrap state machine,
  2288. * load bootstrap program into processor's memory,
  2289. * prepare to load the "initialize" uCode */
  2290. priv->cfg->ops->lib->load_ucode(priv);
  2291. if (rc) {
  2292. IWL_ERR(priv,
  2293. "Unable to set up bootstrap uCode: %d\n", rc);
  2294. continue;
  2295. }
  2296. /* start card; "initialize" will load runtime ucode */
  2297. iwl3945_nic_start(priv);
  2298. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2299. return 0;
  2300. }
  2301. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2302. __iwl3945_down(priv);
  2303. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2304. /* tried to restart and config the device for as long as our
  2305. * patience could withstand */
  2306. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2307. return -EIO;
  2308. }
  2309. /*****************************************************************************
  2310. *
  2311. * Workqueue callbacks
  2312. *
  2313. *****************************************************************************/
  2314. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2315. {
  2316. struct iwl_priv *priv =
  2317. container_of(data, struct iwl_priv, init_alive_start.work);
  2318. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2319. return;
  2320. mutex_lock(&priv->mutex);
  2321. iwl3945_init_alive_start(priv);
  2322. mutex_unlock(&priv->mutex);
  2323. }
  2324. static void iwl3945_bg_alive_start(struct work_struct *data)
  2325. {
  2326. struct iwl_priv *priv =
  2327. container_of(data, struct iwl_priv, alive_start.work);
  2328. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2329. return;
  2330. mutex_lock(&priv->mutex);
  2331. iwl3945_alive_start(priv);
  2332. mutex_unlock(&priv->mutex);
  2333. }
  2334. /*
  2335. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2336. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2337. * *is* readable even when device has been SW_RESET into low power mode
  2338. * (e.g. during RF KILL).
  2339. */
  2340. static void iwl3945_rfkill_poll(struct work_struct *data)
  2341. {
  2342. struct iwl_priv *priv =
  2343. container_of(data, struct iwl_priv, rfkill_poll.work);
  2344. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2345. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2346. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2347. if (new_rfkill != old_rfkill) {
  2348. if (new_rfkill)
  2349. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2350. else
  2351. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2352. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2353. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2354. new_rfkill ? "disable radio" : "enable radio");
  2355. }
  2356. /* Keep this running, even if radio now enabled. This will be
  2357. * cancelled in mac_start() if system decides to start again */
  2358. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2359. round_jiffies_relative(2 * HZ));
  2360. }
  2361. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2362. static void iwl3945_bg_request_scan(struct work_struct *data)
  2363. {
  2364. struct iwl_priv *priv =
  2365. container_of(data, struct iwl_priv, request_scan);
  2366. struct iwl_host_cmd cmd = {
  2367. .id = REPLY_SCAN_CMD,
  2368. .len = sizeof(struct iwl3945_scan_cmd),
  2369. .flags = CMD_SIZE_HUGE,
  2370. };
  2371. int rc = 0;
  2372. struct iwl3945_scan_cmd *scan;
  2373. struct ieee80211_conf *conf = NULL;
  2374. u8 n_probes = 0;
  2375. enum ieee80211_band band;
  2376. bool is_active = false;
  2377. conf = ieee80211_get_hw_conf(priv->hw);
  2378. mutex_lock(&priv->mutex);
  2379. cancel_delayed_work(&priv->scan_check);
  2380. if (!iwl_is_ready(priv)) {
  2381. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2382. goto done;
  2383. }
  2384. /* Make sure the scan wasn't canceled before this queued work
  2385. * was given the chance to run... */
  2386. if (!test_bit(STATUS_SCANNING, &priv->status))
  2387. goto done;
  2388. /* This should never be called or scheduled if there is currently
  2389. * a scan active in the hardware. */
  2390. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2391. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2392. "Ignoring second request.\n");
  2393. rc = -EIO;
  2394. goto done;
  2395. }
  2396. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2397. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2398. goto done;
  2399. }
  2400. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2401. IWL_DEBUG_HC(priv,
  2402. "Scan request while abort pending. Queuing.\n");
  2403. goto done;
  2404. }
  2405. if (iwl_is_rfkill(priv)) {
  2406. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2407. goto done;
  2408. }
  2409. if (!test_bit(STATUS_READY, &priv->status)) {
  2410. IWL_DEBUG_HC(priv,
  2411. "Scan request while uninitialized. Queuing.\n");
  2412. goto done;
  2413. }
  2414. if (!priv->scan_bands) {
  2415. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2416. goto done;
  2417. }
  2418. if (!priv->scan) {
  2419. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2420. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2421. if (!priv->scan) {
  2422. rc = -ENOMEM;
  2423. goto done;
  2424. }
  2425. }
  2426. scan = priv->scan;
  2427. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2428. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2429. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2430. if (iwl_is_associated(priv)) {
  2431. u16 interval = 0;
  2432. u32 extra;
  2433. u32 suspend_time = 100;
  2434. u32 scan_suspend_time = 100;
  2435. unsigned long flags;
  2436. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2437. spin_lock_irqsave(&priv->lock, flags);
  2438. interval = priv->beacon_int;
  2439. spin_unlock_irqrestore(&priv->lock, flags);
  2440. scan->suspend_time = 0;
  2441. scan->max_out_time = cpu_to_le32(200 * 1024);
  2442. if (!interval)
  2443. interval = suspend_time;
  2444. /*
  2445. * suspend time format:
  2446. * 0-19: beacon interval in usec (time before exec.)
  2447. * 20-23: 0
  2448. * 24-31: number of beacons (suspend between channels)
  2449. */
  2450. extra = (suspend_time / interval) << 24;
  2451. scan_suspend_time = 0xFF0FFFFF &
  2452. (extra | ((suspend_time % interval) * 1024));
  2453. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2454. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2455. scan_suspend_time, interval);
  2456. }
  2457. if (priv->scan_request->n_ssids) {
  2458. int i, p = 0;
  2459. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2460. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2461. /* always does wildcard anyway */
  2462. if (!priv->scan_request->ssids[i].ssid_len)
  2463. continue;
  2464. scan->direct_scan[p].id = WLAN_EID_SSID;
  2465. scan->direct_scan[p].len =
  2466. priv->scan_request->ssids[i].ssid_len;
  2467. memcpy(scan->direct_scan[p].ssid,
  2468. priv->scan_request->ssids[i].ssid,
  2469. priv->scan_request->ssids[i].ssid_len);
  2470. n_probes++;
  2471. p++;
  2472. }
  2473. is_active = true;
  2474. } else
  2475. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2476. /* We don't build a direct scan probe request; the uCode will do
  2477. * that based on the direct_mask added to each channel entry */
  2478. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2479. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2480. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2481. /* flags + rate selection */
  2482. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2483. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2484. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2485. scan->good_CRC_th = 0;
  2486. band = IEEE80211_BAND_2GHZ;
  2487. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2488. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2489. /*
  2490. * If active scaning is requested but a certain channel
  2491. * is marked passive, we can do active scanning if we
  2492. * detect transmissions.
  2493. */
  2494. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2495. band = IEEE80211_BAND_5GHZ;
  2496. } else {
  2497. IWL_WARN(priv, "Invalid scan band count\n");
  2498. goto done;
  2499. }
  2500. scan->tx_cmd.len = cpu_to_le16(
  2501. iwl_fill_probe_req(priv,
  2502. (struct ieee80211_mgmt *)scan->data,
  2503. priv->scan_request->ie,
  2504. priv->scan_request->ie_len,
  2505. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2506. /* select Rx antennas */
  2507. scan->flags |= iwl3945_get_antenna_flags(priv);
  2508. if (iwl_is_monitor_mode(priv))
  2509. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2510. scan->channel_count =
  2511. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2512. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2513. if (scan->channel_count == 0) {
  2514. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2515. goto done;
  2516. }
  2517. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2518. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2519. cmd.data = scan;
  2520. scan->len = cpu_to_le16(cmd.len);
  2521. set_bit(STATUS_SCAN_HW, &priv->status);
  2522. rc = iwl_send_cmd_sync(priv, &cmd);
  2523. if (rc)
  2524. goto done;
  2525. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2526. IWL_SCAN_CHECK_WATCHDOG);
  2527. mutex_unlock(&priv->mutex);
  2528. return;
  2529. done:
  2530. /* can not perform scan make sure we clear scanning
  2531. * bits from status so next scan request can be performed.
  2532. * if we dont clear scanning status bit here all next scan
  2533. * will fail
  2534. */
  2535. clear_bit(STATUS_SCAN_HW, &priv->status);
  2536. clear_bit(STATUS_SCANNING, &priv->status);
  2537. /* inform mac80211 scan aborted */
  2538. queue_work(priv->workqueue, &priv->scan_completed);
  2539. mutex_unlock(&priv->mutex);
  2540. }
  2541. static void iwl3945_bg_restart(struct work_struct *data)
  2542. {
  2543. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2544. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2545. return;
  2546. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2547. mutex_lock(&priv->mutex);
  2548. priv->vif = NULL;
  2549. priv->is_open = 0;
  2550. mutex_unlock(&priv->mutex);
  2551. iwl3945_down(priv);
  2552. ieee80211_restart_hw(priv->hw);
  2553. } else {
  2554. iwl3945_down(priv);
  2555. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2556. return;
  2557. mutex_lock(&priv->mutex);
  2558. __iwl3945_up(priv);
  2559. mutex_unlock(&priv->mutex);
  2560. }
  2561. }
  2562. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2563. {
  2564. struct iwl_priv *priv =
  2565. container_of(data, struct iwl_priv, rx_replenish);
  2566. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2567. return;
  2568. mutex_lock(&priv->mutex);
  2569. iwl3945_rx_replenish(priv);
  2570. mutex_unlock(&priv->mutex);
  2571. }
  2572. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2573. void iwl3945_post_associate(struct iwl_priv *priv)
  2574. {
  2575. int rc = 0;
  2576. struct ieee80211_conf *conf = NULL;
  2577. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2578. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2579. return;
  2580. }
  2581. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2582. priv->assoc_id, priv->active_rxon.bssid_addr);
  2583. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2584. return;
  2585. if (!priv->vif || !priv->is_open)
  2586. return;
  2587. iwl_scan_cancel_timeout(priv, 200);
  2588. conf = ieee80211_get_hw_conf(priv->hw);
  2589. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2590. iwlcore_commit_rxon(priv);
  2591. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2592. iwl_setup_rxon_timing(priv);
  2593. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2594. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2595. if (rc)
  2596. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2597. "Attempting to continue.\n");
  2598. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2599. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2600. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2601. priv->assoc_id, priv->beacon_int);
  2602. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2603. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2604. else
  2605. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2606. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2607. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2608. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2609. else
  2610. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2611. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2612. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2613. }
  2614. iwlcore_commit_rxon(priv);
  2615. switch (priv->iw_mode) {
  2616. case NL80211_IFTYPE_STATION:
  2617. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2618. break;
  2619. case NL80211_IFTYPE_ADHOC:
  2620. priv->assoc_id = 1;
  2621. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2622. iwl3945_sync_sta(priv, IWL_STA_ID,
  2623. (priv->band == IEEE80211_BAND_5GHZ) ?
  2624. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2625. CMD_ASYNC);
  2626. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2627. iwl3945_send_beacon_cmd(priv);
  2628. break;
  2629. default:
  2630. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2631. __func__, priv->iw_mode);
  2632. break;
  2633. }
  2634. iwl_activate_qos(priv, 0);
  2635. /* we have just associated, don't start scan too early */
  2636. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2637. }
  2638. /*****************************************************************************
  2639. *
  2640. * mac80211 entry point functions
  2641. *
  2642. *****************************************************************************/
  2643. #define UCODE_READY_TIMEOUT (2 * HZ)
  2644. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2645. {
  2646. struct iwl_priv *priv = hw->priv;
  2647. int ret;
  2648. IWL_DEBUG_MAC80211(priv, "enter\n");
  2649. /* we should be verifying the device is ready to be opened */
  2650. mutex_lock(&priv->mutex);
  2651. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2652. * ucode filename and max sizes are card-specific. */
  2653. if (!priv->ucode_code.len) {
  2654. ret = iwl3945_read_ucode(priv);
  2655. if (ret) {
  2656. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2657. mutex_unlock(&priv->mutex);
  2658. goto out_release_irq;
  2659. }
  2660. }
  2661. ret = __iwl3945_up(priv);
  2662. mutex_unlock(&priv->mutex);
  2663. if (ret)
  2664. goto out_release_irq;
  2665. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2666. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2667. * mac80211 will not be run successfully. */
  2668. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2669. test_bit(STATUS_READY, &priv->status),
  2670. UCODE_READY_TIMEOUT);
  2671. if (!ret) {
  2672. if (!test_bit(STATUS_READY, &priv->status)) {
  2673. IWL_ERR(priv,
  2674. "Wait for START_ALIVE timeout after %dms.\n",
  2675. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2676. ret = -ETIMEDOUT;
  2677. goto out_release_irq;
  2678. }
  2679. }
  2680. /* ucode is running and will send rfkill notifications,
  2681. * no need to poll the killswitch state anymore */
  2682. cancel_delayed_work(&priv->rfkill_poll);
  2683. iwl_led_start(priv);
  2684. priv->is_open = 1;
  2685. IWL_DEBUG_MAC80211(priv, "leave\n");
  2686. return 0;
  2687. out_release_irq:
  2688. priv->is_open = 0;
  2689. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2690. return ret;
  2691. }
  2692. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2693. {
  2694. struct iwl_priv *priv = hw->priv;
  2695. IWL_DEBUG_MAC80211(priv, "enter\n");
  2696. if (!priv->is_open) {
  2697. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2698. return;
  2699. }
  2700. priv->is_open = 0;
  2701. if (iwl_is_ready_rf(priv)) {
  2702. /* stop mac, cancel any scan request and clear
  2703. * RXON_FILTER_ASSOC_MSK BIT
  2704. */
  2705. mutex_lock(&priv->mutex);
  2706. iwl_scan_cancel_timeout(priv, 100);
  2707. mutex_unlock(&priv->mutex);
  2708. }
  2709. iwl3945_down(priv);
  2710. flush_workqueue(priv->workqueue);
  2711. /* start polling the killswitch state again */
  2712. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2713. round_jiffies_relative(2 * HZ));
  2714. IWL_DEBUG_MAC80211(priv, "leave\n");
  2715. }
  2716. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2717. {
  2718. struct iwl_priv *priv = hw->priv;
  2719. IWL_DEBUG_MAC80211(priv, "enter\n");
  2720. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2721. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2722. if (iwl3945_tx_skb(priv, skb))
  2723. dev_kfree_skb_any(skb);
  2724. IWL_DEBUG_MAC80211(priv, "leave\n");
  2725. return NETDEV_TX_OK;
  2726. }
  2727. void iwl3945_config_ap(struct iwl_priv *priv)
  2728. {
  2729. int rc = 0;
  2730. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2731. return;
  2732. /* The following should be done only at AP bring up */
  2733. if (!(iwl_is_associated(priv))) {
  2734. /* RXON - unassoc (to set timing command) */
  2735. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2736. iwlcore_commit_rxon(priv);
  2737. /* RXON Timing */
  2738. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2739. iwl_setup_rxon_timing(priv);
  2740. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2741. sizeof(priv->rxon_timing),
  2742. &priv->rxon_timing);
  2743. if (rc)
  2744. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2745. "Attempting to continue.\n");
  2746. /* FIXME: what should be the assoc_id for AP? */
  2747. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2748. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2749. priv->staging_rxon.flags |=
  2750. RXON_FLG_SHORT_PREAMBLE_MSK;
  2751. else
  2752. priv->staging_rxon.flags &=
  2753. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2754. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2755. if (priv->assoc_capability &
  2756. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2757. priv->staging_rxon.flags |=
  2758. RXON_FLG_SHORT_SLOT_MSK;
  2759. else
  2760. priv->staging_rxon.flags &=
  2761. ~RXON_FLG_SHORT_SLOT_MSK;
  2762. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2763. priv->staging_rxon.flags &=
  2764. ~RXON_FLG_SHORT_SLOT_MSK;
  2765. }
  2766. /* restore RXON assoc */
  2767. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2768. iwlcore_commit_rxon(priv);
  2769. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2770. }
  2771. iwl3945_send_beacon_cmd(priv);
  2772. /* FIXME - we need to add code here to detect a totally new
  2773. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2774. * clear sta table, add BCAST sta... */
  2775. }
  2776. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2777. struct ieee80211_vif *vif,
  2778. struct ieee80211_sta *sta,
  2779. struct ieee80211_key_conf *key)
  2780. {
  2781. struct iwl_priv *priv = hw->priv;
  2782. const u8 *addr;
  2783. int ret = 0;
  2784. u8 sta_id = IWL_INVALID_STATION;
  2785. u8 static_key;
  2786. IWL_DEBUG_MAC80211(priv, "enter\n");
  2787. if (iwl3945_mod_params.sw_crypto) {
  2788. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2789. return -EOPNOTSUPP;
  2790. }
  2791. addr = sta ? sta->addr : iwl_bcast_addr;
  2792. static_key = !iwl_is_associated(priv);
  2793. if (!static_key) {
  2794. sta_id = iwl_find_station(priv, addr);
  2795. if (sta_id == IWL_INVALID_STATION) {
  2796. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2797. addr);
  2798. return -EINVAL;
  2799. }
  2800. }
  2801. mutex_lock(&priv->mutex);
  2802. iwl_scan_cancel_timeout(priv, 100);
  2803. mutex_unlock(&priv->mutex);
  2804. switch (cmd) {
  2805. case SET_KEY:
  2806. if (static_key)
  2807. ret = iwl3945_set_static_key(priv, key);
  2808. else
  2809. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2810. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2811. break;
  2812. case DISABLE_KEY:
  2813. if (static_key)
  2814. ret = iwl3945_remove_static_key(priv);
  2815. else
  2816. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2817. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2818. break;
  2819. default:
  2820. ret = -EINVAL;
  2821. }
  2822. IWL_DEBUG_MAC80211(priv, "leave\n");
  2823. return ret;
  2824. }
  2825. /*****************************************************************************
  2826. *
  2827. * sysfs attributes
  2828. *
  2829. *****************************************************************************/
  2830. #ifdef CONFIG_IWLWIFI_DEBUG
  2831. /*
  2832. * The following adds a new attribute to the sysfs representation
  2833. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2834. * used for controlling the debug level.
  2835. *
  2836. * See the level definitions in iwl for details.
  2837. *
  2838. * The debug_level being managed using sysfs below is a per device debug
  2839. * level that is used instead of the global debug level if it (the per
  2840. * device debug level) is set.
  2841. */
  2842. static ssize_t show_debug_level(struct device *d,
  2843. struct device_attribute *attr, char *buf)
  2844. {
  2845. struct iwl_priv *priv = dev_get_drvdata(d);
  2846. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2847. }
  2848. static ssize_t store_debug_level(struct device *d,
  2849. struct device_attribute *attr,
  2850. const char *buf, size_t count)
  2851. {
  2852. struct iwl_priv *priv = dev_get_drvdata(d);
  2853. unsigned long val;
  2854. int ret;
  2855. ret = strict_strtoul(buf, 0, &val);
  2856. if (ret)
  2857. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2858. else {
  2859. priv->debug_level = val;
  2860. if (iwl_alloc_traffic_mem(priv))
  2861. IWL_ERR(priv,
  2862. "Not enough memory to generate traffic log\n");
  2863. }
  2864. return strnlen(buf, count);
  2865. }
  2866. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2867. show_debug_level, store_debug_level);
  2868. #endif /* CONFIG_IWLWIFI_DEBUG */
  2869. static ssize_t show_temperature(struct device *d,
  2870. struct device_attribute *attr, char *buf)
  2871. {
  2872. struct iwl_priv *priv = dev_get_drvdata(d);
  2873. if (!iwl_is_alive(priv))
  2874. return -EAGAIN;
  2875. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2876. }
  2877. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2878. static ssize_t show_tx_power(struct device *d,
  2879. struct device_attribute *attr, char *buf)
  2880. {
  2881. struct iwl_priv *priv = dev_get_drvdata(d);
  2882. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2883. }
  2884. static ssize_t store_tx_power(struct device *d,
  2885. struct device_attribute *attr,
  2886. const char *buf, size_t count)
  2887. {
  2888. struct iwl_priv *priv = dev_get_drvdata(d);
  2889. char *p = (char *)buf;
  2890. u32 val;
  2891. val = simple_strtoul(p, &p, 10);
  2892. if (p == buf)
  2893. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2894. else
  2895. iwl3945_hw_reg_set_txpower(priv, val);
  2896. return count;
  2897. }
  2898. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2899. static ssize_t show_flags(struct device *d,
  2900. struct device_attribute *attr, char *buf)
  2901. {
  2902. struct iwl_priv *priv = dev_get_drvdata(d);
  2903. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2904. }
  2905. static ssize_t store_flags(struct device *d,
  2906. struct device_attribute *attr,
  2907. const char *buf, size_t count)
  2908. {
  2909. struct iwl_priv *priv = dev_get_drvdata(d);
  2910. u32 flags = simple_strtoul(buf, NULL, 0);
  2911. mutex_lock(&priv->mutex);
  2912. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2913. /* Cancel any currently running scans... */
  2914. if (iwl_scan_cancel_timeout(priv, 100))
  2915. IWL_WARN(priv, "Could not cancel scan.\n");
  2916. else {
  2917. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2918. flags);
  2919. priv->staging_rxon.flags = cpu_to_le32(flags);
  2920. iwlcore_commit_rxon(priv);
  2921. }
  2922. }
  2923. mutex_unlock(&priv->mutex);
  2924. return count;
  2925. }
  2926. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2927. static ssize_t show_filter_flags(struct device *d,
  2928. struct device_attribute *attr, char *buf)
  2929. {
  2930. struct iwl_priv *priv = dev_get_drvdata(d);
  2931. return sprintf(buf, "0x%04X\n",
  2932. le32_to_cpu(priv->active_rxon.filter_flags));
  2933. }
  2934. static ssize_t store_filter_flags(struct device *d,
  2935. struct device_attribute *attr,
  2936. const char *buf, size_t count)
  2937. {
  2938. struct iwl_priv *priv = dev_get_drvdata(d);
  2939. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2940. mutex_lock(&priv->mutex);
  2941. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2942. /* Cancel any currently running scans... */
  2943. if (iwl_scan_cancel_timeout(priv, 100))
  2944. IWL_WARN(priv, "Could not cancel scan.\n");
  2945. else {
  2946. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2947. "0x%04X\n", filter_flags);
  2948. priv->staging_rxon.filter_flags =
  2949. cpu_to_le32(filter_flags);
  2950. iwlcore_commit_rxon(priv);
  2951. }
  2952. }
  2953. mutex_unlock(&priv->mutex);
  2954. return count;
  2955. }
  2956. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2957. store_filter_flags);
  2958. static ssize_t show_measurement(struct device *d,
  2959. struct device_attribute *attr, char *buf)
  2960. {
  2961. struct iwl_priv *priv = dev_get_drvdata(d);
  2962. struct iwl_spectrum_notification measure_report;
  2963. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2964. u8 *data = (u8 *)&measure_report;
  2965. unsigned long flags;
  2966. spin_lock_irqsave(&priv->lock, flags);
  2967. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2968. spin_unlock_irqrestore(&priv->lock, flags);
  2969. return 0;
  2970. }
  2971. memcpy(&measure_report, &priv->measure_report, size);
  2972. priv->measurement_status = 0;
  2973. spin_unlock_irqrestore(&priv->lock, flags);
  2974. while (size && (PAGE_SIZE - len)) {
  2975. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2976. PAGE_SIZE - len, 1);
  2977. len = strlen(buf);
  2978. if (PAGE_SIZE - len)
  2979. buf[len++] = '\n';
  2980. ofs += 16;
  2981. size -= min(size, 16U);
  2982. }
  2983. return len;
  2984. }
  2985. static ssize_t store_measurement(struct device *d,
  2986. struct device_attribute *attr,
  2987. const char *buf, size_t count)
  2988. {
  2989. struct iwl_priv *priv = dev_get_drvdata(d);
  2990. struct ieee80211_measurement_params params = {
  2991. .channel = le16_to_cpu(priv->active_rxon.channel),
  2992. .start_time = cpu_to_le64(priv->last_tsf),
  2993. .duration = cpu_to_le16(1),
  2994. };
  2995. u8 type = IWL_MEASURE_BASIC;
  2996. u8 buffer[32];
  2997. u8 channel;
  2998. if (count) {
  2999. char *p = buffer;
  3000. strncpy(buffer, buf, min(sizeof(buffer), count));
  3001. channel = simple_strtoul(p, NULL, 0);
  3002. if (channel)
  3003. params.channel = channel;
  3004. p = buffer;
  3005. while (*p && *p != ' ')
  3006. p++;
  3007. if (*p)
  3008. type = simple_strtoul(p + 1, NULL, 0);
  3009. }
  3010. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3011. "channel %d (for '%s')\n", type, params.channel, buf);
  3012. iwl3945_get_measurement(priv, &params, type);
  3013. return count;
  3014. }
  3015. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3016. show_measurement, store_measurement);
  3017. static ssize_t store_retry_rate(struct device *d,
  3018. struct device_attribute *attr,
  3019. const char *buf, size_t count)
  3020. {
  3021. struct iwl_priv *priv = dev_get_drvdata(d);
  3022. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3023. if (priv->retry_rate <= 0)
  3024. priv->retry_rate = 1;
  3025. return count;
  3026. }
  3027. static ssize_t show_retry_rate(struct device *d,
  3028. struct device_attribute *attr, char *buf)
  3029. {
  3030. struct iwl_priv *priv = dev_get_drvdata(d);
  3031. return sprintf(buf, "%d", priv->retry_rate);
  3032. }
  3033. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3034. store_retry_rate);
  3035. static ssize_t show_channels(struct device *d,
  3036. struct device_attribute *attr, char *buf)
  3037. {
  3038. /* all this shit doesn't belong into sysfs anyway */
  3039. return 0;
  3040. }
  3041. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3042. static ssize_t show_statistics(struct device *d,
  3043. struct device_attribute *attr, char *buf)
  3044. {
  3045. struct iwl_priv *priv = dev_get_drvdata(d);
  3046. u32 size = sizeof(struct iwl3945_notif_statistics);
  3047. u32 len = 0, ofs = 0;
  3048. u8 *data = (u8 *)&priv->statistics_39;
  3049. int rc = 0;
  3050. if (!iwl_is_alive(priv))
  3051. return -EAGAIN;
  3052. mutex_lock(&priv->mutex);
  3053. rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
  3054. mutex_unlock(&priv->mutex);
  3055. if (rc) {
  3056. len = sprintf(buf,
  3057. "Error sending statistics request: 0x%08X\n", rc);
  3058. return len;
  3059. }
  3060. while (size && (PAGE_SIZE - len)) {
  3061. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3062. PAGE_SIZE - len, 1);
  3063. len = strlen(buf);
  3064. if (PAGE_SIZE - len)
  3065. buf[len++] = '\n';
  3066. ofs += 16;
  3067. size -= min(size, 16U);
  3068. }
  3069. return len;
  3070. }
  3071. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3072. static ssize_t show_antenna(struct device *d,
  3073. struct device_attribute *attr, char *buf)
  3074. {
  3075. struct iwl_priv *priv = dev_get_drvdata(d);
  3076. if (!iwl_is_alive(priv))
  3077. return -EAGAIN;
  3078. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3079. }
  3080. static ssize_t store_antenna(struct device *d,
  3081. struct device_attribute *attr,
  3082. const char *buf, size_t count)
  3083. {
  3084. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3085. int ant;
  3086. if (count == 0)
  3087. return 0;
  3088. if (sscanf(buf, "%1i", &ant) != 1) {
  3089. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3090. return count;
  3091. }
  3092. if ((ant >= 0) && (ant <= 2)) {
  3093. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3094. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3095. } else
  3096. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3097. return count;
  3098. }
  3099. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3100. static ssize_t show_status(struct device *d,
  3101. struct device_attribute *attr, char *buf)
  3102. {
  3103. struct iwl_priv *priv = dev_get_drvdata(d);
  3104. if (!iwl_is_alive(priv))
  3105. return -EAGAIN;
  3106. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3107. }
  3108. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3109. static ssize_t dump_error_log(struct device *d,
  3110. struct device_attribute *attr,
  3111. const char *buf, size_t count)
  3112. {
  3113. struct iwl_priv *priv = dev_get_drvdata(d);
  3114. char *p = (char *)buf;
  3115. if (p[0] == '1')
  3116. iwl3945_dump_nic_error_log(priv);
  3117. return strnlen(buf, count);
  3118. }
  3119. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3120. /*****************************************************************************
  3121. *
  3122. * driver setup and tear down
  3123. *
  3124. *****************************************************************************/
  3125. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3126. {
  3127. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3128. init_waitqueue_head(&priv->wait_command_queue);
  3129. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3130. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3131. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3132. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3133. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3134. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3135. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3136. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3137. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3138. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3139. iwl3945_hw_setup_deferred_work(priv);
  3140. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3141. iwl3945_irq_tasklet, (unsigned long)priv);
  3142. }
  3143. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3144. {
  3145. iwl3945_hw_cancel_deferred_work(priv);
  3146. cancel_delayed_work_sync(&priv->init_alive_start);
  3147. cancel_delayed_work(&priv->scan_check);
  3148. cancel_delayed_work(&priv->alive_start);
  3149. cancel_work_sync(&priv->beacon_update);
  3150. }
  3151. static struct attribute *iwl3945_sysfs_entries[] = {
  3152. &dev_attr_antenna.attr,
  3153. &dev_attr_channels.attr,
  3154. &dev_attr_dump_errors.attr,
  3155. &dev_attr_flags.attr,
  3156. &dev_attr_filter_flags.attr,
  3157. &dev_attr_measurement.attr,
  3158. &dev_attr_retry_rate.attr,
  3159. &dev_attr_statistics.attr,
  3160. &dev_attr_status.attr,
  3161. &dev_attr_temperature.attr,
  3162. &dev_attr_tx_power.attr,
  3163. #ifdef CONFIG_IWLWIFI_DEBUG
  3164. &dev_attr_debug_level.attr,
  3165. #endif
  3166. NULL
  3167. };
  3168. static struct attribute_group iwl3945_attribute_group = {
  3169. .name = NULL, /* put in device directory */
  3170. .attrs = iwl3945_sysfs_entries,
  3171. };
  3172. static struct ieee80211_ops iwl3945_hw_ops = {
  3173. .tx = iwl3945_mac_tx,
  3174. .start = iwl3945_mac_start,
  3175. .stop = iwl3945_mac_stop,
  3176. .add_interface = iwl_mac_add_interface,
  3177. .remove_interface = iwl_mac_remove_interface,
  3178. .config = iwl_mac_config,
  3179. .configure_filter = iwl_configure_filter,
  3180. .set_key = iwl3945_mac_set_key,
  3181. .conf_tx = iwl_mac_conf_tx,
  3182. .reset_tsf = iwl_mac_reset_tsf,
  3183. .bss_info_changed = iwl_bss_info_changed,
  3184. .hw_scan = iwl_mac_hw_scan
  3185. };
  3186. static int iwl3945_init_drv(struct iwl_priv *priv)
  3187. {
  3188. int ret;
  3189. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3190. priv->retry_rate = 1;
  3191. priv->ibss_beacon = NULL;
  3192. spin_lock_init(&priv->sta_lock);
  3193. spin_lock_init(&priv->hcmd_lock);
  3194. INIT_LIST_HEAD(&priv->free_frames);
  3195. mutex_init(&priv->mutex);
  3196. /* Clear the driver's (not device's) station table */
  3197. iwl_clear_stations_table(priv);
  3198. priv->ieee_channels = NULL;
  3199. priv->ieee_rates = NULL;
  3200. priv->band = IEEE80211_BAND_2GHZ;
  3201. priv->iw_mode = NL80211_IFTYPE_STATION;
  3202. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  3203. iwl_reset_qos(priv);
  3204. priv->qos_data.qos_active = 0;
  3205. priv->qos_data.qos_cap.val = 0;
  3206. priv->rates_mask = IWL_RATES_MASK;
  3207. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3208. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3209. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3210. eeprom->version);
  3211. ret = -EINVAL;
  3212. goto err;
  3213. }
  3214. ret = iwl_init_channel_map(priv);
  3215. if (ret) {
  3216. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3217. goto err;
  3218. }
  3219. /* Set up txpower settings in driver for all channels */
  3220. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3221. ret = -EIO;
  3222. goto err_free_channel_map;
  3223. }
  3224. ret = iwlcore_init_geos(priv);
  3225. if (ret) {
  3226. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3227. goto err_free_channel_map;
  3228. }
  3229. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3230. return 0;
  3231. err_free_channel_map:
  3232. iwl_free_channel_map(priv);
  3233. err:
  3234. return ret;
  3235. }
  3236. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3237. {
  3238. int ret;
  3239. struct ieee80211_hw *hw = priv->hw;
  3240. hw->rate_control_algorithm = "iwl-3945-rs";
  3241. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3242. /* Tell mac80211 our characteristics */
  3243. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3244. IEEE80211_HW_NOISE_DBM |
  3245. IEEE80211_HW_SPECTRUM_MGMT;
  3246. if (!priv->cfg->broken_powersave)
  3247. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  3248. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3249. hw->wiphy->interface_modes =
  3250. BIT(NL80211_IFTYPE_STATION) |
  3251. BIT(NL80211_IFTYPE_ADHOC);
  3252. hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
  3253. WIPHY_FLAG_DISABLE_BEACON_HINTS;
  3254. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3255. /* we create the 802.11 header and a zero-length SSID element */
  3256. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3257. /* Default value; 4 EDCA QOS priorities */
  3258. hw->queues = 4;
  3259. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3260. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3261. &priv->bands[IEEE80211_BAND_2GHZ];
  3262. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3263. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3264. &priv->bands[IEEE80211_BAND_5GHZ];
  3265. ret = ieee80211_register_hw(priv->hw);
  3266. if (ret) {
  3267. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3268. return ret;
  3269. }
  3270. priv->mac80211_registered = 1;
  3271. return 0;
  3272. }
  3273. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3274. {
  3275. int err = 0;
  3276. struct iwl_priv *priv;
  3277. struct ieee80211_hw *hw;
  3278. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3279. struct iwl3945_eeprom *eeprom;
  3280. unsigned long flags;
  3281. /***********************
  3282. * 1. Allocating HW data
  3283. * ********************/
  3284. /* mac80211 allocates memory for this device instance, including
  3285. * space for this driver's private structure */
  3286. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3287. if (hw == NULL) {
  3288. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3289. err = -ENOMEM;
  3290. goto out;
  3291. }
  3292. priv = hw->priv;
  3293. SET_IEEE80211_DEV(hw, &pdev->dev);
  3294. /*
  3295. * Disabling hardware scan means that mac80211 will perform scans
  3296. * "the hard way", rather than using device's scan.
  3297. */
  3298. if (iwl3945_mod_params.disable_hw_scan) {
  3299. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3300. iwl3945_hw_ops.hw_scan = NULL;
  3301. }
  3302. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3303. priv->cfg = cfg;
  3304. priv->pci_dev = pdev;
  3305. priv->inta_mask = CSR_INI_SET_MASK;
  3306. #ifdef CONFIG_IWLWIFI_DEBUG
  3307. atomic_set(&priv->restrict_refcnt, 0);
  3308. #endif
  3309. if (iwl_alloc_traffic_mem(priv))
  3310. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3311. /***************************
  3312. * 2. Initializing PCI bus
  3313. * *************************/
  3314. if (pci_enable_device(pdev)) {
  3315. err = -ENODEV;
  3316. goto out_ieee80211_free_hw;
  3317. }
  3318. pci_set_master(pdev);
  3319. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3320. if (!err)
  3321. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3322. if (err) {
  3323. IWL_WARN(priv, "No suitable DMA available.\n");
  3324. goto out_pci_disable_device;
  3325. }
  3326. pci_set_drvdata(pdev, priv);
  3327. err = pci_request_regions(pdev, DRV_NAME);
  3328. if (err)
  3329. goto out_pci_disable_device;
  3330. /***********************
  3331. * 3. Read REV Register
  3332. * ********************/
  3333. priv->hw_base = pci_iomap(pdev, 0, 0);
  3334. if (!priv->hw_base) {
  3335. err = -ENODEV;
  3336. goto out_pci_release_regions;
  3337. }
  3338. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3339. (unsigned long long) pci_resource_len(pdev, 0));
  3340. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3341. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3342. * PCI Tx retries from interfering with C3 CPU state */
  3343. pci_write_config_byte(pdev, 0x41, 0x00);
  3344. /* these spin locks will be used in apm_ops.init and EEPROM access
  3345. * we should init now
  3346. */
  3347. spin_lock_init(&priv->reg_lock);
  3348. spin_lock_init(&priv->lock);
  3349. /***********************
  3350. * 4. Read EEPROM
  3351. * ********************/
  3352. /* Read the EEPROM */
  3353. err = iwl_eeprom_init(priv);
  3354. if (err) {
  3355. IWL_ERR(priv, "Unable to init EEPROM\n");
  3356. goto out_iounmap;
  3357. }
  3358. /* MAC Address location in EEPROM same for 3945/4965 */
  3359. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3360. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3361. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3362. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3363. /***********************
  3364. * 5. Setup HW Constants
  3365. * ********************/
  3366. /* Device-specific setup */
  3367. if (iwl3945_hw_set_hw_params(priv)) {
  3368. IWL_ERR(priv, "failed to set hw settings\n");
  3369. goto out_eeprom_free;
  3370. }
  3371. /***********************
  3372. * 6. Setup priv
  3373. * ********************/
  3374. err = iwl3945_init_drv(priv);
  3375. if (err) {
  3376. IWL_ERR(priv, "initializing driver failed\n");
  3377. goto out_unset_hw_params;
  3378. }
  3379. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3380. priv->cfg->name);
  3381. /***********************
  3382. * 7. Setup Services
  3383. * ********************/
  3384. spin_lock_irqsave(&priv->lock, flags);
  3385. iwl_disable_interrupts(priv);
  3386. spin_unlock_irqrestore(&priv->lock, flags);
  3387. pci_enable_msi(priv->pci_dev);
  3388. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3389. IRQF_SHARED, DRV_NAME, priv);
  3390. if (err) {
  3391. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3392. goto out_disable_msi;
  3393. }
  3394. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3395. if (err) {
  3396. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3397. goto out_release_irq;
  3398. }
  3399. iwl_set_rxon_channel(priv,
  3400. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3401. iwl3945_setup_deferred_work(priv);
  3402. iwl3945_setup_rx_handlers(priv);
  3403. iwl_power_initialize(priv);
  3404. /*********************************
  3405. * 8. Setup and Register mac80211
  3406. * *******************************/
  3407. iwl_enable_interrupts(priv);
  3408. err = iwl3945_setup_mac(priv);
  3409. if (err)
  3410. goto out_remove_sysfs;
  3411. err = iwl_dbgfs_register(priv, DRV_NAME);
  3412. if (err)
  3413. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3414. /* Start monitoring the killswitch */
  3415. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3416. 2 * HZ);
  3417. return 0;
  3418. out_remove_sysfs:
  3419. destroy_workqueue(priv->workqueue);
  3420. priv->workqueue = NULL;
  3421. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3422. out_release_irq:
  3423. free_irq(priv->pci_dev->irq, priv);
  3424. out_disable_msi:
  3425. pci_disable_msi(priv->pci_dev);
  3426. iwlcore_free_geos(priv);
  3427. iwl_free_channel_map(priv);
  3428. out_unset_hw_params:
  3429. iwl3945_unset_hw_params(priv);
  3430. out_eeprom_free:
  3431. iwl_eeprom_free(priv);
  3432. out_iounmap:
  3433. pci_iounmap(pdev, priv->hw_base);
  3434. out_pci_release_regions:
  3435. pci_release_regions(pdev);
  3436. out_pci_disable_device:
  3437. pci_set_drvdata(pdev, NULL);
  3438. pci_disable_device(pdev);
  3439. out_ieee80211_free_hw:
  3440. iwl_free_traffic_mem(priv);
  3441. ieee80211_free_hw(priv->hw);
  3442. out:
  3443. return err;
  3444. }
  3445. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3446. {
  3447. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3448. unsigned long flags;
  3449. if (!priv)
  3450. return;
  3451. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3452. iwl_dbgfs_unregister(priv);
  3453. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3454. if (priv->mac80211_registered) {
  3455. ieee80211_unregister_hw(priv->hw);
  3456. priv->mac80211_registered = 0;
  3457. } else {
  3458. iwl3945_down(priv);
  3459. }
  3460. /*
  3461. * Make sure device is reset to low power before unloading driver.
  3462. * This may be redundant with iwl_down(), but there are paths to
  3463. * run iwl_down() without calling apm_ops.stop(), and there are
  3464. * paths to avoid running iwl_down() at all before leaving driver.
  3465. * This (inexpensive) call *makes sure* device is reset.
  3466. */
  3467. priv->cfg->ops->lib->apm_ops.stop(priv);
  3468. /* make sure we flush any pending irq or
  3469. * tasklet for the driver
  3470. */
  3471. spin_lock_irqsave(&priv->lock, flags);
  3472. iwl_disable_interrupts(priv);
  3473. spin_unlock_irqrestore(&priv->lock, flags);
  3474. iwl_synchronize_irq(priv);
  3475. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3476. cancel_delayed_work_sync(&priv->rfkill_poll);
  3477. iwl3945_dealloc_ucode_pci(priv);
  3478. if (priv->rxq.bd)
  3479. iwl3945_rx_queue_free(priv, &priv->rxq);
  3480. iwl3945_hw_txq_ctx_free(priv);
  3481. iwl3945_unset_hw_params(priv);
  3482. iwl_clear_stations_table(priv);
  3483. /*netif_stop_queue(dev); */
  3484. flush_workqueue(priv->workqueue);
  3485. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3486. * priv->workqueue... so we can't take down the workqueue
  3487. * until now... */
  3488. destroy_workqueue(priv->workqueue);
  3489. priv->workqueue = NULL;
  3490. iwl_free_traffic_mem(priv);
  3491. free_irq(pdev->irq, priv);
  3492. pci_disable_msi(pdev);
  3493. pci_iounmap(pdev, priv->hw_base);
  3494. pci_release_regions(pdev);
  3495. pci_disable_device(pdev);
  3496. pci_set_drvdata(pdev, NULL);
  3497. iwl_free_channel_map(priv);
  3498. iwlcore_free_geos(priv);
  3499. kfree(priv->scan);
  3500. if (priv->ibss_beacon)
  3501. dev_kfree_skb(priv->ibss_beacon);
  3502. ieee80211_free_hw(priv->hw);
  3503. }
  3504. /*****************************************************************************
  3505. *
  3506. * driver and module entry point
  3507. *
  3508. *****************************************************************************/
  3509. static struct pci_driver iwl3945_driver = {
  3510. .name = DRV_NAME,
  3511. .id_table = iwl3945_hw_card_ids,
  3512. .probe = iwl3945_pci_probe,
  3513. .remove = __devexit_p(iwl3945_pci_remove),
  3514. #ifdef CONFIG_PM
  3515. .suspend = iwl_pci_suspend,
  3516. .resume = iwl_pci_resume,
  3517. #endif
  3518. };
  3519. static int __init iwl3945_init(void)
  3520. {
  3521. int ret;
  3522. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3523. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3524. ret = iwl3945_rate_control_register();
  3525. if (ret) {
  3526. printk(KERN_ERR DRV_NAME
  3527. "Unable to register rate control algorithm: %d\n", ret);
  3528. return ret;
  3529. }
  3530. ret = pci_register_driver(&iwl3945_driver);
  3531. if (ret) {
  3532. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3533. goto error_register;
  3534. }
  3535. return ret;
  3536. error_register:
  3537. iwl3945_rate_control_unregister();
  3538. return ret;
  3539. }
  3540. static void __exit iwl3945_exit(void)
  3541. {
  3542. pci_unregister_driver(&iwl3945_driver);
  3543. iwl3945_rate_control_unregister();
  3544. }
  3545. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3546. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3547. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3548. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3549. MODULE_PARM_DESC(swcrypto,
  3550. "using software crypto (default 1 [software])\n");
  3551. #ifdef CONFIG_IWLWIFI_DEBUG
  3552. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3553. MODULE_PARM_DESC(debug, "debug output mask");
  3554. #endif
  3555. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3556. int, S_IRUGO);
  3557. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3558. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3559. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3560. module_exit(iwl3945_exit);
  3561. module_init(iwl3945_init);