pci-sysfs.c 34 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. }
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(class, "0x%06x\n");
  47. pci_config_attr(irq, "%u\n");
  48. static ssize_t broken_parity_status_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  54. }
  55. static ssize_t broken_parity_status_store(struct device *dev,
  56. struct device_attribute *attr,
  57. const char *buf, size_t count)
  58. {
  59. struct pci_dev *pdev = to_pci_dev(dev);
  60. unsigned long val;
  61. if (strict_strtoul(buf, 0, &val) < 0)
  62. return -EINVAL;
  63. pdev->broken_parity_status = !!val;
  64. return count;
  65. }
  66. static ssize_t local_cpus_show(struct device *dev,
  67. struct device_attribute *attr, char *buf)
  68. {
  69. const struct cpumask *mask;
  70. int len;
  71. #ifdef CONFIG_NUMA
  72. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  73. cpumask_of_node(dev_to_node(dev));
  74. #else
  75. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  76. #endif
  77. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. static ssize_t local_cpulist_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. const struct cpumask *mask;
  86. int len;
  87. #ifdef CONFIG_NUMA
  88. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  89. cpumask_of_node(dev_to_node(dev));
  90. #else
  91. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  92. #endif
  93. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  94. buf[len++] = '\n';
  95. buf[len] = '\0';
  96. return len;
  97. }
  98. /*
  99. * PCI Bus Class Devices
  100. */
  101. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  102. int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
  117. struct device_attribute *attr,
  118. char *buf)
  119. {
  120. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  121. }
  122. static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
  123. struct device_attribute *attr,
  124. char *buf)
  125. {
  126. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  127. }
  128. /* show resources */
  129. static ssize_t
  130. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  131. {
  132. struct pci_dev * pci_dev = to_pci_dev(dev);
  133. char * str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  152. {
  153. struct pci_dev *pci_dev = to_pci_dev(dev);
  154. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  155. pci_dev->vendor, pci_dev->device,
  156. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  157. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  158. (u8)(pci_dev->class));
  159. }
  160. static ssize_t is_enabled_store(struct device *dev,
  161. struct device_attribute *attr, const char *buf,
  162. size_t count)
  163. {
  164. struct pci_dev *pdev = to_pci_dev(dev);
  165. unsigned long val;
  166. ssize_t result = strict_strtoul(buf, 0, &val);
  167. if (result < 0)
  168. return result;
  169. /* this can crash the machine when done on the "wrong" device */
  170. if (!capable(CAP_SYS_ADMIN))
  171. return -EPERM;
  172. if (!val) {
  173. if (pci_is_enabled(pdev))
  174. pci_disable_device(pdev);
  175. else
  176. result = -EIO;
  177. } else
  178. result = pci_enable_device(pdev);
  179. return result < 0 ? result : count;
  180. }
  181. static ssize_t is_enabled_show(struct device *dev,
  182. struct device_attribute *attr, char *buf)
  183. {
  184. struct pci_dev *pdev;
  185. pdev = to_pci_dev (dev);
  186. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  187. }
  188. #ifdef CONFIG_NUMA
  189. static ssize_t
  190. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  191. {
  192. return sprintf (buf, "%d\n", dev->numa_node);
  193. }
  194. #endif
  195. static ssize_t
  196. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  197. {
  198. struct pci_dev *pdev = to_pci_dev(dev);
  199. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  200. }
  201. static ssize_t
  202. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  203. char *buf)
  204. {
  205. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  206. }
  207. static ssize_t
  208. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  209. {
  210. struct pci_dev *pdev = to_pci_dev(dev);
  211. if (!pdev->subordinate)
  212. return 0;
  213. return sprintf (buf, "%u\n",
  214. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  215. }
  216. static ssize_t
  217. msi_bus_store(struct device *dev, struct device_attribute *attr,
  218. const char *buf, size_t count)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. unsigned long val;
  222. if (strict_strtoul(buf, 0, &val) < 0)
  223. return -EINVAL;
  224. /* bad things may happen if the no_msi flag is changed
  225. * while some drivers are loaded */
  226. if (!capable(CAP_SYS_ADMIN))
  227. return -EPERM;
  228. /* Maybe pci devices without subordinate busses shouldn't even have this
  229. * attribute in the first place? */
  230. if (!pdev->subordinate)
  231. return count;
  232. /* Is the flag going to change, or keep the value it already had? */
  233. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  234. !!val) {
  235. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  236. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  237. " bad things could happen\n", val ? "" : " not");
  238. }
  239. return count;
  240. }
  241. #ifdef CONFIG_HOTPLUG
  242. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  243. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  244. size_t count)
  245. {
  246. unsigned long val;
  247. struct pci_bus *b = NULL;
  248. if (strict_strtoul(buf, 0, &val) < 0)
  249. return -EINVAL;
  250. if (val) {
  251. mutex_lock(&pci_remove_rescan_mutex);
  252. while ((b = pci_find_next_bus(b)) != NULL)
  253. pci_rescan_bus(b);
  254. mutex_unlock(&pci_remove_rescan_mutex);
  255. }
  256. return count;
  257. }
  258. struct bus_attribute pci_bus_attrs[] = {
  259. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  260. __ATTR_NULL
  261. };
  262. static ssize_t
  263. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  264. const char *buf, size_t count)
  265. {
  266. unsigned long val;
  267. struct pci_dev *pdev = to_pci_dev(dev);
  268. if (strict_strtoul(buf, 0, &val) < 0)
  269. return -EINVAL;
  270. if (val) {
  271. mutex_lock(&pci_remove_rescan_mutex);
  272. pci_rescan_bus(pdev->bus);
  273. mutex_unlock(&pci_remove_rescan_mutex);
  274. }
  275. return count;
  276. }
  277. static void remove_callback(struct device *dev)
  278. {
  279. struct pci_dev *pdev = to_pci_dev(dev);
  280. mutex_lock(&pci_remove_rescan_mutex);
  281. pci_stop_and_remove_bus_device(pdev);
  282. mutex_unlock(&pci_remove_rescan_mutex);
  283. }
  284. static ssize_t
  285. remove_store(struct device *dev, struct device_attribute *dummy,
  286. const char *buf, size_t count)
  287. {
  288. int ret = 0;
  289. unsigned long val;
  290. if (strict_strtoul(buf, 0, &val) < 0)
  291. return -EINVAL;
  292. /* An attribute cannot be unregistered by one of its own methods,
  293. * so we have to use this roundabout approach.
  294. */
  295. if (val)
  296. ret = device_schedule_callback(dev, remove_callback);
  297. if (ret)
  298. count = ret;
  299. return count;
  300. }
  301. static ssize_t
  302. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  303. const char *buf, size_t count)
  304. {
  305. unsigned long val;
  306. struct pci_bus *bus = to_pci_bus(dev);
  307. if (strict_strtoul(buf, 0, &val) < 0)
  308. return -EINVAL;
  309. if (val) {
  310. mutex_lock(&pci_remove_rescan_mutex);
  311. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  312. pci_rescan_bus_bridge_resize(bus->self);
  313. else
  314. pci_rescan_bus(bus);
  315. mutex_unlock(&pci_remove_rescan_mutex);
  316. }
  317. return count;
  318. }
  319. #endif
  320. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  321. static ssize_t d3cold_allowed_store(struct device *dev,
  322. struct device_attribute *attr,
  323. const char *buf, size_t count)
  324. {
  325. struct pci_dev *pdev = to_pci_dev(dev);
  326. unsigned long val;
  327. if (strict_strtoul(buf, 0, &val) < 0)
  328. return -EINVAL;
  329. pdev->d3cold_allowed = !!val;
  330. pm_runtime_resume(dev);
  331. return count;
  332. }
  333. static ssize_t d3cold_allowed_show(struct device *dev,
  334. struct device_attribute *attr, char *buf)
  335. {
  336. struct pci_dev *pdev = to_pci_dev(dev);
  337. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  338. }
  339. #endif
  340. struct device_attribute pci_dev_attrs[] = {
  341. __ATTR_RO(resource),
  342. __ATTR_RO(vendor),
  343. __ATTR_RO(device),
  344. __ATTR_RO(subsystem_vendor),
  345. __ATTR_RO(subsystem_device),
  346. __ATTR_RO(class),
  347. __ATTR_RO(irq),
  348. __ATTR_RO(local_cpus),
  349. __ATTR_RO(local_cpulist),
  350. __ATTR_RO(modalias),
  351. #ifdef CONFIG_NUMA
  352. __ATTR_RO(numa_node),
  353. #endif
  354. __ATTR_RO(dma_mask_bits),
  355. __ATTR_RO(consistent_dma_mask_bits),
  356. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  357. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  358. broken_parity_status_show,broken_parity_status_store),
  359. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  360. #ifdef CONFIG_HOTPLUG
  361. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  362. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  363. #endif
  364. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  365. __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
  366. #endif
  367. __ATTR_NULL,
  368. };
  369. struct device_attribute pcibus_dev_attrs[] = {
  370. #ifdef CONFIG_HOTPLUG
  371. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
  372. #endif
  373. __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
  374. __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
  375. __ATTR_NULL,
  376. };
  377. static ssize_t
  378. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  379. {
  380. struct pci_dev *pdev = to_pci_dev(dev);
  381. struct pci_dev *vga_dev = vga_default_device();
  382. if (vga_dev)
  383. return sprintf(buf, "%u\n", (pdev == vga_dev));
  384. return sprintf(buf, "%u\n",
  385. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  386. IORESOURCE_ROM_SHADOW));
  387. }
  388. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  389. static ssize_t
  390. pci_read_config(struct file *filp, struct kobject *kobj,
  391. struct bin_attribute *bin_attr,
  392. char *buf, loff_t off, size_t count)
  393. {
  394. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  395. unsigned int size = 64;
  396. loff_t init_off = off;
  397. u8 *data = (u8*) buf;
  398. /* Several chips lock up trying to read undefined config space */
  399. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  400. size = dev->cfg_size;
  401. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  402. size = 128;
  403. }
  404. if (off > size)
  405. return 0;
  406. if (off + count > size) {
  407. size -= off;
  408. count = size;
  409. } else {
  410. size = count;
  411. }
  412. if ((off & 1) && size) {
  413. u8 val;
  414. pci_user_read_config_byte(dev, off, &val);
  415. data[off - init_off] = val;
  416. off++;
  417. size--;
  418. }
  419. if ((off & 3) && size > 2) {
  420. u16 val;
  421. pci_user_read_config_word(dev, off, &val);
  422. data[off - init_off] = val & 0xff;
  423. data[off - init_off + 1] = (val >> 8) & 0xff;
  424. off += 2;
  425. size -= 2;
  426. }
  427. while (size > 3) {
  428. u32 val;
  429. pci_user_read_config_dword(dev, off, &val);
  430. data[off - init_off] = val & 0xff;
  431. data[off - init_off + 1] = (val >> 8) & 0xff;
  432. data[off - init_off + 2] = (val >> 16) & 0xff;
  433. data[off - init_off + 3] = (val >> 24) & 0xff;
  434. off += 4;
  435. size -= 4;
  436. }
  437. if (size >= 2) {
  438. u16 val;
  439. pci_user_read_config_word(dev, off, &val);
  440. data[off - init_off] = val & 0xff;
  441. data[off - init_off + 1] = (val >> 8) & 0xff;
  442. off += 2;
  443. size -= 2;
  444. }
  445. if (size > 0) {
  446. u8 val;
  447. pci_user_read_config_byte(dev, off, &val);
  448. data[off - init_off] = val;
  449. off++;
  450. --size;
  451. }
  452. return count;
  453. }
  454. static ssize_t
  455. pci_write_config(struct file* filp, struct kobject *kobj,
  456. struct bin_attribute *bin_attr,
  457. char *buf, loff_t off, size_t count)
  458. {
  459. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  460. unsigned int size = count;
  461. loff_t init_off = off;
  462. u8 *data = (u8*) buf;
  463. if (off > dev->cfg_size)
  464. return 0;
  465. if (off + count > dev->cfg_size) {
  466. size = dev->cfg_size - off;
  467. count = size;
  468. }
  469. if ((off & 1) && size) {
  470. pci_user_write_config_byte(dev, off, data[off - init_off]);
  471. off++;
  472. size--;
  473. }
  474. if ((off & 3) && size > 2) {
  475. u16 val = data[off - init_off];
  476. val |= (u16) data[off - init_off + 1] << 8;
  477. pci_user_write_config_word(dev, off, val);
  478. off += 2;
  479. size -= 2;
  480. }
  481. while (size > 3) {
  482. u32 val = data[off - init_off];
  483. val |= (u32) data[off - init_off + 1] << 8;
  484. val |= (u32) data[off - init_off + 2] << 16;
  485. val |= (u32) data[off - init_off + 3] << 24;
  486. pci_user_write_config_dword(dev, off, val);
  487. off += 4;
  488. size -= 4;
  489. }
  490. if (size >= 2) {
  491. u16 val = data[off - init_off];
  492. val |= (u16) data[off - init_off + 1] << 8;
  493. pci_user_write_config_word(dev, off, val);
  494. off += 2;
  495. size -= 2;
  496. }
  497. if (size) {
  498. pci_user_write_config_byte(dev, off, data[off - init_off]);
  499. off++;
  500. --size;
  501. }
  502. return count;
  503. }
  504. static ssize_t
  505. read_vpd_attr(struct file *filp, struct kobject *kobj,
  506. struct bin_attribute *bin_attr,
  507. char *buf, loff_t off, size_t count)
  508. {
  509. struct pci_dev *dev =
  510. to_pci_dev(container_of(kobj, struct device, kobj));
  511. if (off > bin_attr->size)
  512. count = 0;
  513. else if (count > bin_attr->size - off)
  514. count = bin_attr->size - off;
  515. return pci_read_vpd(dev, off, count, buf);
  516. }
  517. static ssize_t
  518. write_vpd_attr(struct file *filp, struct kobject *kobj,
  519. struct bin_attribute *bin_attr,
  520. char *buf, loff_t off, size_t count)
  521. {
  522. struct pci_dev *dev =
  523. to_pci_dev(container_of(kobj, struct device, kobj));
  524. if (off > bin_attr->size)
  525. count = 0;
  526. else if (count > bin_attr->size - off)
  527. count = bin_attr->size - off;
  528. return pci_write_vpd(dev, off, count, buf);
  529. }
  530. #ifdef HAVE_PCI_LEGACY
  531. /**
  532. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  533. * @filp: open sysfs file
  534. * @kobj: kobject corresponding to file to read from
  535. * @bin_attr: struct bin_attribute for this file
  536. * @buf: buffer to store results
  537. * @off: offset into legacy I/O port space
  538. * @count: number of bytes to read
  539. *
  540. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  541. * callback routine (pci_legacy_read).
  542. */
  543. static ssize_t
  544. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  545. struct bin_attribute *bin_attr,
  546. char *buf, loff_t off, size_t count)
  547. {
  548. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  549. struct device,
  550. kobj));
  551. /* Only support 1, 2 or 4 byte accesses */
  552. if (count != 1 && count != 2 && count != 4)
  553. return -EINVAL;
  554. return pci_legacy_read(bus, off, (u32 *)buf, count);
  555. }
  556. /**
  557. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  558. * @filp: open sysfs file
  559. * @kobj: kobject corresponding to file to read from
  560. * @bin_attr: struct bin_attribute for this file
  561. * @buf: buffer containing value to be written
  562. * @off: offset into legacy I/O port space
  563. * @count: number of bytes to write
  564. *
  565. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  566. * callback routine (pci_legacy_write).
  567. */
  568. static ssize_t
  569. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  570. struct bin_attribute *bin_attr,
  571. char *buf, loff_t off, size_t count)
  572. {
  573. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  574. struct device,
  575. kobj));
  576. /* Only support 1, 2 or 4 byte accesses */
  577. if (count != 1 && count != 2 && count != 4)
  578. return -EINVAL;
  579. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  580. }
  581. /**
  582. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  583. * @filp: open sysfs file
  584. * @kobj: kobject corresponding to device to be mapped
  585. * @attr: struct bin_attribute for this file
  586. * @vma: struct vm_area_struct passed to mmap
  587. *
  588. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  589. * legacy memory space (first meg of bus space) into application virtual
  590. * memory space.
  591. */
  592. static int
  593. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  594. struct bin_attribute *attr,
  595. struct vm_area_struct *vma)
  596. {
  597. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  598. struct device,
  599. kobj));
  600. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  601. }
  602. /**
  603. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  604. * @filp: open sysfs file
  605. * @kobj: kobject corresponding to device to be mapped
  606. * @attr: struct bin_attribute for this file
  607. * @vma: struct vm_area_struct passed to mmap
  608. *
  609. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  610. * legacy IO space (first meg of bus space) into application virtual
  611. * memory space. Returns -ENOSYS if the operation isn't supported
  612. */
  613. static int
  614. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  615. struct bin_attribute *attr,
  616. struct vm_area_struct *vma)
  617. {
  618. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  619. struct device,
  620. kobj));
  621. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  622. }
  623. /**
  624. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  625. * @b: bus to create files under
  626. * @mmap_type: I/O port or memory
  627. *
  628. * Stub implementation. Can be overridden by arch if necessary.
  629. */
  630. void __weak
  631. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  632. {
  633. return;
  634. }
  635. /**
  636. * pci_create_legacy_files - create legacy I/O port and memory files
  637. * @b: bus to create files under
  638. *
  639. * Some platforms allow access to legacy I/O port and ISA memory space on
  640. * a per-bus basis. This routine creates the files and ties them into
  641. * their associated read, write and mmap files from pci-sysfs.c
  642. *
  643. * On error unwind, but don't propagate the error to the caller
  644. * as it is ok to set up the PCI bus without these files.
  645. */
  646. void pci_create_legacy_files(struct pci_bus *b)
  647. {
  648. int error;
  649. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  650. GFP_ATOMIC);
  651. if (!b->legacy_io)
  652. goto kzalloc_err;
  653. sysfs_bin_attr_init(b->legacy_io);
  654. b->legacy_io->attr.name = "legacy_io";
  655. b->legacy_io->size = 0xffff;
  656. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  657. b->legacy_io->read = pci_read_legacy_io;
  658. b->legacy_io->write = pci_write_legacy_io;
  659. b->legacy_io->mmap = pci_mmap_legacy_io;
  660. pci_adjust_legacy_attr(b, pci_mmap_io);
  661. error = device_create_bin_file(&b->dev, b->legacy_io);
  662. if (error)
  663. goto legacy_io_err;
  664. /* Allocated above after the legacy_io struct */
  665. b->legacy_mem = b->legacy_io + 1;
  666. sysfs_bin_attr_init(b->legacy_mem);
  667. b->legacy_mem->attr.name = "legacy_mem";
  668. b->legacy_mem->size = 1024*1024;
  669. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  670. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  671. pci_adjust_legacy_attr(b, pci_mmap_mem);
  672. error = device_create_bin_file(&b->dev, b->legacy_mem);
  673. if (error)
  674. goto legacy_mem_err;
  675. return;
  676. legacy_mem_err:
  677. device_remove_bin_file(&b->dev, b->legacy_io);
  678. legacy_io_err:
  679. kfree(b->legacy_io);
  680. b->legacy_io = NULL;
  681. kzalloc_err:
  682. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  683. "and ISA memory resources to sysfs\n");
  684. return;
  685. }
  686. void pci_remove_legacy_files(struct pci_bus *b)
  687. {
  688. if (b->legacy_io) {
  689. device_remove_bin_file(&b->dev, b->legacy_io);
  690. device_remove_bin_file(&b->dev, b->legacy_mem);
  691. kfree(b->legacy_io); /* both are allocated here */
  692. }
  693. }
  694. #endif /* HAVE_PCI_LEGACY */
  695. #ifdef HAVE_PCI_MMAP
  696. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  697. enum pci_mmap_api mmap_api)
  698. {
  699. unsigned long nr, start, size, pci_start;
  700. if (pci_resource_len(pdev, resno) == 0)
  701. return 0;
  702. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  703. start = vma->vm_pgoff;
  704. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  705. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  706. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  707. if (start >= pci_start && start < pci_start + size &&
  708. start + nr <= pci_start + size)
  709. return 1;
  710. return 0;
  711. }
  712. /**
  713. * pci_mmap_resource - map a PCI resource into user memory space
  714. * @kobj: kobject for mapping
  715. * @attr: struct bin_attribute for the file being mapped
  716. * @vma: struct vm_area_struct passed into the mmap
  717. * @write_combine: 1 for write_combine mapping
  718. *
  719. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  720. */
  721. static int
  722. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  723. struct vm_area_struct *vma, int write_combine)
  724. {
  725. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  726. struct device, kobj));
  727. struct resource *res = attr->private;
  728. enum pci_mmap_state mmap_type;
  729. resource_size_t start, end;
  730. int i;
  731. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  732. if (res == &pdev->resource[i])
  733. break;
  734. if (i >= PCI_ROM_RESOURCE)
  735. return -ENODEV;
  736. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  737. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  738. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  739. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  740. pci_name(pdev), i,
  741. (u64)pci_resource_start(pdev, i),
  742. (u64)pci_resource_len(pdev, i));
  743. return -EINVAL;
  744. }
  745. /* pci_mmap_page_range() expects the same kind of entry as coming
  746. * from /proc/bus/pci/ which is a "user visible" value. If this is
  747. * different from the resource itself, arch will do necessary fixup.
  748. */
  749. pci_resource_to_user(pdev, i, res, &start, &end);
  750. vma->vm_pgoff += start >> PAGE_SHIFT;
  751. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  752. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  753. return -EINVAL;
  754. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  755. }
  756. static int
  757. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  758. struct bin_attribute *attr,
  759. struct vm_area_struct *vma)
  760. {
  761. return pci_mmap_resource(kobj, attr, vma, 0);
  762. }
  763. static int
  764. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  765. struct bin_attribute *attr,
  766. struct vm_area_struct *vma)
  767. {
  768. return pci_mmap_resource(kobj, attr, vma, 1);
  769. }
  770. static ssize_t
  771. pci_resource_io(struct file *filp, struct kobject *kobj,
  772. struct bin_attribute *attr, char *buf,
  773. loff_t off, size_t count, bool write)
  774. {
  775. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  776. struct device, kobj));
  777. struct resource *res = attr->private;
  778. unsigned long port = off;
  779. int i;
  780. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  781. if (res == &pdev->resource[i])
  782. break;
  783. if (i >= PCI_ROM_RESOURCE)
  784. return -ENODEV;
  785. port += pci_resource_start(pdev, i);
  786. if (port > pci_resource_end(pdev, i))
  787. return 0;
  788. if (port + count - 1 > pci_resource_end(pdev, i))
  789. return -EINVAL;
  790. switch (count) {
  791. case 1:
  792. if (write)
  793. outb(*(u8 *)buf, port);
  794. else
  795. *(u8 *)buf = inb(port);
  796. return 1;
  797. case 2:
  798. if (write)
  799. outw(*(u16 *)buf, port);
  800. else
  801. *(u16 *)buf = inw(port);
  802. return 2;
  803. case 4:
  804. if (write)
  805. outl(*(u32 *)buf, port);
  806. else
  807. *(u32 *)buf = inl(port);
  808. return 4;
  809. }
  810. return -EINVAL;
  811. }
  812. static ssize_t
  813. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  814. struct bin_attribute *attr, char *buf,
  815. loff_t off, size_t count)
  816. {
  817. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  818. }
  819. static ssize_t
  820. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  821. struct bin_attribute *attr, char *buf,
  822. loff_t off, size_t count)
  823. {
  824. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  825. }
  826. /**
  827. * pci_remove_resource_files - cleanup resource files
  828. * @pdev: dev to cleanup
  829. *
  830. * If we created resource files for @pdev, remove them from sysfs and
  831. * free their resources.
  832. */
  833. static void
  834. pci_remove_resource_files(struct pci_dev *pdev)
  835. {
  836. int i;
  837. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  838. struct bin_attribute *res_attr;
  839. res_attr = pdev->res_attr[i];
  840. if (res_attr) {
  841. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  842. kfree(res_attr);
  843. }
  844. res_attr = pdev->res_attr_wc[i];
  845. if (res_attr) {
  846. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  847. kfree(res_attr);
  848. }
  849. }
  850. }
  851. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  852. {
  853. /* allocate attribute structure, piggyback attribute name */
  854. int name_len = write_combine ? 13 : 10;
  855. struct bin_attribute *res_attr;
  856. int retval;
  857. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  858. if (res_attr) {
  859. char *res_attr_name = (char *)(res_attr + 1);
  860. sysfs_bin_attr_init(res_attr);
  861. if (write_combine) {
  862. pdev->res_attr_wc[num] = res_attr;
  863. sprintf(res_attr_name, "resource%d_wc", num);
  864. res_attr->mmap = pci_mmap_resource_wc;
  865. } else {
  866. pdev->res_attr[num] = res_attr;
  867. sprintf(res_attr_name, "resource%d", num);
  868. res_attr->mmap = pci_mmap_resource_uc;
  869. }
  870. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  871. res_attr->read = pci_read_resource_io;
  872. res_attr->write = pci_write_resource_io;
  873. }
  874. res_attr->attr.name = res_attr_name;
  875. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  876. res_attr->size = pci_resource_len(pdev, num);
  877. res_attr->private = &pdev->resource[num];
  878. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  879. } else
  880. retval = -ENOMEM;
  881. return retval;
  882. }
  883. /**
  884. * pci_create_resource_files - create resource files in sysfs for @dev
  885. * @pdev: dev in question
  886. *
  887. * Walk the resources in @pdev creating files for each resource available.
  888. */
  889. static int pci_create_resource_files(struct pci_dev *pdev)
  890. {
  891. int i;
  892. int retval;
  893. /* Expose the PCI resources from this device as files */
  894. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  895. /* skip empty resources */
  896. if (!pci_resource_len(pdev, i))
  897. continue;
  898. retval = pci_create_attr(pdev, i, 0);
  899. /* for prefetchable resources, create a WC mappable file */
  900. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  901. retval = pci_create_attr(pdev, i, 1);
  902. if (retval) {
  903. pci_remove_resource_files(pdev);
  904. return retval;
  905. }
  906. }
  907. return 0;
  908. }
  909. #else /* !HAVE_PCI_MMAP */
  910. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  911. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  912. #endif /* HAVE_PCI_MMAP */
  913. /**
  914. * pci_write_rom - used to enable access to the PCI ROM display
  915. * @filp: sysfs file
  916. * @kobj: kernel object handle
  917. * @bin_attr: struct bin_attribute for this file
  918. * @buf: user input
  919. * @off: file offset
  920. * @count: number of byte in input
  921. *
  922. * writing anything except 0 enables it
  923. */
  924. static ssize_t
  925. pci_write_rom(struct file *filp, struct kobject *kobj,
  926. struct bin_attribute *bin_attr,
  927. char *buf, loff_t off, size_t count)
  928. {
  929. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  930. if ((off == 0) && (*buf == '0') && (count == 2))
  931. pdev->rom_attr_enabled = 0;
  932. else
  933. pdev->rom_attr_enabled = 1;
  934. return count;
  935. }
  936. /**
  937. * pci_read_rom - read a PCI ROM
  938. * @filp: sysfs file
  939. * @kobj: kernel object handle
  940. * @bin_attr: struct bin_attribute for this file
  941. * @buf: where to put the data we read from the ROM
  942. * @off: file offset
  943. * @count: number of bytes to read
  944. *
  945. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  946. * device corresponding to @kobj.
  947. */
  948. static ssize_t
  949. pci_read_rom(struct file *filp, struct kobject *kobj,
  950. struct bin_attribute *bin_attr,
  951. char *buf, loff_t off, size_t count)
  952. {
  953. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  954. void __iomem *rom;
  955. size_t size;
  956. if (!pdev->rom_attr_enabled)
  957. return -EINVAL;
  958. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  959. if (!rom || !size)
  960. return -EIO;
  961. if (off >= size)
  962. count = 0;
  963. else {
  964. if (off + count > size)
  965. count = size - off;
  966. memcpy_fromio(buf, rom + off, count);
  967. }
  968. pci_unmap_rom(pdev, rom);
  969. return count;
  970. }
  971. static struct bin_attribute pci_config_attr = {
  972. .attr = {
  973. .name = "config",
  974. .mode = S_IRUGO | S_IWUSR,
  975. },
  976. .size = PCI_CFG_SPACE_SIZE,
  977. .read = pci_read_config,
  978. .write = pci_write_config,
  979. };
  980. static struct bin_attribute pcie_config_attr = {
  981. .attr = {
  982. .name = "config",
  983. .mode = S_IRUGO | S_IWUSR,
  984. },
  985. .size = PCI_CFG_SPACE_EXP_SIZE,
  986. .read = pci_read_config,
  987. .write = pci_write_config,
  988. };
  989. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  990. {
  991. return 0;
  992. }
  993. static ssize_t reset_store(struct device *dev,
  994. struct device_attribute *attr, const char *buf,
  995. size_t count)
  996. {
  997. struct pci_dev *pdev = to_pci_dev(dev);
  998. unsigned long val;
  999. ssize_t result = strict_strtoul(buf, 0, &val);
  1000. if (result < 0)
  1001. return result;
  1002. if (val != 1)
  1003. return -EINVAL;
  1004. result = pci_reset_function(pdev);
  1005. if (result < 0)
  1006. return result;
  1007. return count;
  1008. }
  1009. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1010. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1011. {
  1012. int retval;
  1013. struct bin_attribute *attr;
  1014. /* If the device has VPD, try to expose it in sysfs. */
  1015. if (dev->vpd) {
  1016. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1017. if (!attr)
  1018. return -ENOMEM;
  1019. sysfs_bin_attr_init(attr);
  1020. attr->size = dev->vpd->len;
  1021. attr->attr.name = "vpd";
  1022. attr->attr.mode = S_IRUSR | S_IWUSR;
  1023. attr->read = read_vpd_attr;
  1024. attr->write = write_vpd_attr;
  1025. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1026. if (retval) {
  1027. kfree(attr);
  1028. return retval;
  1029. }
  1030. dev->vpd->attr = attr;
  1031. }
  1032. /* Active State Power Management */
  1033. pcie_aspm_create_sysfs_dev_files(dev);
  1034. if (!pci_probe_reset_function(dev)) {
  1035. retval = device_create_file(&dev->dev, &reset_attr);
  1036. if (retval)
  1037. goto error;
  1038. dev->reset_fn = 1;
  1039. }
  1040. return 0;
  1041. error:
  1042. pcie_aspm_remove_sysfs_dev_files(dev);
  1043. if (dev->vpd && dev->vpd->attr) {
  1044. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1045. kfree(dev->vpd->attr);
  1046. }
  1047. return retval;
  1048. }
  1049. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1050. {
  1051. int retval;
  1052. int rom_size = 0;
  1053. struct bin_attribute *attr;
  1054. if (!sysfs_initialized)
  1055. return -EACCES;
  1056. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1057. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1058. else
  1059. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1060. if (retval)
  1061. goto err;
  1062. retval = pci_create_resource_files(pdev);
  1063. if (retval)
  1064. goto err_config_file;
  1065. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1066. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1067. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1068. rom_size = 0x20000;
  1069. /* If the device has a ROM, try to expose it in sysfs. */
  1070. if (rom_size) {
  1071. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1072. if (!attr) {
  1073. retval = -ENOMEM;
  1074. goto err_resource_files;
  1075. }
  1076. sysfs_bin_attr_init(attr);
  1077. attr->size = rom_size;
  1078. attr->attr.name = "rom";
  1079. attr->attr.mode = S_IRUSR | S_IWUSR;
  1080. attr->read = pci_read_rom;
  1081. attr->write = pci_write_rom;
  1082. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1083. if (retval) {
  1084. kfree(attr);
  1085. goto err_resource_files;
  1086. }
  1087. pdev->rom_attr = attr;
  1088. }
  1089. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  1090. retval = device_create_file(&pdev->dev, &vga_attr);
  1091. if (retval)
  1092. goto err_rom_file;
  1093. }
  1094. /* add platform-specific attributes */
  1095. retval = pcibios_add_platform_entries(pdev);
  1096. if (retval)
  1097. goto err_vga_file;
  1098. /* add sysfs entries for various capabilities */
  1099. retval = pci_create_capabilities_sysfs(pdev);
  1100. if (retval)
  1101. goto err_vga_file;
  1102. pci_create_firmware_label_files(pdev);
  1103. return 0;
  1104. err_vga_file:
  1105. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  1106. device_remove_file(&pdev->dev, &vga_attr);
  1107. err_rom_file:
  1108. if (rom_size) {
  1109. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1110. kfree(pdev->rom_attr);
  1111. pdev->rom_attr = NULL;
  1112. }
  1113. err_resource_files:
  1114. pci_remove_resource_files(pdev);
  1115. err_config_file:
  1116. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1117. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1118. else
  1119. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1120. err:
  1121. return retval;
  1122. }
  1123. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1124. {
  1125. if (dev->vpd && dev->vpd->attr) {
  1126. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1127. kfree(dev->vpd->attr);
  1128. }
  1129. pcie_aspm_remove_sysfs_dev_files(dev);
  1130. if (dev->reset_fn) {
  1131. device_remove_file(&dev->dev, &reset_attr);
  1132. dev->reset_fn = 0;
  1133. }
  1134. }
  1135. /**
  1136. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1137. * @pdev: device whose entries we should free
  1138. *
  1139. * Cleanup when @pdev is removed from sysfs.
  1140. */
  1141. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1142. {
  1143. int rom_size = 0;
  1144. if (!sysfs_initialized)
  1145. return;
  1146. pci_remove_capabilities_sysfs(pdev);
  1147. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1148. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1149. else
  1150. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1151. pci_remove_resource_files(pdev);
  1152. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1153. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1154. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1155. rom_size = 0x20000;
  1156. if (rom_size && pdev->rom_attr) {
  1157. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1158. kfree(pdev->rom_attr);
  1159. }
  1160. pci_remove_firmware_label_files(pdev);
  1161. }
  1162. static int __init pci_sysfs_init(void)
  1163. {
  1164. struct pci_dev *pdev = NULL;
  1165. int retval;
  1166. sysfs_initialized = 1;
  1167. for_each_pci_dev(pdev) {
  1168. retval = pci_create_sysfs_dev_files(pdev);
  1169. if (retval) {
  1170. pci_dev_put(pdev);
  1171. return retval;
  1172. }
  1173. }
  1174. return 0;
  1175. }
  1176. late_initcall(pci_sysfs_init);