esp.c 121 KB

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  1. /* esp.c: ESP Sun SCSI driver.
  2. *
  3. * Copyright (C) 1995, 1998, 2006 David S. Miller (davem@davemloft.net)
  4. */
  5. /* TODO:
  6. *
  7. * 1) Maybe disable parity checking in config register one for SCSI1
  8. * targets. (Gilmore says parity error on the SBus can lock up
  9. * old sun4c's)
  10. * 2) Add support for DMA2 pipelining.
  11. * 3) Add tagged queueing.
  12. */
  13. #include <linux/config.h>
  14. #include <linux/kernel.h>
  15. #include <linux/delay.h>
  16. #include <linux/types.h>
  17. #include <linux/string.h>
  18. #include <linux/slab.h>
  19. #include <linux/blkdev.h>
  20. #include <linux/proc_fs.h>
  21. #include <linux/stat.h>
  22. #include <linux/init.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/module.h>
  26. #include "esp.h"
  27. #include <asm/sbus.h>
  28. #include <asm/dma.h>
  29. #include <asm/system.h>
  30. #include <asm/ptrace.h>
  31. #include <asm/pgtable.h>
  32. #include <asm/oplib.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #ifndef __sparc_v9__
  36. #include <asm/machines.h>
  37. #include <asm/idprom.h>
  38. #endif
  39. #include <scsi/scsi.h>
  40. #include <scsi/scsi_cmnd.h>
  41. #include <scsi/scsi_device.h>
  42. #include <scsi/scsi_eh.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #define DRV_VERSION "1.101"
  46. #define DEBUG_ESP
  47. /* #define DEBUG_ESP_HME */
  48. /* #define DEBUG_ESP_DATA */
  49. /* #define DEBUG_ESP_QUEUE */
  50. /* #define DEBUG_ESP_DISCONNECT */
  51. /* #define DEBUG_ESP_STATUS */
  52. /* #define DEBUG_ESP_PHASES */
  53. /* #define DEBUG_ESP_WORKBUS */
  54. /* #define DEBUG_STATE_MACHINE */
  55. /* #define DEBUG_ESP_CMDS */
  56. /* #define DEBUG_ESP_IRQS */
  57. /* #define DEBUG_SDTR */
  58. /* #define DEBUG_ESP_SG */
  59. /* Use the following to sprinkle debugging messages in a way which
  60. * suits you if combinations of the above become too verbose when
  61. * trying to track down a specific problem.
  62. */
  63. /* #define DEBUG_ESP_MISC */
  64. #if defined(DEBUG_ESP)
  65. #define ESPLOG(foo) printk foo
  66. #else
  67. #define ESPLOG(foo)
  68. #endif /* (DEBUG_ESP) */
  69. #if defined(DEBUG_ESP_HME)
  70. #define ESPHME(foo) printk foo
  71. #else
  72. #define ESPHME(foo)
  73. #endif
  74. #if defined(DEBUG_ESP_DATA)
  75. #define ESPDATA(foo) printk foo
  76. #else
  77. #define ESPDATA(foo)
  78. #endif
  79. #if defined(DEBUG_ESP_QUEUE)
  80. #define ESPQUEUE(foo) printk foo
  81. #else
  82. #define ESPQUEUE(foo)
  83. #endif
  84. #if defined(DEBUG_ESP_DISCONNECT)
  85. #define ESPDISC(foo) printk foo
  86. #else
  87. #define ESPDISC(foo)
  88. #endif
  89. #if defined(DEBUG_ESP_STATUS)
  90. #define ESPSTAT(foo) printk foo
  91. #else
  92. #define ESPSTAT(foo)
  93. #endif
  94. #if defined(DEBUG_ESP_PHASES)
  95. #define ESPPHASE(foo) printk foo
  96. #else
  97. #define ESPPHASE(foo)
  98. #endif
  99. #if defined(DEBUG_ESP_WORKBUS)
  100. #define ESPBUS(foo) printk foo
  101. #else
  102. #define ESPBUS(foo)
  103. #endif
  104. #if defined(DEBUG_ESP_IRQS)
  105. #define ESPIRQ(foo) printk foo
  106. #else
  107. #define ESPIRQ(foo)
  108. #endif
  109. #if defined(DEBUG_SDTR)
  110. #define ESPSDTR(foo) printk foo
  111. #else
  112. #define ESPSDTR(foo)
  113. #endif
  114. #if defined(DEBUG_ESP_MISC)
  115. #define ESPMISC(foo) printk foo
  116. #else
  117. #define ESPMISC(foo)
  118. #endif
  119. /* Command phase enumeration. */
  120. enum {
  121. not_issued = 0x00, /* Still in the issue_SC queue. */
  122. /* Various forms of selecting a target. */
  123. #define in_slct_mask 0x10
  124. in_slct_norm = 0x10, /* ESP is arbitrating, normal selection */
  125. in_slct_stop = 0x11, /* ESP will select, then stop with IRQ */
  126. in_slct_msg = 0x12, /* select, then send a message */
  127. in_slct_tag = 0x13, /* select and send tagged queue msg */
  128. in_slct_sneg = 0x14, /* select and acquire sync capabilities */
  129. /* Any post selection activity. */
  130. #define in_phases_mask 0x20
  131. in_datain = 0x20, /* Data is transferring from the bus */
  132. in_dataout = 0x21, /* Data is transferring to the bus */
  133. in_data_done = 0x22, /* Last DMA data operation done (maybe) */
  134. in_msgin = 0x23, /* Eating message from target */
  135. in_msgincont = 0x24, /* Eating more msg bytes from target */
  136. in_msgindone = 0x25, /* Decide what to do with what we got */
  137. in_msgout = 0x26, /* Sending message to target */
  138. in_msgoutdone = 0x27, /* Done sending msg out */
  139. in_cmdbegin = 0x28, /* Sending cmd after abnormal selection */
  140. in_cmdend = 0x29, /* Done sending slow cmd */
  141. in_status = 0x2a, /* Was in status phase, finishing cmd */
  142. in_freeing = 0x2b, /* freeing the bus for cmd cmplt or disc */
  143. in_the_dark = 0x2c, /* Don't know what bus phase we are in */
  144. /* Special states, ie. not normal bus transitions... */
  145. #define in_spec_mask 0x80
  146. in_abortone = 0x80, /* Aborting one command currently */
  147. in_abortall = 0x81, /* Blowing away all commands we have */
  148. in_resetdev = 0x82, /* SCSI target reset in progress */
  149. in_resetbus = 0x83, /* SCSI bus reset in progress */
  150. in_tgterror = 0x84, /* Target did something stupid */
  151. };
  152. enum {
  153. /* Zero has special meaning, see skipahead[12]. */
  154. /*0*/ do_never,
  155. /*1*/ do_phase_determine,
  156. /*2*/ do_reset_bus,
  157. /*3*/ do_reset_complete,
  158. /*4*/ do_work_bus,
  159. /*5*/ do_intr_end
  160. };
  161. /* Forward declarations. */
  162. static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs);
  163. /* Debugging routines */
  164. struct esp_cmdstrings {
  165. u8 cmdchar;
  166. char *text;
  167. } esp_cmd_strings[] = {
  168. /* Miscellaneous */
  169. { ESP_CMD_NULL, "ESP_NOP", },
  170. { ESP_CMD_FLUSH, "FIFO_FLUSH", },
  171. { ESP_CMD_RC, "RSTESP", },
  172. { ESP_CMD_RS, "RSTSCSI", },
  173. /* Disconnected State Group */
  174. { ESP_CMD_RSEL, "RESLCTSEQ", },
  175. { ESP_CMD_SEL, "SLCTNATN", },
  176. { ESP_CMD_SELA, "SLCTATN", },
  177. { ESP_CMD_SELAS, "SLCTATNSTOP", },
  178. { ESP_CMD_ESEL, "ENSLCTRESEL", },
  179. { ESP_CMD_DSEL, "DISSELRESEL", },
  180. { ESP_CMD_SA3, "SLCTATN3", },
  181. { ESP_CMD_RSEL3, "RESLCTSEQ", },
  182. /* Target State Group */
  183. { ESP_CMD_SMSG, "SNDMSG", },
  184. { ESP_CMD_SSTAT, "SNDSTATUS", },
  185. { ESP_CMD_SDATA, "SNDDATA", },
  186. { ESP_CMD_DSEQ, "DISCSEQ", },
  187. { ESP_CMD_TSEQ, "TERMSEQ", },
  188. { ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", },
  189. { ESP_CMD_DCNCT, "DISC", },
  190. { ESP_CMD_RMSG, "RCVMSG", },
  191. { ESP_CMD_RCMD, "RCVCMD", },
  192. { ESP_CMD_RDATA, "RCVDATA", },
  193. { ESP_CMD_RCSEQ, "RCVCMDSEQ", },
  194. /* Initiator State Group */
  195. { ESP_CMD_TI, "TRANSINFO", },
  196. { ESP_CMD_ICCSEQ, "INICMDSEQCOMP", },
  197. { ESP_CMD_MOK, "MSGACCEPTED", },
  198. { ESP_CMD_TPAD, "TPAD", },
  199. { ESP_CMD_SATN, "SATN", },
  200. { ESP_CMD_RATN, "RATN", },
  201. };
  202. #define NUM_ESP_COMMANDS ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings)))
  203. /* Print textual representation of an ESP command */
  204. static inline void esp_print_cmd(u8 espcmd)
  205. {
  206. u8 dma_bit = espcmd & ESP_CMD_DMA;
  207. int i;
  208. espcmd &= ~dma_bit;
  209. for (i = 0; i < NUM_ESP_COMMANDS; i++)
  210. if (esp_cmd_strings[i].cmdchar == espcmd)
  211. break;
  212. if (i == NUM_ESP_COMMANDS)
  213. printk("ESP_Unknown");
  214. else
  215. printk("%s%s", esp_cmd_strings[i].text,
  216. ((dma_bit) ? "+DMA" : ""));
  217. }
  218. /* Print the status register's value */
  219. static inline void esp_print_statreg(u8 statreg)
  220. {
  221. u8 phase;
  222. printk("STATUS<");
  223. phase = statreg & ESP_STAT_PMASK;
  224. printk("%s,", (phase == ESP_DOP ? "DATA-OUT" :
  225. (phase == ESP_DIP ? "DATA-IN" :
  226. (phase == ESP_CMDP ? "COMMAND" :
  227. (phase == ESP_STATP ? "STATUS" :
  228. (phase == ESP_MOP ? "MSG-OUT" :
  229. (phase == ESP_MIP ? "MSG_IN" :
  230. "unknown")))))));
  231. if (statreg & ESP_STAT_TDONE)
  232. printk("TRANS_DONE,");
  233. if (statreg & ESP_STAT_TCNT)
  234. printk("TCOUNT_ZERO,");
  235. if (statreg & ESP_STAT_PERR)
  236. printk("P_ERROR,");
  237. if (statreg & ESP_STAT_SPAM)
  238. printk("SPAM,");
  239. if (statreg & ESP_STAT_INTR)
  240. printk("IRQ,");
  241. printk(">");
  242. }
  243. /* Print the interrupt register's value */
  244. static inline void esp_print_ireg(u8 intreg)
  245. {
  246. printk("INTREG< ");
  247. if (intreg & ESP_INTR_S)
  248. printk("SLCT_NATN ");
  249. if (intreg & ESP_INTR_SATN)
  250. printk("SLCT_ATN ");
  251. if (intreg & ESP_INTR_RSEL)
  252. printk("RSLCT ");
  253. if (intreg & ESP_INTR_FDONE)
  254. printk("FDONE ");
  255. if (intreg & ESP_INTR_BSERV)
  256. printk("BSERV ");
  257. if (intreg & ESP_INTR_DC)
  258. printk("DISCNCT ");
  259. if (intreg & ESP_INTR_IC)
  260. printk("ILL_CMD ");
  261. if (intreg & ESP_INTR_SR)
  262. printk("SCSI_BUS_RESET ");
  263. printk(">");
  264. }
  265. /* Print the sequence step registers contents */
  266. static inline void esp_print_seqreg(u8 stepreg)
  267. {
  268. stepreg &= ESP_STEP_VBITS;
  269. printk("STEP<%s>",
  270. (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" :
  271. (stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" :
  272. (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" :
  273. (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" :
  274. (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" :
  275. "UNKNOWN"))))));
  276. }
  277. static char *phase_string(int phase)
  278. {
  279. switch (phase) {
  280. case not_issued:
  281. return "UNISSUED";
  282. case in_slct_norm:
  283. return "SLCTNORM";
  284. case in_slct_stop:
  285. return "SLCTSTOP";
  286. case in_slct_msg:
  287. return "SLCTMSG";
  288. case in_slct_tag:
  289. return "SLCTTAG";
  290. case in_slct_sneg:
  291. return "SLCTSNEG";
  292. case in_datain:
  293. return "DATAIN";
  294. case in_dataout:
  295. return "DATAOUT";
  296. case in_data_done:
  297. return "DATADONE";
  298. case in_msgin:
  299. return "MSGIN";
  300. case in_msgincont:
  301. return "MSGINCONT";
  302. case in_msgindone:
  303. return "MSGINDONE";
  304. case in_msgout:
  305. return "MSGOUT";
  306. case in_msgoutdone:
  307. return "MSGOUTDONE";
  308. case in_cmdbegin:
  309. return "CMDBEGIN";
  310. case in_cmdend:
  311. return "CMDEND";
  312. case in_status:
  313. return "STATUS";
  314. case in_freeing:
  315. return "FREEING";
  316. case in_the_dark:
  317. return "CLUELESS";
  318. case in_abortone:
  319. return "ABORTONE";
  320. case in_abortall:
  321. return "ABORTALL";
  322. case in_resetdev:
  323. return "RESETDEV";
  324. case in_resetbus:
  325. return "RESETBUS";
  326. case in_tgterror:
  327. return "TGTERROR";
  328. default:
  329. return "UNKNOWN";
  330. };
  331. }
  332. #ifdef DEBUG_STATE_MACHINE
  333. static inline void esp_advance_phase(struct scsi_cmnd *s, int newphase)
  334. {
  335. ESPLOG(("<%s>", phase_string(newphase)));
  336. s->SCp.sent_command = s->SCp.phase;
  337. s->SCp.phase = newphase;
  338. }
  339. #else
  340. #define esp_advance_phase(__s, __newphase) \
  341. (__s)->SCp.sent_command = (__s)->SCp.phase; \
  342. (__s)->SCp.phase = (__newphase);
  343. #endif
  344. #ifdef DEBUG_ESP_CMDS
  345. static inline void esp_cmd(struct esp *esp, u8 cmd)
  346. {
  347. esp->espcmdlog[esp->espcmdent] = cmd;
  348. esp->espcmdent = (esp->espcmdent + 1) & 31;
  349. sbus_writeb(cmd, esp->eregs + ESP_CMD);
  350. }
  351. #else
  352. #define esp_cmd(__esp, __cmd) \
  353. sbus_writeb((__cmd), ((__esp)->eregs) + ESP_CMD)
  354. #endif
  355. #define ESP_INTSOFF(__dregs) \
  356. sbus_writel(sbus_readl((__dregs)+DMA_CSR)&~(DMA_INT_ENAB), (__dregs)+DMA_CSR)
  357. #define ESP_INTSON(__dregs) \
  358. sbus_writel(sbus_readl((__dregs)+DMA_CSR)|DMA_INT_ENAB, (__dregs)+DMA_CSR)
  359. #define ESP_IRQ_P(__dregs) \
  360. (sbus_readl((__dregs)+DMA_CSR) & (DMA_HNDL_INTR|DMA_HNDL_ERROR))
  361. /* How we use the various Linux SCSI data structures for operation.
  362. *
  363. * struct scsi_cmnd:
  364. *
  365. * We keep track of the synchronous capabilities of a target
  366. * in the device member, using sync_min_period and
  367. * sync_max_offset. These are the values we directly write
  368. * into the ESP registers while running a command. If offset
  369. * is zero the ESP will use asynchronous transfers.
  370. * If the borken flag is set we assume we shouldn't even bother
  371. * trying to negotiate for synchronous transfer as this target
  372. * is really stupid. If we notice the target is dropping the
  373. * bus, and we have been allowing it to disconnect, we clear
  374. * the disconnect flag.
  375. */
  376. /* Manipulation of the ESP command queues. Thanks to the aha152x driver
  377. * and its author, Juergen E. Fischer, for the methods used here.
  378. * Note that these are per-ESP queues, not global queues like
  379. * the aha152x driver uses.
  380. */
  381. static inline void append_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC)
  382. {
  383. struct scsi_cmnd *end;
  384. new_SC->host_scribble = (unsigned char *) NULL;
  385. if (!*SC)
  386. *SC = new_SC;
  387. else {
  388. for (end=*SC;end->host_scribble;end=(struct scsi_cmnd *)end->host_scribble)
  389. ;
  390. end->host_scribble = (unsigned char *) new_SC;
  391. }
  392. }
  393. static inline void prepend_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC)
  394. {
  395. new_SC->host_scribble = (unsigned char *) *SC;
  396. *SC = new_SC;
  397. }
  398. static inline struct scsi_cmnd *remove_first_SC(struct scsi_cmnd **SC)
  399. {
  400. struct scsi_cmnd *ptr;
  401. ptr = *SC;
  402. if (ptr)
  403. *SC = (struct scsi_cmnd *) (*SC)->host_scribble;
  404. return ptr;
  405. }
  406. static inline struct scsi_cmnd *remove_SC(struct scsi_cmnd **SC, int target, int lun)
  407. {
  408. struct scsi_cmnd *ptr, *prev;
  409. for (ptr = *SC, prev = NULL;
  410. ptr && ((ptr->device->id != target) || (ptr->device->lun != lun));
  411. prev = ptr, ptr = (struct scsi_cmnd *) ptr->host_scribble)
  412. ;
  413. if (ptr) {
  414. if (prev)
  415. prev->host_scribble=ptr->host_scribble;
  416. else
  417. *SC=(struct scsi_cmnd *)ptr->host_scribble;
  418. }
  419. return ptr;
  420. }
  421. /* Resetting various pieces of the ESP scsi driver chipset/buses. */
  422. static void esp_reset_dma(struct esp *esp)
  423. {
  424. int can_do_burst16, can_do_burst32, can_do_burst64;
  425. int can_do_sbus64;
  426. u32 tmp;
  427. can_do_burst16 = (esp->bursts & DMA_BURST16) != 0;
  428. can_do_burst32 = (esp->bursts & DMA_BURST32) != 0;
  429. can_do_burst64 = 0;
  430. can_do_sbus64 = 0;
  431. if (sbus_can_dma_64bit(esp->sdev))
  432. can_do_sbus64 = 1;
  433. if (sbus_can_burst64(esp->sdev))
  434. can_do_burst64 = (esp->bursts & DMA_BURST64) != 0;
  435. /* Punt the DVMA into a known state. */
  436. if (esp->dma->revision != dvmahme) {
  437. tmp = sbus_readl(esp->dregs + DMA_CSR);
  438. sbus_writel(tmp | DMA_RST_SCSI, esp->dregs + DMA_CSR);
  439. sbus_writel(tmp & ~DMA_RST_SCSI, esp->dregs + DMA_CSR);
  440. }
  441. switch (esp->dma->revision) {
  442. case dvmahme:
  443. /* This is the HME DVMA gate array. */
  444. sbus_writel(DMA_RESET_FAS366, esp->dregs + DMA_CSR);
  445. sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
  446. esp->prev_hme_dmacsr = (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB|DMA_INT_ENAB);
  447. esp->prev_hme_dmacsr &= ~(DMA_ENABLE|DMA_ST_WRITE|DMA_BRST_SZ);
  448. if (can_do_burst64)
  449. esp->prev_hme_dmacsr |= DMA_BRST64;
  450. else if (can_do_burst32)
  451. esp->prev_hme_dmacsr |= DMA_BRST32;
  452. if (can_do_sbus64) {
  453. esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64;
  454. sbus_set_sbus64(esp->sdev, esp->bursts);
  455. }
  456. /* This chip is horrible. */
  457. while (sbus_readl(esp->dregs + DMA_CSR) & DMA_PEND_READ)
  458. udelay(1);
  459. sbus_writel(0, esp->dregs + DMA_CSR);
  460. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  461. /* This is necessary to avoid having the SCSI channel
  462. * engine lock up on us.
  463. */
  464. sbus_writel(0, esp->dregs + DMA_ADDR);
  465. break;
  466. case dvmarev2:
  467. /* This is the gate array found in the sun4m
  468. * NCR SBUS I/O subsystem.
  469. */
  470. if (esp->erev != esp100) {
  471. tmp = sbus_readl(esp->dregs + DMA_CSR);
  472. sbus_writel(tmp | DMA_3CLKS, esp->dregs + DMA_CSR);
  473. }
  474. break;
  475. case dvmarev3:
  476. tmp = sbus_readl(esp->dregs + DMA_CSR);
  477. tmp &= ~DMA_3CLKS;
  478. tmp |= DMA_2CLKS;
  479. if (can_do_burst32) {
  480. tmp &= ~DMA_BRST_SZ;
  481. tmp |= DMA_BRST32;
  482. }
  483. sbus_writel(tmp, esp->dregs + DMA_CSR);
  484. break;
  485. case dvmaesc1:
  486. /* This is the DMA unit found on SCSI/Ether cards. */
  487. tmp = sbus_readl(esp->dregs + DMA_CSR);
  488. tmp |= DMA_ADD_ENABLE;
  489. tmp &= ~DMA_BCNT_ENAB;
  490. if (!can_do_burst32 && can_do_burst16) {
  491. tmp |= DMA_ESC_BURST;
  492. } else {
  493. tmp &= ~(DMA_ESC_BURST);
  494. }
  495. sbus_writel(tmp, esp->dregs + DMA_CSR);
  496. break;
  497. default:
  498. break;
  499. };
  500. ESP_INTSON(esp->dregs);
  501. }
  502. /* Reset the ESP chip, _not_ the SCSI bus. */
  503. static void __init esp_reset_esp(struct esp *esp)
  504. {
  505. u8 family_code, version;
  506. int i;
  507. /* Now reset the ESP chip */
  508. esp_cmd(esp, ESP_CMD_RC);
  509. esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  510. esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  511. /* Reload the configuration registers */
  512. sbus_writeb(esp->cfact, esp->eregs + ESP_CFACT);
  513. esp->prev_stp = 0;
  514. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  515. esp->prev_soff = 0;
  516. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  517. sbus_writeb(esp->neg_defp, esp->eregs + ESP_TIMEO);
  518. /* This is the only point at which it is reliable to read
  519. * the ID-code for a fast ESP chip variants.
  520. */
  521. esp->max_period = ((35 * esp->ccycle) / 1000);
  522. if (esp->erev == fast) {
  523. version = sbus_readb(esp->eregs + ESP_UID);
  524. family_code = (version & 0xf8) >> 3;
  525. if (family_code == 0x02)
  526. esp->erev = fas236;
  527. else if (family_code == 0x0a)
  528. esp->erev = fashme; /* Version is usually '5'. */
  529. else
  530. esp->erev = fas100a;
  531. ESPMISC(("esp%d: FAST chip is %s (family=%d, version=%d)\n",
  532. esp->esp_id,
  533. (esp->erev == fas236) ? "fas236" :
  534. ((esp->erev == fas100a) ? "fas100a" :
  535. "fasHME"), family_code, (version & 7)));
  536. esp->min_period = ((4 * esp->ccycle) / 1000);
  537. } else {
  538. esp->min_period = ((5 * esp->ccycle) / 1000);
  539. }
  540. esp->max_period = (esp->max_period + 3)>>2;
  541. esp->min_period = (esp->min_period + 3)>>2;
  542. sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
  543. switch (esp->erev) {
  544. case esp100:
  545. /* nothing to do */
  546. break;
  547. case esp100a:
  548. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  549. break;
  550. case esp236:
  551. /* Slow 236 */
  552. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  553. esp->prev_cfg3 = esp->config3[0];
  554. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  555. break;
  556. case fashme:
  557. esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
  558. /* fallthrough... */
  559. case fas236:
  560. /* Fast 236 or HME */
  561. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  562. for (i = 0; i < 16; i++) {
  563. if (esp->erev == fashme) {
  564. u8 cfg3;
  565. cfg3 = ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
  566. if (esp->scsi_id >= 8)
  567. cfg3 |= ESP_CONFIG3_IDBIT3;
  568. esp->config3[i] |= cfg3;
  569. } else {
  570. esp->config3[i] |= ESP_CONFIG3_FCLK;
  571. }
  572. }
  573. esp->prev_cfg3 = esp->config3[0];
  574. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  575. if (esp->erev == fashme) {
  576. esp->radelay = 80;
  577. } else {
  578. if (esp->diff)
  579. esp->radelay = 0;
  580. else
  581. esp->radelay = 96;
  582. }
  583. break;
  584. case fas100a:
  585. /* Fast 100a */
  586. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  587. for (i = 0; i < 16; i++)
  588. esp->config3[i] |= ESP_CONFIG3_FCLOCK;
  589. esp->prev_cfg3 = esp->config3[0];
  590. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  591. esp->radelay = 32;
  592. break;
  593. default:
  594. panic("esp: what could it be... I wonder...");
  595. break;
  596. };
  597. /* Eat any bitrot in the chip */
  598. sbus_readb(esp->eregs + ESP_INTRPT);
  599. udelay(100);
  600. }
  601. /* This places the ESP into a known state at boot time. */
  602. static void __init esp_bootup_reset(struct esp *esp)
  603. {
  604. u8 tmp;
  605. /* Reset the DMA */
  606. esp_reset_dma(esp);
  607. /* Reset the ESP */
  608. esp_reset_esp(esp);
  609. /* Reset the SCSI bus, but tell ESP not to generate an irq */
  610. tmp = sbus_readb(esp->eregs + ESP_CFG1);
  611. tmp |= ESP_CONFIG1_SRRDISAB;
  612. sbus_writeb(tmp, esp->eregs + ESP_CFG1);
  613. esp_cmd(esp, ESP_CMD_RS);
  614. udelay(400);
  615. sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
  616. /* Eat any bitrot in the chip and we are done... */
  617. sbus_readb(esp->eregs + ESP_INTRPT);
  618. }
  619. static int __init esp_find_dvma(struct esp *esp, struct sbus_dev *dma_sdev)
  620. {
  621. struct sbus_dev *sdev = esp->sdev;
  622. struct sbus_dma *dma;
  623. if (dma_sdev != NULL) {
  624. for_each_dvma(dma) {
  625. if (dma->sdev == dma_sdev)
  626. break;
  627. }
  628. } else {
  629. for_each_dvma(dma) {
  630. /* If allocated already, can't use it. */
  631. if (dma->allocated)
  632. continue;
  633. if (dma->sdev == NULL)
  634. break;
  635. /* If bus + slot are the same and it has the
  636. * correct OBP name, it's ours.
  637. */
  638. if (sdev->bus == dma->sdev->bus &&
  639. sdev->slot == dma->sdev->slot &&
  640. (!strcmp(dma->sdev->prom_name, "dma") ||
  641. !strcmp(dma->sdev->prom_name, "espdma")))
  642. break;
  643. }
  644. }
  645. /* If we don't know how to handle the dvma,
  646. * do not use this device.
  647. */
  648. if (dma == NULL) {
  649. printk("Cannot find dvma for ESP%d's SCSI\n", esp->esp_id);
  650. return -1;
  651. }
  652. if (dma->allocated) {
  653. printk("esp%d: can't use my espdma\n", esp->esp_id);
  654. return -1;
  655. }
  656. dma->allocated = 1;
  657. esp->dma = dma;
  658. esp->dregs = dma->regs;
  659. return 0;
  660. }
  661. static int __init esp_map_regs(struct esp *esp, int hme)
  662. {
  663. struct sbus_dev *sdev = esp->sdev;
  664. struct resource *res;
  665. /* On HME, two reg sets exist, first is DVMA,
  666. * second is ESP registers.
  667. */
  668. if (hme)
  669. res = &sdev->resource[1];
  670. else
  671. res = &sdev->resource[0];
  672. esp->eregs = sbus_ioremap(res, 0, ESP_REG_SIZE, "ESP Registers");
  673. if (esp->eregs == 0)
  674. return -1;
  675. return 0;
  676. }
  677. static int __init esp_map_cmdarea(struct esp *esp)
  678. {
  679. struct sbus_dev *sdev = esp->sdev;
  680. esp->esp_command = sbus_alloc_consistent(sdev, 16,
  681. &esp->esp_command_dvma);
  682. if (esp->esp_command == NULL ||
  683. esp->esp_command_dvma == 0)
  684. return -1;
  685. return 0;
  686. }
  687. static int __init esp_register_irq(struct esp *esp)
  688. {
  689. esp->ehost->irq = esp->irq = esp->sdev->irqs[0];
  690. /* We used to try various overly-clever things to
  691. * reduce the interrupt processing overhead on
  692. * sun4c/sun4m when multiple ESP's shared the
  693. * same IRQ. It was too complex and messy to
  694. * sanely maintain.
  695. */
  696. if (request_irq(esp->ehost->irq, esp_intr,
  697. SA_SHIRQ, "ESP SCSI", esp)) {
  698. printk("esp%d: Cannot acquire irq line\n",
  699. esp->esp_id);
  700. return -1;
  701. }
  702. printk("esp%d: IRQ %d ", esp->esp_id,
  703. esp->ehost->irq);
  704. return 0;
  705. }
  706. static void __init esp_get_scsi_id(struct esp *esp)
  707. {
  708. struct sbus_dev *sdev = esp->sdev;
  709. struct device_node *dp = sdev->ofdev.node;
  710. esp->scsi_id = of_getintprop_default(dp,
  711. "initiator-id",
  712. -1);
  713. if (esp->scsi_id == -1)
  714. esp->scsi_id = of_getintprop_default(dp,
  715. "scsi-initiator-id",
  716. -1);
  717. if (esp->scsi_id == -1)
  718. esp->scsi_id = (sdev->bus == NULL) ? 7 :
  719. of_getintprop_default(sdev->bus->ofdev.node,
  720. "scsi-initiator-id",
  721. 7);
  722. esp->ehost->this_id = esp->scsi_id;
  723. esp->scsi_id_mask = (1 << esp->scsi_id);
  724. }
  725. static void __init esp_get_clock_params(struct esp *esp)
  726. {
  727. struct sbus_dev *sdev = esp->sdev;
  728. int prom_node = esp->prom_node;
  729. int sbus_prom_node;
  730. unsigned int fmhz;
  731. u8 ccf;
  732. if (sdev != NULL && sdev->bus != NULL)
  733. sbus_prom_node = sdev->bus->prom_node;
  734. else
  735. sbus_prom_node = 0;
  736. /* This is getting messy but it has to be done
  737. * correctly or else you get weird behavior all
  738. * over the place. We are trying to basically
  739. * figure out three pieces of information.
  740. *
  741. * a) Clock Conversion Factor
  742. *
  743. * This is a representation of the input
  744. * crystal clock frequency going into the
  745. * ESP on this machine. Any operation whose
  746. * timing is longer than 400ns depends on this
  747. * value being correct. For example, you'll
  748. * get blips for arbitration/selection during
  749. * high load or with multiple targets if this
  750. * is not set correctly.
  751. *
  752. * b) Selection Time-Out
  753. *
  754. * The ESP isn't very bright and will arbitrate
  755. * for the bus and try to select a target
  756. * forever if you let it. This value tells
  757. * the ESP when it has taken too long to
  758. * negotiate and that it should interrupt
  759. * the CPU so we can see what happened.
  760. * The value is computed as follows (from
  761. * NCR/Symbios chip docs).
  762. *
  763. * (Time Out Period) * (Input Clock)
  764. * STO = ----------------------------------
  765. * (8192) * (Clock Conversion Factor)
  766. *
  767. * You usually want the time out period to be
  768. * around 250ms, I think we'll set it a little
  769. * bit higher to account for fully loaded SCSI
  770. * bus's and slow devices that don't respond so
  771. * quickly to selection attempts. (yeah, I know
  772. * this is out of spec. but there is a lot of
  773. * buggy pieces of firmware out there so bite me)
  774. *
  775. * c) Imperical constants for synchronous offset
  776. * and transfer period register values
  777. *
  778. * This entails the smallest and largest sync
  779. * period we could ever handle on this ESP.
  780. */
  781. fmhz = prom_getintdefault(prom_node, "clock-frequency", -1);
  782. if (fmhz == -1)
  783. fmhz = (!sbus_prom_node) ? 0 :
  784. prom_getintdefault(sbus_prom_node, "clock-frequency", -1);
  785. if (fmhz <= (5000000))
  786. ccf = 0;
  787. else
  788. ccf = (((5000000 - 1) + (fmhz))/(5000000));
  789. if (!ccf || ccf > 8) {
  790. /* If we can't find anything reasonable,
  791. * just assume 20MHZ. This is the clock
  792. * frequency of the older sun4c's where I've
  793. * been unable to find the clock-frequency
  794. * PROM property. All other machines provide
  795. * useful values it seems.
  796. */
  797. ccf = ESP_CCF_F4;
  798. fmhz = (20000000);
  799. }
  800. if (ccf == (ESP_CCF_F7 + 1))
  801. esp->cfact = ESP_CCF_F0;
  802. else if (ccf == ESP_CCF_NEVER)
  803. esp->cfact = ESP_CCF_F2;
  804. else
  805. esp->cfact = ccf;
  806. esp->raw_cfact = ccf;
  807. esp->cfreq = fmhz;
  808. esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
  809. esp->ctick = ESP_TICK(ccf, esp->ccycle);
  810. esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
  811. esp->sync_defp = SYNC_DEFP_SLOW;
  812. printk("SCSI ID %d Clk %dMHz CCYC=%d CCF=%d TOut %d ",
  813. esp->scsi_id, (fmhz / 1000000),
  814. (int)esp->ccycle, (int)ccf, (int) esp->neg_defp);
  815. }
  816. static void __init esp_get_bursts(struct esp *esp, struct sbus_dev *dma)
  817. {
  818. struct sbus_dev *sdev = esp->sdev;
  819. u8 bursts;
  820. bursts = prom_getintdefault(esp->prom_node, "burst-sizes", 0xff);
  821. if (dma) {
  822. u8 tmp = prom_getintdefault(dma->prom_node,
  823. "burst-sizes", 0xff);
  824. if (tmp != 0xff)
  825. bursts &= tmp;
  826. }
  827. if (sdev->bus) {
  828. u8 tmp = prom_getintdefault(sdev->bus->prom_node,
  829. "burst-sizes", 0xff);
  830. if (tmp != 0xff)
  831. bursts &= tmp;
  832. }
  833. if (bursts == 0xff ||
  834. (bursts & DMA_BURST16) == 0 ||
  835. (bursts & DMA_BURST32) == 0)
  836. bursts = (DMA_BURST32 - 1);
  837. esp->bursts = bursts;
  838. }
  839. static void __init esp_get_revision(struct esp *esp)
  840. {
  841. u8 tmp;
  842. esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
  843. esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
  844. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  845. tmp = sbus_readb(esp->eregs + ESP_CFG2);
  846. tmp &= ~ESP_CONFIG2_MAGIC;
  847. if (tmp != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
  848. /* If what we write to cfg2 does not come back, cfg2
  849. * is not implemented, therefore this must be a plain
  850. * esp100.
  851. */
  852. esp->erev = esp100;
  853. printk("NCR53C90(esp100)\n");
  854. } else {
  855. esp->config2 = 0;
  856. esp->prev_cfg3 = esp->config3[0] = 5;
  857. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  858. sbus_writeb(0, esp->eregs + ESP_CFG3);
  859. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  860. tmp = sbus_readb(esp->eregs + ESP_CFG3);
  861. if (tmp != 5) {
  862. /* The cfg2 register is implemented, however
  863. * cfg3 is not, must be esp100a.
  864. */
  865. esp->erev = esp100a;
  866. printk("NCR53C90A(esp100a)\n");
  867. } else {
  868. int target;
  869. for (target = 0; target < 16; target++)
  870. esp->config3[target] = 0;
  871. esp->prev_cfg3 = 0;
  872. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  873. /* All of cfg{1,2,3} implemented, must be one of
  874. * the fas variants, figure out which one.
  875. */
  876. if (esp->raw_cfact > ESP_CCF_F5) {
  877. esp->erev = fast;
  878. esp->sync_defp = SYNC_DEFP_FAST;
  879. printk("NCR53C9XF(espfast)\n");
  880. } else {
  881. esp->erev = esp236;
  882. printk("NCR53C9x(esp236)\n");
  883. }
  884. esp->config2 = 0;
  885. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  886. }
  887. }
  888. }
  889. static void __init esp_init_swstate(struct esp *esp)
  890. {
  891. int i;
  892. /* Command queues... */
  893. esp->current_SC = NULL;
  894. esp->disconnected_SC = NULL;
  895. esp->issue_SC = NULL;
  896. /* Target and current command state... */
  897. esp->targets_present = 0;
  898. esp->resetting_bus = 0;
  899. esp->snip = 0;
  900. init_waitqueue_head(&esp->reset_queue);
  901. /* Debugging... */
  902. for(i = 0; i < 32; i++)
  903. esp->espcmdlog[i] = 0;
  904. esp->espcmdent = 0;
  905. /* MSG phase state... */
  906. for(i = 0; i < 16; i++) {
  907. esp->cur_msgout[i] = 0;
  908. esp->cur_msgin[i] = 0;
  909. }
  910. esp->prevmsgout = esp->prevmsgin = 0;
  911. esp->msgout_len = esp->msgin_len = 0;
  912. /* Clear the one behind caches to hold unmatchable values. */
  913. esp->prev_soff = esp->prev_stp = esp->prev_cfg3 = 0xff;
  914. esp->prev_hme_dmacsr = 0xffffffff;
  915. }
  916. static int __init detect_one_esp(struct scsi_host_template *tpnt,
  917. struct device *dev,
  918. struct sbus_dev *esp_dev,
  919. struct sbus_dev *espdma,
  920. struct sbus_bus *sbus,
  921. int hme)
  922. {
  923. static int instance;
  924. struct Scsi_Host *esp_host = scsi_host_alloc(tpnt, sizeof(struct esp));
  925. struct esp *esp;
  926. if (!esp_host)
  927. return -ENOMEM;
  928. if (hme)
  929. esp_host->max_id = 16;
  930. esp = (struct esp *) esp_host->hostdata;
  931. esp->ehost = esp_host;
  932. esp->sdev = esp_dev;
  933. esp->esp_id = instance;
  934. esp->prom_node = esp_dev->prom_node;
  935. prom_getstring(esp->prom_node, "name", esp->prom_name,
  936. sizeof(esp->prom_name));
  937. if (esp_find_dvma(esp, espdma) < 0)
  938. goto fail_unlink;
  939. if (esp_map_regs(esp, hme) < 0) {
  940. printk("ESP registers unmappable");
  941. goto fail_dvma_release;
  942. }
  943. if (esp_map_cmdarea(esp) < 0) {
  944. printk("ESP DVMA transport area unmappable");
  945. goto fail_unmap_regs;
  946. }
  947. if (esp_register_irq(esp) < 0)
  948. goto fail_unmap_cmdarea;
  949. esp_get_scsi_id(esp);
  950. esp->diff = prom_getbool(esp->prom_node, "differential");
  951. if (esp->diff)
  952. printk("Differential ");
  953. esp_get_clock_params(esp);
  954. esp_get_bursts(esp, espdma);
  955. esp_get_revision(esp);
  956. esp_init_swstate(esp);
  957. esp_bootup_reset(esp);
  958. if (scsi_add_host(esp_host, dev))
  959. goto fail_free_irq;
  960. dev_set_drvdata(&esp_dev->ofdev.dev, esp);
  961. scsi_scan_host(esp_host);
  962. instance++;
  963. return 0;
  964. fail_free_irq:
  965. free_irq(esp->ehost->irq, esp);
  966. fail_unmap_cmdarea:
  967. sbus_free_consistent(esp->sdev, 16,
  968. (void *) esp->esp_command,
  969. esp->esp_command_dvma);
  970. fail_unmap_regs:
  971. sbus_iounmap(esp->eregs, ESP_REG_SIZE);
  972. fail_dvma_release:
  973. esp->dma->allocated = 0;
  974. fail_unlink:
  975. scsi_host_put(esp_host);
  976. return -1;
  977. }
  978. /* Detecting ESP chips on the machine. This is the simple and easy
  979. * version.
  980. */
  981. static int __devexit esp_remove_common(struct esp *esp)
  982. {
  983. unsigned int irq = esp->ehost->irq;
  984. scsi_remove_host(esp->ehost);
  985. ESP_INTSOFF(esp->dregs);
  986. #if 0
  987. esp_reset_dma(esp);
  988. esp_reset_esp(esp);
  989. #endif
  990. free_irq(irq, esp);
  991. sbus_free_consistent(esp->sdev, 16,
  992. (void *) esp->esp_command, esp->esp_command_dvma);
  993. sbus_iounmap(esp->eregs, ESP_REG_SIZE);
  994. esp->dma->allocated = 0;
  995. scsi_host_put(esp->ehost);
  996. return 0;
  997. }
  998. #ifdef CONFIG_SUN4
  999. #include <asm/sun4paddr.h>
  1000. static struct sbus_dev sun4_esp_dev;
  1001. static int __init esp_sun4_probe(struct scsi_host_template *tpnt)
  1002. {
  1003. if (sun4_esp_physaddr) {
  1004. memset(&sun4_esp_dev, 0, sizeof(esp_dev));
  1005. sun4_esp_dev.reg_addrs[0].phys_addr = sun4_esp_physaddr;
  1006. sun4_esp_dev.irqs[0] = 4;
  1007. sun4_esp_dev.resource[0].start = sun4_esp_physaddr;
  1008. sun4_esp_dev.resource[0].end =
  1009. sun4_esp_physaddr + ESP_REG_SIZE - 1;
  1010. sun4_esp_dev.resource[0].flags = IORESOURCE_IO;
  1011. return detect_one_esp(tpnt, NULL,
  1012. &sun4_esp_dev, NULL, NULL, 0);
  1013. }
  1014. return 0;
  1015. }
  1016. static int __devexit esp_sun4_remove(void)
  1017. {
  1018. struct esp *esp = dev_get_drvdata(&dev->dev);
  1019. return esp_remove_common(esp);
  1020. }
  1021. #else /* !CONFIG_SUN4 */
  1022. static int __devinit esp_sbus_probe(struct of_device *dev, const struct of_device_id *match)
  1023. {
  1024. struct sbus_dev *sdev = to_sbus_device(&dev->dev);
  1025. struct device_node *dp = dev->node;
  1026. struct sbus_dev *dma_sdev = NULL;
  1027. int hme = 0;
  1028. if (dp->parent &&
  1029. (!strcmp(dp->parent->name, "espdma") ||
  1030. !strcmp(dp->parent->name, "dma")))
  1031. dma_sdev = sdev->parent;
  1032. else if (!strcmp(dp->name, "SUNW,fas")) {
  1033. dma_sdev = sdev;
  1034. hme = 1;
  1035. }
  1036. return detect_one_esp(match->data, &dev->dev,
  1037. sdev, dma_sdev, sdev->bus, hme);
  1038. }
  1039. static int __devexit esp_sbus_remove(struct of_device *dev)
  1040. {
  1041. struct esp *esp = dev_get_drvdata(&dev->dev);
  1042. return esp_remove_common(esp);
  1043. }
  1044. #endif /* !CONFIG_SUN4 */
  1045. /* The info function will return whatever useful
  1046. * information the developer sees fit. If not provided, then
  1047. * the name field will be used instead.
  1048. */
  1049. static const char *esp_info(struct Scsi_Host *host)
  1050. {
  1051. struct esp *esp;
  1052. esp = (struct esp *) host->hostdata;
  1053. switch (esp->erev) {
  1054. case esp100:
  1055. return "Sparc ESP100 (NCR53C90)";
  1056. case esp100a:
  1057. return "Sparc ESP100A (NCR53C90A)";
  1058. case esp236:
  1059. return "Sparc ESP236";
  1060. case fas236:
  1061. return "Sparc ESP236-FAST";
  1062. case fashme:
  1063. return "Sparc ESP366-HME";
  1064. case fas100a:
  1065. return "Sparc ESP100A-FAST";
  1066. default:
  1067. return "Bogon ESP revision";
  1068. };
  1069. }
  1070. /* From Wolfgang Stanglmeier's NCR scsi driver. */
  1071. struct info_str
  1072. {
  1073. char *buffer;
  1074. int length;
  1075. int offset;
  1076. int pos;
  1077. };
  1078. static void copy_mem_info(struct info_str *info, char *data, int len)
  1079. {
  1080. if (info->pos + len > info->length)
  1081. len = info->length - info->pos;
  1082. if (info->pos + len < info->offset) {
  1083. info->pos += len;
  1084. return;
  1085. }
  1086. if (info->pos < info->offset) {
  1087. data += (info->offset - info->pos);
  1088. len -= (info->offset - info->pos);
  1089. }
  1090. if (len > 0) {
  1091. memcpy(info->buffer + info->pos, data, len);
  1092. info->pos += len;
  1093. }
  1094. }
  1095. static int copy_info(struct info_str *info, char *fmt, ...)
  1096. {
  1097. va_list args;
  1098. char buf[81];
  1099. int len;
  1100. va_start(args, fmt);
  1101. len = vsprintf(buf, fmt, args);
  1102. va_end(args);
  1103. copy_mem_info(info, buf, len);
  1104. return len;
  1105. }
  1106. static int esp_host_info(struct esp *esp, char *ptr, off_t offset, int len)
  1107. {
  1108. struct scsi_device *sdev;
  1109. struct info_str info;
  1110. int i;
  1111. info.buffer = ptr;
  1112. info.length = len;
  1113. info.offset = offset;
  1114. info.pos = 0;
  1115. copy_info(&info, "Sparc ESP Host Adapter:\n");
  1116. copy_info(&info, "\tPROM node\t\t%08x\n", (unsigned int) esp->prom_node);
  1117. copy_info(&info, "\tPROM name\t\t%s\n", esp->prom_name);
  1118. copy_info(&info, "\tESP Model\t\t");
  1119. switch (esp->erev) {
  1120. case esp100:
  1121. copy_info(&info, "ESP100\n");
  1122. break;
  1123. case esp100a:
  1124. copy_info(&info, "ESP100A\n");
  1125. break;
  1126. case esp236:
  1127. copy_info(&info, "ESP236\n");
  1128. break;
  1129. case fas236:
  1130. copy_info(&info, "FAS236\n");
  1131. break;
  1132. case fas100a:
  1133. copy_info(&info, "FAS100A\n");
  1134. break;
  1135. case fast:
  1136. copy_info(&info, "FAST\n");
  1137. break;
  1138. case fashme:
  1139. copy_info(&info, "Happy Meal FAS\n");
  1140. break;
  1141. case espunknown:
  1142. default:
  1143. copy_info(&info, "Unknown!\n");
  1144. break;
  1145. };
  1146. copy_info(&info, "\tDMA Revision\t\t");
  1147. switch (esp->dma->revision) {
  1148. case dvmarev0:
  1149. copy_info(&info, "Rev 0\n");
  1150. break;
  1151. case dvmaesc1:
  1152. copy_info(&info, "ESC Rev 1\n");
  1153. break;
  1154. case dvmarev1:
  1155. copy_info(&info, "Rev 1\n");
  1156. break;
  1157. case dvmarev2:
  1158. copy_info(&info, "Rev 2\n");
  1159. break;
  1160. case dvmarev3:
  1161. copy_info(&info, "Rev 3\n");
  1162. break;
  1163. case dvmarevplus:
  1164. copy_info(&info, "Rev 1+\n");
  1165. break;
  1166. case dvmahme:
  1167. copy_info(&info, "Rev HME/FAS\n");
  1168. break;
  1169. default:
  1170. copy_info(&info, "Unknown!\n");
  1171. break;
  1172. };
  1173. copy_info(&info, "\tLive Targets\t\t[ ");
  1174. for (i = 0; i < 15; i++) {
  1175. if (esp->targets_present & (1 << i))
  1176. copy_info(&info, "%d ", i);
  1177. }
  1178. copy_info(&info, "]\n\n");
  1179. /* Now describe the state of each existing target. */
  1180. copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n");
  1181. shost_for_each_device(sdev, esp->ehost) {
  1182. struct esp_device *esp_dev = sdev->hostdata;
  1183. uint id = sdev->id;
  1184. if (!(esp->targets_present & (1 << id)))
  1185. continue;
  1186. copy_info(&info, "%d\t\t", id);
  1187. copy_info(&info, "%08lx\t", esp->config3[id]);
  1188. copy_info(&info, "[%02lx,%02lx]\t\t\t",
  1189. esp_dev->sync_max_offset,
  1190. esp_dev->sync_min_period);
  1191. copy_info(&info, "%s\t\t",
  1192. esp_dev->disconnect ? "yes" : "no");
  1193. copy_info(&info, "%s\n",
  1194. (esp->config3[id] & ESP_CONFIG3_EWIDE) ? "yes" : "no");
  1195. }
  1196. return info.pos > info.offset? info.pos - info.offset : 0;
  1197. }
  1198. /* ESP proc filesystem code. */
  1199. static int esp_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset,
  1200. int length, int inout)
  1201. {
  1202. struct esp *esp = (struct esp *) host->hostdata;
  1203. if (inout)
  1204. return -EINVAL; /* not yet */
  1205. if (start)
  1206. *start = buffer;
  1207. return esp_host_info(esp, buffer, offset, length);
  1208. }
  1209. static void esp_get_dmabufs(struct esp *esp, struct scsi_cmnd *sp)
  1210. {
  1211. if (sp->use_sg == 0) {
  1212. sp->SCp.this_residual = sp->request_bufflen;
  1213. sp->SCp.buffer = (struct scatterlist *) sp->request_buffer;
  1214. sp->SCp.buffers_residual = 0;
  1215. if (sp->request_bufflen) {
  1216. sp->SCp.have_data_in = sbus_map_single(esp->sdev, sp->SCp.buffer,
  1217. sp->SCp.this_residual,
  1218. sp->sc_data_direction);
  1219. sp->SCp.ptr = (char *) ((unsigned long)sp->SCp.have_data_in);
  1220. } else {
  1221. sp->SCp.ptr = NULL;
  1222. }
  1223. } else {
  1224. sp->SCp.buffer = (struct scatterlist *) sp->buffer;
  1225. sp->SCp.buffers_residual = sbus_map_sg(esp->sdev,
  1226. sp->SCp.buffer,
  1227. sp->use_sg,
  1228. sp->sc_data_direction);
  1229. sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
  1230. sp->SCp.ptr = (char *) ((unsigned long)sg_dma_address(sp->SCp.buffer));
  1231. }
  1232. }
  1233. static void esp_release_dmabufs(struct esp *esp, struct scsi_cmnd *sp)
  1234. {
  1235. if (sp->use_sg) {
  1236. sbus_unmap_sg(esp->sdev, sp->buffer, sp->use_sg,
  1237. sp->sc_data_direction);
  1238. } else if (sp->request_bufflen) {
  1239. sbus_unmap_single(esp->sdev,
  1240. sp->SCp.have_data_in,
  1241. sp->request_bufflen,
  1242. sp->sc_data_direction);
  1243. }
  1244. }
  1245. static void esp_restore_pointers(struct esp *esp, struct scsi_cmnd *sp)
  1246. {
  1247. struct esp_pointers *ep = &esp->data_pointers[sp->device->id];
  1248. sp->SCp.ptr = ep->saved_ptr;
  1249. sp->SCp.buffer = ep->saved_buffer;
  1250. sp->SCp.this_residual = ep->saved_this_residual;
  1251. sp->SCp.buffers_residual = ep->saved_buffers_residual;
  1252. }
  1253. static void esp_save_pointers(struct esp *esp, struct scsi_cmnd *sp)
  1254. {
  1255. struct esp_pointers *ep = &esp->data_pointers[sp->device->id];
  1256. ep->saved_ptr = sp->SCp.ptr;
  1257. ep->saved_buffer = sp->SCp.buffer;
  1258. ep->saved_this_residual = sp->SCp.this_residual;
  1259. ep->saved_buffers_residual = sp->SCp.buffers_residual;
  1260. }
  1261. /* Some rules:
  1262. *
  1263. * 1) Never ever panic while something is live on the bus.
  1264. * If there is to be any chance of syncing the disks this
  1265. * rule is to be obeyed.
  1266. *
  1267. * 2) Any target that causes a foul condition will no longer
  1268. * have synchronous transfers done to it, no questions
  1269. * asked.
  1270. *
  1271. * 3) Keep register accesses to a minimum. Think about some
  1272. * day when we have Xbus machines this is running on and
  1273. * the ESP chip is on the other end of the machine on a
  1274. * different board from the cpu where this is running.
  1275. */
  1276. /* Fire off a command. We assume the bus is free and that the only
  1277. * case where we could see an interrupt is where we have disconnected
  1278. * commands active and they are trying to reselect us.
  1279. */
  1280. static inline void esp_check_cmd(struct esp *esp, struct scsi_cmnd *sp)
  1281. {
  1282. switch (sp->cmd_len) {
  1283. case 6:
  1284. case 10:
  1285. case 12:
  1286. esp->esp_slowcmd = 0;
  1287. break;
  1288. default:
  1289. esp->esp_slowcmd = 1;
  1290. esp->esp_scmdleft = sp->cmd_len;
  1291. esp->esp_scmdp = &sp->cmnd[0];
  1292. break;
  1293. };
  1294. }
  1295. static inline void build_sync_nego_msg(struct esp *esp, int period, int offset)
  1296. {
  1297. esp->cur_msgout[0] = EXTENDED_MESSAGE;
  1298. esp->cur_msgout[1] = 3;
  1299. esp->cur_msgout[2] = EXTENDED_SDTR;
  1300. esp->cur_msgout[3] = period;
  1301. esp->cur_msgout[4] = offset;
  1302. esp->msgout_len = 5;
  1303. }
  1304. /* SIZE is in bits, currently HME only supports 16 bit wide transfers. */
  1305. static inline void build_wide_nego_msg(struct esp *esp, int size)
  1306. {
  1307. esp->cur_msgout[0] = EXTENDED_MESSAGE;
  1308. esp->cur_msgout[1] = 2;
  1309. esp->cur_msgout[2] = EXTENDED_WDTR;
  1310. switch (size) {
  1311. case 32:
  1312. esp->cur_msgout[3] = 2;
  1313. break;
  1314. case 16:
  1315. esp->cur_msgout[3] = 1;
  1316. break;
  1317. case 8:
  1318. default:
  1319. esp->cur_msgout[3] = 0;
  1320. break;
  1321. };
  1322. esp->msgout_len = 4;
  1323. }
  1324. static void esp_exec_cmd(struct esp *esp)
  1325. {
  1326. struct scsi_cmnd *SCptr;
  1327. struct scsi_device *SDptr;
  1328. struct esp_device *esp_dev;
  1329. volatile u8 *cmdp = esp->esp_command;
  1330. u8 the_esp_command;
  1331. int lun, target;
  1332. int i;
  1333. /* Hold off if we have disconnected commands and
  1334. * an IRQ is showing...
  1335. */
  1336. if (esp->disconnected_SC && ESP_IRQ_P(esp->dregs))
  1337. return;
  1338. /* Grab first member of the issue queue. */
  1339. SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC);
  1340. /* Safe to panic here because current_SC is null. */
  1341. if (!SCptr)
  1342. panic("esp: esp_exec_cmd and issue queue is NULL");
  1343. SDptr = SCptr->device;
  1344. esp_dev = SDptr->hostdata;
  1345. lun = SCptr->device->lun;
  1346. target = SCptr->device->id;
  1347. esp->snip = 0;
  1348. esp->msgout_len = 0;
  1349. /* Send it out whole, or piece by piece? The ESP
  1350. * only knows how to automatically send out 6, 10,
  1351. * and 12 byte commands. I used to think that the
  1352. * Linux SCSI code would never throw anything other
  1353. * than that to us, but then again there is the
  1354. * SCSI generic driver which can send us anything.
  1355. */
  1356. esp_check_cmd(esp, SCptr);
  1357. /* If arbitration/selection is successful, the ESP will leave
  1358. * ATN asserted, causing the target to go into message out
  1359. * phase. The ESP will feed the target the identify and then
  1360. * the target can only legally go to one of command,
  1361. * datain/out, status, or message in phase, or stay in message
  1362. * out phase (should we be trying to send a sync negotiation
  1363. * message after the identify). It is not allowed to drop
  1364. * BSY, but some buggy targets do and we check for this
  1365. * condition in the selection complete code. Most of the time
  1366. * we'll make the command bytes available to the ESP and it
  1367. * will not interrupt us until it finishes command phase, we
  1368. * cannot do this for command sizes the ESP does not
  1369. * understand and in this case we'll get interrupted right
  1370. * when the target goes into command phase.
  1371. *
  1372. * It is absolutely _illegal_ in the presence of SCSI-2 devices
  1373. * to use the ESP select w/o ATN command. When SCSI-2 devices are
  1374. * present on the bus we _must_ always go straight to message out
  1375. * phase with an identify message for the target. Being that
  1376. * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2
  1377. * selections should not confuse SCSI-1 we hope.
  1378. */
  1379. if (esp_dev->sync) {
  1380. /* this targets sync is known */
  1381. #ifndef __sparc_v9__
  1382. do_sync_known:
  1383. #endif
  1384. if (esp_dev->disconnect)
  1385. *cmdp++ = IDENTIFY(1, lun);
  1386. else
  1387. *cmdp++ = IDENTIFY(0, lun);
  1388. if (esp->esp_slowcmd) {
  1389. the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
  1390. esp_advance_phase(SCptr, in_slct_stop);
  1391. } else {
  1392. the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
  1393. esp_advance_phase(SCptr, in_slct_norm);
  1394. }
  1395. } else if (!(esp->targets_present & (1<<target)) || !(esp_dev->disconnect)) {
  1396. /* After the bootup SCSI code sends both the
  1397. * TEST_UNIT_READY and INQUIRY commands we want
  1398. * to at least attempt allowing the device to
  1399. * disconnect.
  1400. */
  1401. ESPMISC(("esp: Selecting device for first time. target=%d "
  1402. "lun=%d\n", target, SCptr->device->lun));
  1403. if (!SDptr->borken && !esp_dev->disconnect)
  1404. esp_dev->disconnect = 1;
  1405. *cmdp++ = IDENTIFY(0, lun);
  1406. esp->prevmsgout = NOP;
  1407. esp_advance_phase(SCptr, in_slct_norm);
  1408. the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
  1409. /* Take no chances... */
  1410. esp_dev->sync_max_offset = 0;
  1411. esp_dev->sync_min_period = 0;
  1412. } else {
  1413. /* Sorry, I have had way too many problems with
  1414. * various CDROM devices on ESP. -DaveM
  1415. */
  1416. int cdrom_hwbug_wkaround = 0;
  1417. #ifndef __sparc_v9__
  1418. /* Never allow disconnects or synchronous transfers on
  1419. * SparcStation1 and SparcStation1+. Allowing those
  1420. * to be enabled seems to lockup the machine completely.
  1421. */
  1422. if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS1)) ||
  1423. (idprom->id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) {
  1424. /* But we are nice and allow tapes and removable
  1425. * disks (but not CDROMs) to disconnect.
  1426. */
  1427. if(SDptr->type == TYPE_TAPE ||
  1428. (SDptr->type != TYPE_ROM && SDptr->removable))
  1429. esp_dev->disconnect = 1;
  1430. else
  1431. esp_dev->disconnect = 0;
  1432. esp_dev->sync_max_offset = 0;
  1433. esp_dev->sync_min_period = 0;
  1434. esp_dev->sync = 1;
  1435. esp->snip = 0;
  1436. goto do_sync_known;
  1437. }
  1438. #endif /* !(__sparc_v9__) */
  1439. /* We've talked to this guy before,
  1440. * but never negotiated. Let's try,
  1441. * need to attempt WIDE first, before
  1442. * sync nego, as per SCSI 2 standard.
  1443. */
  1444. if (esp->erev == fashme && !esp_dev->wide) {
  1445. if (!SDptr->borken &&
  1446. SDptr->type != TYPE_ROM &&
  1447. SDptr->removable == 0) {
  1448. build_wide_nego_msg(esp, 16);
  1449. esp_dev->wide = 1;
  1450. esp->wnip = 1;
  1451. goto after_nego_msg_built;
  1452. } else {
  1453. esp_dev->wide = 1;
  1454. /* Fall through and try sync. */
  1455. }
  1456. }
  1457. if (!SDptr->borken) {
  1458. if ((SDptr->type == TYPE_ROM)) {
  1459. /* Nice try sucker... */
  1460. ESPMISC(("esp%d: Disabling sync for buggy "
  1461. "CDROM.\n", esp->esp_id));
  1462. cdrom_hwbug_wkaround = 1;
  1463. build_sync_nego_msg(esp, 0, 0);
  1464. } else if (SDptr->removable != 0) {
  1465. ESPMISC(("esp%d: Not negotiating sync/wide but "
  1466. "allowing disconnect for removable media.\n",
  1467. esp->esp_id));
  1468. build_sync_nego_msg(esp, 0, 0);
  1469. } else {
  1470. build_sync_nego_msg(esp, esp->sync_defp, 15);
  1471. }
  1472. } else {
  1473. build_sync_nego_msg(esp, 0, 0);
  1474. }
  1475. esp_dev->sync = 1;
  1476. esp->snip = 1;
  1477. after_nego_msg_built:
  1478. /* A fix for broken SCSI1 targets, when they disconnect
  1479. * they lock up the bus and confuse ESP. So disallow
  1480. * disconnects for SCSI1 targets for now until we
  1481. * find a better fix.
  1482. *
  1483. * Addendum: This is funny, I figured out what was going
  1484. * on. The blotzed SCSI1 target would disconnect,
  1485. * one of the other SCSI2 targets or both would be
  1486. * disconnected as well. The SCSI1 target would
  1487. * stay disconnected long enough that we start
  1488. * up a command on one of the SCSI2 targets. As
  1489. * the ESP is arbitrating for the bus the SCSI1
  1490. * target begins to arbitrate as well to reselect
  1491. * the ESP. The SCSI1 target refuses to drop it's
  1492. * ID bit on the data bus even though the ESP is
  1493. * at ID 7 and is the obvious winner for any
  1494. * arbitration. The ESP is a poor sport and refuses
  1495. * to lose arbitration, it will continue indefinitely
  1496. * trying to arbitrate for the bus and can only be
  1497. * stopped via a chip reset or SCSI bus reset.
  1498. * Therefore _no_ disconnects for SCSI1 targets
  1499. * thank you very much. ;-)
  1500. */
  1501. if(((SDptr->scsi_level < 3) &&
  1502. (SDptr->type != TYPE_TAPE) &&
  1503. SDptr->removable == 0) ||
  1504. cdrom_hwbug_wkaround || SDptr->borken) {
  1505. ESPMISC((KERN_INFO "esp%d: Disabling DISCONNECT for target %d "
  1506. "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
  1507. esp_dev->disconnect = 0;
  1508. *cmdp++ = IDENTIFY(0, lun);
  1509. } else {
  1510. *cmdp++ = IDENTIFY(1, lun);
  1511. }
  1512. /* ESP fifo is only so big...
  1513. * Make this look like a slow command.
  1514. */
  1515. esp->esp_slowcmd = 1;
  1516. esp->esp_scmdleft = SCptr->cmd_len;
  1517. esp->esp_scmdp = &SCptr->cmnd[0];
  1518. the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
  1519. esp_advance_phase(SCptr, in_slct_msg);
  1520. }
  1521. if (!esp->esp_slowcmd)
  1522. for (i = 0; i < SCptr->cmd_len; i++)
  1523. *cmdp++ = SCptr->cmnd[i];
  1524. /* HME sucks... */
  1525. if (esp->erev == fashme)
  1526. sbus_writeb((target & 0xf) | (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT),
  1527. esp->eregs + ESP_BUSID);
  1528. else
  1529. sbus_writeb(target & 7, esp->eregs + ESP_BUSID);
  1530. if (esp->prev_soff != esp_dev->sync_max_offset ||
  1531. esp->prev_stp != esp_dev->sync_min_period ||
  1532. (esp->erev > esp100a &&
  1533. esp->prev_cfg3 != esp->config3[target])) {
  1534. esp->prev_soff = esp_dev->sync_max_offset;
  1535. esp->prev_stp = esp_dev->sync_min_period;
  1536. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  1537. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  1538. if (esp->erev > esp100a) {
  1539. esp->prev_cfg3 = esp->config3[target];
  1540. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  1541. }
  1542. }
  1543. i = (cmdp - esp->esp_command);
  1544. if (esp->erev == fashme) {
  1545. esp_cmd(esp, ESP_CMD_FLUSH); /* Grrr! */
  1546. /* Set up the DMA and HME counters */
  1547. sbus_writeb(i, esp->eregs + ESP_TCLOW);
  1548. sbus_writeb(0, esp->eregs + ESP_TCMED);
  1549. sbus_writeb(0, esp->eregs + FAS_RLO);
  1550. sbus_writeb(0, esp->eregs + FAS_RHI);
  1551. esp_cmd(esp, the_esp_command);
  1552. /* Talk about touchy hardware... */
  1553. esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
  1554. (DMA_SCSI_DISAB | DMA_ENABLE)) &
  1555. ~(DMA_ST_WRITE));
  1556. sbus_writel(16, esp->dregs + DMA_COUNT);
  1557. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  1558. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  1559. } else {
  1560. u32 tmp;
  1561. /* Set up the DMA and ESP counters */
  1562. sbus_writeb(i, esp->eregs + ESP_TCLOW);
  1563. sbus_writeb(0, esp->eregs + ESP_TCMED);
  1564. tmp = sbus_readl(esp->dregs + DMA_CSR);
  1565. tmp &= ~DMA_ST_WRITE;
  1566. tmp |= DMA_ENABLE;
  1567. sbus_writel(tmp, esp->dregs + DMA_CSR);
  1568. if (esp->dma->revision == dvmaesc1) {
  1569. if (i) /* Workaround ESC gate array SBUS rerun bug. */
  1570. sbus_writel(PAGE_SIZE, esp->dregs + DMA_COUNT);
  1571. }
  1572. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  1573. /* Tell ESP to "go". */
  1574. esp_cmd(esp, the_esp_command);
  1575. }
  1576. }
  1577. /* Queue a SCSI command delivered from the mid-level Linux SCSI code. */
  1578. static int esp_queue(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  1579. {
  1580. struct esp *esp;
  1581. /* Set up func ptr and initial driver cmd-phase. */
  1582. SCpnt->scsi_done = done;
  1583. SCpnt->SCp.phase = not_issued;
  1584. /* We use the scratch area. */
  1585. ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->device->id, SCpnt->device->lun));
  1586. ESPDISC(("N<%02x,%02x>", SCpnt->device->id, SCpnt->device->lun));
  1587. esp = (struct esp *) SCpnt->device->host->hostdata;
  1588. esp_get_dmabufs(esp, SCpnt);
  1589. esp_save_pointers(esp, SCpnt); /* FIXME for tag queueing */
  1590. SCpnt->SCp.Status = CHECK_CONDITION;
  1591. SCpnt->SCp.Message = 0xff;
  1592. SCpnt->SCp.sent_command = 0;
  1593. /* Place into our queue. */
  1594. if (SCpnt->cmnd[0] == REQUEST_SENSE) {
  1595. ESPQUEUE(("RQSENSE\n"));
  1596. prepend_SC(&esp->issue_SC, SCpnt);
  1597. } else {
  1598. ESPQUEUE(("\n"));
  1599. append_SC(&esp->issue_SC, SCpnt);
  1600. }
  1601. /* Run it now if we can. */
  1602. if (!esp->current_SC && !esp->resetting_bus)
  1603. esp_exec_cmd(esp);
  1604. return 0;
  1605. }
  1606. /* Dump driver state. */
  1607. static void esp_dump_cmd(struct scsi_cmnd *SCptr)
  1608. {
  1609. ESPLOG(("[tgt<%02x> lun<%02x> "
  1610. "pphase<%s> cphase<%s>]",
  1611. SCptr->device->id, SCptr->device->lun,
  1612. phase_string(SCptr->SCp.sent_command),
  1613. phase_string(SCptr->SCp.phase)));
  1614. }
  1615. static void esp_dump_state(struct esp *esp)
  1616. {
  1617. struct scsi_cmnd *SCptr = esp->current_SC;
  1618. #ifdef DEBUG_ESP_CMDS
  1619. int i;
  1620. #endif
  1621. ESPLOG(("esp%d: dumping state\n", esp->esp_id));
  1622. ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n",
  1623. esp->esp_id,
  1624. sbus_readl(esp->dregs + DMA_CSR),
  1625. sbus_readl(esp->dregs + DMA_ADDR)));
  1626. ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
  1627. esp->esp_id, esp->sreg, esp->seqreg, esp->ireg));
  1628. ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
  1629. esp->esp_id,
  1630. sbus_readb(esp->eregs + ESP_STATUS),
  1631. sbus_readb(esp->eregs + ESP_SSTEP),
  1632. sbus_readb(esp->eregs + ESP_INTRPT)));
  1633. #ifdef DEBUG_ESP_CMDS
  1634. printk("esp%d: last ESP cmds [", esp->esp_id);
  1635. i = (esp->espcmdent - 1) & 31;
  1636. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1637. i = (i - 1) & 31;
  1638. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1639. i = (i - 1) & 31;
  1640. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1641. i = (i - 1) & 31;
  1642. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1643. printk("]\n");
  1644. #endif /* (DEBUG_ESP_CMDS) */
  1645. if (SCptr) {
  1646. ESPLOG(("esp%d: current command ", esp->esp_id));
  1647. esp_dump_cmd(SCptr);
  1648. }
  1649. ESPLOG(("\n"));
  1650. SCptr = esp->disconnected_SC;
  1651. ESPLOG(("esp%d: disconnected ", esp->esp_id));
  1652. while (SCptr) {
  1653. esp_dump_cmd(SCptr);
  1654. SCptr = (struct scsi_cmnd *) SCptr->host_scribble;
  1655. }
  1656. ESPLOG(("\n"));
  1657. }
  1658. /* Abort a command. The host_lock is acquired by caller. */
  1659. static int esp_abort(struct scsi_cmnd *SCptr)
  1660. {
  1661. struct esp *esp = (struct esp *) SCptr->device->host->hostdata;
  1662. int don;
  1663. ESPLOG(("esp%d: Aborting command\n", esp->esp_id));
  1664. esp_dump_state(esp);
  1665. /* Wheee, if this is the current command on the bus, the
  1666. * best we can do is assert ATN and wait for msgout phase.
  1667. * This should even fix a hung SCSI bus when we lose state
  1668. * in the driver and timeout because the eventual phase change
  1669. * will cause the ESP to (eventually) give an interrupt.
  1670. */
  1671. if (esp->current_SC == SCptr) {
  1672. esp->cur_msgout[0] = ABORT;
  1673. esp->msgout_len = 1;
  1674. esp->msgout_ctr = 0;
  1675. esp_cmd(esp, ESP_CMD_SATN);
  1676. return SUCCESS;
  1677. }
  1678. /* If it is still in the issue queue then we can safely
  1679. * call the completion routine and report abort success.
  1680. */
  1681. don = (sbus_readl(esp->dregs + DMA_CSR) & DMA_INT_ENAB);
  1682. if (don) {
  1683. ESP_INTSOFF(esp->dregs);
  1684. }
  1685. if (esp->issue_SC) {
  1686. struct scsi_cmnd **prev, *this;
  1687. for (prev = (&esp->issue_SC), this = esp->issue_SC;
  1688. this != NULL;
  1689. prev = (struct scsi_cmnd **) &(this->host_scribble),
  1690. this = (struct scsi_cmnd *) this->host_scribble) {
  1691. if (this == SCptr) {
  1692. *prev = (struct scsi_cmnd *) this->host_scribble;
  1693. this->host_scribble = NULL;
  1694. esp_release_dmabufs(esp, this);
  1695. this->result = DID_ABORT << 16;
  1696. this->scsi_done(this);
  1697. if (don)
  1698. ESP_INTSON(esp->dregs);
  1699. return SUCCESS;
  1700. }
  1701. }
  1702. }
  1703. /* Yuck, the command to abort is disconnected, it is not
  1704. * worth trying to abort it now if something else is live
  1705. * on the bus at this time. So, we let the SCSI code wait
  1706. * a little bit and try again later.
  1707. */
  1708. if (esp->current_SC) {
  1709. if (don)
  1710. ESP_INTSON(esp->dregs);
  1711. return FAILED;
  1712. }
  1713. /* It's disconnected, we have to reconnect to re-establish
  1714. * the nexus and tell the device to abort. However, we really
  1715. * cannot 'reconnect' per se. Don't try to be fancy, just
  1716. * indicate failure, which causes our caller to reset the whole
  1717. * bus.
  1718. */
  1719. if (don)
  1720. ESP_INTSON(esp->dregs);
  1721. return FAILED;
  1722. }
  1723. /* We've sent ESP_CMD_RS to the ESP, the interrupt had just
  1724. * arrived indicating the end of the SCSI bus reset. Our job
  1725. * is to clean out the command queues and begin re-execution
  1726. * of SCSI commands once more.
  1727. */
  1728. static int esp_finish_reset(struct esp *esp)
  1729. {
  1730. struct scsi_cmnd *sp = esp->current_SC;
  1731. /* Clean up currently executing command, if any. */
  1732. if (sp != NULL) {
  1733. esp->current_SC = NULL;
  1734. esp_release_dmabufs(esp, sp);
  1735. sp->result = (DID_RESET << 16);
  1736. sp->scsi_done(sp);
  1737. }
  1738. /* Clean up disconnected queue, they have been invalidated
  1739. * by the bus reset.
  1740. */
  1741. if (esp->disconnected_SC) {
  1742. while ((sp = remove_first_SC(&esp->disconnected_SC)) != NULL) {
  1743. esp_release_dmabufs(esp, sp);
  1744. sp->result = (DID_RESET << 16);
  1745. sp->scsi_done(sp);
  1746. }
  1747. }
  1748. /* SCSI bus reset is complete. */
  1749. esp->resetting_bus = 0;
  1750. wake_up(&esp->reset_queue);
  1751. /* Ok, now it is safe to get commands going once more. */
  1752. if (esp->issue_SC)
  1753. esp_exec_cmd(esp);
  1754. return do_intr_end;
  1755. }
  1756. static int esp_do_resetbus(struct esp *esp)
  1757. {
  1758. ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id));
  1759. esp->resetting_bus = 1;
  1760. esp_cmd(esp, ESP_CMD_RS);
  1761. return do_intr_end;
  1762. }
  1763. /* Reset ESP chip, reset hanging bus, then kill active and
  1764. * disconnected commands for targets without soft reset.
  1765. *
  1766. * The host_lock is acquired by caller.
  1767. */
  1768. static int esp_reset(struct scsi_cmnd *SCptr)
  1769. {
  1770. struct esp *esp = (struct esp *) SCptr->device->host->hostdata;
  1771. spin_lock_irq(esp->ehost->host_lock);
  1772. (void) esp_do_resetbus(esp);
  1773. spin_unlock_irq(esp->ehost->host_lock);
  1774. wait_event(esp->reset_queue, (esp->resetting_bus == 0));
  1775. return SUCCESS;
  1776. }
  1777. /* Internal ESP done function. */
  1778. static void esp_done(struct esp *esp, int error)
  1779. {
  1780. struct scsi_cmnd *done_SC = esp->current_SC;
  1781. esp->current_SC = NULL;
  1782. esp_release_dmabufs(esp, done_SC);
  1783. done_SC->result = error;
  1784. done_SC->scsi_done(done_SC);
  1785. /* Bus is free, issue any commands in the queue. */
  1786. if (esp->issue_SC && !esp->current_SC)
  1787. esp_exec_cmd(esp);
  1788. }
  1789. /* Wheee, ESP interrupt engine. */
  1790. /* Forward declarations. */
  1791. static int esp_do_phase_determine(struct esp *esp);
  1792. static int esp_do_data_finale(struct esp *esp);
  1793. static int esp_select_complete(struct esp *esp);
  1794. static int esp_do_status(struct esp *esp);
  1795. static int esp_do_msgin(struct esp *esp);
  1796. static int esp_do_msgindone(struct esp *esp);
  1797. static int esp_do_msgout(struct esp *esp);
  1798. static int esp_do_cmdbegin(struct esp *esp);
  1799. #define sreg_datainp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DIP)
  1800. #define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP)
  1801. /* Read any bytes found in the FAS366 fifo, storing them into
  1802. * the ESP driver software state structure.
  1803. */
  1804. static void hme_fifo_read(struct esp *esp)
  1805. {
  1806. u8 count = 0;
  1807. u8 status = esp->sreg;
  1808. /* Cannot safely frob the fifo for these following cases, but
  1809. * we must always read the fifo when the reselect interrupt
  1810. * is pending.
  1811. */
  1812. if (((esp->ireg & ESP_INTR_RSEL) == 0) &&
  1813. (sreg_datainp(status) ||
  1814. sreg_dataoutp(status) ||
  1815. (esp->current_SC &&
  1816. esp->current_SC->SCp.phase == in_data_done))) {
  1817. ESPHME(("<wkaround_skipped>"));
  1818. } else {
  1819. unsigned long fcnt = sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES;
  1820. /* The HME stores bytes in multiples of 2 in the fifo. */
  1821. ESPHME(("hme_fifo[fcnt=%d", (int)fcnt));
  1822. while (fcnt) {
  1823. esp->hme_fifo_workaround_buffer[count++] =
  1824. sbus_readb(esp->eregs + ESP_FDATA);
  1825. esp->hme_fifo_workaround_buffer[count++] =
  1826. sbus_readb(esp->eregs + ESP_FDATA);
  1827. ESPHME(("<%02x,%02x>", esp->hme_fifo_workaround_buffer[count-2], esp->hme_fifo_workaround_buffer[count-1]));
  1828. fcnt--;
  1829. }
  1830. if (sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_F1BYTE) {
  1831. ESPHME(("<poke_byte>"));
  1832. sbus_writeb(0, esp->eregs + ESP_FDATA);
  1833. esp->hme_fifo_workaround_buffer[count++] =
  1834. sbus_readb(esp->eregs + ESP_FDATA);
  1835. ESPHME(("<%02x,0x00>", esp->hme_fifo_workaround_buffer[count-1]));
  1836. ESPHME(("CMD_FLUSH"));
  1837. esp_cmd(esp, ESP_CMD_FLUSH);
  1838. } else {
  1839. ESPHME(("no_xtra_byte"));
  1840. }
  1841. }
  1842. ESPHME(("wkarnd_cnt=%d]", (int)count));
  1843. esp->hme_fifo_workaround_count = count;
  1844. }
  1845. static inline void hme_fifo_push(struct esp *esp, u8 *bytes, u8 count)
  1846. {
  1847. esp_cmd(esp, ESP_CMD_FLUSH);
  1848. while (count) {
  1849. u8 tmp = *bytes++;
  1850. sbus_writeb(tmp, esp->eregs + ESP_FDATA);
  1851. sbus_writeb(0, esp->eregs + ESP_FDATA);
  1852. count--;
  1853. }
  1854. }
  1855. /* We try to avoid some interrupts by jumping ahead and see if the ESP
  1856. * has gotten far enough yet. Hence the following.
  1857. */
  1858. static inline int skipahead1(struct esp *esp, struct scsi_cmnd *scp,
  1859. int prev_phase, int new_phase)
  1860. {
  1861. if (scp->SCp.sent_command != prev_phase)
  1862. return 0;
  1863. if (ESP_IRQ_P(esp->dregs)) {
  1864. /* Yes, we are able to save an interrupt. */
  1865. if (esp->erev == fashme)
  1866. esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
  1867. esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
  1868. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
  1869. if (esp->erev == fashme) {
  1870. /* This chip is really losing. */
  1871. ESPHME(("HME["));
  1872. /* Must latch fifo before reading the interrupt
  1873. * register else garbage ends up in the FIFO
  1874. * which confuses the driver utterly.
  1875. * Happy Meal indeed....
  1876. */
  1877. ESPHME(("fifo_workaround]"));
  1878. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1879. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1880. hme_fifo_read(esp);
  1881. }
  1882. if (!(esp->ireg & ESP_INTR_SR))
  1883. return 0;
  1884. else
  1885. return do_reset_complete;
  1886. }
  1887. /* Ho hum, target is taking forever... */
  1888. scp->SCp.sent_command = new_phase; /* so we don't recurse... */
  1889. return do_intr_end;
  1890. }
  1891. static inline int skipahead2(struct esp *esp, struct scsi_cmnd *scp,
  1892. int prev_phase1, int prev_phase2, int new_phase)
  1893. {
  1894. if (scp->SCp.sent_command != prev_phase1 &&
  1895. scp->SCp.sent_command != prev_phase2)
  1896. return 0;
  1897. if (ESP_IRQ_P(esp->dregs)) {
  1898. /* Yes, we are able to save an interrupt. */
  1899. if (esp->erev == fashme)
  1900. esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
  1901. esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
  1902. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
  1903. if (esp->erev == fashme) {
  1904. /* This chip is really losing. */
  1905. ESPHME(("HME["));
  1906. /* Must latch fifo before reading the interrupt
  1907. * register else garbage ends up in the FIFO
  1908. * which confuses the driver utterly.
  1909. * Happy Meal indeed....
  1910. */
  1911. ESPHME(("fifo_workaround]"));
  1912. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1913. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1914. hme_fifo_read(esp);
  1915. }
  1916. if (!(esp->ireg & ESP_INTR_SR))
  1917. return 0;
  1918. else
  1919. return do_reset_complete;
  1920. }
  1921. /* Ho hum, target is taking forever... */
  1922. scp->SCp.sent_command = new_phase; /* so we don't recurse... */
  1923. return do_intr_end;
  1924. }
  1925. /* Now some dma helpers. */
  1926. static void dma_setup(struct esp *esp, __u32 addr, int count, int write)
  1927. {
  1928. u32 nreg = sbus_readl(esp->dregs + DMA_CSR);
  1929. if (write)
  1930. nreg |= DMA_ST_WRITE;
  1931. else
  1932. nreg &= ~(DMA_ST_WRITE);
  1933. nreg |= DMA_ENABLE;
  1934. sbus_writel(nreg, esp->dregs + DMA_CSR);
  1935. if (esp->dma->revision == dvmaesc1) {
  1936. /* This ESC gate array sucks! */
  1937. __u32 src = addr;
  1938. __u32 dest = src + count;
  1939. if (dest & (PAGE_SIZE - 1))
  1940. count = PAGE_ALIGN(count);
  1941. sbus_writel(count, esp->dregs + DMA_COUNT);
  1942. }
  1943. sbus_writel(addr, esp->dregs + DMA_ADDR);
  1944. }
  1945. static void dma_drain(struct esp *esp)
  1946. {
  1947. u32 tmp;
  1948. if (esp->dma->revision == dvmahme)
  1949. return;
  1950. if ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_FIFO_ISDRAIN) {
  1951. switch (esp->dma->revision) {
  1952. default:
  1953. tmp |= DMA_FIFO_STDRAIN;
  1954. sbus_writel(tmp, esp->dregs + DMA_CSR);
  1955. case dvmarev3:
  1956. case dvmaesc1:
  1957. while (sbus_readl(esp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  1958. udelay(1);
  1959. };
  1960. }
  1961. }
  1962. static void dma_invalidate(struct esp *esp)
  1963. {
  1964. u32 tmp;
  1965. if (esp->dma->revision == dvmahme) {
  1966. sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
  1967. esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
  1968. (DMA_PARITY_OFF | DMA_2CLKS |
  1969. DMA_SCSI_DISAB | DMA_INT_ENAB)) &
  1970. ~(DMA_ST_WRITE | DMA_ENABLE));
  1971. sbus_writel(0, esp->dregs + DMA_CSR);
  1972. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  1973. /* This is necessary to avoid having the SCSI channel
  1974. * engine lock up on us.
  1975. */
  1976. sbus_writel(0, esp->dregs + DMA_ADDR);
  1977. } else {
  1978. while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
  1979. udelay(1);
  1980. tmp &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
  1981. tmp |= DMA_FIFO_INV;
  1982. sbus_writel(tmp, esp->dregs + DMA_CSR);
  1983. tmp &= ~DMA_FIFO_INV;
  1984. sbus_writel(tmp, esp->dregs + DMA_CSR);
  1985. }
  1986. }
  1987. static inline void dma_flashclear(struct esp *esp)
  1988. {
  1989. dma_drain(esp);
  1990. dma_invalidate(esp);
  1991. }
  1992. static int dma_can_transfer(struct esp *esp, struct scsi_cmnd *sp)
  1993. {
  1994. __u32 base, end, sz;
  1995. if (esp->dma->revision == dvmarev3) {
  1996. sz = sp->SCp.this_residual;
  1997. if (sz > 0x1000000)
  1998. sz = 0x1000000;
  1999. } else {
  2000. base = ((__u32)((unsigned long)sp->SCp.ptr));
  2001. base &= (0x1000000 - 1);
  2002. end = (base + sp->SCp.this_residual);
  2003. if (end > 0x1000000)
  2004. end = 0x1000000;
  2005. sz = (end - base);
  2006. }
  2007. return sz;
  2008. }
  2009. /* Misc. esp helper macros. */
  2010. #define esp_setcount(__eregs, __cnt, __hme) \
  2011. sbus_writeb(((__cnt)&0xff), (__eregs) + ESP_TCLOW); \
  2012. sbus_writeb((((__cnt)>>8)&0xff), (__eregs) + ESP_TCMED); \
  2013. if (__hme) { \
  2014. sbus_writeb((((__cnt)>>16)&0xff), (__eregs) + FAS_RLO); \
  2015. sbus_writeb(0, (__eregs) + FAS_RHI); \
  2016. }
  2017. #define esp_getcount(__eregs, __hme) \
  2018. ((sbus_readb((__eregs) + ESP_TCLOW)&0xff) | \
  2019. ((sbus_readb((__eregs) + ESP_TCMED)&0xff) << 8) | \
  2020. ((__hme) ? sbus_readb((__eregs) + FAS_RLO) << 16 : 0))
  2021. #define fcount(__esp) \
  2022. (((__esp)->erev == fashme) ? \
  2023. (__esp)->hme_fifo_workaround_count : \
  2024. sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_FBYTES)
  2025. #define fnzero(__esp) \
  2026. (((__esp)->erev == fashme) ? 0 : \
  2027. sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_ONOTZERO)
  2028. /* XXX speculative nops unnecessary when continuing amidst a data phase
  2029. * XXX even on esp100!!! another case of flooding the bus with I/O reg
  2030. * XXX writes...
  2031. */
  2032. #define esp_maybe_nop(__esp) \
  2033. if ((__esp)->erev == esp100) \
  2034. esp_cmd((__esp), ESP_CMD_NULL)
  2035. #define sreg_to_dataphase(__sreg) \
  2036. ((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain)
  2037. /* The ESP100 when in synchronous data phase, can mistake a long final
  2038. * REQ pulse from the target as an extra byte, it places whatever is on
  2039. * the data lines into the fifo. For now, we will assume when this
  2040. * happens that the target is a bit quirky and we don't want to
  2041. * be talking synchronously to it anyways. Regardless, we need to
  2042. * tell the ESP to eat the extraneous byte so that we can proceed
  2043. * to the next phase.
  2044. */
  2045. static int esp100_sync_hwbug(struct esp *esp, struct scsi_cmnd *sp, int fifocnt)
  2046. {
  2047. /* Do not touch this piece of code. */
  2048. if ((!(esp->erev == esp100)) ||
  2049. (!(sreg_datainp((esp->sreg = sbus_readb(esp->eregs + ESP_STATUS))) &&
  2050. !fifocnt) &&
  2051. !(sreg_dataoutp(esp->sreg) && !fnzero(esp)))) {
  2052. if (sp->SCp.phase == in_dataout)
  2053. esp_cmd(esp, ESP_CMD_FLUSH);
  2054. return 0;
  2055. } else {
  2056. /* Async mode for this guy. */
  2057. build_sync_nego_msg(esp, 0, 0);
  2058. /* Ack the bogus byte, but set ATN first. */
  2059. esp_cmd(esp, ESP_CMD_SATN);
  2060. esp_cmd(esp, ESP_CMD_MOK);
  2061. return 1;
  2062. }
  2063. }
  2064. /* This closes the window during a selection with a reselect pending, because
  2065. * we use DMA for the selection process the FIFO should hold the correct
  2066. * contents if we get reselected during this process. So we just need to
  2067. * ack the possible illegal cmd interrupt pending on the esp100.
  2068. */
  2069. static inline int esp100_reconnect_hwbug(struct esp *esp)
  2070. {
  2071. u8 tmp;
  2072. if (esp->erev != esp100)
  2073. return 0;
  2074. tmp = sbus_readb(esp->eregs + ESP_INTRPT);
  2075. if (tmp & ESP_INTR_SR)
  2076. return 1;
  2077. return 0;
  2078. }
  2079. /* This verifies the BUSID bits during a reselection so that we know which
  2080. * target is talking to us.
  2081. */
  2082. static inline int reconnect_target(struct esp *esp)
  2083. {
  2084. int it, me = esp->scsi_id_mask, targ = 0;
  2085. if (2 != fcount(esp))
  2086. return -1;
  2087. if (esp->erev == fashme) {
  2088. /* HME does not latch it's own BUS ID bits during
  2089. * a reselection. Also the target number is given
  2090. * as an unsigned char, not as a sole bit number
  2091. * like the other ESP's do.
  2092. * Happy Meal indeed....
  2093. */
  2094. targ = esp->hme_fifo_workaround_buffer[0];
  2095. } else {
  2096. it = sbus_readb(esp->eregs + ESP_FDATA);
  2097. if (!(it & me))
  2098. return -1;
  2099. it &= ~me;
  2100. if (it & (it - 1))
  2101. return -1;
  2102. while (!(it & 1))
  2103. targ++, it >>= 1;
  2104. }
  2105. return targ;
  2106. }
  2107. /* This verifies the identify from the target so that we know which lun is
  2108. * being reconnected.
  2109. */
  2110. static inline int reconnect_lun(struct esp *esp)
  2111. {
  2112. int lun;
  2113. if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP)
  2114. return -1;
  2115. if (esp->erev == fashme)
  2116. lun = esp->hme_fifo_workaround_buffer[1];
  2117. else
  2118. lun = sbus_readb(esp->eregs + ESP_FDATA);
  2119. /* Yes, you read this correctly. We report lun of zero
  2120. * if we see parity error. ESP reports parity error for
  2121. * the lun byte, and this is the only way to hope to recover
  2122. * because the target is connected.
  2123. */
  2124. if (esp->sreg & ESP_STAT_PERR)
  2125. return 0;
  2126. /* Check for illegal bits being set in the lun. */
  2127. if ((lun & 0x40) || !(lun & 0x80))
  2128. return -1;
  2129. return lun & 7;
  2130. }
  2131. /* This puts the driver in a state where it can revitalize a command that
  2132. * is being continued due to reselection.
  2133. */
  2134. static inline void esp_connect(struct esp *esp, struct scsi_cmnd *sp)
  2135. {
  2136. struct esp_device *esp_dev = sp->device->hostdata;
  2137. if (esp->prev_soff != esp_dev->sync_max_offset ||
  2138. esp->prev_stp != esp_dev->sync_min_period ||
  2139. (esp->erev > esp100a &&
  2140. esp->prev_cfg3 != esp->config3[sp->device->id])) {
  2141. esp->prev_soff = esp_dev->sync_max_offset;
  2142. esp->prev_stp = esp_dev->sync_min_period;
  2143. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  2144. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  2145. if (esp->erev > esp100a) {
  2146. esp->prev_cfg3 = esp->config3[sp->device->id];
  2147. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  2148. }
  2149. }
  2150. esp->current_SC = sp;
  2151. }
  2152. /* This will place the current working command back into the issue queue
  2153. * if we are to receive a reselection amidst a selection attempt.
  2154. */
  2155. static inline void esp_reconnect(struct esp *esp, struct scsi_cmnd *sp)
  2156. {
  2157. if (!esp->disconnected_SC)
  2158. ESPLOG(("esp%d: Weird, being reselected but disconnected "
  2159. "command queue is empty.\n", esp->esp_id));
  2160. esp->snip = 0;
  2161. esp->current_SC = NULL;
  2162. sp->SCp.phase = not_issued;
  2163. append_SC(&esp->issue_SC, sp);
  2164. }
  2165. /* Begin message in phase. */
  2166. static int esp_do_msgin(struct esp *esp)
  2167. {
  2168. /* Must be very careful with the fifo on the HME */
  2169. if ((esp->erev != fashme) ||
  2170. !(sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_FEMPTY))
  2171. esp_cmd(esp, ESP_CMD_FLUSH);
  2172. esp_maybe_nop(esp);
  2173. esp_cmd(esp, ESP_CMD_TI);
  2174. esp->msgin_len = 1;
  2175. esp->msgin_ctr = 0;
  2176. esp_advance_phase(esp->current_SC, in_msgindone);
  2177. return do_work_bus;
  2178. }
  2179. /* This uses various DMA csr fields and the fifo flags count value to
  2180. * determine how many bytes were successfully sent/received by the ESP.
  2181. */
  2182. static inline int esp_bytes_sent(struct esp *esp, int fifo_count)
  2183. {
  2184. int rval = sbus_readl(esp->dregs + DMA_ADDR) - esp->esp_command_dvma;
  2185. if (esp->dma->revision == dvmarev1)
  2186. rval -= (4 - ((sbus_readl(esp->dregs + DMA_CSR) & DMA_READ_AHEAD)>>11));
  2187. return rval - fifo_count;
  2188. }
  2189. static inline void advance_sg(struct scsi_cmnd *sp)
  2190. {
  2191. ++sp->SCp.buffer;
  2192. --sp->SCp.buffers_residual;
  2193. sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
  2194. sp->SCp.ptr = (char *)((unsigned long)sg_dma_address(sp->SCp.buffer));
  2195. }
  2196. /* Please note that the way I've coded these routines is that I _always_
  2197. * check for a disconnect during any and all information transfer
  2198. * phases. The SCSI standard states that the target _can_ cause a BUS
  2199. * FREE condition by dropping all MSG/CD/IO/BSY signals. Also note
  2200. * that during information transfer phases the target controls every
  2201. * change in phase, the only thing the initiator can do is "ask" for
  2202. * a message out phase by driving ATN true. The target can, and sometimes
  2203. * will, completely ignore this request so we cannot assume anything when
  2204. * we try to force a message out phase to abort/reset a target. Most of
  2205. * the time the target will eventually be nice and go to message out, so
  2206. * we may have to hold on to our state about what we want to tell the target
  2207. * for some period of time.
  2208. */
  2209. /* I think I have things working here correctly. Even partial transfers
  2210. * within a buffer or sub-buffer should not upset us at all no matter
  2211. * how bad the target and/or ESP fucks things up.
  2212. */
  2213. static int esp_do_data(struct esp *esp)
  2214. {
  2215. struct scsi_cmnd *SCptr = esp->current_SC;
  2216. int thisphase, hmuch;
  2217. ESPDATA(("esp_do_data: "));
  2218. esp_maybe_nop(esp);
  2219. thisphase = sreg_to_dataphase(esp->sreg);
  2220. esp_advance_phase(SCptr, thisphase);
  2221. ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT"));
  2222. hmuch = dma_can_transfer(esp, SCptr);
  2223. if (hmuch > (64 * 1024) && (esp->erev != fashme))
  2224. hmuch = (64 * 1024);
  2225. ESPDATA(("hmuch<%d> ", hmuch));
  2226. esp->current_transfer_size = hmuch;
  2227. if (esp->erev == fashme) {
  2228. u32 tmp = esp->prev_hme_dmacsr;
  2229. /* Always set the ESP count registers first. */
  2230. esp_setcount(esp->eregs, hmuch, 1);
  2231. /* Get the DMA csr computed. */
  2232. tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
  2233. if (thisphase == in_datain)
  2234. tmp |= DMA_ST_WRITE;
  2235. else
  2236. tmp &= ~(DMA_ST_WRITE);
  2237. esp->prev_hme_dmacsr = tmp;
  2238. ESPDATA(("DMA|TI --> do_intr_end\n"));
  2239. if (thisphase == in_datain) {
  2240. sbus_writel(hmuch, esp->dregs + DMA_COUNT);
  2241. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  2242. } else {
  2243. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  2244. sbus_writel(hmuch, esp->dregs + DMA_COUNT);
  2245. }
  2246. sbus_writel((__u32)((unsigned long)SCptr->SCp.ptr), esp->dregs+DMA_ADDR);
  2247. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  2248. } else {
  2249. esp_setcount(esp->eregs, hmuch, 0);
  2250. dma_setup(esp, ((__u32)((unsigned long)SCptr->SCp.ptr)),
  2251. hmuch, (thisphase == in_datain));
  2252. ESPDATA(("DMA|TI --> do_intr_end\n"));
  2253. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  2254. }
  2255. return do_intr_end;
  2256. }
  2257. /* See how successful the data transfer was. */
  2258. static int esp_do_data_finale(struct esp *esp)
  2259. {
  2260. struct scsi_cmnd *SCptr = esp->current_SC;
  2261. struct esp_device *esp_dev = SCptr->device->hostdata;
  2262. int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0;
  2263. ESPDATA(("esp_do_data_finale: "));
  2264. if (SCptr->SCp.phase == in_datain) {
  2265. if (esp->sreg & ESP_STAT_PERR) {
  2266. /* Yuck, parity error. The ESP asserts ATN
  2267. * so that we can go to message out phase
  2268. * immediately and inform the target that
  2269. * something bad happened.
  2270. */
  2271. ESPLOG(("esp%d: data bad parity detected.\n",
  2272. esp->esp_id));
  2273. esp->cur_msgout[0] = INITIATOR_ERROR;
  2274. esp->msgout_len = 1;
  2275. }
  2276. dma_drain(esp);
  2277. }
  2278. dma_invalidate(esp);
  2279. /* This could happen for the above parity error case. */
  2280. if (esp->ireg != ESP_INTR_BSERV) {
  2281. /* Please go to msgout phase, please please please... */
  2282. ESPLOG(("esp%d: !BSERV after data, probably to msgout\n",
  2283. esp->esp_id));
  2284. return esp_do_phase_determine(esp);
  2285. }
  2286. /* Check for partial transfers and other horrible events.
  2287. * Note, here we read the real fifo flags register even
  2288. * on HME broken adapters because we skip the HME fifo
  2289. * workaround code in esp_handle() if we are doing data
  2290. * phase things. We don't want to fuck directly with
  2291. * the fifo like that, especially if doing synchronous
  2292. * transfers! Also, will need to double the count on
  2293. * HME if we are doing wide transfers, as the HME fifo
  2294. * will move and count 16-bit quantities during wide data.
  2295. * SMCC _and_ Qlogic can both bite me.
  2296. */
  2297. fifocnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
  2298. if (esp->erev != fashme)
  2299. ecount = esp_getcount(esp->eregs, 0);
  2300. bytes_sent = esp->current_transfer_size;
  2301. ESPDATA(("trans_sz(%d), ", bytes_sent));
  2302. if (esp->erev == fashme) {
  2303. if (!(esp->sreg & ESP_STAT_TCNT)) {
  2304. ecount = esp_getcount(esp->eregs, 1);
  2305. bytes_sent -= ecount;
  2306. }
  2307. /* Always subtract any cruft remaining in the FIFO. */
  2308. if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
  2309. fifocnt <<= 1;
  2310. if (SCptr->SCp.phase == in_dataout)
  2311. bytes_sent -= fifocnt;
  2312. /* I have an IBM disk which exhibits the following
  2313. * behavior during writes to it. It disconnects in
  2314. * the middle of a partial transfer, the current sglist
  2315. * buffer is 1024 bytes, the disk stops data transfer
  2316. * at 512 bytes.
  2317. *
  2318. * However the FAS366 reports that 32 more bytes were
  2319. * transferred than really were. This is precisely
  2320. * the size of a fully loaded FIFO in wide scsi mode.
  2321. * The FIFO state recorded indicates that it is empty.
  2322. *
  2323. * I have no idea if this is a bug in the FAS366 chip
  2324. * or a bug in the firmware on this IBM disk. In any
  2325. * event the following seems to be a good workaround. -DaveM
  2326. */
  2327. if (bytes_sent != esp->current_transfer_size &&
  2328. SCptr->SCp.phase == in_dataout) {
  2329. int mask = (64 - 1);
  2330. if ((esp->prev_cfg3 & ESP_CONFIG3_EWIDE) == 0)
  2331. mask >>= 1;
  2332. if (bytes_sent & mask)
  2333. bytes_sent -= (bytes_sent & mask);
  2334. }
  2335. } else {
  2336. if (!(esp->sreg & ESP_STAT_TCNT))
  2337. bytes_sent -= ecount;
  2338. if (SCptr->SCp.phase == in_dataout)
  2339. bytes_sent -= fifocnt;
  2340. }
  2341. ESPDATA(("bytes_sent(%d), ", bytes_sent));
  2342. /* If we were in synchronous mode, check for peculiarities. */
  2343. if (esp->erev == fashme) {
  2344. if (esp_dev->sync_max_offset) {
  2345. if (SCptr->SCp.phase == in_dataout)
  2346. esp_cmd(esp, ESP_CMD_FLUSH);
  2347. } else {
  2348. esp_cmd(esp, ESP_CMD_FLUSH);
  2349. }
  2350. } else {
  2351. if (esp_dev->sync_max_offset)
  2352. bogus_data = esp100_sync_hwbug(esp, SCptr, fifocnt);
  2353. else
  2354. esp_cmd(esp, ESP_CMD_FLUSH);
  2355. }
  2356. /* Until we are sure of what has happened, we are certainly
  2357. * in the dark.
  2358. */
  2359. esp_advance_phase(SCptr, in_the_dark);
  2360. if (bytes_sent < 0) {
  2361. /* I've seen this happen due to lost state in this
  2362. * driver. No idea why it happened, but allowing
  2363. * this value to be negative caused things to
  2364. * lock up. This allows greater chance of recovery.
  2365. * In fact every time I've seen this, it has been
  2366. * a driver bug without question.
  2367. */
  2368. ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id));
  2369. ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n",
  2370. esp->esp_id,
  2371. esp->current_transfer_size, fifocnt, ecount));
  2372. ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n",
  2373. esp->esp_id,
  2374. SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual));
  2375. ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id,
  2376. SCptr->device->id));
  2377. SCptr->device->borken = 1;
  2378. esp_dev->sync = 0;
  2379. bytes_sent = 0;
  2380. }
  2381. /* Update the state of our transfer. */
  2382. SCptr->SCp.ptr += bytes_sent;
  2383. SCptr->SCp.this_residual -= bytes_sent;
  2384. if (SCptr->SCp.this_residual < 0) {
  2385. /* shit */
  2386. ESPLOG(("esp%d: Data transfer overrun.\n", esp->esp_id));
  2387. SCptr->SCp.this_residual = 0;
  2388. }
  2389. /* Maybe continue. */
  2390. if (!bogus_data) {
  2391. ESPDATA(("!bogus_data, "));
  2392. /* NO MATTER WHAT, we advance the scatterlist,
  2393. * if the target should decide to disconnect
  2394. * in between scatter chunks (which is common)
  2395. * we could die horribly! I used to have the sg
  2396. * advance occur only if we are going back into
  2397. * (or are staying in) a data phase, you can
  2398. * imagine the hell I went through trying to
  2399. * figure this out.
  2400. */
  2401. if (SCptr->use_sg && !SCptr->SCp.this_residual)
  2402. advance_sg(SCptr);
  2403. if (sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) {
  2404. ESPDATA(("to more data\n"));
  2405. return esp_do_data(esp);
  2406. }
  2407. ESPDATA(("to new phase\n"));
  2408. return esp_do_phase_determine(esp);
  2409. }
  2410. /* Bogus data, just wait for next interrupt. */
  2411. ESPLOG(("esp%d: bogus_data during end of data phase\n",
  2412. esp->esp_id));
  2413. return do_intr_end;
  2414. }
  2415. /* We received a non-good status return at the end of
  2416. * running a SCSI command. This is used to decide if
  2417. * we should clear our synchronous transfer state for
  2418. * such a device when that happens.
  2419. *
  2420. * The idea is that when spinning up a disk or rewinding
  2421. * a tape, we don't want to go into a loop re-negotiating
  2422. * synchronous capabilities over and over.
  2423. */
  2424. static int esp_should_clear_sync(struct scsi_cmnd *sp)
  2425. {
  2426. u8 cmd1 = sp->cmnd[0];
  2427. u8 cmd2 = sp->data_cmnd[0];
  2428. /* These cases are for spinning up a disk and
  2429. * waiting for that spinup to complete.
  2430. */
  2431. if (cmd1 == START_STOP ||
  2432. cmd2 == START_STOP)
  2433. return 0;
  2434. if (cmd1 == TEST_UNIT_READY ||
  2435. cmd2 == TEST_UNIT_READY)
  2436. return 0;
  2437. /* One more special case for SCSI tape drives,
  2438. * this is what is used to probe the device for
  2439. * completion of a rewind or tape load operation.
  2440. */
  2441. if (sp->device->type == TYPE_TAPE) {
  2442. if (cmd1 == MODE_SENSE ||
  2443. cmd2 == MODE_SENSE)
  2444. return 0;
  2445. }
  2446. return 1;
  2447. }
  2448. /* Either a command is completing or a target is dropping off the bus
  2449. * to continue the command in the background so we can do other work.
  2450. */
  2451. static int esp_do_freebus(struct esp *esp)
  2452. {
  2453. struct scsi_cmnd *SCptr = esp->current_SC;
  2454. struct esp_device *esp_dev = SCptr->device->hostdata;
  2455. int rval;
  2456. rval = skipahead2(esp, SCptr, in_status, in_msgindone, in_freeing);
  2457. if (rval)
  2458. return rval;
  2459. if (esp->ireg != ESP_INTR_DC) {
  2460. ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id));
  2461. return do_reset_bus; /* target will not drop BSY... */
  2462. }
  2463. esp->msgout_len = 0;
  2464. esp->prevmsgout = NOP;
  2465. if (esp->prevmsgin == COMMAND_COMPLETE) {
  2466. /* Normal end of nexus. */
  2467. if (esp->disconnected_SC || (esp->erev == fashme))
  2468. esp_cmd(esp, ESP_CMD_ESEL);
  2469. if (SCptr->SCp.Status != GOOD &&
  2470. SCptr->SCp.Status != CONDITION_GOOD &&
  2471. ((1<<SCptr->device->id) & esp->targets_present) &&
  2472. esp_dev->sync &&
  2473. esp_dev->sync_max_offset) {
  2474. /* SCSI standard says that the synchronous capabilities
  2475. * should be renegotiated at this point. Most likely
  2476. * we are about to request sense from this target
  2477. * in which case we want to avoid using sync
  2478. * transfers until we are sure of the current target
  2479. * state.
  2480. */
  2481. ESPMISC(("esp: Status <%d> for target %d lun %d\n",
  2482. SCptr->SCp.Status, SCptr->device->id, SCptr->device->lun));
  2483. /* But don't do this when spinning up a disk at
  2484. * boot time while we poll for completion as it
  2485. * fills up the console with messages. Also, tapes
  2486. * can report not ready many times right after
  2487. * loading up a tape.
  2488. */
  2489. if (esp_should_clear_sync(SCptr) != 0)
  2490. esp_dev->sync = 0;
  2491. }
  2492. ESPDISC(("F<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
  2493. esp_done(esp, ((SCptr->SCp.Status & 0xff) |
  2494. ((SCptr->SCp.Message & 0xff)<<8) |
  2495. (DID_OK << 16)));
  2496. } else if (esp->prevmsgin == DISCONNECT) {
  2497. /* Normal disconnect. */
  2498. esp_cmd(esp, ESP_CMD_ESEL);
  2499. ESPDISC(("D<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
  2500. append_SC(&esp->disconnected_SC, SCptr);
  2501. esp->current_SC = NULL;
  2502. if (esp->issue_SC)
  2503. esp_exec_cmd(esp);
  2504. } else {
  2505. /* Driver bug, we do not expect a disconnect here
  2506. * and should not have advanced the state engine
  2507. * to in_freeing.
  2508. */
  2509. ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n",
  2510. esp->esp_id));
  2511. return do_reset_bus;
  2512. }
  2513. return do_intr_end;
  2514. }
  2515. /* When a reselect occurs, and we cannot find the command to
  2516. * reconnect to in our queues, we do this.
  2517. */
  2518. static int esp_bad_reconnect(struct esp *esp)
  2519. {
  2520. struct scsi_cmnd *sp;
  2521. ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n",
  2522. esp->esp_id));
  2523. ESPLOG(("QUEUE DUMP\n"));
  2524. sp = esp->issue_SC;
  2525. ESPLOG(("esp%d: issue_SC[", esp->esp_id));
  2526. while (sp) {
  2527. ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
  2528. sp = (struct scsi_cmnd *) sp->host_scribble;
  2529. }
  2530. ESPLOG(("]\n"));
  2531. sp = esp->current_SC;
  2532. ESPLOG(("esp%d: current_SC[", esp->esp_id));
  2533. if (sp)
  2534. ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
  2535. else
  2536. ESPLOG(("<NULL>"));
  2537. ESPLOG(("]\n"));
  2538. sp = esp->disconnected_SC;
  2539. ESPLOG(("esp%d: disconnected_SC[", esp->esp_id));
  2540. while (sp) {
  2541. ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
  2542. sp = (struct scsi_cmnd *) sp->host_scribble;
  2543. }
  2544. ESPLOG(("]\n"));
  2545. return do_reset_bus;
  2546. }
  2547. /* Do the needy when a target tries to reconnect to us. */
  2548. static int esp_do_reconnect(struct esp *esp)
  2549. {
  2550. int lun, target;
  2551. struct scsi_cmnd *SCptr;
  2552. /* Check for all bogus conditions first. */
  2553. target = reconnect_target(esp);
  2554. if (target < 0) {
  2555. ESPDISC(("bad bus bits\n"));
  2556. return do_reset_bus;
  2557. }
  2558. lun = reconnect_lun(esp);
  2559. if (lun < 0) {
  2560. ESPDISC(("target=%2x, bad identify msg\n", target));
  2561. return do_reset_bus;
  2562. }
  2563. /* Things look ok... */
  2564. ESPDISC(("R<%02x,%02x>", target, lun));
  2565. /* Must not flush FIFO or DVMA on HME. */
  2566. if (esp->erev != fashme) {
  2567. esp_cmd(esp, ESP_CMD_FLUSH);
  2568. if (esp100_reconnect_hwbug(esp))
  2569. return do_reset_bus;
  2570. esp_cmd(esp, ESP_CMD_NULL);
  2571. }
  2572. SCptr = remove_SC(&esp->disconnected_SC, (u8) target, (u8) lun);
  2573. if (!SCptr)
  2574. return esp_bad_reconnect(esp);
  2575. esp_connect(esp, SCptr);
  2576. esp_cmd(esp, ESP_CMD_MOK);
  2577. if (esp->erev == fashme)
  2578. sbus_writeb(((SCptr->device->id & 0xf) |
  2579. (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT)),
  2580. esp->eregs + ESP_BUSID);
  2581. /* Reconnect implies a restore pointers operation. */
  2582. esp_restore_pointers(esp, SCptr);
  2583. esp->snip = 0;
  2584. esp_advance_phase(SCptr, in_the_dark);
  2585. return do_intr_end;
  2586. }
  2587. /* End of NEXUS (hopefully), pick up status + message byte then leave if
  2588. * all goes well.
  2589. */
  2590. static int esp_do_status(struct esp *esp)
  2591. {
  2592. struct scsi_cmnd *SCptr = esp->current_SC;
  2593. int intr, rval;
  2594. rval = skipahead1(esp, SCptr, in_the_dark, in_status);
  2595. if (rval)
  2596. return rval;
  2597. intr = esp->ireg;
  2598. ESPSTAT(("esp_do_status: "));
  2599. if (intr != ESP_INTR_DC) {
  2600. int message_out = 0; /* for parity problems */
  2601. /* Ack the message. */
  2602. ESPSTAT(("ack msg, "));
  2603. esp_cmd(esp, ESP_CMD_MOK);
  2604. if (esp->erev != fashme) {
  2605. dma_flashclear(esp);
  2606. /* Wait till the first bits settle. */
  2607. while (esp->esp_command[0] == 0xff)
  2608. udelay(1);
  2609. } else {
  2610. esp->esp_command[0] = esp->hme_fifo_workaround_buffer[0];
  2611. esp->esp_command[1] = esp->hme_fifo_workaround_buffer[1];
  2612. }
  2613. ESPSTAT(("got something, "));
  2614. /* ESP chimes in with one of
  2615. *
  2616. * 1) function done interrupt:
  2617. * both status and message in bytes
  2618. * are available
  2619. *
  2620. * 2) bus service interrupt:
  2621. * only status byte was acquired
  2622. *
  2623. * 3) Anything else:
  2624. * can't happen, but we test for it
  2625. * anyways
  2626. *
  2627. * ALSO: If bad parity was detected on either
  2628. * the status _or_ the message byte then
  2629. * the ESP has asserted ATN on the bus
  2630. * and we must therefore wait for the
  2631. * next phase change.
  2632. */
  2633. if (intr & ESP_INTR_FDONE) {
  2634. /* We got it all, hallejulia. */
  2635. ESPSTAT(("got both, "));
  2636. SCptr->SCp.Status = esp->esp_command[0];
  2637. SCptr->SCp.Message = esp->esp_command[1];
  2638. esp->prevmsgin = SCptr->SCp.Message;
  2639. esp->cur_msgin[0] = SCptr->SCp.Message;
  2640. if (esp->sreg & ESP_STAT_PERR) {
  2641. /* There was bad parity for the
  2642. * message byte, the status byte
  2643. * was ok.
  2644. */
  2645. message_out = MSG_PARITY_ERROR;
  2646. }
  2647. } else if (intr == ESP_INTR_BSERV) {
  2648. /* Only got status byte. */
  2649. ESPLOG(("esp%d: got status only, ", esp->esp_id));
  2650. if (!(esp->sreg & ESP_STAT_PERR)) {
  2651. SCptr->SCp.Status = esp->esp_command[0];
  2652. SCptr->SCp.Message = 0xff;
  2653. } else {
  2654. /* The status byte had bad parity.
  2655. * we leave the scsi_pointer Status
  2656. * field alone as we set it to a default
  2657. * of CHECK_CONDITION in esp_queue.
  2658. */
  2659. message_out = INITIATOR_ERROR;
  2660. }
  2661. } else {
  2662. /* This shouldn't happen ever. */
  2663. ESPSTAT(("got bolixed\n"));
  2664. esp_advance_phase(SCptr, in_the_dark);
  2665. return esp_do_phase_determine(esp);
  2666. }
  2667. if (!message_out) {
  2668. ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status,
  2669. SCptr->SCp.Message));
  2670. if (SCptr->SCp.Message == COMMAND_COMPLETE) {
  2671. ESPSTAT(("and was COMMAND_COMPLETE\n"));
  2672. esp_advance_phase(SCptr, in_freeing);
  2673. return esp_do_freebus(esp);
  2674. } else {
  2675. ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n",
  2676. esp->esp_id));
  2677. esp->msgin_len = esp->msgin_ctr = 1;
  2678. esp_advance_phase(SCptr, in_msgindone);
  2679. return esp_do_msgindone(esp);
  2680. }
  2681. } else {
  2682. /* With luck we'll be able to let the target
  2683. * know that bad parity happened, it will know
  2684. * which byte caused the problems and send it
  2685. * again. For the case where the status byte
  2686. * receives bad parity, I do not believe most
  2687. * targets recover very well. We'll see.
  2688. */
  2689. ESPLOG(("esp%d: bad parity somewhere mout=%2x\n",
  2690. esp->esp_id, message_out));
  2691. esp->cur_msgout[0] = message_out;
  2692. esp->msgout_len = esp->msgout_ctr = 1;
  2693. esp_advance_phase(SCptr, in_the_dark);
  2694. return esp_do_phase_determine(esp);
  2695. }
  2696. } else {
  2697. /* If we disconnect now, all hell breaks loose. */
  2698. ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id));
  2699. esp_advance_phase(SCptr, in_the_dark);
  2700. return esp_do_phase_determine(esp);
  2701. }
  2702. }
  2703. static int esp_enter_status(struct esp *esp)
  2704. {
  2705. u8 thecmd = ESP_CMD_ICCSEQ;
  2706. esp_cmd(esp, ESP_CMD_FLUSH);
  2707. if (esp->erev != fashme) {
  2708. u32 tmp;
  2709. esp->esp_command[0] = esp->esp_command[1] = 0xff;
  2710. sbus_writeb(2, esp->eregs + ESP_TCLOW);
  2711. sbus_writeb(0, esp->eregs + ESP_TCMED);
  2712. tmp = sbus_readl(esp->dregs + DMA_CSR);
  2713. tmp |= (DMA_ST_WRITE | DMA_ENABLE);
  2714. sbus_writel(tmp, esp->dregs + DMA_CSR);
  2715. if (esp->dma->revision == dvmaesc1)
  2716. sbus_writel(0x100, esp->dregs + DMA_COUNT);
  2717. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  2718. thecmd |= ESP_CMD_DMA;
  2719. }
  2720. esp_cmd(esp, thecmd);
  2721. esp_advance_phase(esp->current_SC, in_status);
  2722. return esp_do_status(esp);
  2723. }
  2724. static int esp_disconnect_amidst_phases(struct esp *esp)
  2725. {
  2726. struct scsi_cmnd *sp = esp->current_SC;
  2727. struct esp_device *esp_dev = sp->device->hostdata;
  2728. /* This means real problems if we see this
  2729. * here. Unless we were actually trying
  2730. * to force the device to abort/reset.
  2731. */
  2732. ESPLOG(("esp%d Disconnect amidst phases, ", esp->esp_id));
  2733. ESPLOG(("pphase<%s> cphase<%s>, ",
  2734. phase_string(sp->SCp.phase),
  2735. phase_string(sp->SCp.sent_command)));
  2736. if (esp->disconnected_SC != NULL || (esp->erev == fashme))
  2737. esp_cmd(esp, ESP_CMD_ESEL);
  2738. switch (esp->cur_msgout[0]) {
  2739. default:
  2740. /* We didn't expect this to happen at all. */
  2741. ESPLOG(("device is bolixed\n"));
  2742. esp_advance_phase(sp, in_tgterror);
  2743. esp_done(esp, (DID_ERROR << 16));
  2744. break;
  2745. case BUS_DEVICE_RESET:
  2746. ESPLOG(("device reset successful\n"));
  2747. esp_dev->sync_max_offset = 0;
  2748. esp_dev->sync_min_period = 0;
  2749. esp_dev->sync = 0;
  2750. esp_advance_phase(sp, in_resetdev);
  2751. esp_done(esp, (DID_RESET << 16));
  2752. break;
  2753. case ABORT:
  2754. ESPLOG(("device abort successful\n"));
  2755. esp_advance_phase(sp, in_abortone);
  2756. esp_done(esp, (DID_ABORT << 16));
  2757. break;
  2758. };
  2759. return do_intr_end;
  2760. }
  2761. static int esp_enter_msgout(struct esp *esp)
  2762. {
  2763. esp_advance_phase(esp->current_SC, in_msgout);
  2764. return esp_do_msgout(esp);
  2765. }
  2766. static int esp_enter_msgin(struct esp *esp)
  2767. {
  2768. esp_advance_phase(esp->current_SC, in_msgin);
  2769. return esp_do_msgin(esp);
  2770. }
  2771. static int esp_enter_cmd(struct esp *esp)
  2772. {
  2773. esp_advance_phase(esp->current_SC, in_cmdbegin);
  2774. return esp_do_cmdbegin(esp);
  2775. }
  2776. static int esp_enter_badphase(struct esp *esp)
  2777. {
  2778. ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp->esp_id,
  2779. esp->sreg & ESP_STAT_PMASK));
  2780. return do_reset_bus;
  2781. }
  2782. typedef int (*espfunc_t)(struct esp *);
  2783. static espfunc_t phase_vector[] = {
  2784. esp_do_data, /* ESP_DOP */
  2785. esp_do_data, /* ESP_DIP */
  2786. esp_enter_cmd, /* ESP_CMDP */
  2787. esp_enter_status, /* ESP_STATP */
  2788. esp_enter_badphase, /* ESP_STAT_PMSG */
  2789. esp_enter_badphase, /* ESP_STAT_PMSG | ESP_STAT_PIO */
  2790. esp_enter_msgout, /* ESP_MOP */
  2791. esp_enter_msgin, /* ESP_MIP */
  2792. };
  2793. /* The target has control of the bus and we have to see where it has
  2794. * taken us.
  2795. */
  2796. static int esp_do_phase_determine(struct esp *esp)
  2797. {
  2798. if ((esp->ireg & ESP_INTR_DC) != 0)
  2799. return esp_disconnect_amidst_phases(esp);
  2800. return phase_vector[esp->sreg & ESP_STAT_PMASK](esp);
  2801. }
  2802. /* First interrupt after exec'ing a cmd comes here. */
  2803. static int esp_select_complete(struct esp *esp)
  2804. {
  2805. struct scsi_cmnd *SCptr = esp->current_SC;
  2806. struct esp_device *esp_dev = SCptr->device->hostdata;
  2807. int cmd_bytes_sent, fcnt;
  2808. if (esp->erev != fashme)
  2809. esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
  2810. if (esp->erev == fashme)
  2811. fcnt = esp->hme_fifo_workaround_count;
  2812. else
  2813. fcnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
  2814. cmd_bytes_sent = esp_bytes_sent(esp, fcnt);
  2815. dma_invalidate(esp);
  2816. /* Let's check to see if a reselect happened
  2817. * while we we're trying to select. This must
  2818. * be checked first.
  2819. */
  2820. if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
  2821. esp_reconnect(esp, SCptr);
  2822. return esp_do_reconnect(esp);
  2823. }
  2824. /* Looks like things worked, we should see a bus service &
  2825. * a function complete interrupt at this point. Note we
  2826. * are doing a direct comparison because we don't want to
  2827. * be fooled into thinking selection was successful if
  2828. * ESP_INTR_DC is set, see below.
  2829. */
  2830. if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
  2831. /* target speaks... */
  2832. esp->targets_present |= (1<<SCptr->device->id);
  2833. /* What if the target ignores the sdtr? */
  2834. if (esp->snip)
  2835. esp_dev->sync = 1;
  2836. /* See how far, if at all, we got in getting
  2837. * the information out to the target.
  2838. */
  2839. switch (esp->seqreg) {
  2840. default:
  2841. case ESP_STEP_ASEL:
  2842. /* Arbitration won, target selected, but
  2843. * we are in some phase which is not command
  2844. * phase nor is it message out phase.
  2845. *
  2846. * XXX We've confused the target, obviously.
  2847. * XXX So clear it's state, but we also end
  2848. * XXX up clearing everyone elses. That isn't
  2849. * XXX so nice. I'd like to just reset this
  2850. * XXX target, but if I cannot even get it's
  2851. * XXX attention and finish selection to talk
  2852. * XXX to it, there is not much more I can do.
  2853. * XXX If we have a loaded bus we're going to
  2854. * XXX spend the next second or so renegotiating
  2855. * XXX for synchronous transfers.
  2856. */
  2857. ESPLOG(("esp%d: STEP_ASEL for tgt %d\n",
  2858. esp->esp_id, SCptr->device->id));
  2859. case ESP_STEP_SID:
  2860. /* Arbitration won, target selected, went
  2861. * to message out phase, sent one message
  2862. * byte, then we stopped. ATN is asserted
  2863. * on the SCSI bus and the target is still
  2864. * there hanging on. This is a legal
  2865. * sequence step if we gave the ESP a select
  2866. * and stop command.
  2867. *
  2868. * XXX See above, I could set the borken flag
  2869. * XXX in the device struct and retry the
  2870. * XXX command. But would that help for
  2871. * XXX tagged capable targets?
  2872. */
  2873. case ESP_STEP_NCMD:
  2874. /* Arbitration won, target selected, maybe
  2875. * sent the one message byte in message out
  2876. * phase, but we did not go to command phase
  2877. * in the end. Actually, we could have sent
  2878. * only some of the message bytes if we tried
  2879. * to send out the entire identify and tag
  2880. * message using ESP_CMD_SA3.
  2881. */
  2882. cmd_bytes_sent = 0;
  2883. break;
  2884. case ESP_STEP_PPC:
  2885. /* No, not the powerPC pinhead. Arbitration
  2886. * won, all message bytes sent if we went to
  2887. * message out phase, went to command phase
  2888. * but only part of the command was sent.
  2889. *
  2890. * XXX I've seen this, but usually in conjunction
  2891. * XXX with a gross error which appears to have
  2892. * XXX occurred between the time I told the
  2893. * XXX ESP to arbitrate and when I got the
  2894. * XXX interrupt. Could I have misloaded the
  2895. * XXX command bytes into the fifo? Actually,
  2896. * XXX I most likely missed a phase, and therefore
  2897. * XXX went into never never land and didn't even
  2898. * XXX know it. That was the old driver though.
  2899. * XXX What is even more peculiar is that the ESP
  2900. * XXX showed the proper function complete and
  2901. * XXX bus service bits in the interrupt register.
  2902. */
  2903. case ESP_STEP_FINI4:
  2904. case ESP_STEP_FINI5:
  2905. case ESP_STEP_FINI6:
  2906. case ESP_STEP_FINI7:
  2907. /* Account for the identify message */
  2908. if (SCptr->SCp.phase == in_slct_norm)
  2909. cmd_bytes_sent -= 1;
  2910. };
  2911. if (esp->erev != fashme)
  2912. esp_cmd(esp, ESP_CMD_NULL);
  2913. /* Be careful, we could really get fucked during synchronous
  2914. * data transfers if we try to flush the fifo now.
  2915. */
  2916. if ((esp->erev != fashme) && /* not a Happy Meal and... */
  2917. !fcnt && /* Fifo is empty and... */
  2918. /* either we are not doing synchronous transfers or... */
  2919. (!esp_dev->sync_max_offset ||
  2920. /* We are not going into data in phase. */
  2921. ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
  2922. esp_cmd(esp, ESP_CMD_FLUSH); /* flush is safe */
  2923. /* See how far we got if this is not a slow command. */
  2924. if (!esp->esp_slowcmd) {
  2925. if (cmd_bytes_sent < 0)
  2926. cmd_bytes_sent = 0;
  2927. if (cmd_bytes_sent != SCptr->cmd_len) {
  2928. /* Crapola, mark it as a slowcmd
  2929. * so that we have some chance of
  2930. * keeping the command alive with
  2931. * good luck.
  2932. *
  2933. * XXX Actually, if we didn't send it all
  2934. * XXX this means either we didn't set things
  2935. * XXX up properly (driver bug) or the target
  2936. * XXX or the ESP detected parity on one of
  2937. * XXX the command bytes. This makes much
  2938. * XXX more sense, and therefore this code
  2939. * XXX should be changed to send out a
  2940. * XXX parity error message or if the status
  2941. * XXX register shows no parity error then
  2942. * XXX just expect the target to bring the
  2943. * XXX bus into message in phase so that it
  2944. * XXX can send us the parity error message.
  2945. * XXX SCSI sucks...
  2946. */
  2947. esp->esp_slowcmd = 1;
  2948. esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]);
  2949. esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent);
  2950. }
  2951. }
  2952. /* Now figure out where we went. */
  2953. esp_advance_phase(SCptr, in_the_dark);
  2954. return esp_do_phase_determine(esp);
  2955. }
  2956. /* Did the target even make it? */
  2957. if (esp->ireg == ESP_INTR_DC) {
  2958. /* wheee... nobody there or they didn't like
  2959. * what we told it to do, clean up.
  2960. */
  2961. /* If anyone is off the bus, but working on
  2962. * a command in the background for us, tell
  2963. * the ESP to listen for them.
  2964. */
  2965. if (esp->disconnected_SC)
  2966. esp_cmd(esp, ESP_CMD_ESEL);
  2967. if (((1<<SCptr->device->id) & esp->targets_present) &&
  2968. esp->seqreg != 0 &&
  2969. (esp->cur_msgout[0] == EXTENDED_MESSAGE) &&
  2970. (SCptr->SCp.phase == in_slct_msg ||
  2971. SCptr->SCp.phase == in_slct_stop)) {
  2972. /* shit */
  2973. esp->snip = 0;
  2974. ESPLOG(("esp%d: Failed synchronous negotiation for target %d "
  2975. "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
  2976. esp_dev->sync_max_offset = 0;
  2977. esp_dev->sync_min_period = 0;
  2978. esp_dev->sync = 1; /* so we don't negotiate again */
  2979. /* Run the command again, this time though we
  2980. * won't try to negotiate for synchronous transfers.
  2981. *
  2982. * XXX I'd like to do something like send an
  2983. * XXX INITIATOR_ERROR or ABORT message to the
  2984. * XXX target to tell it, "Sorry I confused you,
  2985. * XXX please come back and I will be nicer next
  2986. * XXX time". But that requires having the target
  2987. * XXX on the bus, and it has dropped BSY on us.
  2988. */
  2989. esp->current_SC = NULL;
  2990. esp_advance_phase(SCptr, not_issued);
  2991. prepend_SC(&esp->issue_SC, SCptr);
  2992. esp_exec_cmd(esp);
  2993. return do_intr_end;
  2994. }
  2995. /* Ok, this is normal, this is what we see during boot
  2996. * or whenever when we are scanning the bus for targets.
  2997. * But first make sure that is really what is happening.
  2998. */
  2999. if (((1<<SCptr->device->id) & esp->targets_present)) {
  3000. ESPLOG(("esp%d: Warning, live target %d not responding to "
  3001. "selection.\n", esp->esp_id, SCptr->device->id));
  3002. /* This _CAN_ happen. The SCSI standard states that
  3003. * the target is to _not_ respond to selection if
  3004. * _it_ detects bad parity on the bus for any reason.
  3005. * Therefore, we assume that if we've talked successfully
  3006. * to this target before, bad parity is the problem.
  3007. */
  3008. esp_done(esp, (DID_PARITY << 16));
  3009. } else {
  3010. /* Else, there really isn't anyone there. */
  3011. ESPMISC(("esp: selection failure, maybe nobody there?\n"));
  3012. ESPMISC(("esp: target %d lun %d\n",
  3013. SCptr->device->id, SCptr->device->lun));
  3014. esp_done(esp, (DID_BAD_TARGET << 16));
  3015. }
  3016. return do_intr_end;
  3017. }
  3018. ESPLOG(("esp%d: Selection failure.\n", esp->esp_id));
  3019. printk("esp%d: Currently -- ", esp->esp_id);
  3020. esp_print_ireg(esp->ireg); printk(" ");
  3021. esp_print_statreg(esp->sreg); printk(" ");
  3022. esp_print_seqreg(esp->seqreg); printk("\n");
  3023. printk("esp%d: New -- ", esp->esp_id);
  3024. esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
  3025. esp->seqreg = sbus_readb(esp->eregs + ESP_SSTEP);
  3026. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
  3027. esp_print_ireg(esp->ireg); printk(" ");
  3028. esp_print_statreg(esp->sreg); printk(" ");
  3029. esp_print_seqreg(esp->seqreg); printk("\n");
  3030. ESPLOG(("esp%d: resetting bus\n", esp->esp_id));
  3031. return do_reset_bus; /* ugh... */
  3032. }
  3033. /* Continue reading bytes for msgin phase. */
  3034. static int esp_do_msgincont(struct esp *esp)
  3035. {
  3036. if (esp->ireg & ESP_INTR_BSERV) {
  3037. /* in the right phase too? */
  3038. if ((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) {
  3039. /* phew... */
  3040. esp_cmd(esp, ESP_CMD_TI);
  3041. esp_advance_phase(esp->current_SC, in_msgindone);
  3042. return do_intr_end;
  3043. }
  3044. /* We changed phase but ESP shows bus service,
  3045. * in this case it is most likely that we, the
  3046. * hacker who has been up for 20hrs straight
  3047. * staring at the screen, drowned in coffee
  3048. * smelling like retched cigarette ashes
  3049. * have miscoded something..... so, try to
  3050. * recover as best we can.
  3051. */
  3052. ESPLOG(("esp%d: message in mis-carriage.\n", esp->esp_id));
  3053. }
  3054. esp_advance_phase(esp->current_SC, in_the_dark);
  3055. return do_phase_determine;
  3056. }
  3057. static int check_singlebyte_msg(struct esp *esp)
  3058. {
  3059. esp->prevmsgin = esp->cur_msgin[0];
  3060. if (esp->cur_msgin[0] & 0x80) {
  3061. /* wheee... */
  3062. ESPLOG(("esp%d: target sends identify amidst phases\n",
  3063. esp->esp_id));
  3064. esp_advance_phase(esp->current_SC, in_the_dark);
  3065. return 0;
  3066. } else if (((esp->cur_msgin[0] & 0xf0) == 0x20) ||
  3067. (esp->cur_msgin[0] == EXTENDED_MESSAGE)) {
  3068. esp->msgin_len = 2;
  3069. esp_advance_phase(esp->current_SC, in_msgincont);
  3070. return 0;
  3071. }
  3072. esp_advance_phase(esp->current_SC, in_the_dark);
  3073. switch (esp->cur_msgin[0]) {
  3074. default:
  3075. /* We don't want to hear about it. */
  3076. ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id,
  3077. esp->cur_msgin[0]));
  3078. return MESSAGE_REJECT;
  3079. case NOP:
  3080. ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id,
  3081. esp->current_SC->device->id));
  3082. return 0;
  3083. case RESTORE_POINTERS:
  3084. /* In this case we might also have to backup the
  3085. * "slow command" pointer. It is rare to get such
  3086. * a save/restore pointer sequence so early in the
  3087. * bus transition sequences, but cover it.
  3088. */
  3089. if (esp->esp_slowcmd) {
  3090. esp->esp_scmdleft = esp->current_SC->cmd_len;
  3091. esp->esp_scmdp = &esp->current_SC->cmnd[0];
  3092. }
  3093. esp_restore_pointers(esp, esp->current_SC);
  3094. return 0;
  3095. case SAVE_POINTERS:
  3096. esp_save_pointers(esp, esp->current_SC);
  3097. return 0;
  3098. case COMMAND_COMPLETE:
  3099. case DISCONNECT:
  3100. /* Freeing the bus, let it go. */
  3101. esp->current_SC->SCp.phase = in_freeing;
  3102. return 0;
  3103. case MESSAGE_REJECT:
  3104. ESPMISC(("msg reject, "));
  3105. if (esp->prevmsgout == EXTENDED_MESSAGE) {
  3106. struct esp_device *esp_dev = esp->current_SC->device->hostdata;
  3107. /* Doesn't look like this target can
  3108. * do synchronous or WIDE transfers.
  3109. */
  3110. ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n"));
  3111. esp_dev->sync = 1;
  3112. esp_dev->wide = 1;
  3113. esp_dev->sync_min_period = 0;
  3114. esp_dev->sync_max_offset = 0;
  3115. return 0;
  3116. } else {
  3117. ESPMISC(("not sync nego, sending ABORT\n"));
  3118. return ABORT;
  3119. }
  3120. };
  3121. }
  3122. /* Target negotiates for synchronous transfers before we do, this
  3123. * is legal although very strange. What is even funnier is that
  3124. * the SCSI2 standard specifically recommends against targets doing
  3125. * this because so many initiators cannot cope with this occurring.
  3126. */
  3127. static int target_with_ants_in_pants(struct esp *esp,
  3128. struct scsi_cmnd *SCptr,
  3129. struct esp_device *esp_dev)
  3130. {
  3131. if (esp_dev->sync || SCptr->device->borken) {
  3132. /* sorry, no can do */
  3133. ESPSDTR(("forcing to async, "));
  3134. build_sync_nego_msg(esp, 0, 0);
  3135. esp_dev->sync = 1;
  3136. esp->snip = 1;
  3137. ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id));
  3138. esp_advance_phase(SCptr, in_the_dark);
  3139. return EXTENDED_MESSAGE;
  3140. }
  3141. /* Ok, we'll check them out... */
  3142. return 0;
  3143. }
  3144. static void sync_report(struct esp *esp)
  3145. {
  3146. int msg3, msg4;
  3147. char *type;
  3148. msg3 = esp->cur_msgin[3];
  3149. msg4 = esp->cur_msgin[4];
  3150. if (msg4) {
  3151. int hz = 1000000000 / (msg3 * 4);
  3152. int integer = hz / 1000000;
  3153. int fraction = (hz - (integer * 1000000)) / 10000;
  3154. if ((esp->erev == fashme) &&
  3155. (esp->config3[esp->current_SC->device->id] & ESP_CONFIG3_EWIDE)) {
  3156. type = "FAST-WIDE";
  3157. integer <<= 1;
  3158. fraction <<= 1;
  3159. } else if ((msg3 * 4) < 200) {
  3160. type = "FAST";
  3161. } else {
  3162. type = "synchronous";
  3163. }
  3164. /* Do not transform this back into one big printk
  3165. * again, it triggers a bug in our sparc64-gcc272
  3166. * sibling call optimization. -DaveM
  3167. */
  3168. ESPLOG((KERN_INFO "esp%d: target %d ",
  3169. esp->esp_id, esp->current_SC->device->id));
  3170. ESPLOG(("[period %dns offset %d %d.%02dMHz ",
  3171. (int) msg3 * 4, (int) msg4,
  3172. integer, fraction));
  3173. ESPLOG(("%s SCSI%s]\n", type,
  3174. (((msg3 * 4) < 200) ? "-II" : "")));
  3175. } else {
  3176. ESPLOG((KERN_INFO "esp%d: target %d asynchronous\n",
  3177. esp->esp_id, esp->current_SC->device->id));
  3178. }
  3179. }
  3180. static int check_multibyte_msg(struct esp *esp)
  3181. {
  3182. struct scsi_cmnd *SCptr = esp->current_SC;
  3183. struct esp_device *esp_dev = SCptr->device->hostdata;
  3184. u8 regval = 0;
  3185. int message_out = 0;
  3186. ESPSDTR(("chk multibyte msg: "));
  3187. if (esp->cur_msgin[2] == EXTENDED_SDTR) {
  3188. int period = esp->cur_msgin[3];
  3189. int offset = esp->cur_msgin[4];
  3190. ESPSDTR(("is sync nego response, "));
  3191. if (!esp->snip) {
  3192. int rval;
  3193. /* Target negotiates first! */
  3194. ESPSDTR(("target jumps the gun, "));
  3195. message_out = EXTENDED_MESSAGE; /* we must respond */
  3196. rval = target_with_ants_in_pants(esp, SCptr, esp_dev);
  3197. if (rval)
  3198. return rval;
  3199. }
  3200. ESPSDTR(("examining sdtr, "));
  3201. /* Offset cannot be larger than ESP fifo size. */
  3202. if (offset > 15) {
  3203. ESPSDTR(("offset too big %2x, ", offset));
  3204. offset = 15;
  3205. ESPSDTR(("sending back new offset\n"));
  3206. build_sync_nego_msg(esp, period, offset);
  3207. return EXTENDED_MESSAGE;
  3208. }
  3209. if (offset && period > esp->max_period) {
  3210. /* Yeee, async for this slow device. */
  3211. ESPSDTR(("period too long %2x, ", period));
  3212. build_sync_nego_msg(esp, 0, 0);
  3213. ESPSDTR(("hoping for msgout\n"));
  3214. esp_advance_phase(esp->current_SC, in_the_dark);
  3215. return EXTENDED_MESSAGE;
  3216. } else if (offset && period < esp->min_period) {
  3217. ESPSDTR(("period too short %2x, ", period));
  3218. period = esp->min_period;
  3219. if (esp->erev > esp236)
  3220. regval = 4;
  3221. else
  3222. regval = 5;
  3223. } else if (offset) {
  3224. int tmp;
  3225. ESPSDTR(("period is ok, "));
  3226. tmp = esp->ccycle / 1000;
  3227. regval = (((period << 2) + tmp - 1) / tmp);
  3228. if (regval && ((esp->erev == fas100a ||
  3229. esp->erev == fas236 ||
  3230. esp->erev == fashme))) {
  3231. if (period >= 50)
  3232. regval--;
  3233. }
  3234. }
  3235. if (offset) {
  3236. u8 bit;
  3237. esp_dev->sync_min_period = (regval & 0x1f);
  3238. esp_dev->sync_max_offset = (offset | esp->radelay);
  3239. if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
  3240. if ((esp->erev == fas100a) || (esp->erev == fashme))
  3241. bit = ESP_CONFIG3_FAST;
  3242. else
  3243. bit = ESP_CONFIG3_FSCSI;
  3244. if (period < 50) {
  3245. /* On FAS366, if using fast-20 synchronous transfers
  3246. * we need to make sure the REQ/ACK assert/deassert
  3247. * control bits are clear.
  3248. */
  3249. if (esp->erev == fashme)
  3250. esp_dev->sync_max_offset &= ~esp->radelay;
  3251. esp->config3[SCptr->device->id] |= bit;
  3252. } else {
  3253. esp->config3[SCptr->device->id] &= ~bit;
  3254. }
  3255. esp->prev_cfg3 = esp->config3[SCptr->device->id];
  3256. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  3257. }
  3258. esp->prev_soff = esp_dev->sync_max_offset;
  3259. esp->prev_stp = esp_dev->sync_min_period;
  3260. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  3261. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  3262. ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n",
  3263. esp_dev->sync_max_offset,
  3264. esp_dev->sync_min_period,
  3265. esp->config3[SCptr->device->id]));
  3266. esp->snip = 0;
  3267. } else if (esp_dev->sync_max_offset) {
  3268. u8 bit;
  3269. /* back to async mode */
  3270. ESPSDTR(("unaccaptable sync nego, forcing async\n"));
  3271. esp_dev->sync_max_offset = 0;
  3272. esp_dev->sync_min_period = 0;
  3273. esp->prev_soff = 0;
  3274. esp->prev_stp = 0;
  3275. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  3276. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  3277. if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
  3278. if ((esp->erev == fas100a) || (esp->erev == fashme))
  3279. bit = ESP_CONFIG3_FAST;
  3280. else
  3281. bit = ESP_CONFIG3_FSCSI;
  3282. esp->config3[SCptr->device->id] &= ~bit;
  3283. esp->prev_cfg3 = esp->config3[SCptr->device->id];
  3284. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  3285. }
  3286. }
  3287. sync_report(esp);
  3288. ESPSDTR(("chk multibyte msg: sync is known, "));
  3289. esp_dev->sync = 1;
  3290. if (message_out) {
  3291. ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n",
  3292. esp->esp_id));
  3293. build_sync_nego_msg(esp, period, offset);
  3294. esp_advance_phase(SCptr, in_the_dark);
  3295. return EXTENDED_MESSAGE;
  3296. }
  3297. ESPSDTR(("returning zero\n"));
  3298. esp_advance_phase(SCptr, in_the_dark); /* ...or else! */
  3299. return 0;
  3300. } else if (esp->cur_msgin[2] == EXTENDED_WDTR) {
  3301. int size = 8 << esp->cur_msgin[3];
  3302. esp->wnip = 0;
  3303. if (esp->erev != fashme) {
  3304. ESPLOG(("esp%d: AIEEE wide msg received and not HME.\n",
  3305. esp->esp_id));
  3306. message_out = MESSAGE_REJECT;
  3307. } else if (size > 16) {
  3308. ESPLOG(("esp%d: AIEEE wide transfer for %d size "
  3309. "not supported.\n", esp->esp_id, size));
  3310. message_out = MESSAGE_REJECT;
  3311. } else {
  3312. /* Things look good; let's see what we got. */
  3313. if (size == 16) {
  3314. /* Set config 3 register for this target. */
  3315. esp->config3[SCptr->device->id] |= ESP_CONFIG3_EWIDE;
  3316. } else {
  3317. /* Just make sure it was one byte sized. */
  3318. if (size != 8) {
  3319. ESPLOG(("esp%d: Aieee, wide nego of %d size.\n",
  3320. esp->esp_id, size));
  3321. message_out = MESSAGE_REJECT;
  3322. goto finish;
  3323. }
  3324. /* Pure paranoia. */
  3325. esp->config3[SCptr->device->id] &= ~(ESP_CONFIG3_EWIDE);
  3326. }
  3327. esp->prev_cfg3 = esp->config3[SCptr->device->id];
  3328. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  3329. /* Regardless, next try for sync transfers. */
  3330. build_sync_nego_msg(esp, esp->sync_defp, 15);
  3331. esp_dev->sync = 1;
  3332. esp->snip = 1;
  3333. message_out = EXTENDED_MESSAGE;
  3334. }
  3335. } else if (esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) {
  3336. ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id));
  3337. message_out = MESSAGE_REJECT;
  3338. }
  3339. finish:
  3340. esp_advance_phase(SCptr, in_the_dark);
  3341. return message_out;
  3342. }
  3343. static int esp_do_msgindone(struct esp *esp)
  3344. {
  3345. struct scsi_cmnd *SCptr = esp->current_SC;
  3346. int message_out = 0, it = 0, rval;
  3347. rval = skipahead1(esp, SCptr, in_msgin, in_msgindone);
  3348. if (rval)
  3349. return rval;
  3350. if (SCptr->SCp.sent_command != in_status) {
  3351. if (!(esp->ireg & ESP_INTR_DC)) {
  3352. if (esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) {
  3353. message_out = MSG_PARITY_ERROR;
  3354. esp_cmd(esp, ESP_CMD_FLUSH);
  3355. } else if (esp->erev != fashme &&
  3356. (it = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES)) != 1) {
  3357. /* We certainly dropped the ball somewhere. */
  3358. message_out = INITIATOR_ERROR;
  3359. esp_cmd(esp, ESP_CMD_FLUSH);
  3360. } else if (!esp->msgin_len) {
  3361. if (esp->erev == fashme)
  3362. it = esp->hme_fifo_workaround_buffer[0];
  3363. else
  3364. it = sbus_readb(esp->eregs + ESP_FDATA);
  3365. esp_advance_phase(SCptr, in_msgincont);
  3366. } else {
  3367. /* it is ok and we want it */
  3368. if (esp->erev == fashme)
  3369. it = esp->cur_msgin[esp->msgin_ctr] =
  3370. esp->hme_fifo_workaround_buffer[0];
  3371. else
  3372. it = esp->cur_msgin[esp->msgin_ctr] =
  3373. sbus_readb(esp->eregs + ESP_FDATA);
  3374. esp->msgin_ctr++;
  3375. }
  3376. } else {
  3377. esp_advance_phase(SCptr, in_the_dark);
  3378. return do_work_bus;
  3379. }
  3380. } else {
  3381. it = esp->cur_msgin[0];
  3382. }
  3383. if (!message_out && esp->msgin_len) {
  3384. if (esp->msgin_ctr < esp->msgin_len) {
  3385. esp_advance_phase(SCptr, in_msgincont);
  3386. } else if (esp->msgin_len == 1) {
  3387. message_out = check_singlebyte_msg(esp);
  3388. } else if (esp->msgin_len == 2) {
  3389. if (esp->cur_msgin[0] == EXTENDED_MESSAGE) {
  3390. if ((it + 2) >= 15) {
  3391. message_out = MESSAGE_REJECT;
  3392. } else {
  3393. esp->msgin_len = (it + 2);
  3394. esp_advance_phase(SCptr, in_msgincont);
  3395. }
  3396. } else {
  3397. message_out = MESSAGE_REJECT; /* foo on you */
  3398. }
  3399. } else {
  3400. message_out = check_multibyte_msg(esp);
  3401. }
  3402. }
  3403. if (message_out < 0) {
  3404. return -message_out;
  3405. } else if (message_out) {
  3406. if (((message_out != 1) &&
  3407. ((message_out < 0x20) || (message_out & 0x80))))
  3408. esp->msgout_len = 1;
  3409. esp->cur_msgout[0] = message_out;
  3410. esp_cmd(esp, ESP_CMD_SATN);
  3411. esp_advance_phase(SCptr, in_the_dark);
  3412. esp->msgin_len = 0;
  3413. }
  3414. esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
  3415. esp->sreg &= ~(ESP_STAT_INTR);
  3416. if ((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD))
  3417. esp_cmd(esp, ESP_CMD_MOK);
  3418. if ((SCptr->SCp.sent_command == in_msgindone) &&
  3419. (SCptr->SCp.phase == in_freeing))
  3420. return esp_do_freebus(esp);
  3421. return do_intr_end;
  3422. }
  3423. static int esp_do_cmdbegin(struct esp *esp)
  3424. {
  3425. struct scsi_cmnd *SCptr = esp->current_SC;
  3426. esp_advance_phase(SCptr, in_cmdend);
  3427. if (esp->erev == fashme) {
  3428. u32 tmp = sbus_readl(esp->dregs + DMA_CSR);
  3429. int i;
  3430. for (i = 0; i < esp->esp_scmdleft; i++)
  3431. esp->esp_command[i] = *esp->esp_scmdp++;
  3432. esp->esp_scmdleft = 0;
  3433. esp_cmd(esp, ESP_CMD_FLUSH);
  3434. esp_setcount(esp->eregs, i, 1);
  3435. esp_cmd(esp, (ESP_CMD_DMA | ESP_CMD_TI));
  3436. tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
  3437. tmp &= ~(DMA_ST_WRITE);
  3438. sbus_writel(i, esp->dregs + DMA_COUNT);
  3439. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  3440. sbus_writel(tmp, esp->dregs + DMA_CSR);
  3441. } else {
  3442. u8 tmp;
  3443. esp_cmd(esp, ESP_CMD_FLUSH);
  3444. tmp = *esp->esp_scmdp++;
  3445. esp->esp_scmdleft--;
  3446. sbus_writeb(tmp, esp->eregs + ESP_FDATA);
  3447. esp_cmd(esp, ESP_CMD_TI);
  3448. }
  3449. return do_intr_end;
  3450. }
  3451. static int esp_do_cmddone(struct esp *esp)
  3452. {
  3453. if (esp->erev == fashme)
  3454. dma_invalidate(esp);
  3455. else
  3456. esp_cmd(esp, ESP_CMD_NULL);
  3457. if (esp->ireg & ESP_INTR_BSERV) {
  3458. esp_advance_phase(esp->current_SC, in_the_dark);
  3459. return esp_do_phase_determine(esp);
  3460. }
  3461. ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n",
  3462. esp->esp_id));
  3463. return do_reset_bus;
  3464. }
  3465. static int esp_do_msgout(struct esp *esp)
  3466. {
  3467. esp_cmd(esp, ESP_CMD_FLUSH);
  3468. switch (esp->msgout_len) {
  3469. case 1:
  3470. if (esp->erev == fashme)
  3471. hme_fifo_push(esp, &esp->cur_msgout[0], 1);
  3472. else
  3473. sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
  3474. esp_cmd(esp, ESP_CMD_TI);
  3475. break;
  3476. case 2:
  3477. esp->esp_command[0] = esp->cur_msgout[0];
  3478. esp->esp_command[1] = esp->cur_msgout[1];
  3479. if (esp->erev == fashme) {
  3480. hme_fifo_push(esp, &esp->cur_msgout[0], 2);
  3481. esp_cmd(esp, ESP_CMD_TI);
  3482. } else {
  3483. dma_setup(esp, esp->esp_command_dvma, 2, 0);
  3484. esp_setcount(esp->eregs, 2, 0);
  3485. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  3486. }
  3487. break;
  3488. case 4:
  3489. esp->esp_command[0] = esp->cur_msgout[0];
  3490. esp->esp_command[1] = esp->cur_msgout[1];
  3491. esp->esp_command[2] = esp->cur_msgout[2];
  3492. esp->esp_command[3] = esp->cur_msgout[3];
  3493. esp->snip = 1;
  3494. if (esp->erev == fashme) {
  3495. hme_fifo_push(esp, &esp->cur_msgout[0], 4);
  3496. esp_cmd(esp, ESP_CMD_TI);
  3497. } else {
  3498. dma_setup(esp, esp->esp_command_dvma, 4, 0);
  3499. esp_setcount(esp->eregs, 4, 0);
  3500. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  3501. }
  3502. break;
  3503. case 5:
  3504. esp->esp_command[0] = esp->cur_msgout[0];
  3505. esp->esp_command[1] = esp->cur_msgout[1];
  3506. esp->esp_command[2] = esp->cur_msgout[2];
  3507. esp->esp_command[3] = esp->cur_msgout[3];
  3508. esp->esp_command[4] = esp->cur_msgout[4];
  3509. esp->snip = 1;
  3510. if (esp->erev == fashme) {
  3511. hme_fifo_push(esp, &esp->cur_msgout[0], 5);
  3512. esp_cmd(esp, ESP_CMD_TI);
  3513. } else {
  3514. dma_setup(esp, esp->esp_command_dvma, 5, 0);
  3515. esp_setcount(esp->eregs, 5, 0);
  3516. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  3517. }
  3518. break;
  3519. default:
  3520. /* whoops */
  3521. ESPMISC(("bogus msgout sending NOP\n"));
  3522. esp->cur_msgout[0] = NOP;
  3523. if (esp->erev == fashme) {
  3524. hme_fifo_push(esp, &esp->cur_msgout[0], 1);
  3525. } else {
  3526. sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
  3527. }
  3528. esp->msgout_len = 1;
  3529. esp_cmd(esp, ESP_CMD_TI);
  3530. break;
  3531. };
  3532. esp_advance_phase(esp->current_SC, in_msgoutdone);
  3533. return do_intr_end;
  3534. }
  3535. static int esp_do_msgoutdone(struct esp *esp)
  3536. {
  3537. if (esp->msgout_len > 1) {
  3538. /* XXX HME/FAS ATN deassert workaround required,
  3539. * XXX no DMA flushing, only possible ESP_CMD_FLUSH
  3540. * XXX to kill the fifo.
  3541. */
  3542. if (esp->erev != fashme) {
  3543. u32 tmp;
  3544. while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
  3545. udelay(1);
  3546. tmp &= ~DMA_ENABLE;
  3547. sbus_writel(tmp, esp->dregs + DMA_CSR);
  3548. dma_invalidate(esp);
  3549. } else {
  3550. esp_cmd(esp, ESP_CMD_FLUSH);
  3551. }
  3552. }
  3553. if (!(esp->ireg & ESP_INTR_DC)) {
  3554. if (esp->erev != fashme)
  3555. esp_cmd(esp, ESP_CMD_NULL);
  3556. switch (esp->sreg & ESP_STAT_PMASK) {
  3557. case ESP_MOP:
  3558. /* whoops, parity error */
  3559. ESPLOG(("esp%d: still in msgout, parity error assumed\n",
  3560. esp->esp_id));
  3561. if (esp->msgout_len > 1)
  3562. esp_cmd(esp, ESP_CMD_SATN);
  3563. esp_advance_phase(esp->current_SC, in_msgout);
  3564. return do_work_bus;
  3565. case ESP_DIP:
  3566. break;
  3567. default:
  3568. /* Happy Meal fifo is touchy... */
  3569. if ((esp->erev != fashme) &&
  3570. !fcount(esp) &&
  3571. !(((struct esp_device *)esp->current_SC->device->hostdata)->sync_max_offset))
  3572. esp_cmd(esp, ESP_CMD_FLUSH);
  3573. break;
  3574. };
  3575. } else {
  3576. ESPLOG(("esp%d: disconnect, resetting bus\n", esp->esp_id));
  3577. return do_reset_bus;
  3578. }
  3579. /* If we sent out a synchronous negotiation message, update
  3580. * our state.
  3581. */
  3582. if (esp->cur_msgout[2] == EXTENDED_MESSAGE &&
  3583. esp->cur_msgout[4] == EXTENDED_SDTR) {
  3584. esp->snip = 1; /* anal retentiveness... */
  3585. }
  3586. esp->prevmsgout = esp->cur_msgout[0];
  3587. esp->msgout_len = 0;
  3588. esp_advance_phase(esp->current_SC, in_the_dark);
  3589. return esp_do_phase_determine(esp);
  3590. }
  3591. static int esp_bus_unexpected(struct esp *esp)
  3592. {
  3593. ESPLOG(("esp%d: command in weird state %2x\n",
  3594. esp->esp_id, esp->current_SC->SCp.phase));
  3595. return do_reset_bus;
  3596. }
  3597. static espfunc_t bus_vector[] = {
  3598. esp_do_data_finale,
  3599. esp_do_data_finale,
  3600. esp_bus_unexpected,
  3601. esp_do_msgin,
  3602. esp_do_msgincont,
  3603. esp_do_msgindone,
  3604. esp_do_msgout,
  3605. esp_do_msgoutdone,
  3606. esp_do_cmdbegin,
  3607. esp_do_cmddone,
  3608. esp_do_status,
  3609. esp_do_freebus,
  3610. esp_do_phase_determine,
  3611. esp_bus_unexpected,
  3612. esp_bus_unexpected,
  3613. esp_bus_unexpected,
  3614. };
  3615. /* This is the second tier in our dual-level SCSI state machine. */
  3616. static int esp_work_bus(struct esp *esp)
  3617. {
  3618. struct scsi_cmnd *SCptr = esp->current_SC;
  3619. unsigned int phase;
  3620. ESPBUS(("esp_work_bus: "));
  3621. if (!SCptr) {
  3622. ESPBUS(("reconnect\n"));
  3623. return esp_do_reconnect(esp);
  3624. }
  3625. phase = SCptr->SCp.phase;
  3626. if ((phase & 0xf0) == in_phases_mask)
  3627. return bus_vector[(phase & 0x0f)](esp);
  3628. else if ((phase & 0xf0) == in_slct_mask)
  3629. return esp_select_complete(esp);
  3630. else
  3631. return esp_bus_unexpected(esp);
  3632. }
  3633. static espfunc_t isvc_vector[] = {
  3634. NULL,
  3635. esp_do_phase_determine,
  3636. esp_do_resetbus,
  3637. esp_finish_reset,
  3638. esp_work_bus
  3639. };
  3640. /* Main interrupt handler for an esp adapter. */
  3641. static void esp_handle(struct esp *esp)
  3642. {
  3643. struct scsi_cmnd *SCptr;
  3644. int what_next = do_intr_end;
  3645. SCptr = esp->current_SC;
  3646. /* Check for errors. */
  3647. esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
  3648. esp->sreg &= (~ESP_STAT_INTR);
  3649. if (esp->erev == fashme) {
  3650. esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
  3651. esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
  3652. }
  3653. if (esp->sreg & (ESP_STAT_SPAM)) {
  3654. /* Gross error, could be due to one of:
  3655. *
  3656. * - top of fifo overwritten, could be because
  3657. * we tried to do a synchronous transfer with
  3658. * an offset greater than ESP fifo size
  3659. *
  3660. * - top of command register overwritten
  3661. *
  3662. * - DMA setup to go in one direction, SCSI
  3663. * bus points in the other, whoops
  3664. *
  3665. * - weird phase change during asynchronous
  3666. * data phase while we are initiator
  3667. */
  3668. ESPLOG(("esp%d: Gross error sreg=%2x\n", esp->esp_id, esp->sreg));
  3669. /* If a command is live on the bus we cannot safely
  3670. * reset the bus, so we'll just let the pieces fall
  3671. * where they may. Here we are hoping that the
  3672. * target will be able to cleanly go away soon
  3673. * so we can safely reset things.
  3674. */
  3675. if (!SCptr) {
  3676. ESPLOG(("esp%d: No current cmd during gross error, "
  3677. "resetting bus\n", esp->esp_id));
  3678. what_next = do_reset_bus;
  3679. goto state_machine;
  3680. }
  3681. }
  3682. if (sbus_readl(esp->dregs + DMA_CSR) & DMA_HNDL_ERROR) {
  3683. /* A DMA gate array error. Here we must
  3684. * be seeing one of two things. Either the
  3685. * virtual to physical address translation
  3686. * on the SBUS could not occur, else the
  3687. * translation it did get pointed to a bogus
  3688. * page. Ho hum...
  3689. */
  3690. ESPLOG(("esp%d: DMA error %08x\n", esp->esp_id,
  3691. sbus_readl(esp->dregs + DMA_CSR)));
  3692. /* DMA gate array itself must be reset to clear the
  3693. * error condition.
  3694. */
  3695. esp_reset_dma(esp);
  3696. what_next = do_reset_bus;
  3697. goto state_machine;
  3698. }
  3699. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); /* Unlatch intr reg */
  3700. if (esp->erev == fashme) {
  3701. /* This chip is really losing. */
  3702. ESPHME(("HME["));
  3703. ESPHME(("sreg2=%02x,", esp->sreg2));
  3704. /* Must latch fifo before reading the interrupt
  3705. * register else garbage ends up in the FIFO
  3706. * which confuses the driver utterly.
  3707. */
  3708. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  3709. (esp->sreg2 & ESP_STAT2_F1BYTE)) {
  3710. ESPHME(("fifo_workaround]"));
  3711. hme_fifo_read(esp);
  3712. } else {
  3713. ESPHME(("no_fifo_workaround]"));
  3714. }
  3715. }
  3716. /* No current cmd is only valid at this point when there are
  3717. * commands off the bus or we are trying a reset.
  3718. */
  3719. if (!SCptr && !esp->disconnected_SC && !(esp->ireg & ESP_INTR_SR)) {
  3720. /* Panic is safe, since current_SC is null. */
  3721. ESPLOG(("esp%d: no command in esp_handle()\n", esp->esp_id));
  3722. panic("esp_handle: current_SC == penguin within interrupt!");
  3723. }
  3724. if (esp->ireg & (ESP_INTR_IC)) {
  3725. /* Illegal command fed to ESP. Outside of obvious
  3726. * software bugs that could cause this, there is
  3727. * a condition with esp100 where we can confuse the
  3728. * ESP into an erroneous illegal command interrupt
  3729. * because it does not scrape the FIFO properly
  3730. * for reselection. See esp100_reconnect_hwbug()
  3731. * to see how we try very hard to avoid this.
  3732. */
  3733. ESPLOG(("esp%d: invalid command\n", esp->esp_id));
  3734. esp_dump_state(esp);
  3735. if (SCptr != NULL) {
  3736. /* Devices with very buggy firmware can drop BSY
  3737. * during a scatter list interrupt when using sync
  3738. * mode transfers. We continue the transfer as
  3739. * expected, the target drops the bus, the ESP
  3740. * gets confused, and we get a illegal command
  3741. * interrupt because the bus is in the disconnected
  3742. * state now and ESP_CMD_TI is only allowed when
  3743. * a nexus is alive on the bus.
  3744. */
  3745. ESPLOG(("esp%d: Forcing async and disabling disconnect for "
  3746. "target %d\n", esp->esp_id, SCptr->device->id));
  3747. SCptr->device->borken = 1; /* foo on you */
  3748. }
  3749. what_next = do_reset_bus;
  3750. } else if (!(esp->ireg & ~(ESP_INTR_FDONE | ESP_INTR_BSERV | ESP_INTR_DC))) {
  3751. if (SCptr) {
  3752. unsigned int phase = SCptr->SCp.phase;
  3753. if (phase & in_phases_mask) {
  3754. what_next = esp_work_bus(esp);
  3755. } else if (phase & in_slct_mask) {
  3756. what_next = esp_select_complete(esp);
  3757. } else {
  3758. ESPLOG(("esp%d: interrupt for no good reason...\n",
  3759. esp->esp_id));
  3760. what_next = do_intr_end;
  3761. }
  3762. } else {
  3763. ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n",
  3764. esp->esp_id));
  3765. what_next = do_reset_bus;
  3766. }
  3767. } else if (esp->ireg & ESP_INTR_SR) {
  3768. ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp->esp_id));
  3769. what_next = do_reset_complete;
  3770. } else if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN)) {
  3771. ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n",
  3772. esp->esp_id));
  3773. what_next = do_reset_bus;
  3774. } else if (esp->ireg & ESP_INTR_RSEL) {
  3775. if (SCptr == NULL) {
  3776. /* This is ok. */
  3777. what_next = esp_do_reconnect(esp);
  3778. } else if (SCptr->SCp.phase & in_slct_mask) {
  3779. /* Only selection code knows how to clean
  3780. * up properly.
  3781. */
  3782. ESPDISC(("Reselected during selection attempt\n"));
  3783. what_next = esp_select_complete(esp);
  3784. } else {
  3785. ESPLOG(("esp%d: Reselected while bus is busy\n",
  3786. esp->esp_id));
  3787. what_next = do_reset_bus;
  3788. }
  3789. }
  3790. /* This is tier-one in our dual level SCSI state machine. */
  3791. state_machine:
  3792. while (what_next != do_intr_end) {
  3793. if (what_next >= do_phase_determine &&
  3794. what_next < do_intr_end) {
  3795. what_next = isvc_vector[what_next](esp);
  3796. } else {
  3797. /* state is completely lost ;-( */
  3798. ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n",
  3799. esp->esp_id));
  3800. what_next = do_reset_bus;
  3801. }
  3802. }
  3803. }
  3804. /* Service only the ESP described by dev_id. */
  3805. static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs)
  3806. {
  3807. struct esp *esp = dev_id;
  3808. unsigned long flags;
  3809. spin_lock_irqsave(esp->ehost->host_lock, flags);
  3810. if (ESP_IRQ_P(esp->dregs)) {
  3811. ESP_INTSOFF(esp->dregs);
  3812. ESPIRQ(("I[%d:%d](", smp_processor_id(), esp->esp_id));
  3813. esp_handle(esp);
  3814. ESPIRQ((")"));
  3815. ESP_INTSON(esp->dregs);
  3816. }
  3817. spin_unlock_irqrestore(esp->ehost->host_lock, flags);
  3818. return IRQ_HANDLED;
  3819. }
  3820. static int esp_slave_alloc(struct scsi_device *SDptr)
  3821. {
  3822. struct esp_device *esp_dev =
  3823. kmalloc(sizeof(struct esp_device), GFP_ATOMIC);
  3824. if (!esp_dev)
  3825. return -ENOMEM;
  3826. memset(esp_dev, 0, sizeof(struct esp_device));
  3827. SDptr->hostdata = esp_dev;
  3828. return 0;
  3829. }
  3830. static void esp_slave_destroy(struct scsi_device *SDptr)
  3831. {
  3832. struct esp *esp = (struct esp *) SDptr->host->hostdata;
  3833. esp->targets_present &= ~(1 << SDptr->id);
  3834. kfree(SDptr->hostdata);
  3835. SDptr->hostdata = NULL;
  3836. }
  3837. static struct scsi_host_template esp_template = {
  3838. .module = THIS_MODULE,
  3839. .name = "esp",
  3840. .info = esp_info,
  3841. .slave_alloc = esp_slave_alloc,
  3842. .slave_destroy = esp_slave_destroy,
  3843. .queuecommand = esp_queue,
  3844. .eh_abort_handler = esp_abort,
  3845. .eh_bus_reset_handler = esp_reset,
  3846. .can_queue = 7,
  3847. .this_id = 7,
  3848. .sg_tablesize = SG_ALL,
  3849. .cmd_per_lun = 1,
  3850. .use_clustering = ENABLE_CLUSTERING,
  3851. .proc_name = "esp",
  3852. .proc_info = esp_proc_info,
  3853. };
  3854. #ifndef CONFIG_SUN4
  3855. static struct of_device_id esp_match[] = {
  3856. {
  3857. .name = "SUNW,esp",
  3858. .data = &esp_template,
  3859. },
  3860. {
  3861. .name = "SUNW,fas",
  3862. .data = &esp_template,
  3863. },
  3864. {
  3865. .name = "esp",
  3866. .data = &esp_template,
  3867. },
  3868. {},
  3869. };
  3870. MODULE_DEVICE_TABLE(of, esp_match);
  3871. static struct of_platform_driver esp_sbus_driver = {
  3872. .name = "esp",
  3873. .match_table = esp_match,
  3874. .probe = esp_sbus_probe,
  3875. .remove = __devexit_p(esp_sbus_remove),
  3876. };
  3877. #endif
  3878. static int __init esp_init(void)
  3879. {
  3880. #ifdef CONFIG_SUN4
  3881. return esp_sun4_probe(&esp_template);
  3882. #else
  3883. return of_register_driver(&esp_sbus_driver, &sbus_bus_type);
  3884. #endif
  3885. }
  3886. static void __exit esp_exit(void)
  3887. {
  3888. #ifdef CONFIG_SUN4
  3889. esp_sun4_remove();
  3890. #else
  3891. of_unregister_driver(&esp_sbus_driver);
  3892. #endif
  3893. }
  3894. MODULE_DESCRIPTION("ESP Sun SCSI driver");
  3895. MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
  3896. MODULE_LICENSE("GPL");
  3897. MODULE_VERSION(DRV_VERSION);
  3898. module_init(esp_init);
  3899. module_exit(esp_exit);