whc-rc.c 14 KB

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  1. /*
  2. * Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3])
  3. * Radio Control command/event transport to the UWB stack
  4. *
  5. * Copyright (C) 2005-2006 Intel Corporation
  6. * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License version
  10. * 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20. * 02110-1301, USA.
  21. *
  22. *
  23. * Initialize and hook up the Radio Control interface.
  24. *
  25. * For each device probed, creates an 'struct whcrc' which contains
  26. * just the representation of the UWB Radio Controller, and the logic
  27. * for reading notifications and passing them to the UWB Core.
  28. *
  29. * So we initialize all of those, register the UWB Radio Controller
  30. * and setup the notification/event handle to pipe the notifications
  31. * to the UWB management Daemon.
  32. *
  33. * Once uwb_rc_add() is called, the UWB stack takes control, resets
  34. * the radio and readies the device to take commands the UWB
  35. * API/user-space.
  36. *
  37. * Note this driver is just a transport driver; the commands are
  38. * formed at the UWB stack and given to this driver who will deliver
  39. * them to the hw and transfer the replies/notifications back to the
  40. * UWB stack through the UWB daemon (UWBD).
  41. */
  42. #include <linux/init.h>
  43. #include <linux/module.h>
  44. #include <linux/pci.h>
  45. #include <linux/dma-mapping.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/workqueue.h>
  48. #include <linux/uwb.h>
  49. #include <linux/uwb/whci.h>
  50. #include <linux/uwb/umc.h>
  51. #include "uwb-internal.h"
  52. #define D_LOCAL 0
  53. #include <linux/uwb/debug.h>
  54. /**
  55. * Descriptor for an instance of the UWB Radio Control Driver that
  56. * attaches to the URC interface of the WHCI PCI card.
  57. *
  58. * Unless there is a lock specific to the 'data members', all access
  59. * is protected by uwb_rc->mutex.
  60. */
  61. struct whcrc {
  62. struct umc_dev *umc_dev;
  63. struct uwb_rc *uwb_rc; /* UWB host controller */
  64. unsigned long area;
  65. void __iomem *rc_base;
  66. size_t rc_len;
  67. spinlock_t irq_lock;
  68. void *evt_buf, *cmd_buf;
  69. dma_addr_t evt_dma_buf, cmd_dma_buf;
  70. wait_queue_head_t cmd_wq;
  71. struct work_struct event_work;
  72. };
  73. /**
  74. * Execute an UWB RC command on WHCI/RC
  75. *
  76. * @rc: Instance of a Radio Controller that is a whcrc
  77. * @cmd: Buffer containing the RCCB and payload to execute
  78. * @cmd_size: Size of the command buffer.
  79. *
  80. * We copy the command into whcrc->cmd_buf (as it is pretty and
  81. * aligned`and physically contiguous) and then press the right keys in
  82. * the controller's URCCMD register to get it to read it. We might
  83. * have to wait for the cmd_sem to be open to us.
  84. *
  85. * NOTE: rc's mutex has to be locked
  86. */
  87. static int whcrc_cmd(struct uwb_rc *uwb_rc,
  88. const struct uwb_rccb *cmd, size_t cmd_size)
  89. {
  90. int result = 0;
  91. struct whcrc *whcrc = uwb_rc->priv;
  92. struct device *dev = &whcrc->umc_dev->dev;
  93. u32 urccmd;
  94. d_fnstart(3, dev, "(%p, %p, %zu)\n", uwb_rc, cmd, cmd_size);
  95. might_sleep();
  96. if (cmd_size >= 4096) {
  97. result = -E2BIG;
  98. goto error;
  99. }
  100. /*
  101. * If the URC is halted, then the hardware has reset itself.
  102. * Attempt to recover by restarting the device and then return
  103. * an error as it's likely that the current command isn't
  104. * valid for a newly started RC.
  105. */
  106. if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) {
  107. dev_err(dev, "requesting reset of halted radio controller\n");
  108. uwb_rc_reset_all(uwb_rc);
  109. result = -EIO;
  110. goto error;
  111. }
  112. result = wait_event_timeout(whcrc->cmd_wq,
  113. !(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2);
  114. if (result == 0) {
  115. dev_err(dev, "device is not ready to execute commands\n");
  116. result = -ETIMEDOUT;
  117. goto error;
  118. }
  119. memmove(whcrc->cmd_buf, cmd, cmd_size);
  120. le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR);
  121. spin_lock(&whcrc->irq_lock);
  122. urccmd = le_readl(whcrc->rc_base + URCCMD);
  123. urccmd &= ~(URCCMD_EARV | URCCMD_SIZE_MASK);
  124. le_writel(urccmd | URCCMD_ACTIVE | URCCMD_IWR | cmd_size,
  125. whcrc->rc_base + URCCMD);
  126. spin_unlock(&whcrc->irq_lock);
  127. error:
  128. d_fnend(3, dev, "(%p, %p, %zu) = %d\n",
  129. uwb_rc, cmd, cmd_size, result);
  130. return result;
  131. }
  132. static int whcrc_reset(struct uwb_rc *rc)
  133. {
  134. struct whcrc *whcrc = rc->priv;
  135. return umc_controller_reset(whcrc->umc_dev);
  136. }
  137. /**
  138. * Reset event reception mechanism and tell hw we are ready to get more
  139. *
  140. * We have read all the events in the event buffer, so we are ready to
  141. * reset it to the beginning.
  142. *
  143. * This is only called during initialization or after an event buffer
  144. * has been retired. This means we can be sure that event processing
  145. * is disabled and it's safe to update the URCEVTADDR register.
  146. *
  147. * There's no need to wait for the event processing to start as the
  148. * URC will not clear URCCMD_ACTIVE until (internal) event buffer
  149. * space is available.
  150. */
  151. static
  152. void whcrc_enable_events(struct whcrc *whcrc)
  153. {
  154. struct device *dev = &whcrc->umc_dev->dev;
  155. u32 urccmd;
  156. d_fnstart(4, dev, "(whcrc %p)\n", whcrc);
  157. le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR);
  158. spin_lock(&whcrc->irq_lock);
  159. urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE;
  160. le_writel(urccmd | URCCMD_EARV, whcrc->rc_base + URCCMD);
  161. spin_unlock(&whcrc->irq_lock);
  162. d_fnend(4, dev, "(whcrc %p) = void\n", whcrc);
  163. }
  164. static void whcrc_event_work(struct work_struct *work)
  165. {
  166. struct whcrc *whcrc = container_of(work, struct whcrc, event_work);
  167. struct device *dev = &whcrc->umc_dev->dev;
  168. size_t size;
  169. u64 urcevtaddr;
  170. urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR);
  171. size = urcevtaddr & URCEVTADDR_OFFSET_MASK;
  172. d_printf(3, dev, "received %zu octet event\n", size);
  173. d_dump(4, dev, whcrc->evt_buf, size > 32 ? 32 : size);
  174. uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size);
  175. whcrc_enable_events(whcrc);
  176. }
  177. /**
  178. * Catch interrupts?
  179. *
  180. * We ack inmediately (and expect the hw to do the right thing and
  181. * raise another IRQ if things have changed :)
  182. */
  183. static
  184. irqreturn_t whcrc_irq_cb(int irq, void *_whcrc)
  185. {
  186. struct whcrc *whcrc = _whcrc;
  187. struct device *dev = &whcrc->umc_dev->dev;
  188. u32 urcsts;
  189. urcsts = le_readl(whcrc->rc_base + URCSTS);
  190. if (!(urcsts & URCSTS_INT_MASK))
  191. return IRQ_NONE;
  192. le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS);
  193. d_printf(4, dev, "acked 0x%08x, urcsts 0x%08x\n",
  194. le_readl(whcrc->rc_base + URCSTS), urcsts);
  195. if (urcsts & URCSTS_HSE) {
  196. dev_err(dev, "host system error -- hardware halted\n");
  197. /* FIXME: do something sensible here */
  198. goto out;
  199. }
  200. if (urcsts & URCSTS_ER) {
  201. d_printf(3, dev, "ER: event ready\n");
  202. schedule_work(&whcrc->event_work);
  203. }
  204. if (urcsts & URCSTS_RCI) {
  205. d_printf(3, dev, "RCI: ready to execute another command\n");
  206. wake_up_all(&whcrc->cmd_wq);
  207. }
  208. out:
  209. return IRQ_HANDLED;
  210. }
  211. /**
  212. * Initialize a UMC RC interface: map regions, get (shared) IRQ
  213. */
  214. static
  215. int whcrc_setup_rc_umc(struct whcrc *whcrc)
  216. {
  217. int result = 0;
  218. struct device *dev = &whcrc->umc_dev->dev;
  219. struct umc_dev *umc_dev = whcrc->umc_dev;
  220. whcrc->area = umc_dev->resource.start;
  221. whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1;
  222. result = -EBUSY;
  223. if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME)
  224. == NULL) {
  225. dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n",
  226. whcrc->rc_len, whcrc->area, result);
  227. goto error_request_region;
  228. }
  229. whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len);
  230. if (whcrc->rc_base == NULL) {
  231. dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n",
  232. whcrc->rc_len, whcrc->area, result);
  233. goto error_ioremap_nocache;
  234. }
  235. result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED,
  236. KBUILD_MODNAME, whcrc);
  237. if (result < 0) {
  238. dev_err(dev, "can't allocate IRQ %d: %d\n",
  239. umc_dev->irq, result);
  240. goto error_request_irq;
  241. }
  242. result = -ENOMEM;
  243. whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
  244. &whcrc->cmd_dma_buf, GFP_KERNEL);
  245. if (whcrc->cmd_buf == NULL) {
  246. dev_err(dev, "Can't allocate cmd transfer buffer\n");
  247. goto error_cmd_buffer;
  248. }
  249. whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
  250. &whcrc->evt_dma_buf, GFP_KERNEL);
  251. if (whcrc->evt_buf == NULL) {
  252. dev_err(dev, "Can't allocate evt transfer buffer\n");
  253. goto error_evt_buffer;
  254. }
  255. d_printf(3, dev, "UWB RC Interface: %zu bytes at 0x%p, irq %u\n",
  256. whcrc->rc_len, whcrc->rc_base, umc_dev->irq);
  257. return 0;
  258. error_evt_buffer:
  259. dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
  260. whcrc->cmd_dma_buf);
  261. error_cmd_buffer:
  262. free_irq(umc_dev->irq, whcrc);
  263. error_request_irq:
  264. iounmap(whcrc->rc_base);
  265. error_ioremap_nocache:
  266. release_mem_region(whcrc->area, whcrc->rc_len);
  267. error_request_region:
  268. return result;
  269. }
  270. /**
  271. * Release RC's UMC resources
  272. */
  273. static
  274. void whcrc_release_rc_umc(struct whcrc *whcrc)
  275. {
  276. struct umc_dev *umc_dev = whcrc->umc_dev;
  277. dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf,
  278. whcrc->evt_dma_buf);
  279. dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
  280. whcrc->cmd_dma_buf);
  281. free_irq(umc_dev->irq, whcrc);
  282. iounmap(whcrc->rc_base);
  283. release_mem_region(whcrc->area, whcrc->rc_len);
  284. }
  285. /**
  286. * whcrc_start_rc - start a WHCI radio controller
  287. * @whcrc: the radio controller to start
  288. *
  289. * Reset the UMC device, start the radio controller, enable events and
  290. * finally enable interrupts.
  291. */
  292. static int whcrc_start_rc(struct uwb_rc *rc)
  293. {
  294. struct whcrc *whcrc = rc->priv;
  295. int result = 0;
  296. struct device *dev = &whcrc->umc_dev->dev;
  297. unsigned long start, duration;
  298. /* Reset the thing */
  299. le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD);
  300. if (d_test(3))
  301. start = jiffies;
  302. if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0,
  303. 5000, "device to reset at init") < 0) {
  304. result = -EBUSY;
  305. goto error;
  306. } else if (d_test(3)) {
  307. duration = jiffies - start;
  308. if (duration > msecs_to_jiffies(40))
  309. dev_err(dev, "Device took %ums to "
  310. "reset. MAX expected: 40ms\n",
  311. jiffies_to_msecs(duration));
  312. }
  313. /* Set the event buffer, start the controller (enable IRQs later) */
  314. le_writel(0, whcrc->rc_base + URCINTR);
  315. le_writel(URCCMD_RS, whcrc->rc_base + URCCMD);
  316. result = -ETIMEDOUT;
  317. if (d_test(3))
  318. start = jiffies;
  319. if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0,
  320. 5000, "device to start") < 0)
  321. goto error;
  322. if (d_test(3)) {
  323. duration = jiffies - start;
  324. if (duration > msecs_to_jiffies(40))
  325. dev_err(dev, "Device took %ums to start. "
  326. "MAX expected: 40ms\n",
  327. jiffies_to_msecs(duration));
  328. }
  329. whcrc_enable_events(whcrc);
  330. result = 0;
  331. le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR);
  332. error:
  333. return result;
  334. }
  335. /**
  336. * whcrc_stop_rc - stop a WHCI radio controller
  337. * @whcrc: the radio controller to stop
  338. *
  339. * Disable interrupts and cancel any pending event processing work
  340. * before clearing the Run/Stop bit.
  341. */
  342. static
  343. void whcrc_stop_rc(struct uwb_rc *rc)
  344. {
  345. struct whcrc *whcrc = rc->priv;
  346. struct umc_dev *umc_dev = whcrc->umc_dev;
  347. le_writel(0, whcrc->rc_base + URCINTR);
  348. cancel_work_sync(&whcrc->event_work);
  349. le_writel(0, whcrc->rc_base + URCCMD);
  350. whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS,
  351. URCSTS_HALTED, 0, 40, "URCSTS.HALTED");
  352. }
  353. static void whcrc_init(struct whcrc *whcrc)
  354. {
  355. spin_lock_init(&whcrc->irq_lock);
  356. init_waitqueue_head(&whcrc->cmd_wq);
  357. INIT_WORK(&whcrc->event_work, whcrc_event_work);
  358. }
  359. /**
  360. * Initialize the radio controller.
  361. *
  362. * NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the
  363. * IRQ handler we use that to determine if the hw is ready to
  364. * handle events. Looks like a race condition, but it really is
  365. * not.
  366. */
  367. static
  368. int whcrc_probe(struct umc_dev *umc_dev)
  369. {
  370. int result;
  371. struct uwb_rc *uwb_rc;
  372. struct whcrc *whcrc;
  373. struct device *dev = &umc_dev->dev;
  374. d_fnstart(3, dev, "(umc_dev %p)\n", umc_dev);
  375. result = -ENOMEM;
  376. uwb_rc = uwb_rc_alloc();
  377. if (uwb_rc == NULL) {
  378. dev_err(dev, "unable to allocate RC instance\n");
  379. goto error_rc_alloc;
  380. }
  381. whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL);
  382. if (whcrc == NULL) {
  383. dev_err(dev, "unable to allocate WHC-RC instance\n");
  384. goto error_alloc;
  385. }
  386. whcrc_init(whcrc);
  387. whcrc->umc_dev = umc_dev;
  388. result = whcrc_setup_rc_umc(whcrc);
  389. if (result < 0) {
  390. dev_err(dev, "Can't setup RC UMC interface: %d\n", result);
  391. goto error_setup_rc_umc;
  392. }
  393. whcrc->uwb_rc = uwb_rc;
  394. uwb_rc->owner = THIS_MODULE;
  395. uwb_rc->cmd = whcrc_cmd;
  396. uwb_rc->reset = whcrc_reset;
  397. uwb_rc->start = whcrc_start_rc;
  398. uwb_rc->stop = whcrc_stop_rc;
  399. result = uwb_rc_add(uwb_rc, dev, whcrc);
  400. if (result < 0)
  401. goto error_rc_add;
  402. umc_set_drvdata(umc_dev, whcrc);
  403. d_fnend(3, dev, "(umc_dev %p) = 0\n", umc_dev);
  404. return 0;
  405. error_rc_add:
  406. whcrc_release_rc_umc(whcrc);
  407. error_setup_rc_umc:
  408. kfree(whcrc);
  409. error_alloc:
  410. uwb_rc_put(uwb_rc);
  411. error_rc_alloc:
  412. d_fnend(3, dev, "(umc_dev %p) = %d\n", umc_dev, result);
  413. return result;
  414. }
  415. /**
  416. * Clean up the radio control resources
  417. *
  418. * When we up the command semaphore, everybody possibly held trying to
  419. * execute a command should be granted entry and then they'll see the
  420. * host is quiescing and up it (so it will chain to the next waiter).
  421. * This should not happen (in any case), as we can only remove when
  422. * there are no handles open...
  423. */
  424. static void whcrc_remove(struct umc_dev *umc_dev)
  425. {
  426. struct whcrc *whcrc = umc_get_drvdata(umc_dev);
  427. struct uwb_rc *uwb_rc = whcrc->uwb_rc;
  428. umc_set_drvdata(umc_dev, NULL);
  429. uwb_rc_rm(uwb_rc);
  430. whcrc_release_rc_umc(whcrc);
  431. kfree(whcrc);
  432. uwb_rc_put(uwb_rc);
  433. d_printf(1, &umc_dev->dev, "freed whcrc %p\n", whcrc);
  434. }
  435. /* PCI device ID's that we handle [so it gets loaded] */
  436. static struct pci_device_id whcrc_id_table[] = {
  437. { PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) },
  438. { /* empty last entry */ }
  439. };
  440. MODULE_DEVICE_TABLE(pci, whcrc_id_table);
  441. static struct umc_driver whcrc_driver = {
  442. .name = "whc-rc",
  443. .cap_id = UMC_CAP_ID_WHCI_RC,
  444. .probe = whcrc_probe,
  445. .remove = whcrc_remove,
  446. };
  447. static int __init whcrc_driver_init(void)
  448. {
  449. return umc_driver_register(&whcrc_driver);
  450. }
  451. module_init(whcrc_driver_init);
  452. static void __exit whcrc_driver_exit(void)
  453. {
  454. umc_driver_unregister(&whcrc_driver);
  455. }
  456. module_exit(whcrc_driver_exit);
  457. MODULE_AUTHOR("Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>");
  458. MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver");
  459. MODULE_LICENSE("GPL");