omap_twl.c 8.1 KB

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  1. /**
  2. * OMAP and TWL PMIC specific intializations.
  3. *
  4. * Copyright (C) 2010 Texas Instruments Incorporated.
  5. * Thara Gopinath
  6. * Copyright (C) 2009 Texas Instruments Incorporated.
  7. * Nishanth Menon
  8. * Copyright (C) 2009 Nokia Corporation
  9. * Paul Walmsley
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/err.h>
  16. #include <linux/io.h>
  17. #include <linux/kernel.h>
  18. #include <linux/i2c/twl.h>
  19. #include <plat/voltage.h>
  20. #define OMAP3_SRI2C_SLAVE_ADDR 0x12
  21. #define OMAP3_VDD_MPU_SR_CONTROL_REG 0x00
  22. #define OMAP3_VDD_CORE_SR_CONTROL_REG 0x01
  23. #define OMAP3_VP_CONFIG_ERROROFFSET 0x00
  24. #define OMAP3_VP_VSTEPMIN_VSTEPMIN 0x1
  25. #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04
  26. #define OMAP3_VP_VLIMITTO_TIMEOUT_US 200
  27. #define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14
  28. #define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42
  29. #define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18
  30. #define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c
  31. #define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18
  32. #define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3c
  33. #define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18
  34. #define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30
  35. #define OMAP4_SRI2C_SLAVE_ADDR 0x12
  36. #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55
  37. #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B
  38. #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61
  39. #define OMAP4_VP_CONFIG_ERROROFFSET 0x00
  40. #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01
  41. #define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04
  42. #define OMAP4_VP_VLIMITTO_TIMEOUT_US 200
  43. #define OMAP4_VP_MPU_VLIMITTO_VDDMIN 0xA
  44. #define OMAP4_VP_MPU_VLIMITTO_VDDMAX 0x39
  45. #define OMAP4_VP_IVA_VLIMITTO_VDDMIN 0xA
  46. #define OMAP4_VP_IVA_VLIMITTO_VDDMAX 0x2D
  47. #define OMAP4_VP_CORE_VLIMITTO_VDDMIN 0xA
  48. #define OMAP4_VP_CORE_VLIMITTO_VDDMAX 0x28
  49. static bool is_offset_valid;
  50. static u8 smps_offset;
  51. #define REG_SMPS_OFFSET 0xE0
  52. unsigned long twl4030_vsel_to_uv(const u8 vsel)
  53. {
  54. return (((vsel * 125) + 6000)) * 100;
  55. }
  56. u8 twl4030_uv_to_vsel(unsigned long uv)
  57. {
  58. return DIV_ROUND_UP(uv - 600000, 12500);
  59. }
  60. unsigned long twl6030_vsel_to_uv(const u8 vsel)
  61. {
  62. /*
  63. * In TWL6030 depending on the value of SMPS_OFFSET
  64. * efuse register the voltage range supported in
  65. * standard mode can be either between 0.6V - 1.3V or
  66. * 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse
  67. * is programmed to all 0's where as starting from
  68. * TWL6030 ES1.1 the efuse is programmed to 1
  69. */
  70. if (!is_offset_valid) {
  71. twl_i2c_read_u8(TWL6030_MODULE_ID0, &smps_offset,
  72. REG_SMPS_OFFSET);
  73. is_offset_valid = true;
  74. }
  75. /*
  76. * There is no specific formula for voltage to vsel
  77. * conversion above 1.3V. There are special hardcoded
  78. * values for voltages above 1.3V. Currently we are
  79. * hardcoding only for 1.35 V which is used for 1GH OPP for
  80. * OMAP4430.
  81. */
  82. if (vsel == 0x3A)
  83. return 1350000;
  84. if (smps_offset & 0x8)
  85. return ((((vsel - 1) * 125) + 7000)) * 100;
  86. else
  87. return ((((vsel - 1) * 125) + 6000)) * 100;
  88. }
  89. u8 twl6030_uv_to_vsel(unsigned long uv)
  90. {
  91. /*
  92. * In TWL6030 depending on the value of SMPS_OFFSET
  93. * efuse register the voltage range supported in
  94. * standard mode can be either between 0.6V - 1.3V or
  95. * 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse
  96. * is programmed to all 0's where as starting from
  97. * TWL6030 ES1.1 the efuse is programmed to 1
  98. */
  99. if (!is_offset_valid) {
  100. twl_i2c_read_u8(TWL6030_MODULE_ID0, &smps_offset,
  101. REG_SMPS_OFFSET);
  102. is_offset_valid = true;
  103. }
  104. /*
  105. * There is no specific formula for voltage to vsel
  106. * conversion above 1.3V. There are special hardcoded
  107. * values for voltages above 1.3V. Currently we are
  108. * hardcoding only for 1.35 V which is used for 1GH OPP for
  109. * OMAP4430.
  110. */
  111. if (uv == 1350000)
  112. return 0x3A;
  113. if (smps_offset & 0x8)
  114. return DIV_ROUND_UP(uv - 700000, 12500) + 1;
  115. else
  116. return DIV_ROUND_UP(uv - 600000, 12500) + 1;
  117. }
  118. static struct omap_volt_pmic_info omap3_mpu_volt_info = {
  119. .slew_rate = 4000,
  120. .step_size = 12500,
  121. .on_volt = 1200000,
  122. .onlp_volt = 1000000,
  123. .ret_volt = 975000,
  124. .off_volt = 600000,
  125. .volt_setup_time = 0xfff,
  126. .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
  127. .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN,
  128. .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX,
  129. .vp_vddmin = OMAP3430_VP1_VLIMITTO_VDDMIN,
  130. .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX,
  131. .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
  132. .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
  133. .pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG,
  134. .vsel_to_uv = twl4030_vsel_to_uv,
  135. .uv_to_vsel = twl4030_uv_to_vsel,
  136. };
  137. static struct omap_volt_pmic_info omap3_core_volt_info = {
  138. .slew_rate = 4000,
  139. .step_size = 12500,
  140. .on_volt = 1200000,
  141. .onlp_volt = 1000000,
  142. .ret_volt = 975000,
  143. .off_volt = 600000,
  144. .volt_setup_time = 0xfff,
  145. .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
  146. .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN,
  147. .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX,
  148. .vp_vddmin = OMAP3430_VP2_VLIMITTO_VDDMIN,
  149. .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX,
  150. .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
  151. .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
  152. .pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG,
  153. .vsel_to_uv = twl4030_vsel_to_uv,
  154. .uv_to_vsel = twl4030_uv_to_vsel,
  155. };
  156. static struct omap_volt_pmic_info omap4_mpu_volt_info = {
  157. .slew_rate = 4000,
  158. .step_size = 12500,
  159. .on_volt = 1350000,
  160. .onlp_volt = 1350000,
  161. .ret_volt = 837500,
  162. .off_volt = 600000,
  163. .volt_setup_time = 0,
  164. .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
  165. .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
  166. .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
  167. .vp_vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN,
  168. .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX,
  169. .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
  170. .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
  171. .pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG,
  172. .vsel_to_uv = twl6030_vsel_to_uv,
  173. .uv_to_vsel = twl6030_uv_to_vsel,
  174. };
  175. static struct omap_volt_pmic_info omap4_iva_volt_info = {
  176. .slew_rate = 4000,
  177. .step_size = 12500,
  178. .on_volt = 1100000,
  179. .onlp_volt = 1100000,
  180. .ret_volt = 837500,
  181. .off_volt = 600000,
  182. .volt_setup_time = 0,
  183. .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
  184. .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
  185. .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
  186. .vp_vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN,
  187. .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX,
  188. .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
  189. .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
  190. .pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG,
  191. .vsel_to_uv = twl6030_vsel_to_uv,
  192. .uv_to_vsel = twl6030_uv_to_vsel,
  193. };
  194. static struct omap_volt_pmic_info omap4_core_volt_info = {
  195. .slew_rate = 4000,
  196. .step_size = 12500,
  197. .on_volt = 1100000,
  198. .onlp_volt = 1100000,
  199. .ret_volt = 837500,
  200. .off_volt = 600000,
  201. .volt_setup_time = 0,
  202. .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
  203. .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
  204. .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
  205. .vp_vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN,
  206. .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX,
  207. .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
  208. .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
  209. .pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG,
  210. .vsel_to_uv = twl6030_vsel_to_uv,
  211. .uv_to_vsel = twl6030_uv_to_vsel,
  212. };
  213. int __init omap4_twl_init(void)
  214. {
  215. struct voltagedomain *voltdm;
  216. if (!cpu_is_omap44xx())
  217. return -ENODEV;
  218. voltdm = omap_voltage_domain_lookup("mpu");
  219. omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info);
  220. voltdm = omap_voltage_domain_lookup("iva");
  221. omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info);
  222. voltdm = omap_voltage_domain_lookup("core");
  223. omap_voltage_register_pmic(voltdm, &omap4_core_volt_info);
  224. return 0;
  225. }
  226. int __init omap3_twl_init(void)
  227. {
  228. struct voltagedomain *voltdm;
  229. if (!cpu_is_omap34xx())
  230. return -ENODEV;
  231. if (cpu_is_omap3630()) {
  232. omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
  233. omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
  234. omap3_core_volt_info.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
  235. omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
  236. }
  237. voltdm = omap_voltage_domain_lookup("mpu");
  238. omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info);
  239. voltdm = omap_voltage_domain_lookup("core");
  240. omap_voltage_register_pmic(voltdm, &omap3_core_volt_info);
  241. return 0;
  242. }