ipath_rc.c 45 KB

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  1. /*
  2. * Copyright (c) 2006 QLogic, Inc. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include "ipath_verbs.h"
  34. #include "ips_common.h"
  35. /* cut down ridiculously long IB macro names */
  36. #define OP(x) IB_OPCODE_RC_##x
  37. /**
  38. * ipath_init_restart- initialize the qp->s_sge after a restart
  39. * @qp: the QP who's SGE we're restarting
  40. * @wqe: the work queue to initialize the QP's SGE from
  41. *
  42. * The QP s_lock should be held.
  43. */
  44. static void ipath_init_restart(struct ipath_qp *qp, struct ipath_swqe *wqe)
  45. {
  46. struct ipath_ibdev *dev;
  47. u32 len;
  48. len = ((qp->s_psn - wqe->psn) & IPS_PSN_MASK) *
  49. ib_mtu_enum_to_int(qp->path_mtu);
  50. qp->s_sge.sge = wqe->sg_list[0];
  51. qp->s_sge.sg_list = wqe->sg_list + 1;
  52. qp->s_sge.num_sge = wqe->wr.num_sge;
  53. ipath_skip_sge(&qp->s_sge, len);
  54. qp->s_len = wqe->length - len;
  55. dev = to_idev(qp->ibqp.device);
  56. spin_lock(&dev->pending_lock);
  57. if (list_empty(&qp->timerwait))
  58. list_add_tail(&qp->timerwait,
  59. &dev->pending[dev->pending_index]);
  60. spin_unlock(&dev->pending_lock);
  61. }
  62. /**
  63. * ipath_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  64. * @qp: a pointer to the QP
  65. * @ohdr: a pointer to the IB header being constructed
  66. * @pmtu: the path MTU
  67. *
  68. * Return bth0 if constructed; otherwise, return 0.
  69. * Note the QP s_lock must be held.
  70. */
  71. u32 ipath_make_rc_ack(struct ipath_qp *qp,
  72. struct ipath_other_headers *ohdr,
  73. u32 pmtu)
  74. {
  75. struct ipath_sge_state *ss;
  76. u32 hwords;
  77. u32 len;
  78. u32 bth0;
  79. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  80. hwords = 5;
  81. /*
  82. * Send a response. Note that we are in the responder's
  83. * side of the QP context.
  84. */
  85. switch (qp->s_ack_state) {
  86. case OP(RDMA_READ_REQUEST):
  87. ss = &qp->s_rdma_sge;
  88. len = qp->s_rdma_len;
  89. if (len > pmtu) {
  90. len = pmtu;
  91. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  92. } else
  93. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  94. qp->s_rdma_len -= len;
  95. bth0 = qp->s_ack_state << 24;
  96. ohdr->u.aeth = ipath_compute_aeth(qp);
  97. hwords++;
  98. break;
  99. case OP(RDMA_READ_RESPONSE_FIRST):
  100. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  101. /* FALLTHROUGH */
  102. case OP(RDMA_READ_RESPONSE_MIDDLE):
  103. ss = &qp->s_rdma_sge;
  104. len = qp->s_rdma_len;
  105. if (len > pmtu)
  106. len = pmtu;
  107. else {
  108. ohdr->u.aeth = ipath_compute_aeth(qp);
  109. hwords++;
  110. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  111. }
  112. qp->s_rdma_len -= len;
  113. bth0 = qp->s_ack_state << 24;
  114. break;
  115. case OP(RDMA_READ_RESPONSE_LAST):
  116. case OP(RDMA_READ_RESPONSE_ONLY):
  117. /*
  118. * We have to prevent new requests from changing
  119. * the r_sge state while a ipath_verbs_send()
  120. * is in progress.
  121. * Changing r_state allows the receiver
  122. * to continue processing new packets.
  123. * We do it here now instead of above so
  124. * that we are sure the packet was sent before
  125. * changing the state.
  126. */
  127. qp->r_state = OP(RDMA_READ_RESPONSE_LAST);
  128. qp->s_ack_state = OP(ACKNOWLEDGE);
  129. return 0;
  130. case OP(COMPARE_SWAP):
  131. case OP(FETCH_ADD):
  132. ss = NULL;
  133. len = 0;
  134. qp->r_state = OP(SEND_LAST);
  135. qp->s_ack_state = OP(ACKNOWLEDGE);
  136. bth0 = IB_OPCODE_ATOMIC_ACKNOWLEDGE << 24;
  137. ohdr->u.at.aeth = ipath_compute_aeth(qp);
  138. ohdr->u.at.atomic_ack_eth = cpu_to_be64(qp->s_ack_atomic);
  139. hwords += sizeof(ohdr->u.at) / 4;
  140. break;
  141. default:
  142. /* Send a regular ACK. */
  143. ss = NULL;
  144. len = 0;
  145. qp->s_ack_state = OP(ACKNOWLEDGE);
  146. bth0 = qp->s_ack_state << 24;
  147. ohdr->u.aeth = ipath_compute_aeth(qp);
  148. hwords++;
  149. }
  150. qp->s_hdrwords = hwords;
  151. qp->s_cur_sge = ss;
  152. qp->s_cur_size = len;
  153. return bth0;
  154. }
  155. /**
  156. * ipath_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  157. * @qp: a pointer to the QP
  158. * @ohdr: a pointer to the IB header being constructed
  159. * @pmtu: the path MTU
  160. * @bth0p: pointer to the BTH opcode word
  161. * @bth2p: pointer to the BTH PSN word
  162. *
  163. * Return 1 if constructed; otherwise, return 0.
  164. * Note the QP s_lock must be held.
  165. */
  166. int ipath_make_rc_req(struct ipath_qp *qp,
  167. struct ipath_other_headers *ohdr,
  168. u32 pmtu, u32 *bth0p, u32 *bth2p)
  169. {
  170. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  171. struct ipath_sge_state *ss;
  172. struct ipath_swqe *wqe;
  173. u32 hwords;
  174. u32 len;
  175. u32 bth0;
  176. u32 bth2;
  177. char newreq;
  178. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK) ||
  179. qp->s_rnr_timeout)
  180. goto done;
  181. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  182. hwords = 5;
  183. bth0 = 0;
  184. /* Send a request. */
  185. wqe = get_swqe_ptr(qp, qp->s_cur);
  186. switch (qp->s_state) {
  187. default:
  188. /*
  189. * Resend an old request or start a new one.
  190. *
  191. * We keep track of the current SWQE so that
  192. * we don't reset the "furthest progress" state
  193. * if we need to back up.
  194. */
  195. newreq = 0;
  196. if (qp->s_cur == qp->s_tail) {
  197. /* Check if send work queue is empty. */
  198. if (qp->s_tail == qp->s_head)
  199. goto done;
  200. qp->s_psn = wqe->psn = qp->s_next_psn;
  201. newreq = 1;
  202. }
  203. /*
  204. * Note that we have to be careful not to modify the
  205. * original work request since we may need to resend
  206. * it.
  207. */
  208. qp->s_sge.sge = wqe->sg_list[0];
  209. qp->s_sge.sg_list = wqe->sg_list + 1;
  210. qp->s_sge.num_sge = wqe->wr.num_sge;
  211. qp->s_len = len = wqe->length;
  212. ss = &qp->s_sge;
  213. bth2 = 0;
  214. switch (wqe->wr.opcode) {
  215. case IB_WR_SEND:
  216. case IB_WR_SEND_WITH_IMM:
  217. /* If no credit, return. */
  218. if (qp->s_lsn != (u32) -1 &&
  219. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  220. goto done;
  221. wqe->lpsn = wqe->psn;
  222. if (len > pmtu) {
  223. wqe->lpsn += (len - 1) / pmtu;
  224. qp->s_state = OP(SEND_FIRST);
  225. len = pmtu;
  226. break;
  227. }
  228. if (wqe->wr.opcode == IB_WR_SEND)
  229. qp->s_state = OP(SEND_ONLY);
  230. else {
  231. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  232. /* Immediate data comes after the BTH */
  233. ohdr->u.imm_data = wqe->wr.imm_data;
  234. hwords += 1;
  235. }
  236. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  237. bth0 |= 1 << 23;
  238. bth2 = 1 << 31; /* Request ACK. */
  239. if (++qp->s_cur == qp->s_size)
  240. qp->s_cur = 0;
  241. break;
  242. case IB_WR_RDMA_WRITE:
  243. if (newreq)
  244. qp->s_lsn++;
  245. /* FALLTHROUGH */
  246. case IB_WR_RDMA_WRITE_WITH_IMM:
  247. /* If no credit, return. */
  248. if (qp->s_lsn != (u32) -1 &&
  249. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  250. goto done;
  251. ohdr->u.rc.reth.vaddr =
  252. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  253. ohdr->u.rc.reth.rkey =
  254. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  255. ohdr->u.rc.reth.length = cpu_to_be32(len);
  256. hwords += sizeof(struct ib_reth) / 4;
  257. wqe->lpsn = wqe->psn;
  258. if (len > pmtu) {
  259. wqe->lpsn += (len - 1) / pmtu;
  260. qp->s_state = OP(RDMA_WRITE_FIRST);
  261. len = pmtu;
  262. break;
  263. }
  264. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  265. qp->s_state = OP(RDMA_WRITE_ONLY);
  266. else {
  267. qp->s_state =
  268. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  269. /* Immediate data comes
  270. * after RETH */
  271. ohdr->u.rc.imm_data = wqe->wr.imm_data;
  272. hwords += 1;
  273. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  274. bth0 |= 1 << 23;
  275. }
  276. bth2 = 1 << 31; /* Request ACK. */
  277. if (++qp->s_cur == qp->s_size)
  278. qp->s_cur = 0;
  279. break;
  280. case IB_WR_RDMA_READ:
  281. ohdr->u.rc.reth.vaddr =
  282. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  283. ohdr->u.rc.reth.rkey =
  284. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  285. ohdr->u.rc.reth.length = cpu_to_be32(len);
  286. qp->s_state = OP(RDMA_READ_REQUEST);
  287. hwords += sizeof(ohdr->u.rc.reth) / 4;
  288. if (newreq) {
  289. qp->s_lsn++;
  290. /*
  291. * Adjust s_next_psn to count the
  292. * expected number of responses.
  293. */
  294. if (len > pmtu)
  295. qp->s_next_psn += (len - 1) / pmtu;
  296. wqe->lpsn = qp->s_next_psn++;
  297. }
  298. ss = NULL;
  299. len = 0;
  300. if (++qp->s_cur == qp->s_size)
  301. qp->s_cur = 0;
  302. break;
  303. case IB_WR_ATOMIC_CMP_AND_SWP:
  304. case IB_WR_ATOMIC_FETCH_AND_ADD:
  305. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP)
  306. qp->s_state = OP(COMPARE_SWAP);
  307. else
  308. qp->s_state = OP(FETCH_ADD);
  309. ohdr->u.atomic_eth.vaddr = cpu_to_be64(
  310. wqe->wr.wr.atomic.remote_addr);
  311. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  312. wqe->wr.wr.atomic.rkey);
  313. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  314. wqe->wr.wr.atomic.swap);
  315. ohdr->u.atomic_eth.compare_data = cpu_to_be64(
  316. wqe->wr.wr.atomic.compare_add);
  317. hwords += sizeof(struct ib_atomic_eth) / 4;
  318. if (newreq) {
  319. qp->s_lsn++;
  320. wqe->lpsn = wqe->psn;
  321. }
  322. if (++qp->s_cur == qp->s_size)
  323. qp->s_cur = 0;
  324. ss = NULL;
  325. len = 0;
  326. break;
  327. default:
  328. goto done;
  329. }
  330. if (newreq) {
  331. qp->s_tail++;
  332. if (qp->s_tail >= qp->s_size)
  333. qp->s_tail = 0;
  334. }
  335. bth2 |= qp->s_psn++ & IPS_PSN_MASK;
  336. if ((int)(qp->s_psn - qp->s_next_psn) > 0)
  337. qp->s_next_psn = qp->s_psn;
  338. spin_lock(&dev->pending_lock);
  339. if (list_empty(&qp->timerwait))
  340. list_add_tail(&qp->timerwait,
  341. &dev->pending[dev->pending_index]);
  342. spin_unlock(&dev->pending_lock);
  343. break;
  344. case OP(RDMA_READ_RESPONSE_FIRST):
  345. /*
  346. * This case can only happen if a send is restarted. See
  347. * ipath_restart_rc().
  348. */
  349. ipath_init_restart(qp, wqe);
  350. /* FALLTHROUGH */
  351. case OP(SEND_FIRST):
  352. qp->s_state = OP(SEND_MIDDLE);
  353. /* FALLTHROUGH */
  354. case OP(SEND_MIDDLE):
  355. bth2 = qp->s_psn++ & IPS_PSN_MASK;
  356. if ((int)(qp->s_psn - qp->s_next_psn) > 0)
  357. qp->s_next_psn = qp->s_psn;
  358. ss = &qp->s_sge;
  359. len = qp->s_len;
  360. if (len > pmtu) {
  361. /*
  362. * Request an ACK every 1/2 MB to avoid retransmit
  363. * timeouts.
  364. */
  365. if (((wqe->length - len) % (512 * 1024)) == 0)
  366. bth2 |= 1 << 31;
  367. len = pmtu;
  368. break;
  369. }
  370. if (wqe->wr.opcode == IB_WR_SEND)
  371. qp->s_state = OP(SEND_LAST);
  372. else {
  373. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  374. /* Immediate data comes after the BTH */
  375. ohdr->u.imm_data = wqe->wr.imm_data;
  376. hwords += 1;
  377. }
  378. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  379. bth0 |= 1 << 23;
  380. bth2 |= 1 << 31; /* Request ACK. */
  381. qp->s_cur++;
  382. if (qp->s_cur >= qp->s_size)
  383. qp->s_cur = 0;
  384. break;
  385. case OP(RDMA_READ_RESPONSE_LAST):
  386. /*
  387. * This case can only happen if a RDMA write is restarted.
  388. * See ipath_restart_rc().
  389. */
  390. ipath_init_restart(qp, wqe);
  391. /* FALLTHROUGH */
  392. case OP(RDMA_WRITE_FIRST):
  393. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  394. /* FALLTHROUGH */
  395. case OP(RDMA_WRITE_MIDDLE):
  396. bth2 = qp->s_psn++ & IPS_PSN_MASK;
  397. if ((int)(qp->s_psn - qp->s_next_psn) > 0)
  398. qp->s_next_psn = qp->s_psn;
  399. ss = &qp->s_sge;
  400. len = qp->s_len;
  401. if (len > pmtu) {
  402. /*
  403. * Request an ACK every 1/2 MB to avoid retransmit
  404. * timeouts.
  405. */
  406. if (((wqe->length - len) % (512 * 1024)) == 0)
  407. bth2 |= 1 << 31;
  408. len = pmtu;
  409. break;
  410. }
  411. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  412. qp->s_state = OP(RDMA_WRITE_LAST);
  413. else {
  414. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  415. /* Immediate data comes after the BTH */
  416. ohdr->u.imm_data = wqe->wr.imm_data;
  417. hwords += 1;
  418. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  419. bth0 |= 1 << 23;
  420. }
  421. bth2 |= 1 << 31; /* Request ACK. */
  422. qp->s_cur++;
  423. if (qp->s_cur >= qp->s_size)
  424. qp->s_cur = 0;
  425. break;
  426. case OP(RDMA_READ_RESPONSE_MIDDLE):
  427. /*
  428. * This case can only happen if a RDMA read is restarted.
  429. * See ipath_restart_rc().
  430. */
  431. ipath_init_restart(qp, wqe);
  432. len = ((qp->s_psn - wqe->psn) & IPS_PSN_MASK) * pmtu;
  433. ohdr->u.rc.reth.vaddr =
  434. cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
  435. ohdr->u.rc.reth.rkey =
  436. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  437. ohdr->u.rc.reth.length = cpu_to_be32(qp->s_len);
  438. qp->s_state = OP(RDMA_READ_REQUEST);
  439. hwords += sizeof(ohdr->u.rc.reth) / 4;
  440. bth2 = qp->s_psn++ & IPS_PSN_MASK;
  441. if ((int)(qp->s_psn - qp->s_next_psn) > 0)
  442. qp->s_next_psn = qp->s_psn;
  443. ss = NULL;
  444. len = 0;
  445. qp->s_cur++;
  446. if (qp->s_cur == qp->s_size)
  447. qp->s_cur = 0;
  448. break;
  449. case OP(RDMA_READ_REQUEST):
  450. case OP(COMPARE_SWAP):
  451. case OP(FETCH_ADD):
  452. /*
  453. * We shouldn't start anything new until this request is
  454. * finished. The ACK will handle rescheduling us. XXX The
  455. * number of outstanding ones is negotiated at connection
  456. * setup time (see pg. 258,289)? XXX Also, if we support
  457. * multiple outstanding requests, we need to check the WQE
  458. * IB_SEND_FENCE flag and not send a new request if a RDMA
  459. * read or atomic is pending.
  460. */
  461. goto done;
  462. }
  463. qp->s_len -= len;
  464. qp->s_hdrwords = hwords;
  465. qp->s_cur_sge = ss;
  466. qp->s_cur_size = len;
  467. *bth0p = bth0 | (qp->s_state << 24);
  468. *bth2p = bth2;
  469. return 1;
  470. done:
  471. return 0;
  472. }
  473. /**
  474. * send_rc_ack - Construct an ACK packet and send it
  475. * @qp: a pointer to the QP
  476. *
  477. * This is called from ipath_rc_rcv() and only uses the receive
  478. * side QP state.
  479. * Note that RDMA reads are handled in the send side QP state and tasklet.
  480. */
  481. static void send_rc_ack(struct ipath_qp *qp)
  482. {
  483. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  484. u16 lrh0;
  485. u32 bth0;
  486. u32 hwords;
  487. struct ipath_ib_header hdr;
  488. struct ipath_other_headers *ohdr;
  489. /* Construct the header. */
  490. ohdr = &hdr.u.oth;
  491. lrh0 = IPS_LRH_BTH;
  492. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
  493. hwords = 6;
  494. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  495. hwords += ipath_make_grh(dev, &hdr.u.l.grh,
  496. &qp->remote_ah_attr.grh,
  497. hwords, 0);
  498. ohdr = &hdr.u.l.oth;
  499. lrh0 = IPS_LRH_GRH;
  500. }
  501. bth0 = ipath_layer_get_pkey(dev->dd, qp->s_pkey_index);
  502. ohdr->u.aeth = ipath_compute_aeth(qp);
  503. if (qp->s_ack_state >= OP(COMPARE_SWAP)) {
  504. bth0 |= IB_OPCODE_ATOMIC_ACKNOWLEDGE << 24;
  505. ohdr->u.at.atomic_ack_eth = cpu_to_be64(qp->s_ack_atomic);
  506. hwords += sizeof(ohdr->u.at.atomic_ack_eth) / 4;
  507. } else
  508. bth0 |= OP(ACKNOWLEDGE) << 24;
  509. lrh0 |= qp->remote_ah_attr.sl << 4;
  510. hdr.lrh[0] = cpu_to_be16(lrh0);
  511. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  512. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  513. hdr.lrh[3] = cpu_to_be16(ipath_layer_get_lid(dev->dd));
  514. ohdr->bth[0] = cpu_to_be32(bth0);
  515. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  516. ohdr->bth[2] = cpu_to_be32(qp->s_ack_psn & IPS_PSN_MASK);
  517. /*
  518. * If we can send the ACK, clear the ACK state.
  519. */
  520. if (ipath_verbs_send(dev->dd, hwords, (u32 *) &hdr, 0, NULL) == 0) {
  521. qp->s_ack_state = OP(ACKNOWLEDGE);
  522. dev->n_rc_qacks++;
  523. dev->n_unicast_xmit++;
  524. }
  525. }
  526. /**
  527. * ipath_restart_rc - back up requester to resend the last un-ACKed request
  528. * @qp: the QP to restart
  529. * @psn: packet sequence number for the request
  530. * @wc: the work completion request
  531. *
  532. * The QP s_lock should be held.
  533. */
  534. void ipath_restart_rc(struct ipath_qp *qp, u32 psn, struct ib_wc *wc)
  535. {
  536. struct ipath_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  537. struct ipath_ibdev *dev;
  538. u32 n;
  539. /*
  540. * If there are no requests pending, we are done.
  541. */
  542. if (ipath_cmp24(psn, qp->s_next_psn) >= 0 ||
  543. qp->s_last == qp->s_tail)
  544. goto done;
  545. if (qp->s_retry == 0) {
  546. wc->wr_id = wqe->wr.wr_id;
  547. wc->status = IB_WC_RETRY_EXC_ERR;
  548. wc->opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  549. wc->vendor_err = 0;
  550. wc->byte_len = 0;
  551. wc->qp_num = qp->ibqp.qp_num;
  552. wc->src_qp = qp->remote_qpn;
  553. wc->pkey_index = 0;
  554. wc->slid = qp->remote_ah_attr.dlid;
  555. wc->sl = qp->remote_ah_attr.sl;
  556. wc->dlid_path_bits = 0;
  557. wc->port_num = 0;
  558. ipath_sqerror_qp(qp, wc);
  559. goto bail;
  560. }
  561. qp->s_retry--;
  562. /*
  563. * Remove the QP from the timeout queue.
  564. * Note: it may already have been removed by ipath_ib_timer().
  565. */
  566. dev = to_idev(qp->ibqp.device);
  567. spin_lock(&dev->pending_lock);
  568. if (!list_empty(&qp->timerwait))
  569. list_del_init(&qp->timerwait);
  570. spin_unlock(&dev->pending_lock);
  571. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  572. dev->n_rc_resends++;
  573. else
  574. dev->n_rc_resends += (int)qp->s_psn - (int)psn;
  575. /*
  576. * If we are starting the request from the beginning, let the normal
  577. * send code handle initialization.
  578. */
  579. qp->s_cur = qp->s_last;
  580. if (ipath_cmp24(psn, wqe->psn) <= 0) {
  581. qp->s_state = OP(SEND_LAST);
  582. qp->s_psn = wqe->psn;
  583. } else {
  584. n = qp->s_cur;
  585. for (;;) {
  586. if (++n == qp->s_size)
  587. n = 0;
  588. if (n == qp->s_tail) {
  589. if (ipath_cmp24(psn, qp->s_next_psn) >= 0) {
  590. qp->s_cur = n;
  591. wqe = get_swqe_ptr(qp, n);
  592. }
  593. break;
  594. }
  595. wqe = get_swqe_ptr(qp, n);
  596. if (ipath_cmp24(psn, wqe->psn) < 0)
  597. break;
  598. qp->s_cur = n;
  599. }
  600. qp->s_psn = psn;
  601. /*
  602. * Reset the state to restart in the middle of a request.
  603. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  604. * See ipath_do_rc_send().
  605. */
  606. switch (wqe->wr.opcode) {
  607. case IB_WR_SEND:
  608. case IB_WR_SEND_WITH_IMM:
  609. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  610. break;
  611. case IB_WR_RDMA_WRITE:
  612. case IB_WR_RDMA_WRITE_WITH_IMM:
  613. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  614. break;
  615. case IB_WR_RDMA_READ:
  616. qp->s_state =
  617. OP(RDMA_READ_RESPONSE_MIDDLE);
  618. break;
  619. default:
  620. /*
  621. * This case shouldn't happen since its only
  622. * one PSN per req.
  623. */
  624. qp->s_state = OP(SEND_LAST);
  625. }
  626. }
  627. done:
  628. tasklet_hi_schedule(&qp->s_task);
  629. bail:
  630. return;
  631. }
  632. /**
  633. * reset_psn - reset the QP state to send starting from PSN
  634. * @qp: the QP
  635. * @psn: the packet sequence number to restart at
  636. *
  637. * This is called from ipath_rc_rcv_resp() to process an incoming RC ACK
  638. * for the given QP.
  639. * Called at interrupt level with the QP s_lock held.
  640. */
  641. static void reset_psn(struct ipath_qp *qp, u32 psn)
  642. {
  643. struct ipath_swqe *wqe;
  644. u32 n;
  645. n = qp->s_cur;
  646. wqe = get_swqe_ptr(qp, n);
  647. for (;;) {
  648. if (++n == qp->s_size)
  649. n = 0;
  650. if (n == qp->s_tail) {
  651. if (ipath_cmp24(psn, qp->s_next_psn) >= 0) {
  652. qp->s_cur = n;
  653. wqe = get_swqe_ptr(qp, n);
  654. }
  655. break;
  656. }
  657. wqe = get_swqe_ptr(qp, n);
  658. if (ipath_cmp24(psn, wqe->psn) < 0)
  659. break;
  660. qp->s_cur = n;
  661. }
  662. qp->s_psn = psn;
  663. /*
  664. * Set the state to restart in the middle of a
  665. * request. Don't change the s_sge, s_cur_sge, or
  666. * s_cur_size. See ipath_do_rc_send().
  667. */
  668. switch (wqe->wr.opcode) {
  669. case IB_WR_SEND:
  670. case IB_WR_SEND_WITH_IMM:
  671. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  672. break;
  673. case IB_WR_RDMA_WRITE:
  674. case IB_WR_RDMA_WRITE_WITH_IMM:
  675. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  676. break;
  677. case IB_WR_RDMA_READ:
  678. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  679. break;
  680. default:
  681. /*
  682. * This case shouldn't happen since its only
  683. * one PSN per req.
  684. */
  685. qp->s_state = OP(SEND_LAST);
  686. }
  687. }
  688. /**
  689. * do_rc_ack - process an incoming RC ACK
  690. * @qp: the QP the ACK came in on
  691. * @psn: the packet sequence number of the ACK
  692. * @opcode: the opcode of the request that resulted in the ACK
  693. *
  694. * This is called from ipath_rc_rcv() to process an incoming RC ACK
  695. * for the given QP.
  696. * Called at interrupt level with the QP s_lock held.
  697. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  698. */
  699. static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode)
  700. {
  701. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  702. struct ib_wc wc;
  703. struct ipath_swqe *wqe;
  704. int ret = 0;
  705. /*
  706. * Remove the QP from the timeout queue (or RNR timeout queue).
  707. * If ipath_ib_timer() has already removed it,
  708. * it's OK since we hold the QP s_lock and ipath_restart_rc()
  709. * just won't find anything to restart if we ACK everything.
  710. */
  711. spin_lock(&dev->pending_lock);
  712. if (!list_empty(&qp->timerwait))
  713. list_del_init(&qp->timerwait);
  714. spin_unlock(&dev->pending_lock);
  715. /*
  716. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  717. * requests and implicitly NAK RDMA read and atomic requests issued
  718. * before the NAK'ed request. The MSN won't include the NAK'ed
  719. * request but will include an ACK'ed request(s).
  720. */
  721. wqe = get_swqe_ptr(qp, qp->s_last);
  722. /* Nothing is pending to ACK/NAK. */
  723. if (qp->s_last == qp->s_tail)
  724. goto bail;
  725. /*
  726. * The MSN might be for a later WQE than the PSN indicates so
  727. * only complete WQEs that the PSN finishes.
  728. */
  729. while (ipath_cmp24(psn, wqe->lpsn) >= 0) {
  730. /* If we are ACKing a WQE, the MSN should be >= the SSN. */
  731. if (ipath_cmp24(aeth, wqe->ssn) < 0)
  732. break;
  733. /*
  734. * If this request is a RDMA read or atomic, and the ACK is
  735. * for a later operation, this ACK NAKs the RDMA read or
  736. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  737. * can ACK a RDMA read and likewise for atomic ops. Note
  738. * that the NAK case can only happen if relaxed ordering is
  739. * used and requests are sent after an RDMA read or atomic
  740. * is sent but before the response is received.
  741. */
  742. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  743. opcode != OP(RDMA_READ_RESPONSE_LAST)) ||
  744. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  745. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  746. (opcode != OP(ATOMIC_ACKNOWLEDGE) ||
  747. ipath_cmp24(wqe->psn, psn) != 0))) {
  748. /*
  749. * The last valid PSN seen is the previous
  750. * request's.
  751. */
  752. qp->s_last_psn = wqe->psn - 1;
  753. /* Retry this request. */
  754. ipath_restart_rc(qp, wqe->psn, &wc);
  755. /*
  756. * No need to process the ACK/NAK since we are
  757. * restarting an earlier request.
  758. */
  759. goto bail;
  760. }
  761. /* Post a send completion queue entry if requested. */
  762. if (!test_bit(IPATH_S_SIGNAL_REQ_WR, &qp->s_flags) ||
  763. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  764. wc.wr_id = wqe->wr.wr_id;
  765. wc.status = IB_WC_SUCCESS;
  766. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  767. wc.vendor_err = 0;
  768. wc.byte_len = wqe->length;
  769. wc.qp_num = qp->ibqp.qp_num;
  770. wc.src_qp = qp->remote_qpn;
  771. wc.pkey_index = 0;
  772. wc.slid = qp->remote_ah_attr.dlid;
  773. wc.sl = qp->remote_ah_attr.sl;
  774. wc.dlid_path_bits = 0;
  775. wc.port_num = 0;
  776. ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
  777. }
  778. qp->s_retry = qp->s_retry_cnt;
  779. /*
  780. * If we are completing a request which is in the process of
  781. * being resent, we can stop resending it since we know the
  782. * responder has already seen it.
  783. */
  784. if (qp->s_last == qp->s_cur) {
  785. if (++qp->s_cur >= qp->s_size)
  786. qp->s_cur = 0;
  787. wqe = get_swqe_ptr(qp, qp->s_cur);
  788. qp->s_state = OP(SEND_LAST);
  789. qp->s_psn = wqe->psn;
  790. }
  791. if (++qp->s_last >= qp->s_size)
  792. qp->s_last = 0;
  793. wqe = get_swqe_ptr(qp, qp->s_last);
  794. if (qp->s_last == qp->s_tail)
  795. break;
  796. }
  797. switch (aeth >> 29) {
  798. case 0: /* ACK */
  799. dev->n_rc_acks++;
  800. /* If this is a partial ACK, reset the retransmit timer. */
  801. if (qp->s_last != qp->s_tail) {
  802. spin_lock(&dev->pending_lock);
  803. list_add_tail(&qp->timerwait,
  804. &dev->pending[dev->pending_index]);
  805. spin_unlock(&dev->pending_lock);
  806. }
  807. ipath_get_credit(qp, aeth);
  808. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  809. qp->s_retry = qp->s_retry_cnt;
  810. qp->s_last_psn = psn;
  811. ret = 1;
  812. goto bail;
  813. case 1: /* RNR NAK */
  814. dev->n_rnr_naks++;
  815. if (qp->s_rnr_retry == 0) {
  816. if (qp->s_last == qp->s_tail)
  817. goto bail;
  818. wc.status = IB_WC_RNR_RETRY_EXC_ERR;
  819. goto class_b;
  820. }
  821. if (qp->s_rnr_retry_cnt < 7)
  822. qp->s_rnr_retry--;
  823. if (qp->s_last == qp->s_tail)
  824. goto bail;
  825. /* The last valid PSN seen is the previous request's. */
  826. qp->s_last_psn = wqe->psn - 1;
  827. dev->n_rc_resends += (int)qp->s_psn - (int)psn;
  828. /*
  829. * If we are starting the request from the beginning, let
  830. * the normal send code handle initialization.
  831. */
  832. qp->s_cur = qp->s_last;
  833. wqe = get_swqe_ptr(qp, qp->s_cur);
  834. if (ipath_cmp24(psn, wqe->psn) <= 0) {
  835. qp->s_state = OP(SEND_LAST);
  836. qp->s_psn = wqe->psn;
  837. } else
  838. reset_psn(qp, psn);
  839. qp->s_rnr_timeout =
  840. ib_ipath_rnr_table[(aeth >> IPS_AETH_CREDIT_SHIFT) &
  841. IPS_AETH_CREDIT_MASK];
  842. ipath_insert_rnr_queue(qp);
  843. goto bail;
  844. case 3: /* NAK */
  845. /* The last valid PSN seen is the previous request's. */
  846. if (qp->s_last != qp->s_tail)
  847. qp->s_last_psn = wqe->psn - 1;
  848. switch ((aeth >> IPS_AETH_CREDIT_SHIFT) &
  849. IPS_AETH_CREDIT_MASK) {
  850. case 0: /* PSN sequence error */
  851. dev->n_seq_naks++;
  852. /*
  853. * Back up to the responder's expected PSN. XXX
  854. * Note that we might get a NAK in the middle of an
  855. * RDMA READ response which terminates the RDMA
  856. * READ.
  857. */
  858. if (qp->s_last == qp->s_tail)
  859. break;
  860. if (ipath_cmp24(psn, wqe->psn) < 0)
  861. break;
  862. /* Retry the request. */
  863. ipath_restart_rc(qp, psn, &wc);
  864. break;
  865. case 1: /* Invalid Request */
  866. wc.status = IB_WC_REM_INV_REQ_ERR;
  867. dev->n_other_naks++;
  868. goto class_b;
  869. case 2: /* Remote Access Error */
  870. wc.status = IB_WC_REM_ACCESS_ERR;
  871. dev->n_other_naks++;
  872. goto class_b;
  873. case 3: /* Remote Operation Error */
  874. wc.status = IB_WC_REM_OP_ERR;
  875. dev->n_other_naks++;
  876. class_b:
  877. wc.wr_id = wqe->wr.wr_id;
  878. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  879. wc.vendor_err = 0;
  880. wc.byte_len = 0;
  881. wc.qp_num = qp->ibqp.qp_num;
  882. wc.src_qp = qp->remote_qpn;
  883. wc.pkey_index = 0;
  884. wc.slid = qp->remote_ah_attr.dlid;
  885. wc.sl = qp->remote_ah_attr.sl;
  886. wc.dlid_path_bits = 0;
  887. wc.port_num = 0;
  888. ipath_sqerror_qp(qp, &wc);
  889. break;
  890. default:
  891. /* Ignore other reserved NAK error codes */
  892. goto reserved;
  893. }
  894. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  895. goto bail;
  896. default: /* 2: reserved */
  897. reserved:
  898. /* Ignore reserved NAK codes. */
  899. goto bail;
  900. }
  901. bail:
  902. return ret;
  903. }
  904. /**
  905. * ipath_rc_rcv_resp - process an incoming RC response packet
  906. * @dev: the device this packet came in on
  907. * @ohdr: the other headers for this packet
  908. * @data: the packet data
  909. * @tlen: the packet length
  910. * @qp: the QP for this packet
  911. * @opcode: the opcode for this packet
  912. * @psn: the packet sequence number for this packet
  913. * @hdrsize: the header length
  914. * @pmtu: the path MTU
  915. * @header_in_data: true if part of the header data is in the data buffer
  916. *
  917. * This is called from ipath_rc_rcv() to process an incoming RC response
  918. * packet for the given QP.
  919. * Called at interrupt level.
  920. */
  921. static inline void ipath_rc_rcv_resp(struct ipath_ibdev *dev,
  922. struct ipath_other_headers *ohdr,
  923. void *data, u32 tlen,
  924. struct ipath_qp *qp,
  925. u32 opcode,
  926. u32 psn, u32 hdrsize, u32 pmtu,
  927. int header_in_data)
  928. {
  929. unsigned long flags;
  930. struct ib_wc wc;
  931. int diff;
  932. u32 pad;
  933. u32 aeth;
  934. spin_lock_irqsave(&qp->s_lock, flags);
  935. /* Ignore invalid responses. */
  936. if (ipath_cmp24(psn, qp->s_next_psn) >= 0)
  937. goto ack_done;
  938. /* Ignore duplicate responses. */
  939. diff = ipath_cmp24(psn, qp->s_last_psn);
  940. if (unlikely(diff <= 0)) {
  941. /* Update credits for "ghost" ACKs */
  942. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  943. if (!header_in_data)
  944. aeth = be32_to_cpu(ohdr->u.aeth);
  945. else {
  946. aeth = be32_to_cpu(((__be32 *) data)[0]);
  947. data += sizeof(__be32);
  948. }
  949. if ((aeth >> 29) == 0)
  950. ipath_get_credit(qp, aeth);
  951. }
  952. goto ack_done;
  953. }
  954. switch (opcode) {
  955. case OP(ACKNOWLEDGE):
  956. case OP(ATOMIC_ACKNOWLEDGE):
  957. case OP(RDMA_READ_RESPONSE_FIRST):
  958. if (!header_in_data)
  959. aeth = be32_to_cpu(ohdr->u.aeth);
  960. else {
  961. aeth = be32_to_cpu(((__be32 *) data)[0]);
  962. data += sizeof(__be32);
  963. }
  964. if (opcode == OP(ATOMIC_ACKNOWLEDGE))
  965. *(u64 *) qp->s_sge.sge.vaddr = *(u64 *) data;
  966. if (!do_rc_ack(qp, aeth, psn, opcode) ||
  967. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  968. goto ack_done;
  969. hdrsize += 4;
  970. /*
  971. * do_rc_ack() has already checked the PSN so skip
  972. * the sequence check.
  973. */
  974. goto rdma_read;
  975. case OP(RDMA_READ_RESPONSE_MIDDLE):
  976. /* no AETH, no ACK */
  977. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  978. dev->n_rdma_seq++;
  979. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  980. goto ack_done;
  981. }
  982. rdma_read:
  983. if (unlikely(qp->s_state != OP(RDMA_READ_REQUEST)))
  984. goto ack_done;
  985. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  986. goto ack_done;
  987. if (unlikely(pmtu >= qp->s_len))
  988. goto ack_done;
  989. /* We got a response so update the timeout. */
  990. if (unlikely(qp->s_last == qp->s_tail ||
  991. get_swqe_ptr(qp, qp->s_last)->wr.opcode !=
  992. IB_WR_RDMA_READ))
  993. goto ack_done;
  994. spin_lock(&dev->pending_lock);
  995. if (qp->s_rnr_timeout == 0 && !list_empty(&qp->timerwait))
  996. list_move_tail(&qp->timerwait,
  997. &dev->pending[dev->pending_index]);
  998. spin_unlock(&dev->pending_lock);
  999. /*
  1000. * Update the RDMA receive state but do the copy w/o holding the
  1001. * locks and blocking interrupts. XXX Yet another place that
  1002. * affects relaxed RDMA order since we don't want s_sge modified.
  1003. */
  1004. qp->s_len -= pmtu;
  1005. qp->s_last_psn = psn;
  1006. spin_unlock_irqrestore(&qp->s_lock, flags);
  1007. ipath_copy_sge(&qp->s_sge, data, pmtu);
  1008. goto bail;
  1009. case OP(RDMA_READ_RESPONSE_LAST):
  1010. /* ACKs READ req. */
  1011. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1012. dev->n_rdma_seq++;
  1013. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1014. goto ack_done;
  1015. }
  1016. /* FALLTHROUGH */
  1017. case OP(RDMA_READ_RESPONSE_ONLY):
  1018. if (unlikely(qp->s_state != OP(RDMA_READ_REQUEST)))
  1019. goto ack_done;
  1020. /*
  1021. * Get the number of bytes the message was padded by.
  1022. */
  1023. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1024. /*
  1025. * Check that the data size is >= 1 && <= pmtu.
  1026. * Remember to account for the AETH header (4) and
  1027. * ICRC (4).
  1028. */
  1029. if (unlikely(tlen <= (hdrsize + pad + 8))) {
  1030. /* XXX Need to generate an error CQ entry. */
  1031. goto ack_done;
  1032. }
  1033. tlen -= hdrsize + pad + 8;
  1034. if (unlikely(tlen != qp->s_len)) {
  1035. /* XXX Need to generate an error CQ entry. */
  1036. goto ack_done;
  1037. }
  1038. if (!header_in_data)
  1039. aeth = be32_to_cpu(ohdr->u.aeth);
  1040. else {
  1041. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1042. data += sizeof(__be32);
  1043. }
  1044. ipath_copy_sge(&qp->s_sge, data, tlen);
  1045. if (do_rc_ack(qp, aeth, psn, OP(RDMA_READ_RESPONSE_LAST))) {
  1046. /*
  1047. * Change the state so we contimue
  1048. * processing new requests.
  1049. */
  1050. qp->s_state = OP(SEND_LAST);
  1051. }
  1052. goto ack_done;
  1053. }
  1054. ack_done:
  1055. spin_unlock_irqrestore(&qp->s_lock, flags);
  1056. bail:
  1057. return;
  1058. }
  1059. /**
  1060. * ipath_rc_rcv_error - process an incoming duplicate or error RC packet
  1061. * @dev: the device this packet came in on
  1062. * @ohdr: the other headers for this packet
  1063. * @data: the packet data
  1064. * @qp: the QP for this packet
  1065. * @opcode: the opcode for this packet
  1066. * @psn: the packet sequence number for this packet
  1067. * @diff: the difference between the PSN and the expected PSN
  1068. * @header_in_data: true if part of the header data is in the data buffer
  1069. *
  1070. * This is called from ipath_rc_rcv() to process an unexpected
  1071. * incoming RC packet for the given QP.
  1072. * Called at interrupt level.
  1073. * Return 1 if no more processing is needed; otherwise return 0 to
  1074. * schedule a response to be sent and the s_lock unlocked.
  1075. */
  1076. static inline int ipath_rc_rcv_error(struct ipath_ibdev *dev,
  1077. struct ipath_other_headers *ohdr,
  1078. void *data,
  1079. struct ipath_qp *qp,
  1080. u32 opcode,
  1081. u32 psn,
  1082. int diff,
  1083. int header_in_data)
  1084. {
  1085. struct ib_reth *reth;
  1086. if (diff > 0) {
  1087. /*
  1088. * Packet sequence error.
  1089. * A NAK will ACK earlier sends and RDMA writes.
  1090. * Don't queue the NAK if a RDMA read, atomic, or
  1091. * NAK is pending though.
  1092. */
  1093. spin_lock(&qp->s_lock);
  1094. if ((qp->s_ack_state >= OP(RDMA_READ_REQUEST) &&
  1095. qp->s_ack_state != IB_OPCODE_ACKNOWLEDGE) ||
  1096. qp->s_nak_state != 0) {
  1097. spin_unlock(&qp->s_lock);
  1098. goto done;
  1099. }
  1100. qp->s_ack_state = OP(SEND_ONLY);
  1101. qp->s_nak_state = IB_NAK_PSN_ERROR;
  1102. /* Use the expected PSN. */
  1103. qp->s_ack_psn = qp->r_psn;
  1104. goto resched;
  1105. }
  1106. /*
  1107. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1108. * write or atomic op. Don't NAK errors, just silently drop
  1109. * the duplicate request. Note that r_sge, r_len, and
  1110. * r_rcv_len may be in use so don't modify them.
  1111. *
  1112. * We are supposed to ACK the earliest duplicate PSN but we
  1113. * can coalesce an outstanding duplicate ACK. We have to
  1114. * send the earliest so that RDMA reads can be restarted at
  1115. * the requester's expected PSN.
  1116. */
  1117. spin_lock(&qp->s_lock);
  1118. if (qp->s_ack_state != IB_OPCODE_ACKNOWLEDGE &&
  1119. ipath_cmp24(psn, qp->s_ack_psn) >= 0) {
  1120. if (qp->s_ack_state < IB_OPCODE_RDMA_READ_REQUEST)
  1121. qp->s_ack_psn = psn;
  1122. spin_unlock(&qp->s_lock);
  1123. goto done;
  1124. }
  1125. switch (opcode) {
  1126. case OP(RDMA_READ_REQUEST):
  1127. /*
  1128. * We have to be careful to not change s_rdma_sge
  1129. * while ipath_do_rc_send() is using it and not
  1130. * holding the s_lock.
  1131. */
  1132. if (qp->s_ack_state != OP(ACKNOWLEDGE) &&
  1133. qp->s_ack_state >= IB_OPCODE_RDMA_READ_REQUEST) {
  1134. spin_unlock(&qp->s_lock);
  1135. dev->n_rdma_dup_busy++;
  1136. goto done;
  1137. }
  1138. /* RETH comes after BTH */
  1139. if (!header_in_data)
  1140. reth = &ohdr->u.rc.reth;
  1141. else {
  1142. reth = (struct ib_reth *)data;
  1143. data += sizeof(*reth);
  1144. }
  1145. qp->s_rdma_len = be32_to_cpu(reth->length);
  1146. if (qp->s_rdma_len != 0) {
  1147. u32 rkey = be32_to_cpu(reth->rkey);
  1148. u64 vaddr = be64_to_cpu(reth->vaddr);
  1149. int ok;
  1150. /*
  1151. * Address range must be a subset of the original
  1152. * request and start on pmtu boundaries.
  1153. */
  1154. ok = ipath_rkey_ok(dev, &qp->s_rdma_sge,
  1155. qp->s_rdma_len, vaddr, rkey,
  1156. IB_ACCESS_REMOTE_READ);
  1157. if (unlikely(!ok))
  1158. goto done;
  1159. } else {
  1160. qp->s_rdma_sge.sg_list = NULL;
  1161. qp->s_rdma_sge.num_sge = 0;
  1162. qp->s_rdma_sge.sge.mr = NULL;
  1163. qp->s_rdma_sge.sge.vaddr = NULL;
  1164. qp->s_rdma_sge.sge.length = 0;
  1165. qp->s_rdma_sge.sge.sge_length = 0;
  1166. }
  1167. break;
  1168. case OP(COMPARE_SWAP):
  1169. case OP(FETCH_ADD):
  1170. /*
  1171. * Check for the PSN of the last atomic operation
  1172. * performed and resend the result if found.
  1173. */
  1174. if ((psn & IPS_PSN_MASK) != qp->r_atomic_psn) {
  1175. spin_unlock(&qp->s_lock);
  1176. goto done;
  1177. }
  1178. qp->s_ack_atomic = qp->r_atomic_data;
  1179. break;
  1180. }
  1181. qp->s_ack_state = opcode;
  1182. qp->s_nak_state = 0;
  1183. qp->s_ack_psn = psn;
  1184. resched:
  1185. return 0;
  1186. done:
  1187. return 1;
  1188. }
  1189. /**
  1190. * ipath_rc_rcv - process an incoming RC packet
  1191. * @dev: the device this packet came in on
  1192. * @hdr: the header of this packet
  1193. * @has_grh: true if the header has a GRH
  1194. * @data: the packet data
  1195. * @tlen: the packet length
  1196. * @qp: the QP for this packet
  1197. *
  1198. * This is called from ipath_qp_rcv() to process an incoming RC packet
  1199. * for the given QP.
  1200. * Called at interrupt level.
  1201. */
  1202. void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
  1203. int has_grh, void *data, u32 tlen, struct ipath_qp *qp)
  1204. {
  1205. struct ipath_other_headers *ohdr;
  1206. u32 opcode;
  1207. u32 hdrsize;
  1208. u32 psn;
  1209. u32 pad;
  1210. unsigned long flags;
  1211. struct ib_wc wc;
  1212. u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
  1213. int diff;
  1214. struct ib_reth *reth;
  1215. int header_in_data;
  1216. /* Check for GRH */
  1217. if (!has_grh) {
  1218. ohdr = &hdr->u.oth;
  1219. hdrsize = 8 + 12; /* LRH + BTH */
  1220. psn = be32_to_cpu(ohdr->bth[2]);
  1221. header_in_data = 0;
  1222. } else {
  1223. ohdr = &hdr->u.l.oth;
  1224. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  1225. /*
  1226. * The header with GRH is 60 bytes and the core driver sets
  1227. * the eager header buffer size to 56 bytes so the last 4
  1228. * bytes of the BTH header (PSN) is in the data buffer.
  1229. */
  1230. header_in_data =
  1231. ipath_layer_get_rcvhdrentsize(dev->dd) == 16;
  1232. if (header_in_data) {
  1233. psn = be32_to_cpu(((__be32 *) data)[0]);
  1234. data += sizeof(__be32);
  1235. } else
  1236. psn = be32_to_cpu(ohdr->bth[2]);
  1237. }
  1238. /*
  1239. * Process responses (ACKs) before anything else. Note that the
  1240. * packet sequence number will be for something in the send work
  1241. * queue rather than the expected receive packet sequence number.
  1242. * In other words, this QP is the requester.
  1243. */
  1244. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  1245. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1246. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1247. ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,
  1248. hdrsize, pmtu, header_in_data);
  1249. goto bail;
  1250. }
  1251. spin_lock_irqsave(&qp->r_rq.lock, flags);
  1252. /* Compute 24 bits worth of difference. */
  1253. diff = ipath_cmp24(psn, qp->r_psn);
  1254. if (unlikely(diff)) {
  1255. if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,
  1256. psn, diff, header_in_data))
  1257. goto done;
  1258. goto resched;
  1259. }
  1260. /* Check for opcode sequence errors. */
  1261. switch (qp->r_state) {
  1262. case OP(SEND_FIRST):
  1263. case OP(SEND_MIDDLE):
  1264. if (opcode == OP(SEND_MIDDLE) ||
  1265. opcode == OP(SEND_LAST) ||
  1266. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  1267. break;
  1268. nack_inv:
  1269. /*
  1270. * A NAK will ACK earlier sends and RDMA writes. Don't queue the
  1271. * NAK if a RDMA read, atomic, or NAK is pending though.
  1272. */
  1273. spin_lock(&qp->s_lock);
  1274. if (qp->s_ack_state >= OP(RDMA_READ_REQUEST) &&
  1275. qp->s_ack_state != IB_OPCODE_ACKNOWLEDGE) {
  1276. spin_unlock(&qp->s_lock);
  1277. goto done;
  1278. }
  1279. /* XXX Flush WQEs */
  1280. qp->state = IB_QPS_ERR;
  1281. qp->s_ack_state = OP(SEND_ONLY);
  1282. qp->s_nak_state = IB_NAK_INVALID_REQUEST;
  1283. qp->s_ack_psn = qp->r_psn;
  1284. goto resched;
  1285. case OP(RDMA_WRITE_FIRST):
  1286. case OP(RDMA_WRITE_MIDDLE):
  1287. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1288. opcode == OP(RDMA_WRITE_LAST) ||
  1289. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1290. break;
  1291. goto nack_inv;
  1292. case OP(RDMA_READ_REQUEST):
  1293. case OP(COMPARE_SWAP):
  1294. case OP(FETCH_ADD):
  1295. /*
  1296. * Drop all new requests until a response has been sent. A
  1297. * new request then ACKs the RDMA response we sent. Relaxed
  1298. * ordering would allow new requests to be processed but we
  1299. * would need to keep a queue of rwqe's for all that are in
  1300. * progress. Note that we can't RNR NAK this request since
  1301. * the RDMA READ or atomic response is already queued to be
  1302. * sent (unless we implement a response send queue).
  1303. */
  1304. goto done;
  1305. default:
  1306. if (opcode == OP(SEND_MIDDLE) ||
  1307. opcode == OP(SEND_LAST) ||
  1308. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1309. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1310. opcode == OP(RDMA_WRITE_LAST) ||
  1311. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1312. goto nack_inv;
  1313. break;
  1314. }
  1315. wc.imm_data = 0;
  1316. wc.wc_flags = 0;
  1317. /* OK, process the packet. */
  1318. switch (opcode) {
  1319. case OP(SEND_FIRST):
  1320. if (!ipath_get_rwqe(qp, 0)) {
  1321. rnr_nak:
  1322. /*
  1323. * A RNR NAK will ACK earlier sends and RDMA writes.
  1324. * Don't queue the NAK if a RDMA read or atomic
  1325. * is pending though.
  1326. */
  1327. spin_lock(&qp->s_lock);
  1328. if (qp->s_ack_state >=
  1329. OP(RDMA_READ_REQUEST) &&
  1330. qp->s_ack_state != IB_OPCODE_ACKNOWLEDGE) {
  1331. spin_unlock(&qp->s_lock);
  1332. goto done;
  1333. }
  1334. qp->s_ack_state = OP(SEND_ONLY);
  1335. qp->s_nak_state = IB_RNR_NAK | qp->s_min_rnr_timer;
  1336. qp->s_ack_psn = qp->r_psn;
  1337. goto resched;
  1338. }
  1339. qp->r_rcv_len = 0;
  1340. /* FALLTHROUGH */
  1341. case OP(SEND_MIDDLE):
  1342. case OP(RDMA_WRITE_MIDDLE):
  1343. send_middle:
  1344. /* Check for invalid length PMTU or posted rwqe len. */
  1345. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1346. goto nack_inv;
  1347. qp->r_rcv_len += pmtu;
  1348. if (unlikely(qp->r_rcv_len > qp->r_len))
  1349. goto nack_inv;
  1350. ipath_copy_sge(&qp->r_sge, data, pmtu);
  1351. break;
  1352. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1353. /* consume RWQE */
  1354. if (!ipath_get_rwqe(qp, 1))
  1355. goto rnr_nak;
  1356. goto send_last_imm;
  1357. case OP(SEND_ONLY):
  1358. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1359. if (!ipath_get_rwqe(qp, 0))
  1360. goto rnr_nak;
  1361. qp->r_rcv_len = 0;
  1362. if (opcode == OP(SEND_ONLY))
  1363. goto send_last;
  1364. /* FALLTHROUGH */
  1365. case OP(SEND_LAST_WITH_IMMEDIATE):
  1366. send_last_imm:
  1367. if (header_in_data) {
  1368. wc.imm_data = *(__be32 *) data;
  1369. data += sizeof(__be32);
  1370. } else {
  1371. /* Immediate data comes after BTH */
  1372. wc.imm_data = ohdr->u.imm_data;
  1373. }
  1374. hdrsize += 4;
  1375. wc.wc_flags = IB_WC_WITH_IMM;
  1376. /* FALLTHROUGH */
  1377. case OP(SEND_LAST):
  1378. case OP(RDMA_WRITE_LAST):
  1379. send_last:
  1380. /* Get the number of bytes the message was padded by. */
  1381. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1382. /* Check for invalid length. */
  1383. /* XXX LAST len should be >= 1 */
  1384. if (unlikely(tlen < (hdrsize + pad + 4)))
  1385. goto nack_inv;
  1386. /* Don't count the CRC. */
  1387. tlen -= (hdrsize + pad + 4);
  1388. wc.byte_len = tlen + qp->r_rcv_len;
  1389. if (unlikely(wc.byte_len > qp->r_len))
  1390. goto nack_inv;
  1391. ipath_copy_sge(&qp->r_sge, data, tlen);
  1392. atomic_inc(&qp->msn);
  1393. if (opcode == OP(RDMA_WRITE_LAST) ||
  1394. opcode == OP(RDMA_WRITE_ONLY))
  1395. break;
  1396. wc.wr_id = qp->r_wr_id;
  1397. wc.status = IB_WC_SUCCESS;
  1398. wc.opcode = IB_WC_RECV;
  1399. wc.vendor_err = 0;
  1400. wc.qp_num = qp->ibqp.qp_num;
  1401. wc.src_qp = qp->remote_qpn;
  1402. wc.pkey_index = 0;
  1403. wc.slid = qp->remote_ah_attr.dlid;
  1404. wc.sl = qp->remote_ah_attr.sl;
  1405. wc.dlid_path_bits = 0;
  1406. wc.port_num = 0;
  1407. /* Signal completion event if the solicited bit is set. */
  1408. ipath_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
  1409. (ohdr->bth[0] &
  1410. __constant_cpu_to_be32(1 << 23)) != 0);
  1411. break;
  1412. case OP(RDMA_WRITE_FIRST):
  1413. case OP(RDMA_WRITE_ONLY):
  1414. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1415. /* consume RWQE */
  1416. /* RETH comes after BTH */
  1417. if (!header_in_data)
  1418. reth = &ohdr->u.rc.reth;
  1419. else {
  1420. reth = (struct ib_reth *)data;
  1421. data += sizeof(*reth);
  1422. }
  1423. hdrsize += sizeof(*reth);
  1424. qp->r_len = be32_to_cpu(reth->length);
  1425. qp->r_rcv_len = 0;
  1426. if (qp->r_len != 0) {
  1427. u32 rkey = be32_to_cpu(reth->rkey);
  1428. u64 vaddr = be64_to_cpu(reth->vaddr);
  1429. int ok;
  1430. /* Check rkey & NAK */
  1431. ok = ipath_rkey_ok(dev, &qp->r_sge,
  1432. qp->r_len, vaddr, rkey,
  1433. IB_ACCESS_REMOTE_WRITE);
  1434. if (unlikely(!ok)) {
  1435. nack_acc:
  1436. /*
  1437. * A NAK will ACK earlier sends and RDMA
  1438. * writes. Don't queue the NAK if a RDMA
  1439. * read, atomic, or NAK is pending though.
  1440. */
  1441. spin_lock(&qp->s_lock);
  1442. if (qp->s_ack_state >=
  1443. OP(RDMA_READ_REQUEST) &&
  1444. qp->s_ack_state !=
  1445. IB_OPCODE_ACKNOWLEDGE) {
  1446. spin_unlock(&qp->s_lock);
  1447. goto done;
  1448. }
  1449. /* XXX Flush WQEs */
  1450. qp->state = IB_QPS_ERR;
  1451. qp->s_ack_state = OP(RDMA_WRITE_ONLY);
  1452. qp->s_nak_state =
  1453. IB_NAK_REMOTE_ACCESS_ERROR;
  1454. qp->s_ack_psn = qp->r_psn;
  1455. goto resched;
  1456. }
  1457. } else {
  1458. qp->r_sge.sg_list = NULL;
  1459. qp->r_sge.sge.mr = NULL;
  1460. qp->r_sge.sge.vaddr = NULL;
  1461. qp->r_sge.sge.length = 0;
  1462. qp->r_sge.sge.sge_length = 0;
  1463. }
  1464. if (unlikely(!(qp->qp_access_flags &
  1465. IB_ACCESS_REMOTE_WRITE)))
  1466. goto nack_acc;
  1467. if (opcode == OP(RDMA_WRITE_FIRST))
  1468. goto send_middle;
  1469. else if (opcode == OP(RDMA_WRITE_ONLY))
  1470. goto send_last;
  1471. if (!ipath_get_rwqe(qp, 1))
  1472. goto rnr_nak;
  1473. goto send_last_imm;
  1474. case OP(RDMA_READ_REQUEST):
  1475. /* RETH comes after BTH */
  1476. if (!header_in_data)
  1477. reth = &ohdr->u.rc.reth;
  1478. else {
  1479. reth = (struct ib_reth *)data;
  1480. data += sizeof(*reth);
  1481. }
  1482. spin_lock(&qp->s_lock);
  1483. if (qp->s_ack_state != OP(ACKNOWLEDGE) &&
  1484. qp->s_ack_state >= IB_OPCODE_RDMA_READ_REQUEST) {
  1485. spin_unlock(&qp->s_lock);
  1486. goto done;
  1487. }
  1488. qp->s_rdma_len = be32_to_cpu(reth->length);
  1489. if (qp->s_rdma_len != 0) {
  1490. u32 rkey = be32_to_cpu(reth->rkey);
  1491. u64 vaddr = be64_to_cpu(reth->vaddr);
  1492. int ok;
  1493. /* Check rkey & NAK */
  1494. ok = ipath_rkey_ok(dev, &qp->s_rdma_sge,
  1495. qp->s_rdma_len, vaddr, rkey,
  1496. IB_ACCESS_REMOTE_READ);
  1497. if (unlikely(!ok)) {
  1498. spin_unlock(&qp->s_lock);
  1499. goto nack_acc;
  1500. }
  1501. /*
  1502. * Update the next expected PSN. We add 1 later
  1503. * below, so only add the remainder here.
  1504. */
  1505. if (qp->s_rdma_len > pmtu)
  1506. qp->r_psn += (qp->s_rdma_len - 1) / pmtu;
  1507. } else {
  1508. qp->s_rdma_sge.sg_list = NULL;
  1509. qp->s_rdma_sge.num_sge = 0;
  1510. qp->s_rdma_sge.sge.mr = NULL;
  1511. qp->s_rdma_sge.sge.vaddr = NULL;
  1512. qp->s_rdma_sge.sge.length = 0;
  1513. qp->s_rdma_sge.sge.sge_length = 0;
  1514. }
  1515. if (unlikely(!(qp->qp_access_flags &
  1516. IB_ACCESS_REMOTE_READ)))
  1517. goto nack_acc;
  1518. /*
  1519. * We need to increment the MSN here instead of when we
  1520. * finish sending the result since a duplicate request would
  1521. * increment it more than once.
  1522. */
  1523. atomic_inc(&qp->msn);
  1524. qp->s_ack_state = opcode;
  1525. qp->s_nak_state = 0;
  1526. qp->s_ack_psn = psn;
  1527. qp->r_psn++;
  1528. qp->r_state = opcode;
  1529. goto rdmadone;
  1530. case OP(COMPARE_SWAP):
  1531. case OP(FETCH_ADD): {
  1532. struct ib_atomic_eth *ateth;
  1533. u64 vaddr;
  1534. u64 sdata;
  1535. u32 rkey;
  1536. if (!header_in_data)
  1537. ateth = &ohdr->u.atomic_eth;
  1538. else {
  1539. ateth = (struct ib_atomic_eth *)data;
  1540. data += sizeof(*ateth);
  1541. }
  1542. vaddr = be64_to_cpu(ateth->vaddr);
  1543. if (unlikely(vaddr & (sizeof(u64) - 1)))
  1544. goto nack_inv;
  1545. rkey = be32_to_cpu(ateth->rkey);
  1546. /* Check rkey & NAK */
  1547. if (unlikely(!ipath_rkey_ok(dev, &qp->r_sge,
  1548. sizeof(u64), vaddr, rkey,
  1549. IB_ACCESS_REMOTE_ATOMIC)))
  1550. goto nack_acc;
  1551. if (unlikely(!(qp->qp_access_flags &
  1552. IB_ACCESS_REMOTE_ATOMIC)))
  1553. goto nack_acc;
  1554. /* Perform atomic OP and save result. */
  1555. sdata = be64_to_cpu(ateth->swap_data);
  1556. spin_lock(&dev->pending_lock);
  1557. qp->r_atomic_data = *(u64 *) qp->r_sge.sge.vaddr;
  1558. if (opcode == OP(FETCH_ADD))
  1559. *(u64 *) qp->r_sge.sge.vaddr =
  1560. qp->r_atomic_data + sdata;
  1561. else if (qp->r_atomic_data ==
  1562. be64_to_cpu(ateth->compare_data))
  1563. *(u64 *) qp->r_sge.sge.vaddr = sdata;
  1564. spin_unlock(&dev->pending_lock);
  1565. atomic_inc(&qp->msn);
  1566. qp->r_atomic_psn = psn & IPS_PSN_MASK;
  1567. psn |= 1 << 31;
  1568. break;
  1569. }
  1570. default:
  1571. /* Drop packet for unknown opcodes. */
  1572. goto done;
  1573. }
  1574. qp->r_psn++;
  1575. qp->r_state = opcode;
  1576. /* Send an ACK if requested or required. */
  1577. if (psn & (1 << 31)) {
  1578. /*
  1579. * Coalesce ACKs unless there is a RDMA READ or
  1580. * ATOMIC pending.
  1581. */
  1582. spin_lock(&qp->s_lock);
  1583. if (qp->s_ack_state == OP(ACKNOWLEDGE) ||
  1584. qp->s_ack_state < IB_OPCODE_RDMA_READ_REQUEST) {
  1585. qp->s_ack_state = opcode;
  1586. qp->s_nak_state = 0;
  1587. qp->s_ack_psn = psn;
  1588. qp->s_ack_atomic = qp->r_atomic_data;
  1589. goto resched;
  1590. }
  1591. spin_unlock(&qp->s_lock);
  1592. }
  1593. done:
  1594. spin_unlock_irqrestore(&qp->r_rq.lock, flags);
  1595. goto bail;
  1596. resched:
  1597. /*
  1598. * Try to send ACK right away but not if ipath_do_rc_send() is
  1599. * active.
  1600. */
  1601. if (qp->s_hdrwords == 0 &&
  1602. (qp->s_ack_state < IB_OPCODE_RDMA_READ_REQUEST ||
  1603. qp->s_ack_state >= IB_OPCODE_COMPARE_SWAP))
  1604. send_rc_ack(qp);
  1605. rdmadone:
  1606. spin_unlock(&qp->s_lock);
  1607. spin_unlock_irqrestore(&qp->r_rq.lock, flags);
  1608. /* Call ipath_do_rc_send() in another thread. */
  1609. tasklet_hi_schedule(&qp->s_task);
  1610. bail:
  1611. return;
  1612. }