rtc-twl4030.c 14 KB

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  1. /*
  2. * rtc-twl4030.c -- TWL4030 Real Time Clock interface
  3. *
  4. * Copyright (C) 2007 MontaVista Software, Inc
  5. * Author: Alexandre Rusev <source@mvista.com>
  6. *
  7. * Based on original TI driver twl4030-rtc.c
  8. * Copyright (C) 2006 Texas Instruments, Inc.
  9. *
  10. * Based on rtc-omap.c
  11. * Copyright (C) 2003 MontaVista Software, Inc.
  12. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  13. * Copyright (C) 2006 David Brownell
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/types.h>
  25. #include <linux/rtc.h>
  26. #include <linux/bcd.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/i2c/twl4030.h>
  30. /*
  31. * RTC block register offsets (use TWL_MODULE_RTC)
  32. */
  33. #define REG_SECONDS_REG 0x00
  34. #define REG_MINUTES_REG 0x01
  35. #define REG_HOURS_REG 0x02
  36. #define REG_DAYS_REG 0x03
  37. #define REG_MONTHS_REG 0x04
  38. #define REG_YEARS_REG 0x05
  39. #define REG_WEEKS_REG 0x06
  40. #define REG_ALARM_SECONDS_REG 0x07
  41. #define REG_ALARM_MINUTES_REG 0x08
  42. #define REG_ALARM_HOURS_REG 0x09
  43. #define REG_ALARM_DAYS_REG 0x0A
  44. #define REG_ALARM_MONTHS_REG 0x0B
  45. #define REG_ALARM_YEARS_REG 0x0C
  46. #define REG_RTC_CTRL_REG 0x0D
  47. #define REG_RTC_STATUS_REG 0x0E
  48. #define REG_RTC_INTERRUPTS_REG 0x0F
  49. #define REG_RTC_COMP_LSB_REG 0x10
  50. #define REG_RTC_COMP_MSB_REG 0x11
  51. /* RTC_CTRL_REG bitfields */
  52. #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
  53. #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
  54. #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
  55. #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
  56. #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
  57. #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
  58. #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
  59. /* RTC_STATUS_REG bitfields */
  60. #define BIT_RTC_STATUS_REG_RUN_M 0x02
  61. #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
  62. #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
  63. #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
  64. #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
  65. #define BIT_RTC_STATUS_REG_ALARM_M 0x40
  66. #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
  67. /* RTC_INTERRUPTS_REG bitfields */
  68. #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
  69. #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
  70. #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
  71. /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
  72. #define ALL_TIME_REGS 6
  73. /*----------------------------------------------------------------------*/
  74. /*
  75. * Supports 1 byte read from TWL4030 RTC register.
  76. */
  77. static int twl4030_rtc_read_u8(u8 *data, u8 reg)
  78. {
  79. int ret;
  80. ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg);
  81. if (ret < 0)
  82. pr_err("twl4030_rtc: Could not read TWL4030"
  83. "register %X - error %d\n", reg, ret);
  84. return ret;
  85. }
  86. /*
  87. * Supports 1 byte write to TWL4030 RTC registers.
  88. */
  89. static int twl4030_rtc_write_u8(u8 data, u8 reg)
  90. {
  91. int ret;
  92. ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg);
  93. if (ret < 0)
  94. pr_err("twl4030_rtc: Could not write TWL4030"
  95. "register %X - error %d\n", reg, ret);
  96. return ret;
  97. }
  98. /*
  99. * Cache the value for timer/alarm interrupts register; this is
  100. * only changed by callers holding rtc ops lock (or resume).
  101. */
  102. static unsigned char rtc_irq_bits;
  103. /*
  104. * Enable timer and/or alarm interrupts.
  105. */
  106. static int set_rtc_irq_bit(unsigned char bit)
  107. {
  108. unsigned char val;
  109. int ret;
  110. val = rtc_irq_bits | bit;
  111. ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  112. if (ret == 0)
  113. rtc_irq_bits = val;
  114. return ret;
  115. }
  116. /*
  117. * Disable timer and/or alarm interrupts.
  118. */
  119. static int mask_rtc_irq_bit(unsigned char bit)
  120. {
  121. unsigned char val;
  122. int ret;
  123. val = rtc_irq_bits & ~bit;
  124. ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  125. if (ret == 0)
  126. rtc_irq_bits = val;
  127. return ret;
  128. }
  129. static inline int twl4030_rtc_alarm_irq_set_state(int enabled)
  130. {
  131. int ret;
  132. if (enabled)
  133. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  134. else
  135. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  136. return ret;
  137. }
  138. static inline int twl4030_rtc_irq_set_state(int enabled)
  139. {
  140. int ret;
  141. if (enabled)
  142. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  143. else
  144. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  145. return ret;
  146. }
  147. /*
  148. * Gets current TWL4030 RTC time and date parameters.
  149. *
  150. * The RTC's time/alarm representation is not what gmtime(3) requires
  151. * Linux to use:
  152. *
  153. * - Months are 1..12 vs Linux 0-11
  154. * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
  155. */
  156. static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm)
  157. {
  158. unsigned char rtc_data[ALL_TIME_REGS + 1];
  159. int ret;
  160. u8 save_control;
  161. ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  162. if (ret < 0)
  163. return ret;
  164. save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;
  165. ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  166. if (ret < 0)
  167. return ret;
  168. ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
  169. REG_SECONDS_REG, ALL_TIME_REGS);
  170. if (ret < 0) {
  171. dev_err(dev, "rtc_read_time error %d\n", ret);
  172. return ret;
  173. }
  174. tm->tm_sec = bcd2bin(rtc_data[0]);
  175. tm->tm_min = bcd2bin(rtc_data[1]);
  176. tm->tm_hour = bcd2bin(rtc_data[2]);
  177. tm->tm_mday = bcd2bin(rtc_data[3]);
  178. tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
  179. tm->tm_year = bcd2bin(rtc_data[5]) + 100;
  180. return ret;
  181. }
  182. static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm)
  183. {
  184. unsigned char save_control;
  185. unsigned char rtc_data[ALL_TIME_REGS + 1];
  186. int ret;
  187. rtc_data[1] = bin2bcd(tm->tm_sec);
  188. rtc_data[2] = bin2bcd(tm->tm_min);
  189. rtc_data[3] = bin2bcd(tm->tm_hour);
  190. rtc_data[4] = bin2bcd(tm->tm_mday);
  191. rtc_data[5] = bin2bcd(tm->tm_mon + 1);
  192. rtc_data[6] = bin2bcd(tm->tm_year - 100);
  193. /* Stop RTC while updating the TC registers */
  194. ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  195. if (ret < 0)
  196. goto out;
  197. save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
  198. twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  199. if (ret < 0)
  200. goto out;
  201. /* update all the time registers in one shot */
  202. ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data,
  203. REG_SECONDS_REG, ALL_TIME_REGS);
  204. if (ret < 0) {
  205. dev_err(dev, "rtc_set_time error %d\n", ret);
  206. goto out;
  207. }
  208. /* Start back RTC */
  209. save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
  210. ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  211. out:
  212. return ret;
  213. }
  214. /*
  215. * Gets current TWL4030 RTC alarm time.
  216. */
  217. static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  218. {
  219. unsigned char rtc_data[ALL_TIME_REGS + 1];
  220. int ret;
  221. ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
  222. REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
  223. if (ret < 0) {
  224. dev_err(dev, "rtc_read_alarm error %d\n", ret);
  225. return ret;
  226. }
  227. /* some of these fields may be wildcard/"match all" */
  228. alm->time.tm_sec = bcd2bin(rtc_data[0]);
  229. alm->time.tm_min = bcd2bin(rtc_data[1]);
  230. alm->time.tm_hour = bcd2bin(rtc_data[2]);
  231. alm->time.tm_mday = bcd2bin(rtc_data[3]);
  232. alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
  233. alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
  234. /* report cached alarm enable state */
  235. if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
  236. alm->enabled = 1;
  237. return ret;
  238. }
  239. static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  240. {
  241. unsigned char alarm_data[ALL_TIME_REGS + 1];
  242. int ret;
  243. ret = twl4030_rtc_alarm_irq_set_state(0);
  244. if (ret)
  245. goto out;
  246. alarm_data[1] = bin2bcd(alm->time.tm_sec);
  247. alarm_data[2] = bin2bcd(alm->time.tm_min);
  248. alarm_data[3] = bin2bcd(alm->time.tm_hour);
  249. alarm_data[4] = bin2bcd(alm->time.tm_mday);
  250. alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
  251. alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
  252. /* update all the alarm registers in one shot */
  253. ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data,
  254. REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
  255. if (ret) {
  256. dev_err(dev, "rtc_set_alarm error %d\n", ret);
  257. goto out;
  258. }
  259. if (alm->enabled)
  260. ret = twl4030_rtc_alarm_irq_set_state(1);
  261. out:
  262. return ret;
  263. }
  264. #ifdef CONFIG_RTC_INTF_DEV
  265. static int twl4030_rtc_ioctl(struct device *dev, unsigned int cmd,
  266. unsigned long arg)
  267. {
  268. switch (cmd) {
  269. case RTC_AIE_OFF:
  270. return twl4030_rtc_alarm_irq_set_state(0);
  271. case RTC_AIE_ON:
  272. return twl4030_rtc_alarm_irq_set_state(1);
  273. case RTC_UIE_OFF:
  274. return twl4030_rtc_irq_set_state(0);
  275. case RTC_UIE_ON:
  276. return twl4030_rtc_irq_set_state(1);
  277. default:
  278. return -ENOIOCTLCMD;
  279. }
  280. }
  281. #else
  282. #define twl4030_rtc_ioctl NULL
  283. #endif
  284. static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
  285. {
  286. unsigned long events = 0;
  287. int ret = IRQ_NONE;
  288. int res;
  289. u8 rd_reg;
  290. #ifdef CONFIG_LOCKDEP
  291. /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
  292. * we don't want and can't tolerate. Although it might be
  293. * friendlier not to borrow this thread context...
  294. */
  295. local_irq_enable();
  296. #endif
  297. res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  298. if (res)
  299. goto out;
  300. /*
  301. * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
  302. * only one (ALARM or RTC) interrupt source may be enabled
  303. * at time, we also could check our results
  304. * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
  305. */
  306. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  307. events |= RTC_IRQF | RTC_AF;
  308. else
  309. events |= RTC_IRQF | RTC_UF;
  310. res = twl4030_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M,
  311. REG_RTC_STATUS_REG);
  312. if (res)
  313. goto out;
  314. /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
  315. * needs 2 reads to clear the interrupt. One read is done in
  316. * do_twl4030_pwrirq(). Doing the second read, to clear
  317. * the bit.
  318. *
  319. * FIXME the reason PWR_ISR1 needs an extra read is that
  320. * RTC_IF retriggered until we cleared REG_ALARM_M above.
  321. * But re-reading like this is a bad hack; by doing so we
  322. * risk wrongly clearing status for some other IRQ (losing
  323. * the interrupt). Be smarter about handling RTC_UF ...
  324. */
  325. res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
  326. &rd_reg, TWL4030_INT_PWR_ISR1);
  327. if (res)
  328. goto out;
  329. /* Notify RTC core on event */
  330. rtc_update_irq(rtc, 1, events);
  331. ret = IRQ_HANDLED;
  332. out:
  333. return ret;
  334. }
  335. static struct rtc_class_ops twl4030_rtc_ops = {
  336. .ioctl = twl4030_rtc_ioctl,
  337. .read_time = twl4030_rtc_read_time,
  338. .set_time = twl4030_rtc_set_time,
  339. .read_alarm = twl4030_rtc_read_alarm,
  340. .set_alarm = twl4030_rtc_set_alarm,
  341. };
  342. /*----------------------------------------------------------------------*/
  343. static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
  344. {
  345. struct rtc_device *rtc;
  346. int ret = 0;
  347. int irq = platform_get_irq(pdev, 0);
  348. u8 rd_reg;
  349. if (irq <= 0)
  350. return -EINVAL;
  351. rtc = rtc_device_register(pdev->name,
  352. &pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
  353. if (IS_ERR(rtc)) {
  354. ret = -EINVAL;
  355. dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
  356. PTR_ERR(rtc));
  357. goto out0;
  358. }
  359. platform_set_drvdata(pdev, rtc);
  360. ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  361. if (ret < 0)
  362. goto out1;
  363. if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
  364. dev_warn(&pdev->dev, "Power up reset detected.\n");
  365. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  366. dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
  367. /* Clear RTC Power up reset and pending alarm interrupts */
  368. ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
  369. if (ret < 0)
  370. goto out1;
  371. ret = request_irq(irq, twl4030_rtc_interrupt,
  372. IRQF_TRIGGER_RISING,
  373. rtc->dev.bus_id, rtc);
  374. if (ret < 0) {
  375. dev_err(&pdev->dev, "IRQ is not free.\n");
  376. goto out1;
  377. }
  378. /* Check RTC module status, Enable if it is off */
  379. ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
  380. if (ret < 0)
  381. goto out2;
  382. if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
  383. dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
  384. rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
  385. ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
  386. if (ret < 0)
  387. goto out2;
  388. }
  389. /* init cached IRQ enable bits */
  390. ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
  391. if (ret < 0)
  392. goto out2;
  393. return ret;
  394. out2:
  395. free_irq(irq, rtc);
  396. out1:
  397. rtc_device_unregister(rtc);
  398. out0:
  399. return ret;
  400. }
  401. /*
  402. * Disable all TWL4030 RTC module interrupts.
  403. * Sets status flag to free.
  404. */
  405. static int __devexit twl4030_rtc_remove(struct platform_device *pdev)
  406. {
  407. /* leave rtc running, but disable irqs */
  408. struct rtc_device *rtc = platform_get_drvdata(pdev);
  409. int irq = platform_get_irq(pdev, 0);
  410. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  411. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  412. free_irq(irq, rtc);
  413. rtc_device_unregister(rtc);
  414. platform_set_drvdata(pdev, NULL);
  415. return 0;
  416. }
  417. static void twl4030_rtc_shutdown(struct platform_device *pdev)
  418. {
  419. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
  420. BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  421. }
  422. #ifdef CONFIG_PM
  423. static unsigned char irqstat;
  424. static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  425. {
  426. irqstat = rtc_irq_bits;
  427. /* REVISIT alarm may need to wake us from sleep */
  428. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
  429. BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  430. return 0;
  431. }
  432. static int twl4030_rtc_resume(struct platform_device *pdev)
  433. {
  434. set_rtc_irq_bit(irqstat);
  435. return 0;
  436. }
  437. #else
  438. #define twl4030_rtc_suspend NULL
  439. #define twl4030_rtc_resume NULL
  440. #endif
  441. MODULE_ALIAS("platform:twl4030_rtc");
  442. static struct platform_driver twl4030rtc_driver = {
  443. .probe = twl4030_rtc_probe,
  444. .remove = __devexit_p(twl4030_rtc_remove),
  445. .shutdown = twl4030_rtc_shutdown,
  446. .suspend = twl4030_rtc_suspend,
  447. .resume = twl4030_rtc_resume,
  448. .driver = {
  449. .owner = THIS_MODULE,
  450. .name = "twl4030_rtc",
  451. },
  452. };
  453. static int __init twl4030_rtc_init(void)
  454. {
  455. return platform_driver_register(&twl4030rtc_driver);
  456. }
  457. module_init(twl4030_rtc_init);
  458. static void __exit twl4030_rtc_exit(void)
  459. {
  460. platform_driver_unregister(&twl4030rtc_driver);
  461. }
  462. module_exit(twl4030_rtc_exit);
  463. MODULE_AUTHOR("Texas Instruments, MontaVista Software");
  464. MODULE_LICENSE("GPL");