rtc-sh.c 18 KB

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  1. /*
  2. * SuperH On-Chip RTC Support
  3. *
  4. * Copyright (C) 2006, 2007, 2008 Paul Mundt
  5. * Copyright (C) 2006 Jamie Lenehan
  6. * Copyright (C) 2008 Angelo Castello
  7. *
  8. * Based on the old arch/sh/kernel/cpu/rtc.c by:
  9. *
  10. * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
  11. * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
  12. *
  13. * This file is subject to the terms and conditions of the GNU General Public
  14. * License. See the file "COPYING" in the main directory of this archive
  15. * for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/bcd.h>
  20. #include <linux/rtc.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/io.h>
  27. #include <linux/log2.h>
  28. #include <asm/rtc.h>
  29. #define DRV_NAME "sh-rtc"
  30. #define DRV_VERSION "0.2.0"
  31. #define RTC_REG(r) ((r) * rtc_reg_size)
  32. #define R64CNT RTC_REG(0)
  33. #define RSECCNT RTC_REG(1) /* RTC sec */
  34. #define RMINCNT RTC_REG(2) /* RTC min */
  35. #define RHRCNT RTC_REG(3) /* RTC hour */
  36. #define RWKCNT RTC_REG(4) /* RTC week */
  37. #define RDAYCNT RTC_REG(5) /* RTC day */
  38. #define RMONCNT RTC_REG(6) /* RTC month */
  39. #define RYRCNT RTC_REG(7) /* RTC year */
  40. #define RSECAR RTC_REG(8) /* ALARM sec */
  41. #define RMINAR RTC_REG(9) /* ALARM min */
  42. #define RHRAR RTC_REG(10) /* ALARM hour */
  43. #define RWKAR RTC_REG(11) /* ALARM week */
  44. #define RDAYAR RTC_REG(12) /* ALARM day */
  45. #define RMONAR RTC_REG(13) /* ALARM month */
  46. #define RCR1 RTC_REG(14) /* Control */
  47. #define RCR2 RTC_REG(15) /* Control */
  48. /*
  49. * Note on RYRAR and RCR3: Up until this point most of the register
  50. * definitions are consistent across all of the available parts. However,
  51. * the placement of the optional RYRAR and RCR3 (the RYRAR control
  52. * register used to control RYRCNT/RYRAR compare) varies considerably
  53. * across various parts, occasionally being mapped in to a completely
  54. * unrelated address space. For proper RYRAR support a separate resource
  55. * would have to be handed off, but as this is purely optional in
  56. * practice, we simply opt not to support it, thereby keeping the code
  57. * quite a bit more simplified.
  58. */
  59. /* ALARM Bits - or with BCD encoded value */
  60. #define AR_ENB 0x80 /* Enable for alarm cmp */
  61. /* Period Bits */
  62. #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
  63. #define PF_COUNT 0x200 /* Half periodic counter */
  64. #define PF_OXS 0x400 /* Periodic One x Second */
  65. #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
  66. #define PF_MASK 0xf00
  67. /* RCR1 Bits */
  68. #define RCR1_CF 0x80 /* Carry Flag */
  69. #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
  70. #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
  71. #define RCR1_AF 0x01 /* Alarm Flag */
  72. /* RCR2 Bits */
  73. #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
  74. #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
  75. #define RCR2_RTCEN 0x08 /* ENable RTC */
  76. #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
  77. #define RCR2_RESET 0x02 /* Reset bit */
  78. #define RCR2_START 0x01 /* Start bit */
  79. struct sh_rtc {
  80. void __iomem *regbase;
  81. unsigned long regsize;
  82. struct resource *res;
  83. int alarm_irq;
  84. int periodic_irq;
  85. int carry_irq;
  86. struct rtc_device *rtc_dev;
  87. spinlock_t lock;
  88. unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */
  89. unsigned short periodic_freq;
  90. };
  91. static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
  92. {
  93. struct sh_rtc *rtc = dev_id;
  94. unsigned int tmp;
  95. spin_lock(&rtc->lock);
  96. tmp = readb(rtc->regbase + RCR1);
  97. tmp &= ~RCR1_CF;
  98. writeb(tmp, rtc->regbase + RCR1);
  99. /* Users have requested One x Second IRQ */
  100. if (rtc->periodic_freq & PF_OXS)
  101. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  102. spin_unlock(&rtc->lock);
  103. return IRQ_HANDLED;
  104. }
  105. static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
  106. {
  107. struct sh_rtc *rtc = dev_id;
  108. unsigned int tmp;
  109. spin_lock(&rtc->lock);
  110. tmp = readb(rtc->regbase + RCR1);
  111. tmp &= ~(RCR1_AF | RCR1_AIE);
  112. writeb(tmp, rtc->regbase + RCR1);
  113. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  114. spin_unlock(&rtc->lock);
  115. return IRQ_HANDLED;
  116. }
  117. static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
  118. {
  119. struct sh_rtc *rtc = dev_id;
  120. struct rtc_device *rtc_dev = rtc->rtc_dev;
  121. unsigned int tmp;
  122. spin_lock(&rtc->lock);
  123. tmp = readb(rtc->regbase + RCR2);
  124. tmp &= ~RCR2_PEF;
  125. writeb(tmp, rtc->regbase + RCR2);
  126. /* Half period enabled than one skipped and the next notified */
  127. if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
  128. rtc->periodic_freq &= ~PF_COUNT;
  129. else {
  130. if (rtc->periodic_freq & PF_HP)
  131. rtc->periodic_freq |= PF_COUNT;
  132. if (rtc->periodic_freq & PF_KOU) {
  133. spin_lock(&rtc_dev->irq_task_lock);
  134. if (rtc_dev->irq_task)
  135. rtc_dev->irq_task->func(rtc_dev->irq_task->private_data);
  136. spin_unlock(&rtc_dev->irq_task_lock);
  137. } else
  138. rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
  139. }
  140. spin_unlock(&rtc->lock);
  141. return IRQ_HANDLED;
  142. }
  143. static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
  144. {
  145. struct sh_rtc *rtc = dev_get_drvdata(dev);
  146. unsigned int tmp;
  147. spin_lock_irq(&rtc->lock);
  148. tmp = readb(rtc->regbase + RCR2);
  149. if (enable) {
  150. tmp &= ~RCR2_PEF; /* Clear PES bit */
  151. tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
  152. } else
  153. tmp &= ~(RCR2_PESMASK | RCR2_PEF);
  154. writeb(tmp, rtc->regbase + RCR2);
  155. spin_unlock_irq(&rtc->lock);
  156. }
  157. static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq)
  158. {
  159. struct sh_rtc *rtc = dev_get_drvdata(dev);
  160. int tmp, ret = 0;
  161. spin_lock_irq(&rtc->lock);
  162. tmp = rtc->periodic_freq & PF_MASK;
  163. switch (freq) {
  164. case 0:
  165. rtc->periodic_freq = 0x00;
  166. break;
  167. case 1:
  168. rtc->periodic_freq = 0x60;
  169. break;
  170. case 2:
  171. rtc->periodic_freq = 0x50;
  172. break;
  173. case 4:
  174. rtc->periodic_freq = 0x40;
  175. break;
  176. case 8:
  177. rtc->periodic_freq = 0x30 | PF_HP;
  178. break;
  179. case 16:
  180. rtc->periodic_freq = 0x30;
  181. break;
  182. case 32:
  183. rtc->periodic_freq = 0x20 | PF_HP;
  184. break;
  185. case 64:
  186. rtc->periodic_freq = 0x20;
  187. break;
  188. case 128:
  189. rtc->periodic_freq = 0x10 | PF_HP;
  190. break;
  191. case 256:
  192. rtc->periodic_freq = 0x10;
  193. break;
  194. default:
  195. ret = -ENOTSUPP;
  196. }
  197. if (ret == 0) {
  198. rtc->periodic_freq |= tmp;
  199. rtc->rtc_dev->irq_freq = freq;
  200. }
  201. spin_unlock_irq(&rtc->lock);
  202. return ret;
  203. }
  204. static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
  205. {
  206. struct sh_rtc *rtc = dev_get_drvdata(dev);
  207. unsigned int tmp;
  208. spin_lock_irq(&rtc->lock);
  209. tmp = readb(rtc->regbase + RCR1);
  210. if (!enable)
  211. tmp &= ~RCR1_AIE;
  212. else
  213. tmp |= RCR1_AIE;
  214. writeb(tmp, rtc->regbase + RCR1);
  215. spin_unlock_irq(&rtc->lock);
  216. }
  217. static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
  218. {
  219. struct sh_rtc *rtc = dev_get_drvdata(dev);
  220. unsigned int tmp;
  221. tmp = readb(rtc->regbase + RCR1);
  222. seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
  223. tmp = readb(rtc->regbase + RCR2);
  224. seq_printf(seq, "periodic_IRQ\t: %s\n",
  225. (tmp & RCR2_PESMASK) ? "yes" : "no");
  226. return 0;
  227. }
  228. static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  229. {
  230. struct sh_rtc *rtc = dev_get_drvdata(dev);
  231. unsigned int ret = 0;
  232. switch (cmd) {
  233. case RTC_PIE_OFF:
  234. case RTC_PIE_ON:
  235. sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
  236. break;
  237. case RTC_AIE_OFF:
  238. case RTC_AIE_ON:
  239. sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
  240. break;
  241. case RTC_UIE_OFF:
  242. rtc->periodic_freq &= ~PF_OXS;
  243. break;
  244. case RTC_UIE_ON:
  245. rtc->periodic_freq |= PF_OXS;
  246. break;
  247. case RTC_IRQP_READ:
  248. ret = put_user(rtc->rtc_dev->irq_freq,
  249. (unsigned long __user *)arg);
  250. break;
  251. case RTC_IRQP_SET:
  252. ret = sh_rtc_setfreq(dev, arg);
  253. break;
  254. default:
  255. ret = -ENOIOCTLCMD;
  256. }
  257. return ret;
  258. }
  259. static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
  260. {
  261. struct platform_device *pdev = to_platform_device(dev);
  262. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  263. unsigned int sec128, sec2, yr, yr100, cf_bit;
  264. do {
  265. unsigned int tmp;
  266. spin_lock_irq(&rtc->lock);
  267. tmp = readb(rtc->regbase + RCR1);
  268. tmp &= ~RCR1_CF; /* Clear CF-bit */
  269. tmp |= RCR1_CIE;
  270. writeb(tmp, rtc->regbase + RCR1);
  271. sec128 = readb(rtc->regbase + R64CNT);
  272. tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
  273. tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
  274. tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
  275. tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
  276. tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
  277. tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
  278. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  279. yr = readw(rtc->regbase + RYRCNT);
  280. yr100 = bcd2bin(yr >> 8);
  281. yr &= 0xff;
  282. } else {
  283. yr = readb(rtc->regbase + RYRCNT);
  284. yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
  285. }
  286. tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
  287. sec2 = readb(rtc->regbase + R64CNT);
  288. cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
  289. spin_unlock_irq(&rtc->lock);
  290. } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
  291. #if RTC_BIT_INVERTED != 0
  292. if ((sec128 & RTC_BIT_INVERTED))
  293. tm->tm_sec--;
  294. #endif
  295. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  296. "mday=%d, mon=%d, year=%d, wday=%d\n",
  297. __func__,
  298. tm->tm_sec, tm->tm_min, tm->tm_hour,
  299. tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
  300. if (rtc_valid_tm(tm) < 0) {
  301. dev_err(dev, "invalid date\n");
  302. rtc_time_to_tm(0, tm);
  303. }
  304. return 0;
  305. }
  306. static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
  307. {
  308. struct platform_device *pdev = to_platform_device(dev);
  309. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  310. unsigned int tmp;
  311. int year;
  312. spin_lock_irq(&rtc->lock);
  313. /* Reset pre-scaler & stop RTC */
  314. tmp = readb(rtc->regbase + RCR2);
  315. tmp |= RCR2_RESET;
  316. tmp &= ~RCR2_START;
  317. writeb(tmp, rtc->regbase + RCR2);
  318. writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
  319. writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
  320. writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
  321. writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
  322. writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
  323. writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
  324. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  325. year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
  326. bin2bcd(tm->tm_year % 100);
  327. writew(year, rtc->regbase + RYRCNT);
  328. } else {
  329. year = tm->tm_year % 100;
  330. writeb(bin2bcd(year), rtc->regbase + RYRCNT);
  331. }
  332. /* Start RTC */
  333. tmp = readb(rtc->regbase + RCR2);
  334. tmp &= ~RCR2_RESET;
  335. tmp |= RCR2_RTCEN | RCR2_START;
  336. writeb(tmp, rtc->regbase + RCR2);
  337. spin_unlock_irq(&rtc->lock);
  338. return 0;
  339. }
  340. static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
  341. {
  342. unsigned int byte;
  343. int value = 0xff; /* return 0xff for ignored values */
  344. byte = readb(rtc->regbase + reg_off);
  345. if (byte & AR_ENB) {
  346. byte &= ~AR_ENB; /* strip the enable bit */
  347. value = bcd2bin(byte);
  348. }
  349. return value;
  350. }
  351. static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  352. {
  353. struct platform_device *pdev = to_platform_device(dev);
  354. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  355. struct rtc_time *tm = &wkalrm->time;
  356. spin_lock_irq(&rtc->lock);
  357. tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
  358. tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
  359. tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
  360. tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
  361. tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
  362. tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
  363. if (tm->tm_mon > 0)
  364. tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
  365. tm->tm_year = 0xffff;
  366. wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
  367. spin_unlock_irq(&rtc->lock);
  368. return 0;
  369. }
  370. static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
  371. int value, int reg_off)
  372. {
  373. /* < 0 for a value that is ignored */
  374. if (value < 0)
  375. writeb(0, rtc->regbase + reg_off);
  376. else
  377. writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
  378. }
  379. static int sh_rtc_check_alarm(struct rtc_time *tm)
  380. {
  381. /*
  382. * The original rtc says anything > 0xc0 is "don't care" or "match
  383. * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
  384. * The original rtc doesn't support years - some things use -1 and
  385. * some 0xffff. We use -1 to make out tests easier.
  386. */
  387. if (tm->tm_year == 0xffff)
  388. tm->tm_year = -1;
  389. if (tm->tm_mon >= 0xff)
  390. tm->tm_mon = -1;
  391. if (tm->tm_mday >= 0xff)
  392. tm->tm_mday = -1;
  393. if (tm->tm_wday >= 0xff)
  394. tm->tm_wday = -1;
  395. if (tm->tm_hour >= 0xff)
  396. tm->tm_hour = -1;
  397. if (tm->tm_min >= 0xff)
  398. tm->tm_min = -1;
  399. if (tm->tm_sec >= 0xff)
  400. tm->tm_sec = -1;
  401. if (tm->tm_year > 9999 ||
  402. tm->tm_mon >= 12 ||
  403. tm->tm_mday == 0 || tm->tm_mday >= 32 ||
  404. tm->tm_wday >= 7 ||
  405. tm->tm_hour >= 24 ||
  406. tm->tm_min >= 60 ||
  407. tm->tm_sec >= 60)
  408. return -EINVAL;
  409. return 0;
  410. }
  411. static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  412. {
  413. struct platform_device *pdev = to_platform_device(dev);
  414. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  415. unsigned int rcr1;
  416. struct rtc_time *tm = &wkalrm->time;
  417. int mon, err;
  418. err = sh_rtc_check_alarm(tm);
  419. if (unlikely(err < 0))
  420. return err;
  421. spin_lock_irq(&rtc->lock);
  422. /* disable alarm interrupt and clear the alarm flag */
  423. rcr1 = readb(rtc->regbase + RCR1);
  424. rcr1 &= ~(RCR1_AF | RCR1_AIE);
  425. writeb(rcr1, rtc->regbase + RCR1);
  426. /* set alarm time */
  427. sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
  428. sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
  429. sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
  430. sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
  431. sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
  432. mon = tm->tm_mon;
  433. if (mon >= 0)
  434. mon += 1;
  435. sh_rtc_write_alarm_value(rtc, mon, RMONAR);
  436. if (wkalrm->enabled) {
  437. rcr1 |= RCR1_AIE;
  438. writeb(rcr1, rtc->regbase + RCR1);
  439. }
  440. spin_unlock_irq(&rtc->lock);
  441. return 0;
  442. }
  443. static int sh_rtc_irq_set_state(struct device *dev, int enabled)
  444. {
  445. struct platform_device *pdev = to_platform_device(dev);
  446. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  447. if (enabled) {
  448. rtc->periodic_freq |= PF_KOU;
  449. return sh_rtc_ioctl(dev, RTC_PIE_ON, 0);
  450. } else {
  451. rtc->periodic_freq &= ~PF_KOU;
  452. return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0);
  453. }
  454. }
  455. static int sh_rtc_irq_set_freq(struct device *dev, int freq)
  456. {
  457. if (!is_power_of_2(freq))
  458. return -EINVAL;
  459. return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq);
  460. }
  461. static struct rtc_class_ops sh_rtc_ops = {
  462. .ioctl = sh_rtc_ioctl,
  463. .read_time = sh_rtc_read_time,
  464. .set_time = sh_rtc_set_time,
  465. .read_alarm = sh_rtc_read_alarm,
  466. .set_alarm = sh_rtc_set_alarm,
  467. .irq_set_state = sh_rtc_irq_set_state,
  468. .irq_set_freq = sh_rtc_irq_set_freq,
  469. .proc = sh_rtc_proc,
  470. };
  471. static int __devinit sh_rtc_probe(struct platform_device *pdev)
  472. {
  473. struct sh_rtc *rtc;
  474. struct resource *res;
  475. unsigned int tmp;
  476. int ret;
  477. rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
  478. if (unlikely(!rtc))
  479. return -ENOMEM;
  480. spin_lock_init(&rtc->lock);
  481. /* get periodic/carry/alarm irqs */
  482. ret = platform_get_irq(pdev, 0);
  483. if (unlikely(ret <= 0)) {
  484. ret = -ENOENT;
  485. dev_err(&pdev->dev, "No IRQ for period\n");
  486. goto err_badres;
  487. }
  488. rtc->periodic_irq = ret;
  489. ret = platform_get_irq(pdev, 1);
  490. if (unlikely(ret <= 0)) {
  491. ret = -ENOENT;
  492. dev_err(&pdev->dev, "No IRQ for carry\n");
  493. goto err_badres;
  494. }
  495. rtc->carry_irq = ret;
  496. ret = platform_get_irq(pdev, 2);
  497. if (unlikely(ret <= 0)) {
  498. ret = -ENOENT;
  499. dev_err(&pdev->dev, "No IRQ for alarm\n");
  500. goto err_badres;
  501. }
  502. rtc->alarm_irq = ret;
  503. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  504. if (unlikely(res == NULL)) {
  505. ret = -ENOENT;
  506. dev_err(&pdev->dev, "No IO resource\n");
  507. goto err_badres;
  508. }
  509. rtc->regsize = res->end - res->start + 1;
  510. rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
  511. if (unlikely(!rtc->res)) {
  512. ret = -EBUSY;
  513. goto err_badres;
  514. }
  515. rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
  516. if (unlikely(!rtc->regbase)) {
  517. ret = -EINVAL;
  518. goto err_badmap;
  519. }
  520. rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
  521. &sh_rtc_ops, THIS_MODULE);
  522. if (IS_ERR(rtc->rtc_dev)) {
  523. ret = PTR_ERR(rtc->rtc_dev);
  524. goto err_unmap;
  525. }
  526. rtc->capabilities = RTC_DEF_CAPABILITIES;
  527. if (pdev->dev.platform_data) {
  528. struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
  529. /*
  530. * Some CPUs have special capabilities in addition to the
  531. * default set. Add those in here.
  532. */
  533. rtc->capabilities |= pinfo->capabilities;
  534. }
  535. rtc->rtc_dev->max_user_freq = 256;
  536. rtc->rtc_dev->irq_freq = 1;
  537. rtc->periodic_freq = 0x60;
  538. platform_set_drvdata(pdev, rtc);
  539. /* register periodic/carry/alarm irqs */
  540. ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, IRQF_DISABLED,
  541. "sh-rtc period", rtc);
  542. if (unlikely(ret)) {
  543. dev_err(&pdev->dev,
  544. "request period IRQ failed with %d, IRQ %d\n", ret,
  545. rtc->periodic_irq);
  546. goto err_unmap;
  547. }
  548. ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED,
  549. "sh-rtc carry", rtc);
  550. if (unlikely(ret)) {
  551. dev_err(&pdev->dev,
  552. "request carry IRQ failed with %d, IRQ %d\n", ret,
  553. rtc->carry_irq);
  554. free_irq(rtc->periodic_irq, rtc);
  555. goto err_unmap;
  556. }
  557. ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED,
  558. "sh-rtc alarm", rtc);
  559. if (unlikely(ret)) {
  560. dev_err(&pdev->dev,
  561. "request alarm IRQ failed with %d, IRQ %d\n", ret,
  562. rtc->alarm_irq);
  563. free_irq(rtc->carry_irq, rtc);
  564. free_irq(rtc->periodic_irq, rtc);
  565. goto err_unmap;
  566. }
  567. tmp = readb(rtc->regbase + RCR1);
  568. tmp &= ~RCR1_CF;
  569. tmp |= RCR1_CIE;
  570. writeb(tmp, rtc->regbase + RCR1);
  571. return 0;
  572. err_unmap:
  573. iounmap(rtc->regbase);
  574. err_badmap:
  575. release_resource(rtc->res);
  576. err_badres:
  577. kfree(rtc);
  578. return ret;
  579. }
  580. static int __devexit sh_rtc_remove(struct platform_device *pdev)
  581. {
  582. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  583. if (likely(rtc->rtc_dev))
  584. rtc_device_unregister(rtc->rtc_dev);
  585. sh_rtc_setpie(&pdev->dev, 0);
  586. sh_rtc_setaie(&pdev->dev, 0);
  587. free_irq(rtc->carry_irq, rtc);
  588. free_irq(rtc->periodic_irq, rtc);
  589. free_irq(rtc->alarm_irq, rtc);
  590. release_resource(rtc->res);
  591. iounmap(rtc->regbase);
  592. platform_set_drvdata(pdev, NULL);
  593. kfree(rtc);
  594. return 0;
  595. }
  596. static struct platform_driver sh_rtc_platform_driver = {
  597. .driver = {
  598. .name = DRV_NAME,
  599. .owner = THIS_MODULE,
  600. },
  601. .probe = sh_rtc_probe,
  602. .remove = __devexit_p(sh_rtc_remove),
  603. };
  604. static int __init sh_rtc_init(void)
  605. {
  606. return platform_driver_register(&sh_rtc_platform_driver);
  607. }
  608. static void __exit sh_rtc_exit(void)
  609. {
  610. platform_driver_unregister(&sh_rtc_platform_driver);
  611. }
  612. module_init(sh_rtc_init);
  613. module_exit(sh_rtc_exit);
  614. MODULE_DESCRIPTION("SuperH on-chip RTC driver");
  615. MODULE_VERSION(DRV_VERSION);
  616. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
  617. "Jamie Lenehan <lenehan@twibble.org>, "
  618. "Angelo Castello <angelo.castello@st.com>");
  619. MODULE_LICENSE("GPL");
  620. MODULE_ALIAS("platform:" DRV_NAME);