system.c 2.3 KB

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  1. /*
  2. * Copyright (C) 1999 ARM Limited
  3. * Copyright (C) 2000 Deep Blue Solutions Ltd
  4. * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  5. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
  6. * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/clk.h>
  20. #include <linux/io.h>
  21. #include <linux/err.h>
  22. #include <linux/delay.h>
  23. #include <linux/of.h>
  24. #include <linux/of_address.h>
  25. #include <asm/system_misc.h>
  26. #include <asm/proc-fns.h>
  27. #include <asm/mach-types.h>
  28. #include "common.h"
  29. #include "hardware.h"
  30. static void __iomem *wdog_base;
  31. static struct clk *wdog_clk;
  32. /*
  33. * Reset the system. It is called by machine_restart().
  34. */
  35. void mxc_restart(enum reboot_mode mode, const char *cmd)
  36. {
  37. unsigned int wcr_enable;
  38. if (wdog_clk)
  39. clk_enable(wdog_clk);
  40. if (cpu_is_mx1())
  41. wcr_enable = (1 << 0);
  42. else
  43. wcr_enable = (1 << 2);
  44. /* Assert SRS signal */
  45. __raw_writew(wcr_enable, wdog_base);
  46. /* wait for reset to assert... */
  47. mdelay(500);
  48. pr_err("%s: Watchdog reset failed to assert reset\n", __func__);
  49. /* delay to allow the serial port to show the message */
  50. mdelay(50);
  51. /* we'll take a jump through zero as a poor second */
  52. soft_restart(0);
  53. }
  54. void __init mxc_arch_reset_init(void __iomem *base)
  55. {
  56. wdog_base = base;
  57. wdog_clk = clk_get_sys("imx2-wdt.0", NULL);
  58. if (IS_ERR(wdog_clk)) {
  59. pr_warn("%s: failed to get wdog clock\n", __func__);
  60. wdog_clk = NULL;
  61. return;
  62. }
  63. clk_prepare(wdog_clk);
  64. }
  65. void __init mxc_arch_reset_init_dt(void)
  66. {
  67. struct device_node *np;
  68. np = of_find_compatible_node(NULL, NULL, "fsl,imx21-wdt");
  69. wdog_base = of_iomap(np, 0);
  70. WARN_ON(!wdog_base);
  71. wdog_clk = of_clk_get(np, 0);
  72. if (IS_ERR(wdog_clk)) {
  73. pr_warn("%s: failed to get wdog clock\n", __func__);
  74. wdog_clk = NULL;
  75. return;
  76. }
  77. clk_prepare(wdog_clk);
  78. }