common.c 13 KB

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  1. /*
  2. * Low-Level PCI Support for PC
  3. *
  4. * (c) 1999--2000 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/pci.h>
  8. #include <linux/ioport.h>
  9. #include <linux/init.h>
  10. #include <linux/dmi.h>
  11. #include <asm/acpi.h>
  12. #include <asm/segment.h>
  13. #include <asm/io.h>
  14. #include <asm/smp.h>
  15. #include "pci.h"
  16. unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  17. PCI_PROBE_MMCONF;
  18. static int pci_bf_sort;
  19. int pci_routeirq;
  20. int pcibios_last_bus = -1;
  21. unsigned long pirq_table_addr;
  22. struct pci_bus *pci_root_bus;
  23. struct pci_raw_ops *raw_pci_ops;
  24. struct pci_raw_ops *raw_pci_ext_ops;
  25. int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
  26. int reg, int len, u32 *val)
  27. {
  28. if (reg < 256 && raw_pci_ops)
  29. return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
  30. if (raw_pci_ext_ops)
  31. return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
  32. return -EINVAL;
  33. }
  34. int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
  35. int reg, int len, u32 val)
  36. {
  37. if (reg < 256 && raw_pci_ops)
  38. return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
  39. if (raw_pci_ext_ops)
  40. return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
  41. return -EINVAL;
  42. }
  43. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  44. {
  45. return raw_pci_read(pci_domain_nr(bus), bus->number,
  46. devfn, where, size, value);
  47. }
  48. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  49. {
  50. return raw_pci_write(pci_domain_nr(bus), bus->number,
  51. devfn, where, size, value);
  52. }
  53. struct pci_ops pci_root_ops = {
  54. .read = pci_read,
  55. .write = pci_write,
  56. };
  57. /*
  58. * legacy, numa, and acpi all want to call pcibios_scan_root
  59. * from their initcalls. This flag prevents that.
  60. */
  61. int pcibios_scanned;
  62. /*
  63. * This interrupt-safe spinlock protects all accesses to PCI
  64. * configuration space.
  65. */
  66. DEFINE_SPINLOCK(pci_config_lock);
  67. static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
  68. {
  69. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  70. printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
  71. return 0;
  72. }
  73. static struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitdata = {
  74. /*
  75. * Systems where PCI IO resource ISA alignment can be skipped
  76. * when the ISA enable bit in the bridge control is not set
  77. */
  78. {
  79. .callback = can_skip_ioresource_align,
  80. .ident = "IBM System x3800",
  81. .matches = {
  82. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  83. DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  84. },
  85. },
  86. {
  87. .callback = can_skip_ioresource_align,
  88. .ident = "IBM System x3850",
  89. .matches = {
  90. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  91. DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
  92. },
  93. },
  94. {
  95. .callback = can_skip_ioresource_align,
  96. .ident = "IBM System x3950",
  97. .matches = {
  98. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  99. DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
  100. },
  101. },
  102. {}
  103. };
  104. void __init dmi_check_skip_isa_align(void)
  105. {
  106. dmi_check_system(can_skip_pciprobe_dmi_table);
  107. }
  108. /*
  109. * Called after each bus is probed, but before its children
  110. * are examined.
  111. */
  112. void __devinit pcibios_fixup_bus(struct pci_bus *b)
  113. {
  114. pci_read_bridge_bases(b);
  115. }
  116. /*
  117. * Only use DMI information to set this if nothing was passed
  118. * on the kernel command line (which was parsed earlier).
  119. */
  120. static int __devinit set_bf_sort(const struct dmi_system_id *d)
  121. {
  122. if (pci_bf_sort == pci_bf_sort_default) {
  123. pci_bf_sort = pci_dmi_bf;
  124. printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
  125. }
  126. return 0;
  127. }
  128. /*
  129. * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
  130. */
  131. #ifdef __i386__
  132. static int __devinit assign_all_busses(const struct dmi_system_id *d)
  133. {
  134. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  135. printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
  136. " (pci=assign-busses)\n", d->ident);
  137. return 0;
  138. }
  139. #endif
  140. static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
  141. #ifdef __i386__
  142. /*
  143. * Laptops which need pci=assign-busses to see Cardbus cards
  144. */
  145. {
  146. .callback = assign_all_busses,
  147. .ident = "Samsung X20 Laptop",
  148. .matches = {
  149. DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
  150. DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
  151. },
  152. },
  153. #endif /* __i386__ */
  154. {
  155. .callback = set_bf_sort,
  156. .ident = "Dell PowerEdge 1950",
  157. .matches = {
  158. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  159. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
  160. },
  161. },
  162. {
  163. .callback = set_bf_sort,
  164. .ident = "Dell PowerEdge 1955",
  165. .matches = {
  166. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  167. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
  168. },
  169. },
  170. {
  171. .callback = set_bf_sort,
  172. .ident = "Dell PowerEdge 2900",
  173. .matches = {
  174. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  175. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
  176. },
  177. },
  178. {
  179. .callback = set_bf_sort,
  180. .ident = "Dell PowerEdge 2950",
  181. .matches = {
  182. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  183. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
  184. },
  185. },
  186. {
  187. .callback = set_bf_sort,
  188. .ident = "Dell PowerEdge R900",
  189. .matches = {
  190. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  191. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
  192. },
  193. },
  194. {
  195. .callback = set_bf_sort,
  196. .ident = "HP ProLiant BL20p G3",
  197. .matches = {
  198. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  199. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
  200. },
  201. },
  202. {
  203. .callback = set_bf_sort,
  204. .ident = "HP ProLiant BL20p G4",
  205. .matches = {
  206. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  207. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
  208. },
  209. },
  210. {
  211. .callback = set_bf_sort,
  212. .ident = "HP ProLiant BL30p G1",
  213. .matches = {
  214. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  215. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
  216. },
  217. },
  218. {
  219. .callback = set_bf_sort,
  220. .ident = "HP ProLiant BL25p G1",
  221. .matches = {
  222. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  223. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
  224. },
  225. },
  226. {
  227. .callback = set_bf_sort,
  228. .ident = "HP ProLiant BL35p G1",
  229. .matches = {
  230. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  231. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
  232. },
  233. },
  234. {
  235. .callback = set_bf_sort,
  236. .ident = "HP ProLiant BL45p G1",
  237. .matches = {
  238. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  239. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
  240. },
  241. },
  242. {
  243. .callback = set_bf_sort,
  244. .ident = "HP ProLiant BL45p G2",
  245. .matches = {
  246. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  247. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
  248. },
  249. },
  250. {
  251. .callback = set_bf_sort,
  252. .ident = "HP ProLiant BL460c G1",
  253. .matches = {
  254. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  255. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
  256. },
  257. },
  258. {
  259. .callback = set_bf_sort,
  260. .ident = "HP ProLiant BL465c G1",
  261. .matches = {
  262. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  263. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
  264. },
  265. },
  266. {
  267. .callback = set_bf_sort,
  268. .ident = "HP ProLiant BL480c G1",
  269. .matches = {
  270. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  271. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
  272. },
  273. },
  274. {
  275. .callback = set_bf_sort,
  276. .ident = "HP ProLiant BL685c G1",
  277. .matches = {
  278. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  279. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
  280. },
  281. },
  282. {
  283. .callback = set_bf_sort,
  284. .ident = "HP ProLiant DL360",
  285. .matches = {
  286. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  287. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
  288. },
  289. },
  290. {
  291. .callback = set_bf_sort,
  292. .ident = "HP ProLiant DL380",
  293. .matches = {
  294. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  295. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
  296. },
  297. },
  298. #ifdef __i386__
  299. {
  300. .callback = assign_all_busses,
  301. .ident = "Compaq EVO N800c",
  302. .matches = {
  303. DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
  304. DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
  305. },
  306. },
  307. #endif
  308. {
  309. .callback = set_bf_sort,
  310. .ident = "HP ProLiant DL385 G2",
  311. .matches = {
  312. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  313. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
  314. },
  315. },
  316. {
  317. .callback = set_bf_sort,
  318. .ident = "HP ProLiant DL585 G2",
  319. .matches = {
  320. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  321. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
  322. },
  323. },
  324. {}
  325. };
  326. void __init dmi_check_pciprobe(void)
  327. {
  328. dmi_check_system(pciprobe_dmi_table);
  329. }
  330. struct pci_bus * __devinit pcibios_scan_root(int busnum)
  331. {
  332. struct pci_bus *bus = NULL;
  333. struct pci_sysdata *sd;
  334. while ((bus = pci_find_next_bus(bus)) != NULL) {
  335. if (bus->number == busnum) {
  336. /* Already scanned */
  337. return bus;
  338. }
  339. }
  340. /* Allocate per-root-bus (not per bus) arch-specific data.
  341. * TODO: leak; this memory is never freed.
  342. * It's arguable whether it's worth the trouble to care.
  343. */
  344. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  345. if (!sd) {
  346. printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
  347. return NULL;
  348. }
  349. sd->node = get_mp_bus_to_node(busnum);
  350. printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
  351. bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
  352. if (!bus)
  353. kfree(sd);
  354. return bus;
  355. }
  356. extern u8 pci_cache_line_size;
  357. static int __init pcibios_init(void)
  358. {
  359. struct cpuinfo_x86 *c = &boot_cpu_data;
  360. if (!raw_pci_ops) {
  361. printk(KERN_WARNING "PCI: System does not support PCI\n");
  362. return 0;
  363. }
  364. /*
  365. * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
  366. * and P4. It's also good for 386/486s (which actually have 16)
  367. * as quite a few PCI devices do not support smaller values.
  368. */
  369. pci_cache_line_size = 32 >> 2;
  370. if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
  371. pci_cache_line_size = 64 >> 2; /* K7 & K8 */
  372. else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
  373. pci_cache_line_size = 128 >> 2; /* P4 */
  374. pcibios_resource_survey();
  375. if (pci_bf_sort >= pci_force_bf)
  376. pci_sort_breadthfirst();
  377. return 0;
  378. }
  379. subsys_initcall(pcibios_init);
  380. char * __devinit pcibios_setup(char *str)
  381. {
  382. if (!strcmp(str, "off")) {
  383. pci_probe = 0;
  384. return NULL;
  385. } else if (!strcmp(str, "bfsort")) {
  386. pci_bf_sort = pci_force_bf;
  387. return NULL;
  388. } else if (!strcmp(str, "nobfsort")) {
  389. pci_bf_sort = pci_force_nobf;
  390. return NULL;
  391. }
  392. #ifdef CONFIG_PCI_BIOS
  393. else if (!strcmp(str, "bios")) {
  394. pci_probe = PCI_PROBE_BIOS;
  395. return NULL;
  396. } else if (!strcmp(str, "nobios")) {
  397. pci_probe &= ~PCI_PROBE_BIOS;
  398. return NULL;
  399. } else if (!strcmp(str, "biosirq")) {
  400. pci_probe |= PCI_BIOS_IRQ_SCAN;
  401. return NULL;
  402. } else if (!strncmp(str, "pirqaddr=", 9)) {
  403. pirq_table_addr = simple_strtoul(str+9, NULL, 0);
  404. return NULL;
  405. }
  406. #endif
  407. #ifdef CONFIG_PCI_DIRECT
  408. else if (!strcmp(str, "conf1")) {
  409. pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
  410. return NULL;
  411. }
  412. else if (!strcmp(str, "conf2")) {
  413. pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
  414. return NULL;
  415. }
  416. #endif
  417. #ifdef CONFIG_PCI_MMCONFIG
  418. else if (!strcmp(str, "nommconf")) {
  419. pci_probe &= ~PCI_PROBE_MMCONF;
  420. return NULL;
  421. }
  422. else if (!strcmp(str, "check_enable_amd_mmconf")) {
  423. pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
  424. return NULL;
  425. }
  426. #endif
  427. else if (!strcmp(str, "noacpi")) {
  428. acpi_noirq_set();
  429. return NULL;
  430. }
  431. else if (!strcmp(str, "noearly")) {
  432. pci_probe |= PCI_PROBE_NOEARLY;
  433. return NULL;
  434. }
  435. #ifndef CONFIG_X86_VISWS
  436. else if (!strcmp(str, "usepirqmask")) {
  437. pci_probe |= PCI_USE_PIRQ_MASK;
  438. return NULL;
  439. } else if (!strncmp(str, "irqmask=", 8)) {
  440. pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
  441. return NULL;
  442. } else if (!strncmp(str, "lastbus=", 8)) {
  443. pcibios_last_bus = simple_strtol(str+8, NULL, 0);
  444. return NULL;
  445. }
  446. #endif
  447. else if (!strcmp(str, "rom")) {
  448. pci_probe |= PCI_ASSIGN_ROMS;
  449. return NULL;
  450. } else if (!strcmp(str, "assign-busses")) {
  451. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  452. return NULL;
  453. } else if (!strcmp(str, "use_crs")) {
  454. pci_probe |= PCI_USE__CRS;
  455. return NULL;
  456. } else if (!strcmp(str, "routeirq")) {
  457. pci_routeirq = 1;
  458. return NULL;
  459. } else if (!strcmp(str, "skip_isa_align")) {
  460. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  461. return NULL;
  462. }
  463. return str;
  464. }
  465. unsigned int pcibios_assign_all_busses(void)
  466. {
  467. return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
  468. }
  469. int pcibios_enable_device(struct pci_dev *dev, int mask)
  470. {
  471. int err;
  472. if ((err = pci_enable_resources(dev, mask)) < 0)
  473. return err;
  474. if (!dev->msi_enabled)
  475. return pcibios_enable_irq(dev);
  476. return 0;
  477. }
  478. void pcibios_disable_device (struct pci_dev *dev)
  479. {
  480. if (!dev->msi_enabled && pcibios_disable_irq)
  481. pcibios_disable_irq(dev);
  482. }
  483. struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
  484. {
  485. struct pci_bus *bus = NULL;
  486. struct pci_sysdata *sd;
  487. /*
  488. * Allocate per-root-bus (not per bus) arch-specific data.
  489. * TODO: leak; this memory is never freed.
  490. * It's arguable whether it's worth the trouble to care.
  491. */
  492. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  493. if (!sd) {
  494. printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
  495. return NULL;
  496. }
  497. sd->node = node;
  498. bus = pci_scan_bus(busno, ops, sd);
  499. if (!bus)
  500. kfree(sd);
  501. return bus;
  502. }
  503. struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
  504. {
  505. return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
  506. }